diff options
| author | Andrew Donnellan <andrew.donnellan@au1.ibm.com> | 2018-09-14 13:46:23 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2018-09-17 21:39:01 -0500 |
| commit | 7ecb29651c311e35e30fbbebc675cae3e97c8d53 (patch) | |
| tree | 464ef7b3cc7225d14530f963b94fd08c6b3c19d3 /include | |
| parent | ecc4a562b5d17487899765609cb480629bacecde (diff) | |
| download | blackbird-skiboot-7ecb29651c311e35e30fbbebc675cae3e97c8d53.tar.gz blackbird-skiboot-7ecb29651c311e35e30fbbebc675cae3e97c8d53.zip | |
npu2: Split device index into brick and link index
On Witherspoon, OpenCAPI devices attached to link indexes 0 and 1 are
handled by bricks 2 and 3.
Rename index to brick_index, and add a new field, link_index, to
refer to the link index. For now, we set those values identically.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Acked-by: Reza Arbab <arbab@linux.ibm.com>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/npu2-regs.h | 14 | ||||
| -rw-r--r-- | include/npu2.h | 7 |
2 files changed, 11 insertions, 10 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 6bd77e48..8c1ba5ff 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -44,19 +44,19 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base, (((stack) << 20) | ((block) << 16) | (offset)) #define NPU2_NTL_REG_OFFSET(ndev, offset) \ - NPU2_REG_OFFSET(NPU2_STACK_STCK_0 + ((ndev)->index >> 1), \ - NPU2_BLOCK_NTL0 + ((ndev)->index % 2)*2, offset) + NPU2_REG_OFFSET(NPU2_STACK_STCK_0 + ((ndev)->brick_index >> 1), \ + NPU2_BLOCK_NTL0 + ((ndev)->brick_index % 2)*2, offset) #define NPU2_NTLU_REG_OFFSET(ndev, offset) \ - NPU2_REG_OFFSET(NPU2_STACK_STCK_0U + ((ndev)->index >> 1), \ - NPU2_BLOCK_NTL0 + ((ndev)->index % 2)*2, offset) + NPU2_REG_OFFSET(NPU2_STACK_STCK_0U + ((ndev)->brick_index >> 1), \ + NPU2_BLOCK_NTL0 + ((ndev)->brick_index % 2)*2, offset) #define NPU2_DL_REG_OFFSET(ndev, offset) \ - NPU2_REG_OFFSET(((ndev)->index >> 1), \ - 8 + ((ndev)->index % 2)*2, offset) + NPU2_REG_OFFSET(((ndev)->brick_index >> 1), \ + 8 + ((ndev)->brick_index % 2)*2, offset) #define NPU2_SM_REG_OFFSET(ndev, sm, offset) \ - NPU2_REG_OFFSET(NPU2_STACK_STCK_0 + ((ndev)->index >> 1), \ + NPU2_REG_OFFSET(NPU2_STACK_STCK_0 + ((ndev)->brick_index >> 1), \ NPU2_BLOCK_SM_0 + (sm), offset) /* Get the offset for this register */ diff --git a/include/npu2.h b/include/npu2.h index 4c2e20e0..10742031 100644 --- a/include/npu2.h +++ b/include/npu2.h @@ -47,10 +47,10 @@ #define NPU2_DEV_DL_RESET 0x2 /* Return the stack (0-2) of a device */ -#define NPU2DEV_STACK(ndev) ((ndev)->index / 2) +#define NPU2DEV_STACK(ndev) ((ndev)->brick_index / 2) /* Return the brick number (0-1) within a stack */ -#define NPU2DEV_BRICK(ndev) ((ndev)->index % 2) +#define NPU2DEV_BRICK(ndev) ((ndev)->brick_index % 2) /* This represents the state of the actual hardware BARs not the * emulated PCIe BARs. The is a subtle difference between the two as @@ -111,7 +111,8 @@ struct npu2_dev_nvlink { struct npu2_dev { enum npu2_dev_type type; - uint32_t index; + uint32_t link_index; + uint32_t brick_index; uint64_t pl_xscom_base; struct dt_node *dt_node; struct npu2_pcie_bar bars[2]; |
