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authorAlistair Popple <alistair@popple.id.au>2017-05-05 17:37:14 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-05-10 14:32:22 +1000
commit5d206f0b23f6765a914b9d35cab2b75bf9dae451 (patch)
treef2aaf7778a6943df1049675f6ed75731b10b7ee2 /include/npu2.h
parentdc670cc0ab49d14ca07de0570a9fd824fcbe8ffe (diff)
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npu2: Fix BAR mapping for multiple chips
NPU2 BARs were being assigned and tracked with a global static array. This worked fine when there was only a single chip/NPU2 in the system however multiple chips results in the a shared data structure for BAR management which results in multiple chips getting assigned the same BAR addresses and other incorrect sharing of BAR properties. This patch splits the static and dynamic BAR configuration and stores the dynamic configuration in the per-NPU2 data structure. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/npu2.h')
-rw-r--r--include/npu2.h14
1 files changed, 2 insertions, 12 deletions
diff --git a/include/npu2.h b/include/npu2.h
index 64d6dc09..d15b2c9c 100644
--- a/include/npu2.h
+++ b/include/npu2.h
@@ -53,17 +53,9 @@ struct npu2_bar {
#define NPU2_BAR_FLAG_ENABLED0 0x0080
#define NPU2_BAR_FLAG_ENABLED1 0x0100
uint32_t flags;
-
-#define NPU2_BAR_TYPE_GLOBAL 0
-#define NPU2_BAR_TYPE_PHY 1
-#define NPU2_BAR_TYPE_NTL 2
-#define NPU2_BAR_TYPE_GENID 3
-#define NPU2_BAR_TYPE_MAX 4
- uint32_t type;
- uint64_t reg;
- uint64_t stack;
uint64_t base;
uint64_t size;
+ uint64_t reg;
};
/* Rpresents a BAR that is exposed via the PCIe emulated
@@ -72,9 +64,7 @@ struct npu2_pcie_bar {
#define NPU2_PCIE_BAR_FLAG_SIZE_HI 0x0020
#define NPU2_PCIE_BAR_FLAG_TRAPPED 0x0040
uint32_t flags;
- struct npu2_bar *npu2_bar;
- uint64_t base;
- uint64_t size;
+ struct npu2_bar npu2_bar;
};
struct npu2;
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