diff options
| author | Michael Neuling <mikey@neuling.org> | 2017-11-14 22:23:06 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-11-15 01:03:53 -0600 |
| commit | c76636f3d73fbbc3a1f56ca085eb80f9e56d0411 (patch) | |
| tree | c4de95dd9ec2888528ff5c5643ffba939d699e56 /include/npu2-regs.h | |
| parent | 74d9a50ac2a79d39b07bbe7d7e0bbb72f7f5b026 (diff) | |
| download | blackbird-skiboot-c76636f3d73fbbc3a1f56ca085eb80f9e56d0411.tar.gz blackbird-skiboot-c76636f3d73fbbc3a1f56ca085eb80f9e56d0411.zip | |
npu2: Move to new GPU memory map
There are three different ways we configure the MCD and memory map.
1) Old way (current way)
Skiboot configures the MCD and puts GPUs at 4TB and below
2) New way with MCD
Hostboot configures the MCD and skiboot puts GPU at 4TB and above
3) New way without MCD
No one configures the MCD and skiboot puts GPU at 4TB and below
The patch keeps option 1 and adds options 2 and 3.
The different configurations are detected using certain scoms (see
patch).
Option 1 will go away eventually as it's a configuration that can
cause xstops or data integrity problems. We are keeping it around to
support existing hostboot.
Option 2 supports only 4 GPUs and 512GB of memory per socket.
Option 3 supports 6 GPUs and 4TB of memory but may have some
performance impact.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/npu2-regs.h')
| -rw-r--r-- | include/npu2-regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h index ae556612..2d3fc3e1 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -31,6 +31,11 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask); #define MCD_BANK_CN_VALID PPC_BIT(0) #define MCD_BANK_CN_SIZE PPC_BITMASK(13,29) #define MCD_BANK_CN_ADDR PPC_BITMASK(33,63) +#define PB_CENT_HP_MODE_CURR 0x5011c0c +#define PB_CFG_CHG_RATE_GP_MASTER PPC_BIT(2) +#define PB_CENT_MODE 0x5011c0a +#define PB_CFG_CHIP_ADDR_EXTENSION_MASK_CENT PPC_BITMASK(42,48) + #define NPU2_REG_OFFSET(stack, block, offset) \ (((stack) << 20) | ((block) << 16) | (offset)) |
