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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-08-09 16:38:17 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2016-08-11 19:54:22 +1000 |
| commit | 95e7a10634067bd51d1efdf0fac88d75a678014d (patch) | |
| tree | 4c07c59064e0787921118fac60684d5b40889a6a /include/lpc.h | |
| parent | ae98dc00c89dd3d60042e6e62ac6fe6b275bc39c (diff) | |
| download | blackbird-skiboot-95e7a10634067bd51d1efdf0fac88d75a678014d.tar.gz blackbird-skiboot-95e7a10634067bd51d1efdf0fac88d75a678014d.zip | |
lpc: Add routing support for SerIRQs
We can route them to any of 4 PSI interrupts. We use the device-tree
to determine the default routing
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include/lpc.h')
| -rw-r--r-- | include/lpc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/lpc.h b/include/lpc.h index f1731450..59f0779f 100644 --- a/include/lpc.h +++ b/include/lpc.h @@ -95,6 +95,9 @@ struct lpc_client { extern void lpc_register_client(uint32_t chip_id, const struct lpc_client *clt); +/* Manual control of routing on P9 for use by platforms if necessary */ +extern void lpc_route_serirq(uint32_t chip_id, uint32_t sirq, uint32_t psi_idx); + /* Default bus accessors */ extern int64_t lpc_write(enum OpalLPCAddressType addr_type, uint32_t addr, uint32_t data, uint32_t sz); |
