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authorAlexey Kardashevskiy <aik@ozlabs.ru>2018-12-06 19:29:10 +1100
committerStewart Smith <stewart@linux.ibm.com>2018-12-10 22:21:12 -0600
commit003ccd5775161d352c53cac3d00c6283eb036ffc (patch)
tree4f793cbfb1658281e43b8a9df1908a2d5ad4ffdd /hw
parent10497d05169fe6e05cecb762a35c63c164469819 (diff)
downloadblackbird-skiboot-003ccd5775161d352c53cac3d00c6283eb036ffc.tar.gz
blackbird-skiboot-003ccd5775161d352c53cac3d00c6283eb036ffc.zip
npu2: Advertise correct TCE page size
The P9 NPU workbook says that only 4K/64K/16M/256M page size are supported and in fact npu2_map_pe_dma_window() supports just these but in absence of the "ibm,supported-tce-sizes" property Linux assumes the default P9 PHB4 page sizes - 4K/64K/2M/1G - so when Linux tries 2M/1G TCEs, we get lots of "Unexpected TCE size" from npu2_tce_kill(). This advertises TCE page sizes so Linux could handle it correctly, i.e. fall back to 4K/64K TCEs. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/npu2.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/npu2.c b/hw/npu2.c
index 30049f5b..bf5e7a33 100644
--- a/hw/npu2.c
+++ b/hw/npu2.c
@@ -1802,6 +1802,11 @@ static void npu2_add_phb_properties(struct npu2 *p)
NPU2_MAX_PE_NUM);
dt_add_property_cells(np, "ibm,opal-reserved-pe",
NPU2_RESERVED_PE_NUM);
+ dt_add_property_cells(np, "ibm,supported-tce-sizes",
+ 12, // 4K
+ 16, // 64K
+ 24, // 16M
+ 28); // 256M
dt_add_property_u64s(np, "ibm,mmio-atsd",
MMIO_ATSD_ADDR(p->regs, 0),
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