slw: Fix parsing of supported STOP states

Bits[0-15] are used to indicate the supported STOP states in
"ibm,enabled-stop-levels" DT property and STOP0 is starting from
Bit0. This patch fixes the parsing to read the appropriate bits.

Fixes: c3ea33f173ec ("hw/slw: only enable supported STOP states")
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 4 insertions, 2 deletions

diff --git a/hw/slw.c b/hw/slw.c
index 342b91f8..81e4e4ad 100644
--- a/hw/slw.c
+++ b/hw/slw.c
@@ -763,8 +763,10 @@ void add_cpu_idle_state_properties(void)
 
 		/* We can only use the stop levels that HB has made available */
 		if (has_stop_inst) {
-			u32 level = 1ul << states[i].pm_ctrl_reg_val;
-			if (!(stop_levels & level))
+			u32 level = 31 - (states[i].pm_ctrl_reg_val &
+					 OPAL_PM_PSSCR_RL_MASK);
+
+			if (!(stop_levels & (1ul << level)))
 				continue;
 		}