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| author | Reza Arbab <arbab@linux.ibm.com> | 2019-02-10 14:42:18 -0600 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-02-10 21:42:32 -0600 |
| commit | d3803711f8a9ac90e675bf9978d983f38d14b856 (patch) | |
| tree | 9abfbee5b56928258beda511d45f1ca5b2046df1 /hdata | |
| parent | 23470f10d0b1e120dc2d2f1606444fb6fc07b506 (diff) | |
| download | blackbird-skiboot-d3803711f8a9ac90e675bf9978d983f38d14b856.tar.gz blackbird-skiboot-d3803711f8a9ac90e675bf9978d983f38d14b856.zip | |
Add PVR_TYPE_P9P
Enable a new PVR to get us running on another p9 variant.
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'hdata')
| -rw-r--r-- | hdata/cpu-common.c | 1 | ||||
| -rw-r--r-- | hdata/memory.c | 4 | ||||
| -rw-r--r-- | hdata/test/hdata_to_dt.c | 6 |
3 files changed, 9 insertions, 2 deletions
diff --git a/hdata/cpu-common.c b/hdata/cpu-common.c index a2ac062c..f6dda4e7 100644 --- a/hdata/cpu-common.c +++ b/hdata/cpu-common.c @@ -98,6 +98,7 @@ struct dt_node * add_core_common(struct dt_node *cpus, pa_features_size = sizeof(pa_features_p8); break; case PVR_TYPE_P9: + case PVR_TYPE_P9P: name = "PowerPC,POWER9"; if (is_power9n(version) && (PVR_VERS_MAJ(version) == 2) && diff --git a/hdata/memory.c b/hdata/memory.c index 7d5f3b37..a36337b2 100644 --- a/hdata/memory.c +++ b/hdata/memory.c @@ -428,10 +428,10 @@ static void add_memory_controller(const struct HDIF_common_hdr *msarea, /* * Memory hierarchy may change between processor version. Presently - * its creating memory hierarchy for P9 (Nimbus) only. + * it's only creating memory hierarchy for P9 (Nimbus) and P9P (Axone). */ version = PVR_TYPE(mfspr(SPR_PVR)); - if (version != PVR_TYPE_P9) + if (version != PVR_TYPE_P9 && version != PVR_TYPE_P9P) return; chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip)); diff --git a/hdata/test/hdata_to_dt.c b/hdata/test/hdata_to_dt.c index c75a4adc..fd2957ce 100644 --- a/hdata/test/hdata_to_dt.c +++ b/hdata/test/hdata_to_dt.c @@ -69,12 +69,14 @@ unsigned long tb_hz = 512000000; #define PVR_TYPE_P8 0x004d #define PVR_TYPE_P8NVL 0x004c #define PVR_TYPE_P9 0x004e +#define PVR_TYPE_P9P 0x004f #define PVR_P7 0x003f0201 #define PVR_P7P 0x004a0201 #define PVR_P8E 0x004b0201 #define PVR_P8 0x004d0200 #define PVR_P8NVL 0x004c0100 #define PVR_P9 0x004e0200 +#define PVR_P9P 0x004f0100 #define SPR_PVR 0x11f /* RO: Processor version register */ @@ -299,6 +301,10 @@ int main(int argc, char *argv[]) fake_pvr = PVR_P9; proc_gen = proc_gen_p9; opt_count++; + } else if (strcmp(argv[i], "-9P") == 0) { + fake_pvr = PVR_P9P; + proc_gen = proc_gen_p9; + opt_count++; } } |
