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author | Philippe Bergheaud <felix@linux.vnet.ibm.com> | 2018-02-21 13:31:18 +0100 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-03-01 20:36:53 -0600 |
commit | 0f3584d846629d5bc1832a1dc4663a1befe8c4b0 (patch) | |
tree | d595bffde3a36b08568ac08885e6236839269333 /doc | |
parent | a8cfb0906643a7b074a5822bb312bf7481625905 (diff) | |
download | blackbird-skiboot-0f3584d846629d5bc1832a1dc4663a1befe8c4b0.tar.gz blackbird-skiboot-0f3584d846629d5bc1832a1dc4663a1befe8c4b0.zip |
phb4: set PBCQ Tunnel BAR for tunneled operations
P9 supports PCI tunneled operations (atomics and as_notify) that are
initiated by devices.
A subset of the tunneled operations require a response, that must be
sent back from the host to the device. For example, an atomic compare
and swap will return the compare status, as swap will only performed
in case of success. Similarly, as_notify reports if the target thread
has been woken up or not, because the operation may fail.
To enable tunneled operations, a device driver must tell the host where
it expects tunneled operation responses, by setting the PBCQ Tunnel BAR
Response register with a specific value within the range of its BARs.
This register is currently initialized by enable_capi_mode(). But, as
tunneled operations may also operate in PCI mode, a new API is required
to set the PBCQ Tunnel BAR Response register, without switching to CAPI
mode.
This patch provides two new OPAL calls to get/set the PBCQ Tunnel
BAR Response register.
Note: as there is only one PBCQ Tunnel BAR register, shared between
all the devices connected to the same PHB, only one of these devices
will be able to use tunneled operations, at any time.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/opal-api/opal-pci-get-set-pbcq-tunnel-bar-164-165.rst | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/doc/opal-api/opal-pci-get-set-pbcq-tunnel-bar-164-165.rst b/doc/opal-api/opal-pci-get-set-pbcq-tunnel-bar-164-165.rst new file mode 100644 index 00000000..95ee3243 --- /dev/null +++ b/doc/opal-api/opal-pci-get-set-pbcq-tunnel-bar-164-165.rst @@ -0,0 +1,76 @@ +OPAL_PCI_GET_PBCQ_TUNNEL_BAR +============================ +:: + + #define OPAL_PCI_GET_PBCQ_TUNNEL_BAR 164 + + int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, uint64_t *addr) + +The host calls this function to read the address out of the PBCQ Tunnel +Bar register. + +Parameters +---------- +:: + + uint64_t phb_id + uint64_t *addr + +``phb_id`` + The value from the PHB node ibm,opal-phbid property for the device. + +``addr`` + A pointer to where the address stored in the PBCQ Tunnel Bar register + will be copied. + +Return Values +------------- + +``OPAL_SUCCESS`` + Operation was successful + +``OPAL_PARAMETER`` + Invalid PHB or addr parameter + +``OPAL_UNSUPPORTED`` + Not supported by hardware + +OPAL_PCI_SET_PBCQ_TUNNEL_BAR +============================ +:: + + #define OPAL_PCI_SET_PBCQ_TUNNEL_BAR 165 + + int64_t opal_pci_set_pbcq_tunnel_bar(uint64_t phb_id, uint64_t addr) + +The host calls this function to set the PBCQ Tunnel Bar register. + +Parameters +---------- +:: + + uint64_t phb_id + uint64_t addr + +``phb_id`` + The value from the PHB node ibm,opal-phbid property for the device. + +``addr`` + The value of the address chosen for the PBCQ Tunnel Bar register. + If the address is 0, then the PBCQ Tunnel Bar register will be reset. + It the address is non-zero, then the PBCQ Tunnel Bar register will be + set with :: + + Bit[0:42] Bit[8:50] of the address + +Return Values +------------- + +``OPAL_SUCCESS`` + Operation was successful + +``OPAL_PARAMETER`` + Invalid PHB or addr parameter + +``OPAL_UNSUPPORTED`` + Not supported by hardware |