doc: RST syntax fixes

Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

6 files changed, 31 insertions, 22 deletions

diff --git a/doc/device-tree/ibm,opal/power-mgt.rst b/doc/device-tree/ibm,opal/power-mgt.rst
index af99a22c..b326a24b 100644
--- a/doc/device-tree/ibm,opal/power-mgt.rst
+++ b/doc/device-tree/ibm,opal/power-mgt.rst
@@ -1,6 +1,14 @@
 ibm,opal/power-mgt device tree entries
 ======================================
 
+.. toctree::
+   :maxdepth: 2
+
+   power-mgt/occ
+   power-mgt/powercap
+   power-mgt/psr
+
+
 All available CPU idle states are listed in ibm,cpu-idle-state-names
 
 For example:
diff --git a/doc/device-tree/ibm,opal/power-mgt/occ.rst b/doc/device-tree/ibm,opal/power-mgt/occ.rst
index ba04f058..d13a62ba 100644
--- a/doc/device-tree/ibm,opal/power-mgt/occ.rst
+++ b/doc/device-tree/ibm,opal/power-mgt/occ.rst
@@ -7,13 +7,13 @@ Example:
 
 .. code-block:: dts
 
-occ@7ffddf8000 {
+ occ@7ffddf8000 {
         ibm,pstate-vdds = [45 45 46 46 46 47 48 49 4a 4b 4c 4d 4f 50 51 52 53 54 55 57 58 59 5a 5b 5c 5d 5e 5f 5f 60 61 62 63 64 65 65 66 67 68 69 6a 6a 6b 6c 6d 6e 6f 70 70 71];
         ibm,chip-id = <0x1>;
         phandle = <0x100003b8>;
         ibm,pstate-vcss = [3b 3d 3f 41 42 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f 50 50 51 52 53 54 55 56 56 57 57 58 58 59 59 5a 5a 5b 5b 5c 5c 5d 5d 5e 5e 5f 5f 60 60 61 61 62 62];
         reg = <0x7f 0xfddf8000 0xb98>;
-};
+ };
 
 ibm,chip-id
 -----------
@@ -26,7 +26,8 @@ reg
 This tuple gives the statring address of the OPAL data in HOMER and
 the size of the OPAL data.
 
-The top-level /ibm,opal/power-mgt contains :
+The top-level /ibm,opal/power-mgt contains : ::
+
  #size-cells = <1>
  #address-cells = <2>
 
diff --git a/doc/device-tree/ibm,opal/power-mgt/powercap.rst b/doc/device-tree/ibm,opal/power-mgt/powercap.rst
index e47caa46..5a8d0079 100644
--- a/doc/device-tree/ibm,opal/power-mgt/powercap.rst
+++ b/doc/device-tree/ibm,opal/power-mgt/powercap.rst
@@ -5,6 +5,7 @@ The powercap sensors are populated in this node. Each child node in
 the "powercap" node represents a power-cappable component.
 
 For example : ::
+
         system-powercap/
 
 The OPAL_GET_POWERCAP and OPAL_SET_POWERCAP calls take a handle for
@@ -39,10 +40,10 @@ the future.
         compatible = "ibm,opal-powercap";
 
         system-powercap {
-                name = "system-powercap"
-                powercap-current = <0x00000002>
-                powercap-min = <0x00000000>
-                powercap-max = <0x00000001>
+                name = "system-powercap";
+                powercap-current = <0x00000002>;
+                powercap-min = <0x00000000>;
+                powercap-max = <0x00000001>;
         };
      };
-    }
+    };
diff --git a/doc/device-tree/ibm,opal/power-mgt/psr.rst b/doc/device-tree/ibm,opal/power-mgt/psr.rst
index edae8da3..46165b0c 100644
--- a/doc/device-tree/ibm,opal/power-mgt/psr.rst
+++ b/doc/device-tree/ibm,opal/power-mgt/psr.rst
@@ -36,18 +36,18 @@ currently it uses the following encoding ::
 
    power-mgt {
      psr {
-        compatible = "ibm,opal-power-shift-ratio"
+        compatible = "ibm,opal-power-shift-ratio";
 
         cpu-to-gpu@0 {
-                name = "cpu-to-gpu"
-                handle = <0x00000000>
-                label = "cpu_to_gpu_0"
+                name = "cpu-to-gpu";
+                handle = <0x00000000>;
+                label = "cpu_to_gpu_0";
         };
 
         cpu-to-gpu@1 {
-                name = "cpu-to-gpu"
-                handle = <0x00000100>
-                label = "cpu_to_gpu_1"
+                name = "cpu-to-gpu";
+                handle = <0x00000100>;
+                label = "cpu_to_gpu_1";
         };
      };
     };
diff --git a/doc/device-tree/nx.rst b/doc/device-tree/nx.rst
index 1589be6d..31e81e97 100644
--- a/doc/device-tree/nx.rst
+++ b/doc/device-tree/nx.rst
@@ -15,8 +15,7 @@ NX Compression Coprocessor
 --------------------------
 
 This is the memory compression coprocessor. which uses the IBM proprietary
-842 compression algorithm and format. Each NX node contains an 842 engine.
-::
+842 compression algorithm and format. Each NX node contains an 842 engine.  ::
 
    ibm,842-coprocessor-type	: CT value common to all 842 coprocessors
    ibm,842-coprocessor-instance	: CI value unique to all 842 coprocessors
@@ -38,14 +37,15 @@ coprocessor types (842 and gzip).
 VAS distinguishes NX requests for the target engines based on logical
 partition ID (lpid), process ID (pid) and Thread ID (tid). So (lpid, pid, tid)
 combination has to be unique in the system. Each NX node contains high and
-normal FIFOs for each  842 and GZIP engines.
-::
+normal FIFOs for each  842 and GZIP engines.  ::
+
   /ibm,842-high-fifo		: High priority 842 RxFIFO
   /ibm,842-normal-fifo		: Normal priority 842 RxFIFO
   /ibm,gzip-high-fifo		: High priority gzip RxFIFO
   /ibm,gzip-normal-fifo		: Normal priority gzip RxFIFO
 
 Each RxFIFO node contains: ::
+
 	compatible		: ibm,p9-nx-842 or ibm,p9-nx-gzip
 	priority		: High or Normal
 	rx-fifo-address		: RxFIFO buffer address
diff --git a/doc/device-tree/vas.rst b/doc/device-tree/vas.rst
index 606f476f..0e4c1fae 100644
--- a/doc/device-tree/vas.rst
+++ b/doc/device-tree/vas.rst
@@ -1,10 +1,9 @@
 Virtual Accelerator Switchboard (VAS)
-====================================
+=====================================
 
 VAS is present in P9 or later processors. In P9, each chip has one
 instance of VAS. Each instance of VAS is represented as a "platform
-device" i.e as a node in root of the device tree:
-::
+device" i.e as a node in root of the device tree: ::
 
   /vas@<vas_addr>