core/pci: Support PCI slot

Every PCIE bridge port or PHB is expected to be bound with PCI slot
, to which various PCI slot's functionalities are attached (e.g. power,
link, reset). This supports PCI slot:

   * PCI slot is reprsented by "struct pci_slot".
   * "struct pci_slot_ops" represents the functions supported on the
     PCI slot. It's initialized by PCI slot core at the beginning and
     allowed to be overrided by platform partially or completely.
   * On PCI hot plugging event, the PCI devices behind the slot are
     enumarated. Device sub-tree is populated and sent to OS by OPAL
     message.
   * On PCI hot unplugging event, the PCI devices behind the slot are
     destroyed. Device sub-tree is removed and the slot is powered off.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/core/Makefile.inc b/core/Makefile.inc
index 5af0d7ca..13b287c9 100644
--- a/core/Makefile.inc
+++ b/core/Makefile.inc
@@ -3,8 +3,8 @@
 SUBDIRS += core
 CORE_OBJS = relocate.o console.o stack.o init.o chip.o mem_region.o
 CORE_OBJS += malloc.o lock.o cpu.o utils.o fdt.o opal.o interrupts.o
-CORE_OBJS += timebase.o opal-msg.o pci.o pci-opal.o fast-reboot.o
-CORE_OBJS += device.o exceptions.o trace.o affinity.o vpd.o
+CORE_OBJS += timebase.o opal-msg.o pci.o pci-slot.o pcie-slot.o pci-opal.o
+CORE_OBJS += fast-reboot.o device.o exceptions.o trace.o affinity.o vpd.o
 CORE_OBJS += hostservices.o platform.o nvram.o nvram-format.o hmi.o
 CORE_OBJS += console-log.o ipmi.o time-utils.o pel.o pool.o errorlog.o
 CORE_OBJS += timer.o i2c.o rtc.o flash.o sensor.o ipmi-opal.o