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| author | Nicholas Piggin <npiggin@gmail.com> | 2019-01-08 00:04:17 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.ibm.com> | 2019-02-12 15:08:17 +1100 |
| commit | 9c58bbd720b73b9c9c3bf9e86797077f053a9eb3 (patch) | |
| tree | 1b04f4adb8a4dc0b2ea7179624359346fd1b0ab0 /asm/head.S | |
| parent | 9e075d75274c50da4135c55afccc9f6d24dd2cfe (diff) | |
| download | blackbird-skiboot-9c58bbd720b73b9c9c3bf9e86797077f053a9eb3.tar.gz blackbird-skiboot-9c58bbd720b73b9c9c3bf9e86797077f053a9eb3.zip | |
core/exceptions: save current MSR in exception frame
Save and print the MSR of the interrupt context. This can be derived
from the interrupt type, SRR1, and other system register settings. But
it can be useful to quickly verify what's happening.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'asm/head.S')
| -rw-r--r-- | asm/head.S | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -217,8 +217,10 @@ _exception: std %r6,STACK_HSRR1(%r1) mfspr %r3,SPR_DSISR mfspr %r4,SPR_DAR + mfmsr %r5 stw %r3,STACK_DSISR(%r1) std %r4,STACK_DAR(%r1) + std %r5,STACK_MSR(%r1) mr %r3,%r1 LOAD_IMM64(%r4, SKIBOOT_BASE) LOAD_IMM32(%r5, exception_entry_foo - __head) |
