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| author | Reza Arbab <arbab@linux.vnet.ibm.com> | 2017-07-31 21:37:04 -0500 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-08-04 17:13:10 +1000 |
| commit | d40c1a290a831301b65e2caf54f5f1104ead0eed (patch) | |
| tree | d0206422d0d0c28231d1a383cce8fc14f91b1960 | |
| parent | 9fa0785d26af2e8472941470f972fbd31dde317a (diff) | |
| download | blackbird-skiboot-d40c1a290a831301b65e2caf54f5f1104ead0eed.tar.gz blackbird-skiboot-d40c1a290a831301b65e2caf54f5f1104ead0eed.zip | |
npu2: Adjust content of the NTL BAR
Reflect the changed NTL BAR layout in POWER9 DD2.
Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com>
Cc: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Cc: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| -rw-r--r-- | hw/npu2.c | 13 | ||||
| -rw-r--r-- | include/npu2-regs.h | 6 |
2 files changed, 14 insertions, 5 deletions
@@ -198,9 +198,13 @@ static void npu2_read_bar(struct npu2 *p, struct npu2_bar *bar) break; case NPU2_NTL0_BAR: case NPU2_NTL1_BAR: - bar->base = GETFIELD(NPU2_NTL_BAR_ADDR, val) << 17; + bar->base = GETFIELD(NPU2_NTL_BAR_ADDR, val) << 16; enabled = GETFIELD(NPU2_NTL_BAR_ENABLE, val); - bar->size = 0x20000; + + if (is_p9dd1()) + bar->size = 0x20000; + else + bar->size = 0x10000 << GETFIELD(NPU2_NTL_BAR_SIZE, val); break; case NPU2_GENID_BAR: bar->base = GETFIELD(NPU2_GENID_BAR_ADDR, val) << 16; @@ -232,8 +236,11 @@ static void npu2_write_bar(struct npu2 *p, break; case NPU2_NTL0_BAR: case NPU2_NTL1_BAR: - val = SETFIELD(NPU2_NTL_BAR_ADDR, 0ul, bar->base >> 17); + val = SETFIELD(NPU2_NTL_BAR_ADDR, 0ul, bar->base >> 16); val = SETFIELD(NPU2_NTL_BAR_ENABLE, val, enable); + + if (!is_p9dd1()) + val = SETFIELD(NPU2_NTL_BAR_SIZE, val, 1); break; case NPU2_GENID_BAR: val = SETFIELD(NPU2_GENID_BAR_ADDR, 0ul, bar->base >> 16); diff --git a/include/npu2-regs.h b/include/npu2-regs.h index a10f74fc..73b6d621 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -135,8 +135,10 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask); #define NPU2_NTL_BAR_ENABLE PPC_BIT(0) #define NPU2_NTL_BAR_GROUP PPC_BITMASK(3,6) #define NPU2_NTL_BAR_CHIP PPC_BITMASK(7,9) -#define NPU2_NTL_BAR_NODE_ADDR PPC_BITMASK(10,34) -#define NPU2_NTL_BAR_ADDR PPC_BITMASK(3,34) +#define NPU2_NTL_BAR_NODE_ADDR PPC_BITMASK(10,35) +#define NPU2_NTL_BAR_ADDR PPC_BITMASK(3,35) +#define NPU2_NTL_BAR_POISON PPC_BIT(36) +#define NPU2_NTL_BAR_SIZE PPC_BITMASK(39,43) #define NPU2_PERF_CFG 0x078 #define NPU2_INHIBIT_CFG 0x080 #define NPU2_C_ERR_RPT_MSG0 0x088 |
