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authorChristophe Lombard <clombard@linux.vnet.ibm.com>2017-06-13 14:21:19 +0200
committerStewart Smith <stewart@linux.vnet.ibm.com>2017-06-19 14:49:29 +1000
commit43eb0ae6c2d4d05c4802b2de553f14234fe2cddf (patch)
treee79594f16eb43c7dac92824395ed0f7bff057de6
parent20cf0c833bcfd5bc159a891c852f6de9313deffe (diff)
downloadblackbird-skiboot-43eb0ae6c2d4d05c4802b2de553f14234fe2cddf.tar.gz
blackbird-skiboot-43eb0ae6c2d4d05c4802b2de553f14234fe2cddf.zip
capi: Move phb3 capp registers to specialized files
The definitions of the CAPP registers for PHB3 are moved in a specific file. The updated file capp.h will be used for the common functionalities about the CAPP for PHB3 and PHB4. Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r--core/hmi.c2
-rw-r--r--hw/phb3.c1
-rw-r--r--include/capp.h32
-rw-r--r--include/phb3-capp.h52
4 files changed, 54 insertions, 33 deletions
diff --git a/core/hmi.c b/core/hmi.c
index 06d83476..c5c554a8 100644
--- a/core/hmi.c
+++ b/core/hmi.c
@@ -19,7 +19,7 @@
#include <processor.h>
#include <chiptod.h>
#include <xscom.h>
-#include <capp.h>
+#include <phb3-capp.h>
#include <pci.h>
#include <cpu.h>
#include <chip.h>
diff --git a/hw/phb3.c b/hw/phb3.c
index df92df8c..ad5ba1e5 100644
--- a/hw/phb3.c
+++ b/hw/phb3.c
@@ -30,6 +30,7 @@
#include <affinity.h>
#include <phb3.h>
#include <phb3-regs.h>
+#include <phb3-capp.h>
#include <capp.h>
#include <fsp.h>
#include <chip.h>
diff --git a/include/capp.h b/include/capp.h
index 14f65be6..d0c28c9f 100644
--- a/include/capp.h
+++ b/include/capp.h
@@ -62,36 +62,4 @@ enum capp_reg {
apc_master_powerbus_ctrl = 0xB
};
-#define CAPP_SNP_ARRAY_ADDR_REG 0x2013028
-#define CAPP_APC_MASTER_ARRAY_ADDR_REG 0x201302A
-#define CAPP_SNP_ARRAY_WRITE_REG 0x2013801
-#define CAPP_APC_MASTER_ARRAY_WRITE_REG 0x2013802
-
-#define CAPP_FIR 0x2013000
-#define CAPP_FIR_MASK 0x2013003
-#define CAPP_FIR_ACTION0 0x2013006
-#define CAPP_FIR_ACTION1 0x2013007
-#define CAPP_ERR_RPT_CLR 0x2013013
-#define APC_MASTER_PB_CTRL 0x2013018
-#define APC_MASTER_CAPI_CTRL 0x2013019
-#define TRANSPORT_CONTROL 0x201301C
-#define CANNED_PRESP_MAP0 0x201301D
-#define CANNED_PRESP_MAP1 0x201301E
-#define CANNED_PRESP_MAP2 0x201301F
-#define CAPP_ERR_STATUS_CTRL 0x201300E
-#define FLUSH_SUE_STATE_MAP 0x201300F
-#define CAPP_TB 0x2013026
-#define CAPP_TFMR 0x2013027
-#define CAPP_EPOCH_TIMER_CTRL 0x201302C
-#define FLUSH_UOP_CONFIG1 0x2013803
-#define FLUSH_UOP_CONFIG2 0x2013804
-#define SNOOP_CAPI_CONFIG 0x201301A
-
-/*
- * Naples has two CAPP units, statically mapped:
- * CAPP0 attached to PHB0, and CAPP1 attached to PHB1.
- * The addresses of CAPP1 XSCOMS registers are 0x180 away.
- */
-#define CAPP1_REG_OFFSET 0x180
-
#endif /* __CAPP_H */
diff --git a/include/phb3-capp.h b/include/phb3-capp.h
new file mode 100644
index 00000000..3dab4ab2
--- /dev/null
+++ b/include/phb3-capp.h
@@ -0,0 +1,52 @@
+/* Copyright 2013-2017 IBM Corp.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ * implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __PHB3_CAPP_H
+#define __PHB3_CAPP_H
+
+#define CAPP_SNP_ARRAY_ADDR_REG 0x2013028
+#define CAPP_APC_MASTER_ARRAY_ADDR_REG 0x201302A
+#define CAPP_SNP_ARRAY_WRITE_REG 0x2013801
+#define CAPP_APC_MASTER_ARRAY_WRITE_REG 0x2013802
+
+#define CAPP_FIR 0x2013000
+#define CAPP_FIR_MASK 0x2013003
+#define CAPP_FIR_ACTION0 0x2013006
+#define CAPP_FIR_ACTION1 0x2013007
+#define CAPP_ERR_RPT_CLR 0x2013013
+#define APC_MASTER_PB_CTRL 0x2013018
+#define APC_MASTER_CAPI_CTRL 0x2013019
+#define TRANSPORT_CONTROL 0x201301C
+#define CANNED_PRESP_MAP0 0x201301D
+#define CANNED_PRESP_MAP1 0x201301E
+#define CANNED_PRESP_MAP2 0x201301F
+#define CAPP_ERR_STATUS_CTRL 0x201300E
+#define FLUSH_SUE_STATE_MAP 0x201300F
+#define CAPP_TB 0x2013026
+#define CAPP_TFMR 0x2013027
+#define CAPP_EPOCH_TIMER_CTRL 0x201302C
+#define FLUSH_UOP_CONFIG1 0x2013803
+#define FLUSH_UOP_CONFIG2 0x2013804
+#define SNOOP_CAPI_CONFIG 0x201301A
+
+/*
+ * Naples has two CAPP units, statically mapped:
+ * CAPP0 attached to PHB0, and CAPP1 attached to PHB1.
+ * The addresses of CAPP1 XSCOMS registers are 0x180 away.
+ */
+#define CAPP1_REG_OFFSET 0x180
+
+#endif /* __PHB3_CAPP_H */
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