blob: 14f072edbca509b48b879ac73ee686ed245028fa (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* (C) Copyright 2009 Intel Corporation
* Author: Jacob Pan (jacob.jun.pan@intel.com)
*
* Shared with ARM platforms, Jamie Iles, Picochip 2011
*
* Support for the Synopsys DesignWare APB Timers.
*/
#ifndef __DW_APB_TIMER_H__
#define __DW_APB_TIMER_H__
#include <linux/clockchips.h>
#include <linux/clocksource.h>
#include <linux/interrupt.h>
#define APBTMRS_REG_SIZE 0x14
struct dw_apb_timer {
void __iomem *base;
unsigned long freq;
int irq;
};
struct dw_apb_clock_event_device {
struct clock_event_device ced;
struct dw_apb_timer timer;
struct irqaction irqaction;
void (*eoi)(struct dw_apb_timer *);
};
struct dw_apb_clocksource {
struct dw_apb_timer timer;
struct clocksource cs;
};
void dw_apb_clockevent_register(struct dw_apb_clock_event_device *dw_ced);
void dw_apb_clockevent_pause(struct dw_apb_clock_event_device *dw_ced);
void dw_apb_clockevent_resume(struct dw_apb_clock_event_device *dw_ced);
void dw_apb_clockevent_stop(struct dw_apb_clock_event_device *dw_ced);
struct dw_apb_clock_event_device *
dw_apb_clockevent_init(int cpu, const char *name, unsigned rating,
void __iomem *base, int irq, unsigned long freq);
struct dw_apb_clocksource *
dw_apb_clocksource_init(unsigned rating, const char *name, void __iomem *base,
unsigned long freq);
void dw_apb_clocksource_register(struct dw_apb_clocksource *dw_cs);
void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs);
u64 dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs);
#endif /* __DW_APB_TIMER_H__ */
|
