1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
|
/*
* OMAP4 Clock domains framework
*
* Copyright (C) 2009 Texas Instruments, Inc.
* Copyright (C) 2009 Nokia Corporation
*
* Abhijit Pagare (abhijitpagare@ti.com)
* Benoit Cousson (b-cousson@ti.com)
*
* This file is automatically generated from the OMAP hardware databases.
* We respectfully ask that any modifications to this file be coordinated
* with the public linux-omap@vger.kernel.org mailing list and the
* authors above to ensure that the autogeneration scripts are kept
* up-to-date with the file contents.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* To-Do List
* -> Populate the Sleep/Wakeup dependencies for the domains
*/
#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS44XX_H
#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS44XX_H
#include <plat/clockdomain.h>
#if defined(CONFIG_ARCH_OMAP4)
static struct clockdomain l4_cefuse_44xx_clkdm = {
.name = "l4_cefuse_clkdm",
.pwrdm = { .name = "cefuse_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_CEFUSE_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l4_cfg_44xx_clkdm = {
.name = "l4_cfg_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_L4CFG_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain tesla_44xx_clkdm = {
.name = "tesla_clkdm",
.pwrdm = { .name = "tesla_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_TESLA_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_gfx_44xx_clkdm = {
.name = "l3_gfx_clkdm",
.pwrdm = { .name = "gfx_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_GFX_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain ivahd_44xx_clkdm = {
.name = "ivahd_clkdm",
.pwrdm = { .name = "ivahd_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_IVAHD_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l4_secure_44xx_clkdm = {
.name = "l4_secure_clkdm",
.pwrdm = { .name = "l4per_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_L4SEC_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l4_per_44xx_clkdm = {
.name = "l4_per_clkdm",
.pwrdm = { .name = "l4per_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_L4PER_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain abe_44xx_clkdm = {
.name = "abe_clkdm",
.pwrdm = { .name = "abe_pwrdm" },
.clkstctrl_reg = OMAP4430_CM1_ABE_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_instr_44xx_clkdm = {
.name = "l3_instr_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_L3INSTR_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_init_44xx_clkdm = {
.name = "l3_init_clkdm",
.pwrdm = { .name = "l3init_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_L3INIT_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain mpuss_44xx_clkdm = {
.name = "mpuss_clkdm",
.pwrdm = { .name = "mpu_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_MPU_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain mpu0_44xx_clkdm = {
.name = "mpu0_clkdm",
.pwrdm = { .name = "cpu0_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_CPU0_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain mpu1_44xx_clkdm = {
.name = "mpu1_clkdm",
.pwrdm = { .name = "cpu1_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_CPU1_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_emif_44xx_clkdm = {
.name = "l3_emif_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_MEMIF_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l4_ao_44xx_clkdm = {
.name = "l4_ao_clkdm",
.pwrdm = { .name = "always_on_core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_ALWON_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain ducati_44xx_clkdm = {
.name = "ducati_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_DUCATI_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_2_44xx_clkdm = {
.name = "l3_2_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_L3_2_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_1_44xx_clkdm = {
.name = "l3_1_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_L3_1_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_d2d_44xx_clkdm = {
.name = "l3_d2d_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_D2D_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain iss_44xx_clkdm = {
.name = "iss_clkdm",
.pwrdm = { .name = "cam_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_CAM_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_dss_44xx_clkdm = {
.name = "l3_dss_clkdm",
.pwrdm = { .name = "dss_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_DSS_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l4_wkup_44xx_clkdm = {
.name = "l4_wkup_clkdm",
.pwrdm = { .name = "wkup_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_WKUP_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain emu_sys_44xx_clkdm = {
.name = "emu_sys_clkdm",
.pwrdm = { .name = "emu_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_EMU_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
static struct clockdomain l3_dma_44xx_clkdm = {
.name = "l3_dma_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.clkstctrl_reg = OMAP4430_CM_SDMA_CLKSTCTRL,
.clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
#endif
#endif
|
