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* ASoC: SOF: move arch_ops under opsPierre-Louis Bossart2019-12-181-0/+2
| | | | | | | | | | | | | The current structures are not well designed. We include Xtensa information from the ACPI and PCI levels, but at the Kconfig/module level everything Xtensa related is included at the sof/intel level. Move the arch_ops under ops so that Xtensa is hidden in the DSP ops, with a structure that follows the Kconfig/module partition. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191217202231.18259-8-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: add namespace for HDA_COMMONPierre-Louis Bossart2019-12-181-6/+6
| | | | | | | | Define namespace and include it in PCI top-level module. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191217202231.18259-6-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Make creation of machine device from SOF core optionalDaniel Baluta2019-12-091-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, SOF probes machine drivers by creating a platform device and passing the machine description as private data. This is driven by the ACPI restrictions. Ideally, ACPI tables should contain the description for the machine driver. This is not possible because ACPI tables are frozen and used on multiple OS-es (e.g Windows). In the case of Device Tree we don't have this restriction, so we choose to probe the machine drivers by creating a DT node as is the standard ALSA way. This patch makes the probing of machine drivers from SOF core optional allowing for Device Tree platforms to decouple the SOF core from machine driver probing. Along with this, it also consolidates the machine driver selection for Intel platforms by defining optional ops for selecting the machine driver based on the ACPI match for HDA and non-HDA platforms and setting the mach params. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191204211556.12671-11-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: hda: solve MSI issues by merging ipc and stream irq handlersBard Liao2019-12-091-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | The existing code uses two handlers for a shared edge-based MSI interrupts. In corner cases, interrupts are lost, leading to IPC timeouts. Those timeouts do not appear in legacy mode. This patch merges the two handlers and threads into a single one, and simplifies the mask/unmask operations by using a single top-level mask (Global Interrupt Enable). The handler only checks for interrupt sources using the Global Interrupt Status (GIS) field, and all the actual work happens in the thread. This also enables us to remove the use of spin locks. Stream events are prioritized over IPC ones. This patch was tested with HDaudio and SoundWire platforms, and all known IPC timeout issues are solved in MSI mode. The SoundWire-specific patches will be provided in follow-up patches, where the SoundWire interrupts are handled in the same thread as IPC and stream interrupts. Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191204212859.13239-1-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: CNL: add support for sending compact IPCKeyon Jie2019-10-281-5/+37
| | | | | | | | | | | For compact IPCs, we will send the IPC header/command via the HIPCIDR register and the first 32bit payload via the HIPCIDD register, no mailbox will be used. Signed-off-by: Keyon Jie <yang.jie@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191025224122.7718-19-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: CNL: add set_power_state() opsKeyon Jie2019-10-281-0/+1
| | | | | | | | | | Using hda_dsp_set_power_state() as set_power_state() ops for cnl to do d0ix platform configuration updates. Signed-off-by: Keyon Jie <yang.jie@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191025224122.7718-6-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: define INFO_ flags in dsp_opsPierre-Louis Bossart2019-10-251-0/+7
| | | | | | | | | | | | | | | Currently the INFO_ flags such as PAUSE/NO_PERIOD_WAKEUP are defined in the SOF PCM core, which doesn't scale. To account for platform variations, these flags need to be set in DSP ops. This patch only moves the definitions and does not change any functionality. Reviewed-by: Jaska Uimonen <jaska.uimonen@intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191024210318.30068-2-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: initial support to JasperLake.Pan Xiuli2019-10-231-0/+17
| | | | | | | | | | Add Kconfig, PCI ID and chip info for JSL platform. The DSP only has 2 cores for this platform. Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20191022194705.23347-3-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: initial support for Elkhart LakePan Xiuli2019-08-151-0/+16
| | | | | | | | | | | | | Add Kconfig, PCI ID and chip info for EHL platform. Note that the core mask is different from previous platforms, only Core0 can be controlled by the host. Additional patches will be required for multi-core functionality. Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20190815155749.29304-5-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: initial support for Tiger Lake.Pan Xiuli2019-08-151-0/+16
| | | | | | | | | | | | | Add Kconfig, PCI ID and chip info for Tiger Lake platform. Note that the core mask is different from previous platforms, only Core0 can be controlled by the host. Additional patches will be required for multi-core functionality. Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20190815155749.29304-3-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: hda: Use generic function for fw ready / mem windows creationDaniel Baluta2019-08-091-1/+3
| | | | | | | | | | | We can use generic sof_fw_ready function and reduce code duplication. Careful here that we need to provide the implementation for get_mailbox_offset and get_window_offset. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20190807150203.26359-7-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: hda: remove misleading error trace from IRQ threadKai Vehmanen2019-07-231-2/+2
| | | | | | | | | | | | | | | Downgrade "nothing to do in IRQ thread" message from error to a debug message in the IPC interrupt handler thread. The spurious wake-up can happen if a HDA stream interrupt is raised while the IPC interrupt thread is running. IPC functionality is not impacted by this condition, so debug is a more appropriate trace level. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20190722141402.7194-21-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: implement runtime idle for CNL/APLKai Vehmanen2019-07-061-0/+1
| | | | | | | | | | | | | | Implement runtime idle for CNL/APL devices using similar runtime PM idle logic as the Intel AZX HDA driver. If any HDA codecs are powered when runtime suspend request comes, return -EBUSY. By doing this, strict ordering is enforced between HDA codec and the HDA controller. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Link: https://lore.kernel.org/r/20190702132428.13129-4-kai.vehmanen@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: hda: couple host and link DMA during FE hw_freeRanjani Sridharan2019-06-171-0/+1
| | | | | | | | | | Host and link DMA are decoupled during FE hw_params. So, they must be coupled in hw_free if the link DMA channel is idle. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: intel: extend IPC dump informationKai Vehmanen2019-06-131-0/+2
| | | | | | | | | | Extend the HDA IPC dump implementation with status of key IRQ registers. This is useful to debug IPC timeouts and similar issues. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: ipc: don't check for HIPCCTL register valuePierre-Louis Bossart2019-06-031-4/+1
| | | | | | | | | | The HIPCCTL register controls the IPC interrupts. It can be set or cleared to mask or enable these interrupts, but it makes no sense to read and test its fields in an interrupt (which can only executed if its fields are set). Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: cnl-ipc: re-enable IPC IRQ at end of handlerPierre-Louis Bossart2019-06-031-8/+16
| | | | | | | | | | Align with Skylake driver and enable the IRQ at end of handler, instead of at beginning. Also add an error log if we have nothing to do in this handler. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: cnl-ipc: move code around for clarityPierre-Louis Bossart2019-06-031-9/+8
| | | | | | | | Move all register access to cnl_ipc_host_done() No functionality change. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: cnl-ipc: read all IPC registers firstPierre-Louis Bossart2019-06-031-4/+2
| | | | | | | | | | | | Align with hardware recommended sequences, and read all IPC registers before doing any other actions. Playing with BUSY and DONE bits may invalidate values. The values read may not actually be necessary but at least this provides a snapshot of the IPC registers with no consistency issues. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Do not send cmd via SHIM registerDaniel Baluta2019-06-031-3/+1
| | | | | | | | | | | | | We use shim registers only to notify the other side that a message was sent. The actual information for the message is transmitted via mailbox. cmd information inside shim register is not used by the DSP, so we remove it to avoid confusion. Signed-off-by: Daniel Baluta <daniel.baluta@gmail.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge branch 'asoc-5.2' into asoc-5.3Mark Brown2019-05-301-0/+4
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| * ASoC: SOF: ipc: fix a race, leading to IPC timeoutsGuennadi Liakhovetski2019-05-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently on all supported platforms the IPC IRQ thread first signals the sender when an IPC response is received from the DSP, then unmasks the IPC interrupt. Those actions are performed without holding any locks, so the thread can be interrupted between them. IPC timeouts have been observed in such scenarios: if the sender is woken up and it proceeds with sending the next message without unmasking the IPC interrupt, it can miss the next response. This patch takes a spin-lock to prevent the IRQ thread from being preempted at that point. It also makes sure, that the next IPC transmission by the host cannot take place before the IRQ thread has finished updating all the required IPC registers. Fixes: 53e0c72d98b ("ASoC: SOF: Add support for IPC IO between DSP and Host") Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | ASoC: SOF: Intel: ICL add Icelake chip info structZhu Yingjiang2019-05-131-0/+19
|/ | | | | | | | | | Icelake has different count of SSP other than CNL, using the new defined ICL SSP count, and copy other parameters from CNL chip info. Signed-off-by: Zhu Yingjiang <yingjiang.zhu@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: CNL: add ipc dump functionPan Xiuli2019-05-031-0/+19
| | | | | | | | Add ipc dump function to CNL+ platforms. Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: intel: hda: add hw_params_upon_resume flag for hda streamRanjani Sridharan2019-05-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | The prepare() ioctl for BE dai link gets called both when the stream is started and when it is resumed from suspend. SOF uses this ioctl to set the hw params again only if the stream has been suspended. When the stream is started, the hw_params ioctl gets called before prepare() and hw_params is set for the BE dai link. So the prepare call does not need to do anything further. When the stream resumes after system suspend, SOF requires that the hw_params be set again for the BE dai. In order to determine which streams should set the hw params during prepare(), an internal flag called "hw_params_upon_resume" is introduced in struct sof_intel_hda_stream. The flag is set for hda streams when the sof device suspends and is cleared after hw_params is set. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: hda-ipc: simplify handling of IPC IRQKeyon Jie2019-05-031-4/+0
| | | | | | | | | | | | | | | | When using a shared IRQ between IPC interrupt and stream IOC interrupt, the interrupt handlers need to check the interrupt source before scheduling their respective IRQ threads. In the case of IPC handler, it should check if it is an IPC interrupt before waking up the IPC IRQ thread. The IPC IRQ thread, once scheduled, does not need to check the IRQ source again. So, remove the superfluous check in the thread. Remove the irq_status field from snd_sof_dev struct also as it is no longer needed. Signed-off-by: Keyon Jie <yang.jie@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: hda: add SSP info to the chip info structZhu Yingjiang2019-05-031-0/+2
| | | | | | | | | | add SSP info of APL and CNL, to the sof_intel_dsp_desc structure. The max SSP count the platform support and the SSP base address. Signed-off-by: Zhu Yingjiang <yingjiang.zhu@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: cnl: add pointer ops to use DPIB positionKeyon Jie2019-05-031-0/+1
| | | | | | | | | Add .pcm_pointer ops for cannonlake to read DPIB/posbuf and get pointer for ALSA, to align with apollolake. Signed-off-by: Keyon Jie <yang.jie@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: SOF: Intel: Add platform differentiation for APL and CNLLiam Girdwood2019-04-281-0/+249
Add platform differentiation operations for different Intel HDA DSP platforms. Signed-off-by: Keyon Jie <yang.jie@linux.intel.com> Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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