summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/include
Commit message (Expand)AuthorAgeFilesLines
...
* drm/amdgpu: implement querying ras error count for mmhubTao Zhou2019-08-152-0/+243
* drm/amdgpu: add renoir header files (v2)Huang Rui2019-08-122-0/+1202
* drm/amdgpu: add CGTT_GS_NGG_CLK_CTRL register to gc headerXiaojie Yuan2019-08-022-0/+41
* drm/amdgpu: add ip offset header for navi12 (v2)Xiaojie Yuan2019-08-021-0/+1119
* drm/amdkfd: Extend CU mask to 8 SEs (v3)Jay Cornwall2019-08-021-4/+4
* drm/amdgpu: Update NBIO headers to add TXCLK3/4Kent Russell2019-08-022-0/+36
* drm/amd/include: add define of TCP_EDC_CNT_NEWDennis Li2019-07-311-0/+2
* drm/amd/include: add bitfield define for EDC registersDennis Li2019-07-311-0/+157
* drm/amdgpu: add umc v6_1_1 IP headersHawking Zhang2019-07-312-0/+122
* drm/amdgpu: add rsmu v_0_0_2 ip headersHawking Zhang2019-07-312-0/+59
* drm/amd/powerplay: add new sensor type for VCN powergate statusEvan Quan2019-07-301-0/+1
* drm/amd/include: adjust base offset of SMUIO and THM for ArcturusLe Ma2019-07-301-6/+2
* drm/amd/powerplay: add smcdpminfo table v4_6 supportEvan Quan2019-07-301-0/+86
* drm/amdgpu/powerplay: add a new interface to set the mp1 stateAlex Deucher2019-07-301-0/+8
* drm/amdgpu: exposing fica registers to df offsetsJonathan Kim2019-07-181-0/+4
* drm/amd/powerplay: correct SW SMU valid mapping checkEvan Quan2019-07-181-0/+1
* drm/amdgpu/: add clientID for 2nd vcn instanceJames Zhu2019-07-181-1/+1
* drm/amdgpu: add VMC1 interrupt client id for ArcturusLe Ma2019-07-181-0/+1
* drm/amdgpu: add SDMA 2~7 interrupt client id for ArcturusLe Ma2019-07-181-1/+7
* drm/amdgpu: add Arcturus ip_offset header (v3)Le Ma2019-07-181-0/+1654
* drm/amdgpu: add VCN2.5 headersLeo Liu2019-07-182-0/+4588
* drm/amdgpu: add sdma 4.2.2 header files for ArcturusLe Ma2019-07-1816-0/+32046
* drm/amdgpu: add mmhub 9.4.1 header files for AcrturusLe Ma2019-07-183-0/+56570
* drm/amdgpu/soc15: initialize reg base for navi14 (v2)Xiaojie Yuan2019-07-181-0/+1119
* drm/amd/powerplay: increase the SMU msg response waiting timeEvan Quan2019-07-111-1/+1
* drm/amd/powerplay: make athub pg bit configured by pg_flagsHuang Rui2019-06-251-1/+2
* drm/amd/display: Create DWB resource for DCN2Charlene Liu2019-06-222-0/+20
* drm/amdgpu/mes10.1: add ip block mes10.1 (v2)Jack Xiao2019-06-211-1/+2
* drm/amdgpu/discovery: update definition for struct die_headerXiaojie Yuan2019-06-211-2/+2
* drm/amdgpu/discovery: add harvest info data tableXiaojie Yuan2019-06-211-1/+17
* drm/amdgpu/discovery: update definitions of table_info and binary_headerXiaojie Yuan2019-06-211-0/+4
* drm/amdgpu/discovery: add ip discovery initial supportXiaojie Yuan2019-06-211-0/+145
* drm/amd/display: move dcn v1_0 irq source header to ivsrcid/dcn/Hawking Zhang2019-06-201-0/+0
* drm/amdgpu: add irq sources for vcn v2_0 (v2)Hawking Zhang2019-06-201-0/+32
* drm/amdgpu: add irq sources for sdma v5_0Hawking Zhang2019-06-202-0/+87
* drm/amdgpu: add irq sources for gfx v10_1Hawking Zhang2019-06-201-0/+53
* drm/amdgpu/athub2: enable athub2 clock gatingJack Xiao2019-06-201-0/+2
* drm/amdgpu: add flag to support IH clock gatingHawking Zhang2019-06-201-0/+1
* drm/amdgpu: add new HDP CG flagsHawking Zhang2019-06-201-0/+2
* drm/amdgpu: add v10 structs header (v2)Huang Rui2019-06-201-0/+1258
* drm/amdgpu: add navi10 ip offset headerHawking Zhang2019-06-202-1/+858
* drm/amdgpu: atomfirmware.h updates for navi10Hawking Zhang2019-06-201-8/+180
* drm/amdgpu: add navi10 enums headerHawking Zhang2019-06-201-0/+22764
* drm/amdgpu: add SMUIO 11.0 register headersHawking Zhang2019-06-202-0/+1012
* drm/amdgpu: add OSS 5.0 register headersHawking Zhang2019-06-202-0/+1658
* drm/amdgpu: add MMHUB 2.0 register headersHawking Zhang2019-06-203-0/+10293
* drm/amdgpu: add GC 10.1 register headers (v4)Hawking Zhang2019-06-203-0/+61330
* drm/amdgpu: add VCN 2.0 register headersHawking Zhang2019-06-202-0/+4823
* drm/amdgpu: add NBIO 2.3 register headersHawking Zhang2019-06-203-0/+153523
* drm/amdgpu: add MP 11.0 register headersHawking Zhang2019-06-201-0/+429
OpenPOWER on IntegriCloud