Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | clk: sunxi-ng: r40: Add max. rate constraint to video PLLs | Jernej Skrabec | 2018-08-27 | 1 | -26/+26 |
* | clk: sunxi-ng: r40: Allow setting parent rate to display related clocks | Jernej Skrabec | 2018-06-27 | 1 | -4/+8 |
* | clk: sunxi-ng: r40: Add minimal rate for video PLLs | Jernej Skrabec | 2018-06-27 | 1 | -22/+24 |
* | clk: sunxi-ng: r40: export a regmap to access the GMAC register | Icenowy Zheng | 2018-05-17 | 1 | -0/+33 |
* | clk: sunxi-ng: r40: rewrite init code to a platform driver | Icenowy Zheng | 2018-05-17 | 1 | -11/+28 |
* | clk: sunxi-ng: support R40 SoC | Icenowy Zheng | 2017-08-19 | 1 | -0/+1290 |