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path: root/arch/x86/mm/pageattr_64.c
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* x86: unify pageattr_32.c and pageattr_64.cIngo Molnar2008-01-301-284/+0
* x86: prepare for pageattr.c unificationIngo Molnar2008-01-301-8/+0
* x86: add kernel_map_pages() to 64-bitIngo Molnar2008-01-301-0/+30
* x86: return -EINVAL in __change_page_attr(), instead of 0Ingo Molnar2008-01-301-1/+1
* x86: clean up differences between 64-bit and 32-bitIngo Molnar2008-01-301-5/+11
* x86: 64-bit, add the new split_large_page() functionIngo Molnar2008-01-301-24/+71
* x86: 64-bit pageattr.c, prepare for unificationIngo Molnar2008-01-301-4/+8
* x86: change 64-bit pageattr to use set_pte_atomic()Ingo Molnar2008-01-301-2/+2
* x86: change 64-bit __change_page_attr() to struct pageIngo Molnar2008-01-301-4/+4
* x86: simplify __change_page_attr()Ingo Molnar2008-01-301-29/+18
* x86: clean up and simplify 64-bit split_large_page()Ingo Molnar2008-01-301-7/+7
* x86: unify header part of pageattr_64.cIngo Molnar2008-01-301-1/+2
* x86: simplify pageattr_64.cIngo Molnar2008-01-301-113/+55
* x86: prepare for the unification of the cpa codeIngo Molnar2008-01-301-8/+3
* x86: c_p_a() make it more robust against use of PAT bitsAndi Kleen2008-01-301-2/+2
* x86: c_p_a() fix: reorder TLB / cache flushes to follow Intel recommendationAndi Kleen2008-01-301-1/+2
* x86: cpa: remove unnecessary masking of addressAndi Kleen2008-01-301-1/+1
* x86: cpa: use wbinvd() macro instead of inline assembly in 64bit c_p_a()Andi Kleen2008-01-301-1/+1
* x86: return the page table level in lookup_address()Ingo Molnar2008-01-301-2/+5
* x86: clean up arch/x86/mm/pageattr_64.cIngo Molnar2008-01-301-62/+81
* Intel IOMMU: clflush_cache_range now takes size paramKeshavamurthy, Anil S2007-10-221-3/+3
* x86: fix global_flush_tlb() bugIngo Molnar2007-10-191-2/+7
* x86: Create clflush() inline, remove hardcoded wbinvdH. Peter Anvin2007-10-171-1/+1
* x86: NX bit handling in change_page_attr()Huang, Ying2007-10-171-0/+1
* x86_64: move mmThomas Gleixner2007-10-111-0/+249
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