Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | MIPS: SGI-IP22/28: Use PROM for memory detection | Thomas Bogendoerfer | 2019-10-09 | 1 | -9/+0 |
* | MIPS: SGI-IP22: set PHYS_OFFSET to memory start | Thomas Bogendoerfer | 2019-10-09 | 1 | -2/+1 |
* | MIPS: Remove unused R5432_CP0_INTERRUPT_WAR | Paul Burton | 2019-07-23 | 1 | -1/+0 |
* | MIPS16e2: Provide feature overrides for non-MIPS16 systems | Maciej W. Rozycki | 2017-07-11 | 1 | -0/+1 |
* | MIPS: Correct `nofpu' non-functionality | Maciej W. Rozycki | 2015-04-08 | 1 | -1/+0 |
* | MIPS: IP22: This platform may come with either MIPS III or MIPS IV CPUs. | Ralf Baechle | 2014-05-23 | 1 | -0/+4 |
* | MIPS: Optimize current_cpu_type() for better code. | Ralf Baechle | 2013-09-17 | 1 | -0/+2 |
* | MIPS: PMC-Sierra Yosemite: Remove support. | Ralf Baechle | 2012-12-13 | 1 | -1/+0 |
* | MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required. | Ralf Baechle | 2012-10-11 | 1 | -0/+1 |
* | MIPS: IP22/28: Switch over to RTC class driver | Thomas Bogendoerfer | 2008-10-15 | 1 | -18/+0 |
* | MIPS: Move headfiles to new location below arch/mips/include | Ralf Baechle | 2008-10-11 | 4 | -0/+118 |