summaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
Commit message (Expand)AuthorAgeFilesLines
* MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.Ralf Baechle2012-10-111-0/+1
* MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.Steven J. Hill2012-09-131-1/+1
* MIPS: Octeon: Enable C0_UserLocal probing.David Daney2011-09-241-1/+0
* MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Octeon II.David Daney2010-10-291-1/+1
* MIPS: Octeon: Adjust top of DMA32 zone.David Daney2010-10-291-0/+6
* MIPS: Octeon: Implement delays with cycle counter.David Daney2010-08-051-11/+0
* MIPS: Octeon: Define ARCH_HAS_USABLE_BUILTIN_POPCOUNT for OCTEON.David Daney2010-08-051-0/+8
* MIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUsDavid Daney2010-02-271-0/+3
* MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.David Daney2009-09-171-4/+8
* MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.hDavid Daney2009-06-171-0/+1
* MIPS: Remove execution hazard barriers for Octeon.David Daney2009-06-171-0/+1
* MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.David Daney2009-01-111-0/+78
OpenPOWER on IntegriCloud