summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/sram34xx.S
Commit message (Expand)AuthorAgeFilesLines
* OMAP3: SDRC: Place SDRC AC timing and MR changes in CORE DVFS SRAM code behin...Paul Walmsley2009-12-111-2/+17
* OMAP3 SDRC: Move the clk stabilization delay to the right placeRajendra Nayak2009-07-241-2/+2
* OMAP3 SDRC: Fix freeze when scaling CORE dpll to < 83MhzRajendra Nayak2009-07-241-1/+1
* OMAP2/3 SDRC: don't set SDRC_POWER.PWDENA on bootPaul Walmsley2009-07-241-2/+0
* OMAP3 SDRC: add support for 2 SDRAM chip selectsJean Pihet2009-07-241-30/+107
* OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLLPaul Walmsley2009-06-191-0/+12
* OMAP3: Add support for DPLL3 divisor values higher than 2Tero Kristo2009-06-191-3/+5
* OMAP3 SRAM: convert SRAM code to use macros rather than magic numbersPaul Walmsley2009-06-191-15/+38
* OMAP3 SRAM: add more comments on the SRAM codePaul Walmsley2009-06-191-21/+24
* OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changePaul Walmsley2009-06-191-1/+7
* OMAP3 clock: add a short delay when lowering CORE clk ratePaul Walmsley2009-06-191-11/+9
* OMAP3 clock: remove wait for DPLL3 M2 clock to stabilizePaul Walmsley2009-06-191-3/+0
* OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHzPaul Walmsley2009-05-121-6/+7
* OMAP3 SRAM: renumber registers to make space for argument passingPaul Walmsley2009-05-121-57/+57
* OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency changePaul Walmsley2009-05-121-3/+4
* OMAP3 clock: add interconnect barriers to CORE DPLL M2 changePaul Walmsley2009-05-121-3/+6
* OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpllPaul Walmsley2009-05-121-2/+2
* ARM: OMAP3: Add minimal omap3430 supportSyed Mohammed, Khasim2008-10-091-0/+179
OpenPOWER on IntegriCloud