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* drm/i915/lvds: Ensure panel is unlocked for Ironlake or the panel fitterChris Wilson2010-09-134-63/+105
| | | | | | | | | | | | | | | Commit 77d07fd9d73ef28689737c0952dbd5d6a5017743 introduced a regression where by not waiting for the panel to be turned off, left the panel and PLL registers locked across the modeset. Thus the panel remaining blank. As pointed out by Daniel Vetter, when testing LVDS it helps to open the laptop and look at the actual panel you are purporting to test. A second issue with the patch was that in order to modify the panel fitter before gen5, the pipe and the panel must have be completely powered down. So we wait. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/bios: Prevent NULL dereference after allocation failureChris Wilson2010-09-121-0/+2
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/sdvo: Poll command status 5 times without delay on readChris Wilson2010-09-121-35/+36
| | | | | | | | | | | | | | | | | | | | The documentation says that an SDVO command takes a maximum of 15us to be processed by the device, and that it is sufficient to read the status byte 3 times (whilst the command is still in the PENDING state) for the driver to be confident that sufficient time has elapsed. We err on the safe side and try 5 times before giving up. The only question that remains: was the old behaviour derived by experiments with real hardware? A look into the murky history of UMS, implies that the behaviour was accidental and the current retry mechanism was solely designed to catch the status byte indicating PENDING with no reference to hardware behaviour. (commit ac9181c014638dbeb334b40b4029d0ccb2b7a0fc in xf86-video-intel) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Use msleep instead of mdelay during wait_vblank_offChris Wilson2010-09-122-6/+14
| | | | | | | Avoid a potentially long busy-wait if we not in the process of atomically switching to the kdb console. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/lvds: Remove busy wait for powering up the panel.Chris Wilson2010-09-121-5/+1
| | | | | | | We just assume that it will happen in a timely manner. A variant of this patch was first written and tested by Arjan van de Van. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/lvds: Remove busy wait for powering down the panelChris Wilson2010-09-121-9/+2
| | | | | | | Just assume that it will turn off... Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/i2c: The bit-banging interface controls the delay, drop oursChris Wilson2010-09-111-19/+15
| | | | | | | Remove our redundant udelay() as the timings are already handled by the i2c-algo-bit controller. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/dp: Convert a udelay(17000) to a sleep during link-offChris Wilson2010-09-111-3/+2
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Use macros to switch between equivalent pipe registersChris Wilson2010-09-115-546/+507
| | | | | | | | | | The purpose is to make the code much easier to read and therefore reduce the possibility for bugs. A side effect is that it also makes it much easier for the compiler, reducing the object size by 4k -- from just a few functions! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Tidy Ironlake watermark computationChris Wilson2010-09-112-115/+99
| | | | | | | Refactor the common code into seperate functions and use the MIN(large, small) buffer calculation for self-refresh watermarks. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Fix updating FBCChris Wilson2010-09-113-68/+90
| | | | | | | We need to track different state on each generation in order to detect when we need to refresh the FBC registers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: enable thermal reporting for IPSJesse Barnes2010-09-112-0/+8
| | | | | | | | | Thermal reporting may not be enabled by default on some machines, so enable the appropriate bits to allow IPS to get the data it needs from the CPU thermal device. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-09-113-9/+27
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| * drm/i915: don't enable self-refresh on IronlakeJesse Barnes2010-09-102-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't know how to enable it safely, especially as outputs turn on and off. When disabling LP1 we also need to make sure LP2 and 3 are already disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29173 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29082 Reported-by: Chris Lord <chris@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| * drm/i915: Double check that the wait_request is not pending before warningChris Wilson2010-09-091-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | If we are busy, then we may have woken up the wait_request handler but not yet serviced it before the hang check fires. So in hang check, double check that the i915_gem_do_wait_request() is still pending the wake-up before declaring all hope lost. Fixes regression with e78d73b16bcde921c9cf458d2e4de8e4fc2518f3. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30073 Reported-and-tested-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Use the real FDI frequency for determining b/wChris Wilson2010-09-103-1/+20
| | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Only call udelay() when waiting for clocks to stabiliseChris Wilson2010-09-101-3/+1
| | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Ensure all PLL registers are flushed before a udelay()Chris Wilson2010-09-101-0/+5
| | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: set FDI RX TU size to match transmit sizeJesse Barnes2010-09-101-0/+6
| | | | | | | | | | | | | | This allows FDI error checking to work. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: don't write TU size to N1 regJesse Barnes2010-09-101-1/+1
| | | | | | | | | | | | | | | | TU size is only part of the M1 and M2 regs, not the N regs. This keeps us from overwriting a reserved field. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: split Ironlake FDI enable functionJesse Barnes2010-09-101-27/+45
| | | | | | | | | | | | | | Easier to read, and will pair up with a disable function. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: enable PCH PLL, FDI training and transcoder even for eDPJesse Barnes2010-09-101-123/+119
| | | | | | | | | | | | | | | | | | | | | | eDP panels require these to be set up prior to panel power sequencing, or they'll fail to power on due to an "asset not ready" check. And of course, eDP panels attached to anything other than DP_A need them enabled regardless, since they'll be driven from the CPU through FDI out to the PCH. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: use i915 and Ironlake CRTC enable/disable functions in prepare/commitJesse Barnes2010-09-101-9/+60
| | | | | | | | | | | | | | | | This will allow us to optimize our prepare/commit paths a bit better. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: minor tweak to handle the cursor across pipe resizing] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: don't unlock panel regsJesse Barnes2010-09-101-1/+1
| | | | | | | | | | | | | | This was just a workaround for some broken Ironlake CRTC code. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: split i9xx CRTC enable/disable codeJesse Barnes2010-09-101-82/+103
| | | | | | | | | | | | | | So we can use it for CRTC prepare/commit. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: split Ironlake CRTC enable/disable codeJesse Barnes2010-09-101-281/+310
| | | | | | | | | | | | | | | | This way we can also use it in CRTC prepare/commit. Also makes it easier to split out FDI and other code. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Adapt workqueue to new alloc_workqueue interfaceChris Wilson2010-09-101-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | create_singlethreaded_workqueue() is being phased out for a new concurrency managed task infrastructure. Adapt our workqueue constructor to explicitly create a domain that only allows the execution of a single task at any time. All the tasks are expected to require the dev->struct_mutex, so would block concurrency of other tasks if we allow more than a single i915 task to be run at once. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915/debug: Include Ironlake in self-refresh statusChris Wilson2010-09-091-3/+5
| | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: Make the connector->encoder relationship explicitChris Wilson2010-09-099-127/+130
| | | | | | | | | | | | | | | | | | Currently we have a exact mapping of a connector onto an encoder for its whole lifetime. Make this an explicit property of the structure and so simplify the code. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | drm/i915: Use the direct mapping of pipe->crtcChris Wilson2010-09-094-15/+9
| | | | | | | | | | | | | | | | Why iterate all the crtcs to find the pipe, when we already know which crtc is attached to which pipe? Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | drm/i915: Rename intel_encoder->enc to base for consistencyChris Wilson2010-09-0911-146/+137
| | | | | | | | | | | | | | | | [Patch is slightly larger than is strictly necessary to fixup surrounding checkpatch.pl errors.] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | drm/i915/dp: Flush the PLL register write before sleepingChris Wilson2010-09-081-0/+1
| | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: make sure panel is sequenced off when starting a mode setJesse Barnes2010-09-081-0/+1
| | | | | | | | | | | | | | Otherwise we may not be able to train the DP link. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: make sure VDD AUX power has time to settleJesse Barnes2010-09-081-0/+2
| | | | | | | | | | | | | | | | When turning on or off the VDD AUX bit, we need to give the panel time to start or stop or AUX transactions may fail. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: don't change VDD AUX status in panel power functionsJesse Barnes2010-09-081-2/+2
| | | | | | | | | | | | | | | | Mode set sequence outlines when the AUX VDD bit should be set and cleared, and it's separate from the panel power sequence. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: split DP link training across panel power sequencingJesse Barnes2010-09-081-56/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Mode set sequence requires that we start training, then enable the panel, then complete training. So split the DP training function into two parts; the first enables the DP port and sets training pattern 1 and the second completes the training. As part of this, remove some redundant function args from the various DP handling functions and use the intel_dp fields everywhere we can. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: removed first ironlake_edp_backlight_on() on advice of jbarnes] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: use VDD AUX for panel power around detection and in prepareJesse Barnes2010-09-081-6/+29
| | | | | | | | | | | | | | | | | | | | Mode setting sequence specifies that we use VDD AUX for configuration and detection, and early in the mode set sequence. Only later (after DP_A has started training) should we actually enable panel power. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: checkpatch.pl complaining about whitespace] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: use 125MHz reference clock for PCH attached eDPJesse Barnes2010-09-081-1/+4
| | | | | | | | | | | | | | | | | | | | | | Fix the test so we don't try to use the 450MHz refclk on PCH attached eDP. References: https://bugs.freedesktop.org/show_bug.cgi?id=29141 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: fix eDP detectionJesse Barnes2010-09-081-3/+12
| | | | | | | | | | | | | | Panel needs to be powered up. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | i915: snprintf returns large valuesDan Carpenter2010-09-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | snprintf() returns the number of bytes which would have been used if there was enough space. It can be larger than the size of the buffer. Obviously in this case the buffer is large enough but everyone just copy and pastes this code so it's better to limit it and set a good example. Signed-off-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: die, i915_probe_agp, dieDaniel Vetter2010-09-084-180/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the detection from intel-gtt.ko instead. Hooray! Also move the stolen mem allocator to the other gtt stuff in dev_prv->mem. v2: Chris Wilson noted that my error handling was crap. Fix it. He also said that this fixes a problem on his i845. Indeed, i915_probe_agp misses a special case for i830/i845 stolen mem detection. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=25476 Cc: stable@kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | drm/i915: drop prealloc_start from i915_dma gtt initDaniel Vetter2010-09-081-8/+4
| | | | | | | | | | | | | | Not used and simply confusing. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | intel-gtt: use chipset generation number some moreDaniel Vetter2010-09-081-8/+2
| | | | | | | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | intel-gtt: call init_gtt_init in probe functionDaniel Vetter2010-09-081-45/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way create_gatt_table become dummy glue functions for the fake agp driver - rename them accordingly (and kill the now unnecessary i9xx copy). With this change, the gtt initialization code is almost independant from the agp stuff. Two things are still missing: - the scratch page is created by the generic agp code. - filling the whole gtt with scratch_page ptes is not yet consolidated - this needs abstracted pte handling, first. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | intel-gtt: consolidate i9xx setupDaniel Vetter2010-09-081-93/+61
| | | | | | | | | | | | | | | | | | The only difference between i915 and i965 was the calculation of the gtt address. So merge these two paths into one. Otherwise the same changes as in the i830 setup consolidation. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | intel-gtt: consolidate i830 setupDaniel Vetter2010-09-081-34/+49
| | | | | | | | | | | | | | | | | | Slighlty reordered sequence was necessary. Also don't set agp_bridge->gatt_bus_addr anymore. Only used by generic agp helper functions, hence unnecessary for the intel fake agp driver. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | intel-gtt: consolidate the gtt ioremap callsDaniel Vetter2010-09-081-44/+26
| | | | | | | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | intel-gtt: i830: adjust ioremap of regs and gtt to i9xxDaniel Vetter2010-09-081-18/+23
| | | | | | | | | | | | | | | | | | This way around this can be extracted into common code. Also use a common cleanup function (and give it a generic name). Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | intel-gtt: i965: use detected gtt size for mappingDaniel Vetter2010-09-081-42/+34
| | | | | | | | | | | | | | | | Also move the Sandybdridge size detection into gtt_total_entries, like the rest. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | intel-gtt: i915: use detected gtt size for mappingDaniel Vetter2010-09-081-50/+8
| | | | | | | | | | | | | | Slight reordering of the init sequence required. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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