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-rw-r--r--sound/pci/rme9652/hdsp.c7
-rw-r--r--sound/pci/rme9652/hdspm.c4
2 files changed, 5 insertions, 6 deletions
diff --git a/sound/pci/rme9652/hdsp.c b/sound/pci/rme9652/hdsp.c
index 314e73531bd1..bcfdbb5ebc40 100644
--- a/sound/pci/rme9652/hdsp.c
+++ b/sound/pci/rme9652/hdsp.c
@@ -28,6 +28,7 @@
#include <linux/pci.h>
#include <linux/firmware.h>
#include <linux/moduleparam.h>
+#include <linux/math64.h>
#include <sound/core.h>
#include <sound/control.h>
@@ -1047,7 +1048,6 @@ static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
{
u64 n;
- u32 r;
if (rate >= 112000)
rate /= 4;
@@ -1055,7 +1055,7 @@ static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
rate /= 2;
n = DDS_NUMERATOR;
- div64_32(&n, rate, &r);
+ n = div_u64(n, rate);
/* n should be less than 2^32 for being written to FREQ register */
snd_BUG_ON(n >> 32);
/* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
@@ -3097,7 +3097,6 @@ static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct sn
static int hdsp_dds_offset(struct hdsp *hdsp)
{
u64 n;
- u32 r;
unsigned int dds_value = hdsp->dds_value;
int system_sample_rate = hdsp->system_sample_rate;
@@ -3109,7 +3108,7 @@ static int hdsp_dds_offset(struct hdsp *hdsp)
* dds_value = n / rate
* rate = n / dds_value
*/
- div64_32(&n, dds_value, &r);
+ n = div_u64(n, dds_value);
if (system_sample_rate >= 112000)
n *= 4;
else if (system_sample_rate >= 56000)
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index bac2dc0c5d85..0dce331a2a3b 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -29,6 +29,7 @@
#include <linux/moduleparam.h>
#include <linux/slab.h>
#include <linux/pci.h>
+#include <linux/math64.h>
#include <asm/io.h>
#include <sound/core.h>
@@ -831,7 +832,6 @@ static int hdspm_set_interrupt_interval(struct hdspm * s, unsigned int frames)
static void hdspm_set_dds_value(struct hdspm *hdspm, int rate)
{
u64 n;
- u32 r;
if (rate >= 112000)
rate /= 4;
@@ -844,7 +844,7 @@ static void hdspm_set_dds_value(struct hdspm *hdspm, int rate)
*/
/* n = 104857600000000ULL; */ /* = 2^20 * 10^8 */
n = 110100480000000ULL; /* Value checked for AES32 and MADI */
- div64_32(&n, rate, &r);
+ n = div_u64(n, rate);
/* n should be less than 2^32 for being written to FREQ register */
snd_BUG_ON(n >> 32);
hdspm_write(hdspm, HDSPM_freqReg, (u32)n);
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