diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/i2c/busses/i2c-iop3xx.c | 17 | ||||
| -rw-r--r-- | drivers/i2c/busses/i2c-iop3xx.h | 2 |
2 files changed, 11 insertions, 8 deletions
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c index aca7e1668605..48c56939c861 100644 --- a/drivers/i2c/busses/i2c-iop3xx.c +++ b/drivers/i2c/busses/i2c-iop3xx.c @@ -21,6 +21,9 @@ * - Make it work with IXP46x chips * - Cleanup function names, coding style, etc * + * - writing to slave address causes latchup on iop331. + * fix: driver refuses to address self. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, version 2. @@ -73,12 +76,6 @@ iop3xx_i2c_reset(struct i2c_algo_iop3xx_data *iop3xx_adap) } static void -iop3xx_i2c_set_slave_addr(struct i2c_algo_iop3xx_data *iop3xx_adap) -{ - __raw_writel(MYSAR, iop3xx_adap->ioaddr + SAR_OFFSET); -} - -static void iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) { u32 cr = IOP3XX_ICR_GCD | IOP3XX_ICR_SCLEN | IOP3XX_ICR_UE; @@ -248,6 +245,13 @@ iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, int status; int rc; + /* avoid writing to my slave address (hangs on 80331), + * forbidden in Intel developer manual + */ + if (msg->addr == MYSAR) { + return -EBUSY; + } + __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); @@ -498,7 +502,6 @@ iop3xx_i2c_probe(struct platform_device *pdev) spin_lock_init(&adapter_data->lock); iop3xx_i2c_reset(adapter_data); - iop3xx_i2c_set_slave_addr(adapter_data); iop3xx_i2c_enable(adapter_data); platform_set_drvdata(pdev, new_adapter); diff --git a/drivers/i2c/busses/i2c-iop3xx.h b/drivers/i2c/busses/i2c-iop3xx.h index e46ebaea7b1e..8485861f6a36 100644 --- a/drivers/i2c/busses/i2c-iop3xx.h +++ b/drivers/i2c/busses/i2c-iop3xx.h @@ -80,7 +80,7 @@ #define IOP3XX_GPOD_I2C0 0x00c0 /* clear these bits to enable ch0 */ #define IOP3XX_GPOD_I2C1 0x0030 /* clear these bits to enable ch1 */ -#define MYSAR 0x02 /* SWAG a suitable slave address */ +#define MYSAR 0 /* default slave address */ #define I2C_ERR 321 #define I2C_ERR_BERR (I2C_ERR+0) |
