diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c | 47 | 
1 files changed, 0 insertions, 47 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c index 2c21135a8510..1dccd59c59c5 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c @@ -37,7 +37,6 @@  #include "dce110/dce110_timing_generator.h"  #include "dce110/dce110_resource.h"  #include "dce80/dce80_timing_generator.h" -#include "dce/dce_clk_mgr.h"  #include "dce/dce_mem_input.h"  #include "dce/dce_link_encoder.h"  #include "dce/dce_stream_encoder.h" @@ -154,19 +153,6 @@ static const struct dce110_timing_generator_offsets dce80_tg_offsets[] = {  #define SRI(reg_name, block, id)\  	.reg_name = mm ## block ## id ## _ ## reg_name - -static const struct clk_mgr_registers disp_clk_regs = { -		CLK_COMMON_REG_LIST_DCE_BASE() -}; - -static const struct clk_mgr_shift disp_clk_shift = { -		CLK_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(__SHIFT) -}; - -static const struct clk_mgr_mask disp_clk_mask = { -		CLK_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(_MASK) -}; -  #define ipp_regs(id)\  [id] = {\  		IPP_COMMON_REG_LIST_DCE_BASE(id)\ @@ -802,9 +788,6 @@ static void destruct(struct dce110_resource_pool *pool)  		}  	} -	if (pool->base.clk_mgr != NULL) -		dce_clk_mgr_destroy(&pool->base.clk_mgr); -  	if (pool->base.irqs != NULL) {  		dal_irq_service_destroy(&pool->base.irqs);  	} @@ -955,16 +938,6 @@ static bool dce80_construct(  		}  	} -	pool->base.clk_mgr = dce_clk_mgr_create(ctx, -			&disp_clk_regs, -			&disp_clk_shift, -			&disp_clk_mask); -	if (pool->base.clk_mgr == NULL) { -		dm_error("DC: failed to create display clock!\n"); -		BREAK_TO_DEBUGGER(); -		goto res_create_fail; -	} -  	pool->base.dmcu = dce_dmcu_create(ctx,  			&dmcu_regs,  			&dmcu_shift, @@ -1164,16 +1137,6 @@ static bool dce81_construct(  		}  	} -	pool->base.clk_mgr = dce_clk_mgr_create(ctx, -			&disp_clk_regs, -			&disp_clk_shift, -			&disp_clk_mask); -	if (pool->base.clk_mgr == NULL) { -		dm_error("DC: failed to create display clock!\n"); -		BREAK_TO_DEBUGGER(); -		goto res_create_fail; -	} -  	pool->base.dmcu = dce_dmcu_create(ctx,  			&dmcu_regs,  			&dmcu_shift, @@ -1369,16 +1332,6 @@ static bool dce83_construct(  		}  	} -	pool->base.clk_mgr = dce_clk_mgr_create(ctx, -			&disp_clk_regs, -			&disp_clk_shift, -			&disp_clk_mask); -	if (pool->base.clk_mgr == NULL) { -		dm_error("DC: failed to create display clock!\n"); -		BREAK_TO_DEBUGGER(); -		goto res_create_fail; -	} -  	pool->base.dmcu = dce_dmcu_create(ctx,  			&dmcu_regs,  			&dmcu_shift,  | 

