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-rw-r--r--arch/x86/include/asm/fpu/internal.h2
-rw-r--r--arch/x86/kernel/cpu/common.c4
-rw-r--r--arch/x86/kernel/fpu/init.c5
-rw-r--r--arch/x86/xen/enlighten.c2
4 files changed, 4 insertions, 9 deletions
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 71d44be5acb1..4617eeb57004 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -36,7 +36,7 @@ int ia32_setup_frame(int sig, struct ksignal *ksig,
#define MXCSR_DEFAULT 0x1f80
extern unsigned int mxcsr_feature_mask;
-extern void fpu__cpu_init(void);
+extern void fpu__init_cpu(void);
extern void eager_fpu_init(void);
extern void fpu__init_system_xstate(void);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8f6a4ea39657..d28f8ebc506d 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1435,7 +1435,7 @@ void cpu_init(void)
clear_all_debug_regs();
dbg_restore_debug_regs();
- fpu__cpu_init();
+ fpu__init_cpu();
if (is_uv_system())
uv_cpu_init();
@@ -1491,7 +1491,7 @@ void cpu_init(void)
clear_all_debug_regs();
dbg_restore_debug_regs();
- fpu__cpu_init();
+ fpu__init_cpu();
}
#endif
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 0c9c1069fba8..cf27bbed1ba1 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -241,11 +241,6 @@ void fpu__init_system(void)
fpu__init_system_ctx_switch();
}
-void fpu__cpu_init(void)
-{
- fpu__init_cpu();
-}
-
static int __init no_387(char *s)
{
setup_clear_cpu_cap(X86_FEATURE_FPU);
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 43f8704b7289..98088bf5906a 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1423,7 +1423,7 @@ static void xen_pvh_set_cr_flags(int cpu)
return;
/*
* For BSP, PSE PGE are set in probe_page_size_mask(), for APs
- * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__cpu_init().
+ * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__init_cpu().
*/
if (cpu_has_pse)
cr4_set_bits_and_update_boot(X86_CR4_PSE);
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