diff options
Diffstat (limited to 'arch/xtensa/include/asm')
| -rw-r--r-- | arch/xtensa/include/asm/coprocessor.h | 20 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/irqflags.h | 1 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/processor.h | 18 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/thread_info.h | 1 | ||||
| -rw-r--r-- | arch/xtensa/include/asm/timex.h | 18 |
5 files changed, 19 insertions, 39 deletions
diff --git a/arch/xtensa/include/asm/coprocessor.h b/arch/xtensa/include/asm/coprocessor.h index eafe986a0246..6712929a27c9 100644 --- a/arch/xtensa/include/asm/coprocessor.h +++ b/arch/xtensa/include/asm/coprocessor.h @@ -12,7 +12,6 @@ #ifndef _XTENSA_COPROCESSOR_H #define _XTENSA_COPROCESSOR_H -#include <linux/stringify.h> #include <variant/core.h> #include <variant/tie.h> #include <asm/types.h> @@ -90,19 +89,6 @@ #ifndef __ASSEMBLY__ - -#if XCHAL_HAVE_CP - -#define RSR_CPENABLE(x) do { \ - __asm__ __volatile__("rsr %0, cpenable" : "=a" (x)); \ - } while(0); -#define WSR_CPENABLE(x) do { \ - __asm__ __volatile__("wsr %0, cpenable; rsync" :: "a" (x)); \ - } while(0); - -#endif /* XCHAL_HAVE_CP */ - - /* * Additional registers. * We define three types of additional registers: @@ -162,12 +148,6 @@ extern void coprocessor_flush(struct thread_info*, int); extern void coprocessor_release_all(struct thread_info*); extern void coprocessor_flush_all(struct thread_info*); -static inline void coprocessor_clear_cpenable(void) -{ - unsigned long i = 0; - WSR_CPENABLE(i); -} - #endif /* XTENSA_HAVE_COPROCESSORS */ #endif /* !__ASSEMBLY__ */ diff --git a/arch/xtensa/include/asm/irqflags.h b/arch/xtensa/include/asm/irqflags.h index 407606e576f8..9b5e8526afe5 100644 --- a/arch/xtensa/include/asm/irqflags.h +++ b/arch/xtensa/include/asm/irqflags.h @@ -12,6 +12,7 @@ #ifndef _XTENSA_IRQFLAGS_H #define _XTENSA_IRQFLAGS_H +#include <linux/stringify.h> #include <linux/types.h> #include <asm/processor.h> diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 34a23016dd14..f7dd895b2353 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h @@ -13,6 +13,7 @@ #include <variant/core.h> #include <linux/compiler.h> +#include <linux/stringify.h> #include <asm/ptrace.h> #include <asm/types.h> #include <asm/regs.h> @@ -212,11 +213,18 @@ extern unsigned long get_wchan(struct task_struct *p); /* Special register access. */ -#define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v)); -#define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v)); - -#define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);}) -#define get_sr(sr) ({unsigned int v; RSR(v,sr); v; }) +#define xtensa_set_sr(x, sr) \ + ({ \ + unsigned int v = (unsigned int)(x); \ + __asm__ __volatile__ ("wsr %0, "__stringify(sr) :: "a"(v)); \ + }) + +#define xtensa_get_sr(sr) \ + ({ \ + unsigned int v; \ + __asm__ __volatile__ ("rsr %0, "__stringify(sr) : "=a"(v)); \ + v; \ + }) #ifndef XCHAL_HAVE_EXTERN_REGS #define XCHAL_HAVE_EXTERN_REGS 0 diff --git a/arch/xtensa/include/asm/thread_info.h b/arch/xtensa/include/asm/thread_info.h index 2bd19ae61e47..49aa7879afde 100644 --- a/arch/xtensa/include/asm/thread_info.h +++ b/arch/xtensa/include/asm/thread_info.h @@ -11,6 +11,7 @@ #ifndef _XTENSA_THREAD_INFO_H #define _XTENSA_THREAD_INFO_H +#include <linux/stringify.h> #include <asm/kmem_layout.h> #define CURRENT_SHIFT KERNEL_STACK_SHIFT diff --git a/arch/xtensa/include/asm/timex.h b/arch/xtensa/include/asm/timex.h index f9b389d4e973..233ec75e60c6 100644 --- a/arch/xtensa/include/asm/timex.h +++ b/arch/xtensa/include/asm/timex.h @@ -10,7 +10,6 @@ #define _XTENSA_TIMEX_H #include <asm/processor.h> -#include <linux/stringify.h> #if XCHAL_NUM_TIMERS > 0 && \ XTENSA_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL @@ -40,33 +39,24 @@ void local_timer_setup(unsigned cpu); * Register access. */ -#define WSR_CCOUNT(r) asm volatile ("wsr %0, ccount" :: "a" (r)) -#define RSR_CCOUNT(r) asm volatile ("rsr %0, ccount" : "=a" (r)) -#define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) :: "a"(r)) -#define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) : "=a"(r)) - static inline unsigned long get_ccount (void) { - unsigned long ccount; - RSR_CCOUNT(ccount); - return ccount; + return xtensa_get_sr(ccount); } static inline void set_ccount (unsigned long ccount) { - WSR_CCOUNT(ccount); + xtensa_set_sr(ccount, ccount); } static inline unsigned long get_linux_timer (void) { - unsigned ccompare; - RSR_CCOMPARE(LINUX_TIMER, ccompare); - return ccompare; + return xtensa_get_sr(SREG_CCOMPARE + LINUX_TIMER); } static inline void set_linux_timer (unsigned long ccompare) { - WSR_CCOMPARE(LINUX_TIMER, ccompare); + xtensa_set_sr(ccompare, SREG_CCOMPARE + LINUX_TIMER); } #endif /* _XTENSA_TIMEX_H */ |
