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-rw-r--r--arch/sh/kernel/cpu/irq/intc2.c165
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c111
-rw-r--r--arch/sh/kernel/cpu/irq/pint.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/ex.S9
-rw-r--r--arch/sh/kernel/cpu/sh4/ex.S9
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c63
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7780.c27
-rw-r--r--arch/sh/kernel/irq.c2
-rw-r--r--arch/sh/kernel/process.c12
-rw-r--r--arch/sh/kernel/sh_ksyms.c1
-rw-r--r--arch/sh/kernel/syscalls.S3
-rw-r--r--arch/sh/kernel/traps.c167
-rw-r--r--arch/sh/kernel/vmlinux.lds.S8
13 files changed, 289 insertions, 296 deletions
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c
index d4b2bb7e08c7..74ca576a7ce5 100644
--- a/arch/sh/kernel/cpu/irq/intc2.c
+++ b/arch/sh/kernel/cpu/irq/intc2.c
@@ -11,10 +11,9 @@
* Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
*/
#include <linux/kernel.h>
-#include <linux/init.h>
#include <linux/irq.h>
+#include <linux/io.h>
#include <asm/system.h>
-#include <asm/io.h>
static void disable_intc2_irq(unsigned int irq)
{
@@ -31,7 +30,7 @@ static void enable_intc2_irq(unsigned int irq)
}
static struct irq_chip intc2_irq_chip = {
- .typename = "intc2",
+ .name = "INTC2",
.mask = disable_intc2_irq,
.unmask = enable_intc2_irq,
.mask_ack = disable_intc2_irq,
@@ -45,150 +44,36 @@ static struct irq_chip intc2_irq_chip = {
* PIO1 which is INTPRI00[19,16] and INTMSK00[13]
* would be: ^ ^ ^ ^
* | | | |
- * make_intc2_irq(84, 0, 16, 0, 13);
+ * { 84, 0, 16, 0, 13 },
+ *
+ * in the intc2_data table.
*/
-void make_intc2_irq(struct intc2_data *p)
+void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs)
{
- unsigned int flags;
- unsigned long ipr;
-
- disable_irq_nosync(p->irq);
-
- /* Set the priority level */
- local_irq_save(flags);
-
- ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET + p->ipr_offset);
- ipr &= ~(0xf << p->ipr_shift);
- ipr |= p->priority << p->ipr_shift;
- ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET + p->ipr_offset);
-
- local_irq_restore(flags);
+ int i;
- set_irq_chip_and_handler(p->irq, &intc2_irq_chip, handle_level_irq);
- set_irq_chip_data(p->irq, p);
+ for (i = 0; i < nr_irqs; i++) {
+ unsigned long ipr, flags;
+ struct intc2_data *p = table + i;
- enable_intc2_irq(p->irq);
-}
+ disable_irq_nosync(p->irq);
-static struct intc2_data intc2_irq_table[] = {
-#if defined(CONFIG_CPU_SUBTYPE_ST40)
- {64, 0, 0, 0, 0, 13}, /* PCI serr */
- {65, 0, 4, 0, 1, 13}, /* PCI err */
- {66, 0, 4, 0, 2, 13}, /* PCI ad */
- {67, 0, 4, 0, 3, 13}, /* PCI pwd down */
- {72, 0, 8, 0, 5, 13}, /* DMAC INT0 */
- {73, 0, 8, 0, 6, 13}, /* DMAC INT1 */
- {74, 0, 8, 0, 7, 13}, /* DMAC INT2 */
- {75, 0, 8, 0, 8, 13}, /* DMAC INT3 */
- {76, 0, 8, 0, 9, 13}, /* DMAC INT4 */
- {78, 0, 8, 0, 11, 13}, /* DMAC ERR */
- {80, 0, 12, 0, 12, 13}, /* PIO0 */
- {84, 0, 16, 0, 13, 13}, /* PIO1 */
- {88, 0, 20, 0, 14, 13}, /* PIO2 */
- {112, 4, 0, 4, 0, 13}, /* Mailbox */
- #ifdef CONFIG_CPU_SUBTYPE_ST40GX1
- {116, 4, 4, 4, 4, 13}, /* SSC0 */
- {120, 4, 8, 4, 8, 13}, /* IR Blaster */
- {124, 4, 12, 4, 12, 13}, /* USB host */
- {128, 4, 16, 4, 16, 13}, /* Video processor BLITTER */
- {132, 4, 20, 4, 20, 13}, /* UART0 */
- {134, 4, 20, 4, 22, 13}, /* UART2 */
- {136, 4, 24, 4, 24, 13}, /* IO_PIO0 */
- {140, 4, 28, 4, 28, 13}, /* EMPI */
- {144, 8, 0, 8, 0, 13}, /* MAFE */
- {148, 8, 4, 8, 4, 13}, /* PWM */
- {152, 8, 8, 8, 8, 13}, /* SSC1 */
- {156, 8, 12, 8, 12, 13}, /* IO_PIO1 */
- {160, 8, 16, 8, 16, 13}, /* USB target */
- {164, 8, 20, 8, 20, 13}, /* UART1 */
- {168, 8, 24, 8, 24, 13}, /* Teletext */
- {172, 8, 28, 8, 28, 13}, /* VideoSync VTG */
- {173, 8, 28, 8, 29, 13}, /* VideoSync DVP0 */
- {174, 8, 28, 8, 30, 13}, /* VideoSync DVP1 */
-#endif
-#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
-/*
- * SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
- */
- /* INTPRIO0 | INTMSK0 */
- {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
- {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
- {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
- {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
- /* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
- /* INTPRIO4 | INTMSK0 */
- {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
- {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
- {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
- {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
- {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
- {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
- {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
- {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
- /* INTPRIO8 | INTMSK0 */
- {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
- {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
- {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
- {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
- {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
- {65, 8, 24, 0, 16, 3}, /* LCDC */
- /* 66, 67 unused */
- {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
- {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
- {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
- /* 71 unused */
- {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
- {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
- {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
- {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
- {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
- {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
- {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
- {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
- /* | INTMSK4 */
- {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
- {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
- {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
- {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
- {84, 8, 0, 4, 19, 3}, /* HSPII */
- /* INTPRIOC | INTMSK4 */
- /* 85-87 unused/reserved */
- {88, 12, 20, 4, 18, 3}, /* MMCI0 */
- {89, 12, 20, 4, 17, 3}, /* MMCI1 */
- {90, 12, 20, 4, 16, 3}, /* MMCI2 */
- {91, 12, 20, 4, 15, 3}, /* MMCI3 */
- {92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/
- /* 93-107 reserved/undocumented */
- {108,12, 4, 4, 1, 3}, /* ADC */
- {109,12, 0, 4, 0, 3}, /* CMTI */
- /* 110-111 reserved/unused */
-#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
- { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2},
- { 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
- { 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
- { 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
- { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
- { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
- { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
- { SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ /* Set the priority level */
+ local_irq_save(flags);
- { SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
- { SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
- { SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
- { SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET +
+ p->ipr_offset);
+ ipr &= ~(0xf << p->ipr_shift);
+ ipr |= p->priority << p->ipr_shift;
+ ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET +
+ p->ipr_offset);
- { PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
- { PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
- { PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
- { PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
- { PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
-#endif
-};
+ local_irq_restore(flags);
-void __init init_IRQ_intc2(void)
-{
- int i;
+ set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip,
+ handle_level_irq, "level");
+ set_irq_chip_data(p->irq, p);
- for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++)
- make_intc2_irq(intc2_irq_table + i);
+ enable_intc2_irq(p->irq);
+ }
}
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 8944abdf6e1c..a0089563cbfc 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -23,93 +23,81 @@
#include <asm/io.h>
#include <asm/machvec.h>
-struct ipr_data {
- unsigned int addr; /* Address of Interrupt Priority Register */
- int shift; /* Shifts of the 16-bit data */
- int priority; /* The priority */
-};
static void disable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
+ int shift = p->shift*4;
/* Set the priority in IPR to 0 */
- ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
+ ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << shift)), p->addr);
}
static void enable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
+ int shift = p->shift*4;
/* Set priority in IPR back to original value */
- ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
+ ctrl_outw(ctrl_inw(p->addr) | (p->priority << shift), p->addr);
}
static struct irq_chip ipr_irq_chip = {
- .name = "ipr",
+ .name = "IPR",
.mask = disable_ipr_irq,
.unmask = enable_ipr_irq,
.mask_ack = disable_ipr_irq,
};
-void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
+void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs)
{
- struct ipr_data ipr_data;
-
- disable_irq_nosync(irq);
-
- ipr_data.addr = addr;
- ipr_data.shift = pos*4; /* POSition (0-3) x 4 means shift */
- ipr_data.priority = priority;
-
- set_irq_chip_and_handler(irq, &ipr_irq_chip, handle_level_irq);
- set_irq_chip_data(irq, &ipr_data);
-
- enable_ipr_irq(irq);
+ int i;
+
+ for (i = 0; i < nr_irqs; i++) {
+ unsigned int irq = table[i].irq;
+ disable_irq_nosync(irq);
+ set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
+ handle_level_irq, "level");
+ set_irq_chip_data(irq, &table[i]);
+ enable_ipr_irq(irq);
+ }
}
+EXPORT_SYMBOL(make_ipr_irq);
-/* XXX: This needs to die a horrible death.. */
-void __init init_IRQ(void)
-{
+static struct ipr_data sys_ipr_map[] = {
#ifndef CONFIG_CPU_SUBTYPE_SH7780
- make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
- make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
+ { TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY },
+ { TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY },
#ifdef RTC_IRQ
- make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
+ { RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY },
#endif
-
#ifdef SCI_ERI_IRQ
- make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
- make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
- make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
+ { SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
+ { SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
+ { SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
#endif
-
#ifdef SCIF1_ERI_IRQ
- make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
+ { SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
+ { SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
+ { SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
+ { SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
#endif
-
#if defined(CONFIG_CPU_SUBTYPE_SH7300)
- make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY);
- make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
- make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
- make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+ { SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
+ { DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
+ { DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
+ { VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
#endif
-
#ifdef SCIF_ERI_IRQ
- make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
+ { SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
+ { SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
+ { SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
+ { SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
#endif
-
#ifdef IRDA_ERI_IRQ
- make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
+ { IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
+ { IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
+ { IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
+ { IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
#endif
-
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
@@ -123,14 +111,19 @@ void __init init_IRQ(void)
* You should set corresponding bits of PFC to "00"
* to enable these interrupts.
*/
- make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY);
- make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
- make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
- make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY);
- make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY);
- make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY);
+ { IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY },
+ { IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY },
+ { IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY },
+ { IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY },
+ { IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY },
+ { IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY },
#endif
#endif
+};
+
+void __init init_IRQ(void)
+{
+ make_ipr_irq(sys_ipr_map, ARRAY_SIZE(sys_ipr_map));
#ifdef CONFIG_CPU_HAS_PINT_IRQ
init_IRQ_pint();
@@ -152,5 +145,3 @@ int ipr_irq_demux(int irq)
return irq;
}
#endif
-
-EXPORT_SYMBOL(make_ipr_irq);
diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c
index 17f47b373d6e..f60007783a21 100644
--- a/arch/sh/kernel/cpu/irq/pint.c
+++ b/arch/sh/kernel/cpu/irq/pint.c
@@ -84,12 +84,16 @@ void make_pint_irq(unsigned int irq)
disable_pint_irq(irq);
}
+static struct ipr_data pint_ipr_map[] = {
+ { PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY },
+ { PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY },
+};
+
void __init init_IRQ_pint(void)
{
int i;
- make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY);
- make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY);
+ make_ipr_irq(pint_ipr_map, ARRAY_SIZE(pint_ipr_map));
enable_irq(PINT0_IRQ);
enable_irq(PINT8_IRQ);
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index 6be46f0686b7..ba3082d640b5 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -4,7 +4,7 @@
* The SH-3 exception vector table.
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
- * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2003 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -49,3 +49,10 @@ ENTRY(nmi_slot)
#endif
ENTRY(user_break_point_trap)
.long break_point_trap /* 1E0 */
+
+ /*
+ * Pad the remainder of the table out, exceptions residing in far
+ * away offsets can be manually inserted in to their appropriate
+ * location via set_exception_table_{evt,vec}().
+ */
+ .balign 4096,0,4096
diff --git a/arch/sh/kernel/cpu/sh4/ex.S b/arch/sh/kernel/cpu/sh4/ex.S
index 3f4cd043e900..ac8ab57413cc 100644
--- a/arch/sh/kernel/cpu/sh4/ex.S
+++ b/arch/sh/kernel/cpu/sh4/ex.S
@@ -4,7 +4,7 @@
* The SH-4 exception vector table.
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
- * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2003 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -53,3 +53,10 @@ ENTRY(nmi_slot)
#endif
ENTRY(user_break_point_trap)
.long break_point_trap /* 1E0 */
+
+ /*
+ * Pad the remainder of the table out, exceptions residing in far
+ * away offsets can be manually inserted in to their appropriate
+ * location via set_exception_table_{evt,vec}().
+ */
+ .balign 4096,0,4096
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 97f1c9af35d6..07e5377bf550 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -51,3 +51,66 @@ static int __init sh7760_devices_setup(void)
ARRAY_SIZE(sh7760_devices));
}
__initcall(sh7760_devices_setup);
+
+/*
+ * SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
+ */
+static struct intc2_data intc2_irq_table[] = {
+ /* INTPRIO0 | INTMSK0 */
+ {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
+ {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
+ {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
+ {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
+ /* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
+ /* INTPRIO4 | INTMSK0 */
+ {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
+ {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
+ {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
+ {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
+ {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
+ {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
+ {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
+ {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
+ /* INTPRIO8 | INTMSK0 */
+ {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
+ {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
+ {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
+ {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
+ {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
+ {65, 8, 24, 0, 16, 3}, /* LCDC */
+ /* 66, 67 unused */
+ {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
+ {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
+ {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
+ /* 71 unused */
+ {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
+ {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
+ {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
+ {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
+ {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
+ {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
+ {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
+ {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
+ /* | INTMSK4 */
+ {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
+ {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
+ {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
+ {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
+ {84, 8, 0, 4, 19, 3}, /* HSPII */
+ /* INTPRIOC | INTMSK4 */
+ /* 85-87 unused/reserved */
+ {88, 12, 20, 4, 18, 3}, /* MMCI0 */
+ {89, 12, 20, 4, 17, 3}, /* MMCI1 */
+ {90, 12, 20, 4, 16, 3}, /* MMCI2 */
+ {91, 12, 20, 4, 15, 3}, /* MMCI3 */
+ {92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/
+ /* 93-107 reserved/undocumented */
+ {108,12, 4, 4, 1, 3}, /* ADC */
+ {109,12, 0, 4, 0, 3}, /* CMTI */
+ /* 110-111 reserved/unused */
+};
+
+void __init init_IRQ_intc2(void)
+{
+ make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
+}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7780.c b/arch/sh/kernel/cpu/sh4/setup-sh7780.c
index 72493f259edc..814ddb226531 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7780.c
@@ -77,3 +77,30 @@ static int __init sh7780_devices_setup(void)
ARRAY_SIZE(sh7780_devices));
}
__initcall(sh7780_devices_setup);
+
+static struct intc2_data intc2_irq_table[] = {
+ { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2 },
+ { 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
+ { 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
+ { 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
+ { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+
+ { SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+
+ { PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
+ { PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
+ { PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
+ { PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
+ { PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
+};
+
+void __init init_IRQ_intc2(void)
+{
+ make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
+}
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index acf2602569c4..944128ce9706 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -54,7 +54,7 @@ int show_interrupts(struct seq_file *p, void *v)
for_each_online_cpu(j)
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
seq_printf(p, " %14s", irq_desc[i].chip->name);
- seq_printf(p, "-%s", handle_irq_name(irq_desc[i].handle_irq));
+ seq_printf(p, "-%-8s", irq_desc[i].name);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 91516dca4a85..a52b13ac6b7f 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -105,7 +105,7 @@ void show_regs(struct pt_regs * regs)
{
printk("\n");
printk("Pid : %d, Comm: %20s\n", current->pid, current->comm);
- print_symbol("PC is at %s\n", regs->pc);
+ print_symbol("PC is at %s\n", instruction_pointer(regs));
printk("PC : %08lx SP : %08lx SR : %08lx ",
regs->pc, regs->regs[15], regs->sr);
#ifdef CONFIG_MMU
@@ -130,15 +130,7 @@ void show_regs(struct pt_regs * regs)
printk("MACH: %08lx MACL: %08lx GBR : %08lx PR : %08lx\n",
regs->mach, regs->macl, regs->gbr, regs->pr);
- /*
- * If we're in kernel mode, dump the stack too..
- */
- if (!user_mode(regs)) {
- extern void show_task(unsigned long *sp);
- unsigned long sp = regs->regs[15];
-
- show_task((unsigned long *)sp);
- }
+ show_trace(NULL, (unsigned long *)regs->regs[15], regs);
}
/*
diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c
index 9daad70bc305..8a2fd19dc9eb 100644
--- a/arch/sh/kernel/sh_ksyms.c
+++ b/arch/sh/kernel/sh_ksyms.c
@@ -18,7 +18,6 @@
#include <asm/delay.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
-#include <asm/checksum.h>
extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
extern struct hw_interrupt_type no_irq_type;
diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S
index 768334e95075..ca81976e9e34 100644
--- a/arch/sh/kernel/syscalls.S
+++ b/arch/sh/kernel/syscalls.S
@@ -351,3 +351,6 @@ ENTRY(sys_call_table)
.long sys_sync_file_range
.long sys_tee /* 315 */
.long sys_vmsplice
+ .long sys_move_pages
+ .long sys_getcpu
+ .long sys_epoll_pwait
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index c2c597e09482..53dfa55f3156 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -1,38 +1,25 @@
-/* $Id: traps.c,v 1.17 2004/05/02 01:46:30 sugioka Exp $
- *
- * linux/arch/sh/traps.c
+/*
+ * 'traps.c' handles hardware traps and faults after we have saved some
+ * state in 'entry.S'.
*
* SuperH version: Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf
* Copyright (C) 2000 David Howells
- * Copyright (C) 2002, 2003 Paul Mundt
- */
-
-/*
- * 'Traps.c' handles hardware traps and faults after we have saved some
- * state in 'entry.S'.
+ * Copyright (C) 2002 - 2006 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
*/
-#include <linux/sched.h>
#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/errno.h>
#include <linux/ptrace.h>
-#include <linux/timer.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
#include <linux/init.h>
-#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/module.h>
#include <linux/kallsyms.h>
-
+#include <linux/io.h>
#include <asm/system.h>
#include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/atomic.h>
-#include <asm/processor.h>
-#include <asm/sections.h>
#ifdef CONFIG_SH_KGDB
#include <asm/kgdb.h>
@@ -53,13 +40,32 @@
#define TRAP_ILLEGAL_SLOT_INST 13
#endif
-/*
- * These constants are for searching for possible module text
- * segments. VMALLOC_OFFSET comes from mm/vmalloc.c; MODULE_RANGE is
- * a guess of how much space is likely to be vmalloced.
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define MODULE_RANGE (8*1024*1024)
+static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
+{
+ unsigned long p;
+ int i;
+
+ printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
+
+ for (p = bottom & ~31; p < top; ) {
+ printk("%04lx: ", p & 0xffff);
+
+ for (i = 0; i < 8; i++, p += 4) {
+ unsigned int val;
+
+ if (p < bottom || p >= top)
+ printk(" ");
+ else {
+ if (__get_user(val, (unsigned int __user *)p)) {
+ printk("\n");
+ return;
+ }
+ printk("%08x ", val);
+ }
+ }
+ printk("\n");
+ }
+}
DEFINE_SPINLOCK(die_lock);
@@ -69,14 +75,28 @@ void die(const char * str, struct pt_regs * regs, long err)
console_verbose();
spin_lock_irq(&die_lock);
+ bust_spinlocks(1);
+
printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
+
CHK_REMOTE_DEBUG(regs);
+ print_modules();
show_regs(regs);
+
+ printk("Process: %s (pid: %d, stack limit = %p)\n",
+ current->comm, current->pid, task_stack_page(current) + 1);
+
+ if (!user_mode(regs) || in_interrupt())
+ dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
+ (unsigned long)task_stack_page(current));
+
+ bust_spinlocks(0);
spin_unlock_irq(&die_lock);
do_exit(SIGSEGV);
}
-static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
+static inline void die_if_kernel(const char *str, struct pt_regs *regs,
+ long err)
{
if (!user_mode(regs))
die(str, regs, err);
@@ -93,8 +113,7 @@ static int handle_unaligned_notify_count = 10;
*/
static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
{
- if (!user_mode(regs))
- {
+ if (!user_mode(regs)) {
const struct exception_table_entry *fixup;
fixup = search_exception_tables(regs->pc);
if (fixup) {
@@ -550,7 +569,10 @@ int is_dsp_inst(struct pt_regs *regs)
#define is_dsp_inst(regs) (0)
#endif /* CONFIG_SH_DSP */
-extern int do_fpu_inst(unsigned short, struct pt_regs*);
+/* arch/sh/kernel/cpu/sh4/fpu.c */
+extern int do_fpu_inst(unsigned short, struct pt_regs *);
+extern asmlinkage void do_fpu_state_restore(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7, struct pt_regs regs);
asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
@@ -709,14 +731,20 @@ void __init per_cpu_trap_init(void)
: "memory");
}
-void __init trap_init(void)
+void *set_exception_table_vec(unsigned int vec, void *handler)
{
extern void *exception_handling_table[];
+ void *old_handler;
+
+ old_handler = exception_handling_table[vec];
+ exception_handling_table[vec] = handler;
+ return old_handler;
+}
- exception_handling_table[TRAP_RESERVED_INST]
- = (void *)do_reserved_inst;
- exception_handling_table[TRAP_ILLEGAL_SLOT_INST]
- = (void *)do_illegal_slot_inst;
+void __init trap_init(void)
+{
+ set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst);
+ set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst);
#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
defined(CONFIG_SH_FPU_EMU)
@@ -725,61 +753,54 @@ void __init trap_init(void)
* reserved. They'll be handled in the math-emu case, or faulted on
* otherwise.
*/
- /* entry 64 corresponds to EXPEVT=0x800 */
- exception_handling_table[64] = (void *)do_reserved_inst;
- exception_handling_table[65] = (void *)do_illegal_slot_inst;
+ set_exception_table_evt(0x800, do_reserved_inst);
+ set_exception_table_evt(0x820, do_illegal_slot_inst);
+#elif defined(CONFIG_SH_FPU)
+ set_exception_table_evt(0x800, do_fpu_state_restore);
+ set_exception_table_evt(0x820, do_fpu_state_restore);
#endif
/* Setup VBR for boot cpu */
per_cpu_trap_init();
}
-void show_stack(struct task_struct *tsk, unsigned long *sp)
+void show_trace(struct task_struct *tsk, unsigned long *sp,
+ struct pt_regs *regs)
{
- unsigned long *stack, addr;
- unsigned long module_start = VMALLOC_START;
- unsigned long module_end = VMALLOC_END;
- int i = 1;
-
- if (!tsk)
- tsk = current;
- if (tsk == current)
- sp = (unsigned long *)current_stack_pointer;
- else
- sp = (unsigned long *)tsk->thread.sp;
+ unsigned long addr;
- stack = sp;
+ if (regs && user_mode(regs))
+ return;
printk("\nCall trace: ");
#ifdef CONFIG_KALLSYMS
printk("\n");
#endif
- while (!kstack_end(stack)) {
- addr = *stack++;
- if (((addr >= (unsigned long)_text) &&
- (addr <= (unsigned long)_etext)) ||
- ((addr >= module_start) && (addr <= module_end))) {
- /*
- * For 80-columns display, 6 entry is maximum.
- * NOTE: '[<8c00abcd>] ' consumes 13 columns .
- */
-#ifndef CONFIG_KALLSYMS
- if (i && ((i % 6) == 0))
- printk("\n ");
-#endif
- printk("[<%08lx>] ", addr);
- print_symbol("%s\n", addr);
- i++;
- }
+ while (!kstack_end(sp)) {
+ addr = *sp++;
+ if (kernel_text_address(addr))
+ print_ip_sym(addr);
}
printk("\n");
}
-void show_task(unsigned long *sp)
+void show_stack(struct task_struct *tsk, unsigned long *sp)
{
- show_stack(NULL, sp);
+ unsigned long stack;
+
+ if (!tsk)
+ tsk = current;
+ if (tsk == current)
+ sp = (unsigned long *)current_stack_pointer;
+ else
+ sp = (unsigned long *)tsk->thread.sp;
+
+ stack = (unsigned long)sp;
+ dump_mem("Stack: ", stack, THREAD_SIZE +
+ (unsigned long)task_stack_page(tsk));
+ show_trace(tsk, sp, NULL);
}
void dump_stack(void)
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index 5eb930918186..77b4026d5688 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -76,13 +76,7 @@ SECTIONS
__setup_end = .;
__initcall_start = .;
.initcall.init : {
- *(.initcall1.init)
- *(.initcall2.init)
- *(.initcall3.init)
- *(.initcall4.init)
- *(.initcall5.init)
- *(.initcall6.init)
- *(.initcall7.init)
+ INITCALLS
}
__initcall_end = .;
__con_initcall_start = .;
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