diff options
Diffstat (limited to 'arch/arm/mach-at91')
| -rw-r--r-- | arch/arm/mach-at91/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/mach-at91/Makefile | 13 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9261.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9263.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9_alt_reset.S | 48 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9g45_devices.c | 165 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9rl.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-at91/board-pcontrol-g20.c | 322 | ||||
| -rw-r--r-- | arch/arm/mach-at91/board-sam9m10g45ek.c | 24 | ||||
| -rw-r--r-- | arch/arm/mach-at91/generic.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-at91/pm.c | 15 | ||||
| -rw-r--r-- | arch/arm/mach-at91/pm.h | 5 | ||||
| -rw-r--r-- | arch/arm/mach-at91/pm_slowclock.S | 1 |
14 files changed, 596 insertions, 34 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index abed4d15a7fd..c015b684b4fe 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -375,6 +375,12 @@ config MACH_STAMP9G20 evaluation board. <http://www.taskit.de/en/> +config MACH_PCONTROL_G20 + bool "PControl G20 CPU module" + help + Select this if you are using taskit's Stamp9G20 CPU module on this + carrier board, beeing the decentralized unit of a building automation + system; featuring nvram, eth-switch, iso-rs485, display, io endif if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20) diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 412b3a471a4b..821eb842795f 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -11,12 +11,12 @@ obj-$(CONFIG_AT91_PMC_UNIT) += clock.o # CPU-specific support obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o -obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o -obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o -obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o -obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o -obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o -obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o +obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o +obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o +obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o +obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o +obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o +obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o @@ -65,6 +65,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o +obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o # AT91SAM9260/AT91SAM9G20 board-specific support obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 0894f1077be7..195208b30024 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -279,11 +279,6 @@ static struct at91_gpio_bank at91sam9260_gpio[] = { } }; -static void at91sam9260_reset(void) -{ - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); -} - static void at91sam9260_poweroff(void) { at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); @@ -327,7 +322,7 @@ void __init at91sam9260_initialize(unsigned long main_clock) else iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); - at91_arch_reset = at91sam9260_reset; + at91_arch_reset = at91sam9_alt_reset; pm_power_off = at91sam9260_poweroff; at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | (1 << AT91SAM9260_ID_IRQ2); diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 4ecf37996c77..fcad88668504 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -257,11 +257,6 @@ static struct at91_gpio_bank at91sam9261_gpio[] = { } }; -static void at91sam9261_reset(void) -{ - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); -} - static void at91sam9261_poweroff(void) { at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); @@ -283,7 +278,7 @@ void __init at91sam9261_initialize(unsigned long main_clock) iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc)); - at91_arch_reset = at91sam9261_reset; + at91_arch_reset = at91sam9_alt_reset; pm_power_off = at91sam9261_poweroff; at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | (1 << AT91SAM9261_ID_IRQ2); diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 942792d630d8..249f900954d8 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -269,11 +269,6 @@ static struct at91_gpio_bank at91sam9263_gpio[] = { } }; -static void at91sam9263_reset(void) -{ - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); -} - static void at91sam9263_poweroff(void) { at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); @@ -289,7 +284,7 @@ void __init at91sam9263_initialize(unsigned long main_clock) /* Map peripherals */ iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc)); - at91_arch_reset = at91sam9263_reset; + at91_arch_reset = at91sam9_alt_reset; pm_power_off = at91sam9263_poweroff; at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S new file mode 100644 index 000000000000..e0256deb91fb --- /dev/null +++ b/arch/arm/mach-at91/at91sam9_alt_reset.S @@ -0,0 +1,48 @@ +/* + * reset AT91SAM9G20 as per errata + * + * (C) BitBox Ltd 2010 + * + * unless the SDRAM is cleanly shutdown before we hit the + * reset register it can be left driving the data bus and + * killing the chance of a subsequent boot from NAND + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/linkage.h> +#include <asm/system.h> +#include <mach/hardware.h> +#include <mach/at91sam9_sdramc.h> +#include <mach/at91_rstc.h> + + .arm + + .globl at91sam9_alt_reset + +at91sam9_alt_reset: mrc p15, 0, r0, c1, c0, 0 + orr r0, r0, #CR_I + mcr p15, 0, r0, c1, c0, 0 @ enable I-cache + + ldr r0, .at91_va_base_sdramc @ preload constants + ldr r1, .at91_va_base_rstc_cr + + mov r2, #1 + mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN + ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST + + .balign 32 @ align to cache line + + str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access + str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM + str r4, [r1] @ reset processor + + b . + +.at91_va_base_sdramc: + .word AT91_VA_BASE_SYS + AT91_SDRAMC0 +.at91_va_base_rstc_cr: + .word AT91_VA_BASE_SYS + AT91_RSTC_CR diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 1276babf84d5..1e8f275c17f6 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -15,6 +15,7 @@ #include <linux/dma-mapping.h> #include <linux/platform_device.h> #include <linux/i2c-gpio.h> +#include <linux/atmel-mci.h> #include <linux/fb.h> #include <video/atmel_lcdc.h> @@ -25,6 +26,7 @@ #include <mach/at91sam9g45_matrix.h> #include <mach/at91sam9_smc.h> #include <mach/at_hdmac.h> +#include <mach/atmel-mci.h> #include "generic.h" @@ -350,6 +352,169 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {} /* -------------------------------------------------------------------- + * MMC / SD + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE) +static u64 mmc_dmamask = DMA_BIT_MASK(32); +static struct mci_platform_data mmc0_data, mmc1_data; + +static struct resource mmc0_resources[] = { + [0] = { + .start = AT91SAM9G45_BASE_MCI0, + .end = AT91SAM9G45_BASE_MCI0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9G45_ID_MCI0, + .end = AT91SAM9G45_ID_MCI0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9g45_mmc0_device = { + .name = "atmel_mci", + .id = 0, + .dev = { + .dma_mask = &mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &mmc0_data, + }, + .resource = mmc0_resources, + .num_resources = ARRAY_SIZE(mmc0_resources), +}; + +static struct resource mmc1_resources[] = { + [0] = { + .start = AT91SAM9G45_BASE_MCI1, + .end = AT91SAM9G45_BASE_MCI1 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9G45_ID_MCI1, + .end = AT91SAM9G45_ID_MCI1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9g45_mmc1_device = { + .name = "atmel_mci", + .id = 1, + .dev = { + .dma_mask = &mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &mmc1_data, + }, + .resource = mmc1_resources, + .num_resources = ARRAY_SIZE(mmc1_resources), +}; + +/* Consider only one slot : slot 0 */ +void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) +{ + + if (!data) + return; + + /* Must have at least one usable slot */ + if (!data->slot[0].bus_width) + return; + +#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) + { + struct at_dma_slave *atslave; + struct mci_dma_data *alt_atslave; + + alt_atslave = kzalloc(sizeof(struct mci_dma_data), GFP_KERNEL); + atslave = &alt_atslave->sdata; + + /* DMA slave channel configuration */ + atslave->dma_dev = &at_hdmac_device.dev; + atslave->reg_width = AT_DMA_SLAVE_WIDTH_32BIT; + atslave->cfg = ATC_FIFOCFG_HALFFIFO + | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW; + atslave->ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16; + if (mmc_id == 0) /* MCI0 */ + atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0) + | ATC_DST_PER(AT_DMA_ID_MCI0); + + else /* MCI1 */ + atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI1) + | ATC_DST_PER(AT_DMA_ID_MCI1); + + data->dma_slave = alt_atslave; + } +#endif + + + /* input/irq */ + if (data->slot[0].detect_pin) { + at91_set_gpio_input(data->slot[0].detect_pin, 1); + at91_set_deglitch(data->slot[0].detect_pin, 1); + } + if (data->slot[0].wp_pin) + at91_set_gpio_input(data->slot[0].wp_pin, 1); + + if (mmc_id == 0) { /* MCI0 */ + + /* CLK */ + at91_set_A_periph(AT91_PIN_PA0, 0); + + /* CMD */ + at91_set_A_periph(AT91_PIN_PA1, 1); + + /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */ + at91_set_A_periph(AT91_PIN_PA2, 1); + if (data->slot[0].bus_width == 4) { + at91_set_A_periph(AT91_PIN_PA3, 1); + at91_set_A_periph(AT91_PIN_PA4, 1); + at91_set_A_periph(AT91_PIN_PA5, 1); + if (data->slot[0].bus_width == 8) { + at91_set_A_periph(AT91_PIN_PA6, 1); + at91_set_A_periph(AT91_PIN_PA7, 1); + at91_set_A_periph(AT91_PIN_PA8, 1); + at91_set_A_periph(AT91_PIN_PA9, 1); + } + } + + mmc0_data = *data; + at91_clock_associate("mci0_clk", &at91sam9g45_mmc0_device.dev, "mci_clk"); + platform_device_register(&at91sam9g45_mmc0_device); + + } else { /* MCI1 */ + + /* CLK */ + at91_set_A_periph(AT91_PIN_PA31, 0); + + /* CMD */ + at91_set_A_periph(AT91_PIN_PA22, 1); + + /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */ + at91_set_A_periph(AT91_PIN_PA23, 1); + if (data->slot[0].bus_width == 4) { + at91_set_A_periph(AT91_PIN_PA24, 1); + at91_set_A_periph(AT91_PIN_PA25, 1); + at91_set_A_periph(AT91_PIN_PA26, 1); + if (data->slot[0].bus_width == 8) { + at91_set_A_periph(AT91_PIN_PA27, 1); + at91_set_A_periph(AT91_PIN_PA28, 1); + at91_set_A_periph(AT91_PIN_PA29, 1); + at91_set_A_periph(AT91_PIN_PA30, 1); + } + } + + mmc1_data = *data; + at91_clock_associate("mci1_clk", &at91sam9g45_mmc1_device.dev, "mci_clk"); + platform_device_register(&at91sam9g45_mmc1_device); + + } +} +#else +void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {} +#endif + + +/* -------------------------------------------------------------------- * NAND / SmartMedia * -------------------------------------------------------------------- */ diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 211c5c14a1e6..6a9d24e5ed8e 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -242,11 +242,6 @@ static struct at91_gpio_bank at91sam9rl_gpio[] = { } }; -static void at91sam9rl_reset(void) -{ - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); -} - static void at91sam9rl_poweroff(void) { at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); @@ -281,7 +276,7 @@ void __init at91sam9rl_initialize(unsigned long main_clock) /* Map SRAM */ iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); - at91_arch_reset = at91sam9rl_reset; + at91_arch_reset = at91sam9_alt_reset; pm_power_off = at91sam9rl_poweroff; at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c new file mode 100644 index 000000000000..bba5a560e02b --- /dev/null +++ b/arch/arm/mach-at91/board-pcontrol-g20.c @@ -0,0 +1,322 @@ +/* + * Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de> + * taskit GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +/* + * copied and adjusted from board-stamp9g20.c + * by Peter Gsellmann <pgsellmann@portner-elektronik.at> + */ + +#include <linux/mm.h> +#include <linux/platform_device.h> +#include <linux/gpio.h> +#include <linux/w1-gpio.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include <mach/board.h> +#include <mach/at91sam9_smc.h> + +#include "sam9_smc.h" +#include "generic.h" + + +static void __init pcontrol_g20_map_io(void) +{ + /* Initialize processor: 18.432 MHz crystal */ + at91sam9260_initialize(18432000); + + /* DGBU on ttyS0. (Rx, Tx) only TTL -> JTAG connector X7 17,19 ) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS + | ATMEL_UART_RTS); + + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS + | ATMEL_UART_RTS); + + /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */ + at91_register_uart(AT91SAM9260_ID_US4, 3, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + + +static void __init init_irq(void) +{ + at91sam9260_init_interrupts(NULL); +} + + +/* + * NAND flash 512MiB 1,8V 8-bit, sector size 128 KiB + */ +static struct atmel_nand_data __initdata nand_data = { + .ale = 21, + .cle = 22, + .rdy_pin = AT91_PIN_PC13, + .enable_pin = AT91_PIN_PC14, +}; + +/* + * Bus timings; unit = 7.57ns + */ +static struct sam9_smc_config __initdata nand_smc_config = { + .ncs_read_setup = 0, + .nrd_setup = 2, + .ncs_write_setup = 0, + .nwe_setup = 2, + + .ncs_read_pulse = 4, + .nrd_pulse = 4, + .ncs_write_pulse = 4, + .nwe_pulse = 4, + + .read_cycle = 7, + .write_cycle = 7, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE + | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8, + .tdf_cycles = 3, +}; + +static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { + .ncs_read_setup = 16, + .nrd_setup = 18, + .ncs_write_setup = 16, + .nwe_setup = 18, + + .ncs_read_pulse = 63, + .nrd_pulse = 55, + .ncs_write_pulse = 63, + .nwe_pulse = 55, + + .read_cycle = 127, + .write_cycle = 127, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE + | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_SELECT + | AT91_SMC_DBW_8 | AT91_SMC_PS_4 + | AT91_SMC_TDFMODE, + .tdf_cycles = 3, +}, { + .ncs_read_setup = 0, + .nrd_setup = 0, + .ncs_write_setup = 0, + .nwe_setup = 1, + + .ncs_read_pulse = 8, + .nrd_pulse = 8, + .ncs_write_pulse = 5, + .nwe_pulse = 4, + + .read_cycle = 8, + .write_cycle = 7, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE + | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_SELECT + | AT91_SMC_DBW_16 | AT91_SMC_PS_8 + | AT91_SMC_TDFMODE, + .tdf_cycles = 1, +} }; + +static void __init add_device_nand(void) +{ + /* configure chip-select 3 (NAND) */ + sam9_smc_configure(3, &nand_smc_config); + at91_add_device_nand(&nand_data); +} + + +static void __init add_device_pcontrol(void) +{ + /* configure chip-select 4 (IO compatible to 8051 X4 ) */ + sam9_smc_configure(4, &pcontrol_smc_config[0]); + /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ + sam9_smc_configure(7, &pcontrol_smc_config[1]); +} + + +/* + * MCI (SD/MMC) + * det_pin, wp_pin and vcc_pin are not connected + */ +#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE) +static struct mci_platform_data __initdata mmc_data = { + .slot[0] = { + .bus_width = 4, + }, +}; +#else +static struct at91_mmc_data __initdata mmc_data = { + .wire4 = 1, +}; +#endif + + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata usbh_data = { + .ports = 2, +}; + + +/* + * USB Device port + */ +static struct at91_udc_data __initdata pcontrol_g20_udc_data = { + .vbus_pin = AT91_PIN_PA22, /* Detect +5V bus voltage */ + .pullup_pin = AT91_PIN_PA4, /* K-state, active low */ +}; + + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata macb_data = { + .phy_irq_pin = AT91_PIN_PA28, + .is_rmii = 1, +}; + + +/* + * I2C devices: eeprom and phy/switch + */ +static struct i2c_board_info __initdata pcontrol_g20_i2c_devices[] = { +{ /* D7 address width=2, 8KiB */ + I2C_BOARD_INFO("24c64", 0x50) +}, { /* D8 address width=1, 1 byte has 32 bits! */ + I2C_BOARD_INFO("lan9303", 0x0a) +}, }; + + +/* + * LEDs + */ +static struct gpio_led pcontrol_g20_leds[] = { + { + .name = "LED1", /* red H5 */ + .gpio = AT91_PIN_PB18, + .active_low = 1, + .default_trigger = "none", /* supervisor */ + }, { + .name = "LED2", /* yellow H7 */ + .gpio = AT91_PIN_PB19, + .active_low = 1, + .default_trigger = "mmc0", /* SD-card activity */ + }, { + .name = "LED3", /* green H2 */ + .gpio = AT91_PIN_PB20, + .active_low = 1, + .default_trigger = "heartbeat", /* blinky */ + }, { + .name = "LED4", /* red H3 */ + .gpio = AT91_PIN_PC6, + .active_low = 1, + .default_trigger = "none", /* connection lost */ + }, { + .name = "LED5", /* yellow H6 */ + .gpio = AT91_PIN_PC7, + .active_low = 1, + .default_trigger = "none", /* unsent data */ + }, { + .name = "LED6", /* green H1 */ + .gpio = AT91_PIN_PC9, + .active_low = 1, + .default_trigger = "none", /* snafu */ + } +}; + + +/* + * SPI devices + */ +static struct spi_board_info pcontrol_g20_spi_devices[] = { + { + .modalias = "spidev", /* HMI port X4 */ + .chip_select = 1, + .max_speed_hz = 50 * 1000 * 1000, + .bus_num = 0, + }, { + .modalias = "spidev", /* piggyback A2 */ + .chip_select = 0, + .max_speed_hz = 50 * 1000 * 1000, + .bus_num = 1, + }, +}; + + +/* + * Dallas 1-Wire DS2431 + */ +static struct w1_gpio_platform_data w1_gpio_pdata = { + .pin = AT91_PIN_PA29, + .is_open_drain = 1, +}; + +static struct platform_device w1_device = { + .name = "w1-gpio", + .id = -1, + .dev.platform_data = &w1_gpio_pdata, +}; + +static void add_wire1(void) +{ + at91_set_GPIO_periph(w1_gpio_pdata.pin, 1); + at91_set_multi_drive(w1_gpio_pdata.pin, 1); + platform_device_register(&w1_device); +} + + +static void __init pcontrol_g20_board_init(void) +{ + at91_add_device_serial(); + add_device_nand(); +#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE) + at91_add_device_mci(0, &mmc_data); +#else + at91_add_device_mmc(0, &mmc_data); +#endif + at91_add_device_usbh(&usbh_data); + at91_add_device_eth(&macb_data); + at91_add_device_i2c(pcontrol_g20_i2c_devices, + ARRAY_SIZE(pcontrol_g20_i2c_devices)); + add_wire1(); + add_device_pcontrol(); + at91_add_device_spi(pcontrol_g20_spi_devices, + ARRAY_SIZE(pcontrol_g20_spi_devices)); + at91_add_device_udc(&pcontrol_g20_udc_data); + at91_gpio_leds(pcontrol_g20_leds, + ARRAY_SIZE(pcontrol_g20_leds)); + /* piggyback A2 */ + at91_set_gpio_output(AT91_PIN_PB31, 1); +} + + +MACHINE_START(PCONTROL_G20, "PControl G20") + /* Maintainer: pgsellmann@portner-elektronik.at */ + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = pcontrol_g20_map_io, + .init_irq = init_irq, + .init_machine = pcontrol_g20_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 7913984f6de9..86ff4b52db32 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -24,7 +24,9 @@ #include <linux/input.h> #include <linux/leds.h> #include <linux/clk.h> +#include <linux/atmel-mci.h> +#include <mach/hardware.h> #include <video/atmel_lcdc.h> #include <asm/setup.h> @@ -98,6 +100,25 @@ static struct spi_board_info ek_spi_devices[] = { /* + * MCI (SD/MMC) + */ +static struct mci_platform_data __initdata mci0_data = { + .slot[0] = { + .bus_width = 4, + .detect_pin = AT91_PIN_PD10, + }, +}; + +static struct mci_platform_data __initdata mci1_data = { + .slot[0] = { + .bus_width = 4, + .detect_pin = AT91_PIN_PD11, + .wp_pin = AT91_PIN_PD29, + }, +}; + + +/* * MACB Ethernet device */ static struct at91_eth_data __initdata ek_macb_data = { @@ -380,6 +401,9 @@ static void __init ek_board_init(void) at91_add_device_usba(&ek_usba_udc_data); /* SPI */ at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); + /* MMC */ + at91_add_device_mci(0, &mci0_data); + at91_add_device_mci(1, &mci1_data); /* Ethernet */ at91_add_device_eth(&ek_macb_data); /* NAND */ diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 65c3dc5ba0d0..0c66deb2db39 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -46,6 +46,9 @@ extern void __init at91_clock_associate(const char *id, struct device *dev, cons extern void at91_irq_suspend(void); extern void at91_irq_resume(void); +/* reset */ +extern void at91sam9_alt_reset(void); + /* GPIO */ #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 615668986480..dafbacc25eb1 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -258,16 +258,23 @@ static int at91_pm_enter(suspend_state_t state) * NOTE: the Wait-for-Interrupt instruction needs to be * in icache so no SDRAM accesses are needed until the * wakeup IRQ occurs and self-refresh is terminated. + * For ARM 926 based chips, this requirement is weaker + * as at91sam9 can access a RAM in self-refresh mode. */ - asm("b 1f; .align 5; 1:"); - asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ + asm volatile ( "mov r0, #0\n\t" + "b 1f\n\t" + ".align 5\n\t" + "1: mcr p15, 0, r0, c7, c10, 4\n\t" + : /* no output */ + : /* no input */ + : "r0"); saved_lpr = sdram_selfrefresh_enable(); - asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ + wait_for_interrupt_enable(); sdram_selfrefresh_disable(saved_lpr); break; case PM_SUSPEND_ON: - asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ + cpu_do_idle(); break; default: diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 8c87d0c1b8f8..ce9a20699111 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -21,6 +21,8 @@ static inline u32 sdram_selfrefresh_enable(void) } #define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) +#define wait_for_interrupt_enable() asm volatile ("mcr p15, 0, %0, c7, c0, 4" \ + : : "r" (0)) #elif defined(CONFIG_ARCH_AT91CAP9) #include <mach/at91cap9_ddrsdr.h> @@ -38,6 +40,7 @@ static inline u32 sdram_selfrefresh_enable(void) } #define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr) +#define wait_for_interrupt_enable() cpu_do_idle() #elif defined(CONFIG_ARCH_AT91SAM9G45) #include <mach/at91sam9_ddrsdr.h> @@ -74,6 +77,7 @@ static inline u32 sdram_selfrefresh_enable(void) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \ at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \ } while (0) +#define wait_for_interrupt_enable() cpu_do_idle() #else #include <mach/at91sam9_sdramc.h> @@ -98,5 +102,6 @@ static inline u32 sdram_selfrefresh_enable(void) } #define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) +#define wait_for_interrupt_enable() cpu_do_idle() #endif diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S index b6b00a1f6125..f7922a436172 100644 --- a/arch/arm/mach-at91/pm_slowclock.S +++ b/arch/arm/mach-at91/pm_slowclock.S @@ -124,6 +124,7 @@ ENTRY(at91_slow_clock) ldr r5, .at91_va_base_ramc1 /* Drain write buffer */ + mov r0, #0 mcr p15, 0, r0, c7, c10, 4 #ifdef CONFIG_ARCH_AT91RM9200 |
