diff options
485 files changed, 44060 insertions, 16309 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index a5b4f223641d..8127a08e366d 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -199,7 +199,7 @@ Description: What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_x_raw What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_y_raw -KernelVersion: 4.18 +KernelVersion: 4.19 Contact: linux-iio@vger.kernel.org Description: Relative position in direction x or y on a pad (may be diff --git a/Documentation/devicetree/bindings/iio/accel/adxl372.txt b/Documentation/devicetree/bindings/iio/accel/adxl372.txt new file mode 100644 index 000000000000..a289964756a7 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/accel/adxl372.txt @@ -0,0 +1,33 @@ +Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer + +http://www.analog.com/media/en/technical-documentation/data-sheets/adxl372.pdf + +Required properties: + - compatible : should be "adi,adxl372" + - reg: the I2C address or SPI chip select number for the device + +Required properties for SPI bus usage: + - spi-max-frequency: Max SPI frequency to use + +Optional properties: + - interrupts: interrupt mapping for IRQ as documented in + Documentation/devicetree/bindings/interrupt-controller/interrupts.txt + +Example for a I2C device node: + + accelerometer@53 { + compatible = "adi,adxl372"; + reg = <0x53>; + interrupt-parent = <&gpio>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + }; + +Example for a SPI device node: + + accelerometer@0 { + compatible = "adi,adxl372"; + reg = <0>; + spi-max-frequency = <1000000>; + interrupt-parent = <&gpio>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/mcp3911.txt b/Documentation/devicetree/bindings/iio/adc/mcp3911.txt new file mode 100644 index 000000000000..3071f48fb30b --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/mcp3911.txt @@ -0,0 +1,30 @@ +* Microchip MCP3911 Dual channel analog front end (ADC) + +Required properties: + - compatible: Should be "microchip,mcp3911" + - reg: SPI chip select number for the device + +Recommended properties: + - spi-max-frequency: Definition as per + Documentation/devicetree/bindings/spi/spi-bus.txt. + Max frequency for this chip is 20MHz. + +Optional properties: + - clocks: Phandle and clock identifier for sampling clock + - interrupt-parent: Phandle to the parent interrupt controller + - interrupts: IRQ line for the ADC + - microchip,device-addr: Device address when multiple MCP3911 chips are present on the + same SPI bus. Valid values are 0-3. Defaults to 0. + - vref-supply: Phandle to the external reference voltage supply. + +Example: +adc@0 { + compatible = "microchip,mcp3911"; + reg = <0>; + interrupt-parent = <&gpio5>; + interrupts = <15 IRQ_TYPE_EDGE_RISING>; + spi-max-frequency = <20000000>; + microchip,device-addr = <0>; + vref-supply = <&vref_reg>; + clocks = <&xtal>; +}; diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt index 0fb46137f936..b3c86f4ac7cd 100644 --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt +++ b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt @@ -1,7 +1,9 @@ -Qualcomm's SPMI PMIC voltage ADC +Qualcomm's SPMI PMIC ADC -SPMI PMIC voltage ADC (VADC) provides interface to clients to read -voltage. The VADC is a 15-bit sigma-delta ADC. +- SPMI PMIC voltage ADC (VADC) provides interface to clients to read + voltage. The VADC is a 15-bit sigma-delta ADC. +- SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read + voltage. The VADC is a 16-bit sigma-delta ADC. VADC node: @@ -9,11 +11,13 @@ VADC node: Usage: required Value type: <string> Definition: Should contain "qcom,spmi-vadc". + Should contain "qcom,spmi-adc5" for PMIC5 ADC driver. + Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver. - reg: Usage: required Value type: <prop-encoded-array> - Definition: VADC base address and length in the SPMI PMIC register map. + Definition: VADC base address in the SPMI PMIC register map. - #address-cells: Usage: required @@ -45,13 +49,26 @@ Channel node properties: Definition: ADC channel number. See include/dt-bindings/iio/qcom,spmi-vadc.h +- label: + Usage: required for "qcom,spmi-adc5" and "qcom,spmi-adc-rev2" + Value type: <empty> + Definition: ADC input of the platform as seen in the schematics. + For thermistor inputs connected to generic AMUX or GPIO inputs + these can vary across platform for the same pins. Hence select + the platform schematics name for this channel. + - qcom,decimation: Usage: optional Value type: <u32> Definition: This parameter is used to decrease ADC sampling rate. Quicker measurements can be made by reducing decimation ratio. - Valid values are 512, 1024, 2048, 4096. - If property is not found, default value of 512 will be used. + - For compatible property "qcom,spmi-vadc", valid values are + 512, 1024, 2048, 4096. If property is not found, default value + of 512 will be used. + - For compatible property "qcom,spmi-adc5", valid values are 250, 420 + and 840. If property is not found, default value of 840 is used. + - For compatible property "qcom,spmi-adc-rev2", valid values are 256, + 512 and 1024. If property is not present, default value is 1024. - qcom,pre-scaling: Usage: optional @@ -66,21 +83,38 @@ Channel node properties: - qcom,ratiometric: Usage: optional Value type: <empty> - Definition: Channel calibration type. If this property is specified - VADC will use the VDD reference (1.8V) and GND for channel - calibration. If property is not found, channel will be - calibrated with 0.625V and 1.25V reference channels, also - known as absolute calibration. + Definition: Channel calibration type. + - For compatible property "qcom,spmi-vadc", if this property is + specified VADC will use the VDD reference (1.8V) and GND for + channel calibration. If property is not found, channel will be + calibrated with 0.625V and 1.25V reference channels, also + known as absolute calibration. + - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2", + if this property is specified VADC will use the VDD reference + (1.875V) and GND for channel calibration. If property is not found, + channel will be calibrated with 0V and 1.25V reference channels, + also known as absolute calibration. - qcom,hw-settle-time: Usage: optional Value type: <u32> Definition: Time between AMUX getting configured and the ADC starting - conversion. Delay = 100us * (value) for value < 11, and - 2ms * (value - 10) otherwise. - Valid values are: 0, 100, 200, 300, 400, 500, 600, 700, 800, - 900 us and 1, 2, 4, 6, 8, 10 ms - If property is not found, channel will use 0us. + conversion. The 'hw_settle_time' is an index used from valid values + and programmed in hardware to achieve the hardware settling delay. + - For compatible property "qcom,spmi-vadc" and "qcom,spmi-adc-rev2", + Delay = 100us * (hw_settle_time) for hw_settle_time < 11, + and 2ms * (hw_settle_time - 10) otherwise. + Valid values are: 0, 100, 200, 300, 400, 500, 600, 700, 800, + 900 us and 1, 2, 4, 6, 8, 10 ms. + If property is not found, channel will use 0us. + - For compatible property "qcom,spmi-adc5", delay = 15us for + value 0, 100us * (value) for values < 11, + and 2ms * (value - 10) otherwise. + Valid values are: 15, 100, 200, 300, 400, 500, 600, 700, 800, + 900 us and 1, 2, 4, 6, 8, 10 ms + Certain controller digital versions have valid values of + 15, 100, 200, 300, 400, 500, 600, 700, 1, 2, 4, 8, 16, 32, 64, 128 ms + If property is not found, channel will use 15us. - qcom,avg-samples: Usage: optional @@ -89,13 +123,18 @@ Channel node properties: Averaging provides the option to obtain a single measurement from the ADC that is an average of multiple samples. The value selected is 2^(value). - Valid values are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 - If property is not found, 1 sample will be used. + - For compatible property "qcom,spmi-vadc", valid values + are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 + If property is not found, 1 sample will be used. + - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2", + valid values are: 1, 2, 4, 8, 16 + If property is not found, 1 sample will be used. NOTE: -Following channels, also known as reference point channels, are used for -result calibration and their channel configuration nodes should be defined: +For compatible property "qcom,spmi-vadc" following channels, also known as +reference point channels, are used for result calibration and their channel +configuration nodes should be defined: VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV, VADC_GND_REF and VADC_VDD_VADC. @@ -104,7 +143,7 @@ Example: /* VADC node */ pmic_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; - reg = <0x3100 0x100>; + reg = <0x3100>; interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt b/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt index 8aad960de50b..b4daa15dcf15 100644 --- a/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt +++ b/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt @@ -12,6 +12,8 @@ Required properties: - interrupts: The interrupt number for the ADC device. - #io-channel-cells: Number of cells in an IIO specifier. - hwlocks: Reference to a phandle of a hwlock provider node. +- nvmem-cells: A phandle to the calibration cells provided by eFuse device. +- nvmem-cell-names: Should be "big_scale_calib", "small_scale_calib". Example: @@ -32,5 +34,7 @@ Example: interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; #io-channel-cells = <1>; hwlocks = <&hwlock 4>; + nvmem-cells = <&adc_big_scale>, <&adc_small_scale>; + nvmem-cell-names = "big_scale_calib", "small_scale_calib"; }; }; diff --git a/Documentation/devicetree/bindings/iio/dac/ad5758.txt b/Documentation/devicetree/bindings/iio/dac/ad5758.txt index bba01a5cab1b..2f607f41f9d3 100644 --- a/Documentation/devicetree/bindings/iio/dac/ad5758.txt +++ b/Documentation/devicetree/bindings/iio/dac/ad5758.txt @@ -50,6 +50,9 @@ Required properties: Optional properties: + - reset-gpios : GPIO spec for the RESET pin. If specified, it will be + asserted during driver probe. + - adi,dc-dc-ilim-microamp: The dc-to-dc converter current limit The following values are currently supported [uA]: * 150000 @@ -71,6 +74,8 @@ AD5758 Example: spi-max-frequency = <1000000>; spi-cpha; + reset-gpios = <&gpio 22 0>; + adi,dc-dc-mode = <2>; adi,range-microvolt = <0 10000000>; adi,dc-dc-ilim-microamp = <200000>; diff --git a/Documentation/devicetree/bindings/iio/dac/ltc1660.txt b/Documentation/devicetree/bindings/iio/dac/ltc1660.txt new file mode 100644 index 000000000000..c5b5f22d6c64 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/ltc1660.txt @@ -0,0 +1,21 @@ +* Linear Technology Micropower octal 8-Bit and 10-Bit DACs + +Required properties: + - compatible: Must be one of the following: + "lltc,ltc1660" + "lltc,ltc1665" + - reg: SPI chip select number for the device + - vref-supply: Phandle to the voltage reference supply + +Recommended properties: + - spi-max-frequency: Definition as per + Documentation/devicetree/bindings/spi/spi-bus.txt. + Max frequency for this chip is 5 MHz. + +Example: +dac@0 { + compatible = "lltc,ltc1660"; + reg = <0>; + spi-max-frequency = <5000000>; + vref-supply = <&vref_reg>; +}; diff --git a/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt b/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt index b2f27da847b8..6ab9a9d196b0 100644 --- a/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt +++ b/Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt @@ -20,6 +20,7 @@ Required properties: bindings. Optional properties: + - vddio-supply: regulator phandle for VDDIO supply - mount-matrix: an optional 3x3 mounting rotation matrix - i2c-gate node. These devices also support an auxiliary i2c bus. This is simple enough to be described using the i2c-gate binding. See diff --git a/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt b/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt index ea2d6e0ae4c5..879322ad50fd 100644 --- a/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt +++ b/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt @@ -7,6 +7,7 @@ Required properties: "st,lsm6dsl" "st,lsm6dsm" "st,ism330dlc" + "st,lsm6dso" - reg: i2c address of the sensor / spi cs line Optional properties: diff --git a/Documentation/devicetree/bindings/iio/light/bh1750.txt b/Documentation/devicetree/bindings/iio/light/bh1750.txt new file mode 100644 index 000000000000..1e7685797d7a --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/bh1750.txt @@ -0,0 +1,18 @@ +ROHM BH1750 - ALS, Ambient light sensor + +Required properties: + +- compatible: Must be one of: + "rohm,bh1710" + "rohm,bh1715" + "rohm,bh1721" + "rohm,bh1750" + "rohm,bh1751" +- reg: the I2C address of the sensor + +Example: + +light-sensor@23 { + compatible = "rohm,bh1750"; + reg = <0x23>; +}; diff --git a/Documentation/devicetree/bindings/iio/light/tsl2772.txt b/Documentation/devicetree/bindings/iio/light/tsl2772.txt new file mode 100644 index 000000000000..1c5e6f17a1df --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/tsl2772.txt @@ -0,0 +1,42 @@ +* AMS/TAOS ALS and proximity sensor + +Required properties: + + - compatible: Should be one of + "amstaos,tsl2571" + "amstaos,tsl2671" + "amstaos,tmd2671" + "amstaos,tsl2771" + "amstaos,tmd2771" + "amstaos,tsl2572" + "amstaos,tsl2672" + "amstaos,tmd2672" + "amstaos,tsl2772" + "amstaos,tmd2772" + "avago,apds9930" + - reg: the I2C address of the device + +Optional properties: + + - amstaos,proximity-diodes - proximity diodes to enable. <0>, <1>, or <0 1> + are the only valid values. + - led-max-microamp - current for the proximity LED. Must be 100000, 50000, + 25000, or 13000. + - vdd-supply: phandle to the regulator that provides power to the sensor. + - vddio-supply: phandle to the regulator that provides power to the bus. + - interrupts: the sole interrupt generated by the device + + Refer to interrupt-controller/interrupts.txt for generic interrupt client + node bindings. + +Example: + +tsl2772@39 { + compatible = "amstaos,tsl2772"; + reg = <0x39>; + interrupts-extended = <&msmgpio 61 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <&pm8941_l17>; + vddio-supply = <&pm8941_lvs1>; + amstaos,proximity-diodes = <0>; + led-max-microamp = <100000>; +}; diff --git a/Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt b/Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt new file mode 100644 index 000000000000..aac5f621f8dc --- /dev/null +++ b/Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt @@ -0,0 +1,12 @@ +ST VL53L0X ToF ranging sensor + +Required properties: + - compatible: must be "st,vl53l0x" + - reg: i2c address where to find the device + +Example: + +vl53l0x@29 { + compatible = "st,vl53l0x"; + reg = <0x29>; +}; diff --git a/Documentation/devicetree/bindings/trivial-devices.txt b/Documentation/devicetree/bindings/trivial-devices.txt index 69c934aec13b..6ab001fa1ed4 100644 --- a/Documentation/devicetree/bindings/trivial-devices.txt +++ b/Documentation/devicetree/bindings/trivial-devices.txt @@ -21,16 +21,6 @@ adi,adt7490 +/-1C TDM Extended Temp Range I.C adi,adxl345 Three-Axis Digital Accelerometer adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too) ams,iaq-core AMS iAQ-Core VOC Sensor -amstaos,tsl2571 AMS/TAOS ALS and proximity sensor -amstaos,tsl2671 AMS/TAOS ALS and proximity sensor -amstaos,tmd2671 AMS/TAOS ALS and proximity sensor -amstaos,tsl2771 AMS/TAOS ALS and proximity sensor -amstaos,tmd2771 AMS/TAOS ALS and proximity sensor -amstaos,tsl2572 AMS/TAOS ALS and proximity sensor -amstaos,tsl2672 AMS/TAOS ALS and proximity sensor -amstaos,tmd2672 AMS/TAOS ALS and proximity sensor -amstaos,tsl2772 AMS/TAOS ALS and proximity sensor -amstaos,tmd2772 AMS/TAOS ALS and proximity sensor at,24c08 i2c serial eeprom (24cxx) atmel,at97sc3204t i2c trusted platform module (TPM) capella,cm32181 CM32181: Ambient Light Sensor diff --git a/Documentation/filesystems/pohmelfs/design_notes.txt b/Documentation/filesystems/pohmelfs/design_notes.txt deleted file mode 100644 index 106d17fbb05f..000000000000 --- a/Documentation/filesystems/pohmelfs/design_notes.txt +++ /dev/null @@ -1,72 +0,0 @@ -POHMELFS: Parallel Optimized Host Message Exchange Layered File System. - - Evgeniy Polyakov <zbr@ioremap.net> - -Homepage: http://www.ioremap.net/projects/pohmelfs - -POHMELFS first began as a network filesystem with coherent local data and -metadata caches but is now evolving into a parallel distributed filesystem. - -Main features of this FS include: - * Locally coherent cache for data and metadata with (potentially) byte-range locks. - Since all Linux filesystems lock the whole inode during writing, algorithm - is very simple and does not use byte-ranges, although they are sent in - locking messages. - * Completely async processing of all events except creation of hard and symbolic - links, and rename events. - Object creation and data reading and writing are processed asynchronously. - * Flexible object architecture optimized for network processing. - Ability to create long paths to objects and remove arbitrarily huge - directories with a single network command. - (like removing the whole kernel tree via a single network command). - * Very high performance. - * Fast and scalable multithreaded userspace server. Being in userspace it works - with any underlying filesystem and still is much faster than async in-kernel NFS one. - * Client is able to switch between different servers (if one goes down, client - automatically reconnects to second and so on). - * Transactions support. Full failover for all operations. - Resending transactions to different servers on timeout or error. - * Read request (data read, directory listing, lookup requests) balancing between multiple servers. - * Write requests are replicated to multiple servers and completed only when all of them are acked. - * Ability to add and/or remove servers from the working set at run-time. - * Strong authentication and possible data encryption in network channel. - * Extended attributes support. - -POHMELFS is based on transactions, which are potentially long-standing objects that live -in the client's memory. Each transaction contains all the information needed to process a given -command (or set of commands, which is frequently used during data writing: single transactions -can contain creation and data writing commands). Transactions are committed by all the servers -to which they are sent and, in case of failures, are eventually resent or dropped with an error. -For example, reading will return an error if no servers are available. - -POHMELFS uses a asynchronous approach to data processing. Courtesy of transactions, it is -possible to detach replies from requests and, if the command requires data to be received, the -caller sleeps waiting for it. Thus, it is possible to issue multiple read commands to different -servers and async threads will pick up replies in parallel, find appropriate transactions in the -system and put the data where it belongs (like the page or inode cache). - -The main feature of POHMELFS is writeback data and the metadata cache. -Only a few non-performance critical operations use the write-through cache and -are synchronous: hard and symbolic link creation, and object rename. Creation, -removal of objects and data writing are asynchronous and are sent to -the server during system writeback. Only one writer at a time is allowed for any -given inode, which is guarded by an appropriate locking protocol. -Because of this feature, POHMELFS is extremely fast at metadata intensive -workloads and can fully utilize the bandwidth to the servers when doing bulk -data transfers. - -POHMELFS clients operate with a working set of servers and are capable of balancing read-only -operations (like lookups or directory listings) between them according to IO priorities. -Administrators can add or remove servers from the set at run-time via special commands (described -in Documentation/filesystems/pohmelfs/info.txt file). Writes are replicated to all servers, which -are connected with write permission turned on. IO priority and permissions can be changed in -run-time. - -POHMELFS is capable of full data channel encryption and/or strong crypto hashing. -One can select any kernel supported cipher, encryption mode, hash type and operation mode -(hmac or digest). It is also possible to use both or neither (default). Crypto configuration -is checked during mount time and, if the server does not support it, appropriate capabilities -will be disabled or mount will fail (if 'crypto_fail_unsupported' mount option is specified). -Crypto performance heavily depends on the number of crypto threads, which asynchronously perform -crypto operations and send the resulting data to server or submit it up the stack. This number -can be controlled via a mount option. diff --git a/Documentation/filesystems/pohmelfs/info.txt b/Documentation/filesystems/pohmelfs/info.txt deleted file mode 100644 index db2e41393626..000000000000 --- a/Documentation/filesystems/pohmelfs/info.txt +++ /dev/null @@ -1,99 +0,0 @@ -POHMELFS usage information. - -Mount options. -All but index, number of crypto threads and maximum IO size can changed via remount. - -idx=%u - Each mountpoint is associated with a special index via this option. - Administrator can add or remove servers from the given index, so all mounts, - which were attached to it, are updated. - Default it is 0. - -trans_scan_timeout=%u - This timeout, expressed in milliseconds, specifies time to scan transaction - trees looking for stale requests, which have to be resent, or if number of - retries exceed specified limit, dropped with error. - Default is 5 seconds. - -drop_scan_timeout=%u - Internal timeout, expressed in milliseconds, which specifies how frequently - inodes marked to be dropped are freed. It also specifies how frequently - the system checks that servers have to be added or removed from current working set. - Default is 1 second. - -wait_on_page_timeout=%u - Number of milliseconds to wait for reply from remote server for data reading command. - If this timeout is exceeded, reading returns an error. - Default is 5 seconds. - -trans_retries=%u - This is the number of times that a transaction will be resent to a server that did - not answer for the last @trans_scan_timeout milliseconds. - When the number of resends exceeds this limit, the transaction is completed with error. - Default is 5 resends. - -crypto_thread_num=%u - Number of crypto processing threads. Threads are used both for RX and TX traffic. - Default is 2, or no threads if crypto operations are not supported. - -trans_max_pages=%u - Maximum number of pages in a single transaction. This parameter also controls - the number of pages, allocated for crypto processing (each crypto thread has - pool of pages, the number of which is equal to 'trans_max_pages'. - Default is 100 pages. - -crypto_fail_unsupported - If specified, mount will fail if the server does not support requested crypto operations. - By default mount will disable non-matching crypto operations. - -mcache_timeout=%u - Maximum number of milliseconds to wait for the mcache objects to be processed. - Mcache includes locks (given lock should be granted by server), attributes (they should be - fully received in the given timeframe). - Default is 5 seconds. - -Usage examples. - -Add server server1.net:1025 into the working set with index $idx -with appropriate hash algorithm and key file and cipher algorithm, mode and key file: -$cfg A add -a server1.net -p 1025 -i $idx -K $hash_key -k $cipher_key - -Mount filesystem with given index $idx to /mnt mountpoint. -Client will connect to all servers specified in the working set via previous command: -mount -t pohmel -o idx=$idx q /mnt - -Change permissions to read-only (-I 1 option, '-I 2' - write-only, 3 - rw): -$cfg A modify -a server1.net -p 1025 -i $idx -I 1 - -Change IO priority to 123 (node with the highest priority gets read requests). -$cfg A modify -a server1.net -p 1025 -i $idx -P 123 - -One can check currect status of all connections in the mountstats file: -# cat /proc/$PID/mountstats -... -device none mounted on /mnt with fstype pohmel -idx addr(:port) socket_type protocol active priority permissions -0 server1.net:1026 1 6 1 250 1 -0 server2.net:1025 1 6 1 123 3 - -Server installation. - -Creating a server, which listens at port 1025 and 0.0.0.0 address. -Working root directory (note, that server chroots there, so you have to have appropriate permissions) -is set to /mnt, server will negotiate hash/cipher with client, in case client requested it, there -are appropriate key files. -Number of working threads is set to 10. - -# ./fserver -a 0.0.0.0 -p 1025 -r /mnt -w 10 -K hash_key -k cipher_key - - -A 6 - listen on ipv6 address. Default: Disabled. - -r root - path to root directory. Default: /tmp. - -a addr - listen address. Default: 0.0.0.0. - -p port - listen port. Default: 1025. - -w workers - number of workers per connected client. Default: 1. - -K file - hash key size. Default: none. - -k file - cipher key size. Default: none. - -h - this help. - -Number of worker threads specifies how many workers will be created for each client. -Bulk single-client transafers usually are better handled with smaller number (like 1-3). diff --git a/Documentation/filesystems/pohmelfs/network_protocol.txt b/Documentation/filesystems/pohmelfs/network_protocol.txt deleted file mode 100644 index c680b4b5353d..000000000000 --- a/Documentation/filesystems/pohmelfs/network_protocol.txt +++ /dev/null @@ -1,227 +0,0 @@ -POHMELFS network protocol. - -Basic structure used in network communication is following command: - -struct netfs_cmd -{ - __u16 cmd; /* Command number */ - __u16 csize; /* Attached crypto information size */ - __u16 cpad; /* Attached padding size */ - __u16 ext; /* External flags */ - __u32 size; /* Size of the attached data */ - __u32 trans; /* Transaction id */ - __u64 id; /* Object ID to operate on. Used for feedback.*/ - __u64 start; /* Start of the object. */ - __u64 iv; /* IV sequence */ - __u8 data[0]; -}; - -Commands can be embedded into transaction command (which in turn has own command), -so one can extend protocol as needed without breaking backward compatibility as long -as old commands are supported. All string lengths include tail 0 byte. - -All commands are transferred over the network in big-endian. CPU endianness is used at the end peers. - -@cmd - command number, which specifies command to be processed. Following - commands are used currently: - - NETFS_READDIR = 1, /* Read directory for given inode number */ - NETFS_READ_PAGE, /* Read data page from the server */ - NETFS_WRITE_PAGE, /* Write data page to the server */ - NETFS_CREATE, /* Create directory entry */ - NETFS_REMOVE, /* Remove directory entry */ - NETFS_LOOKUP, /* Lookup single object */ - NETFS_LINK, /* Create a link */ - NETFS_TRANS, /* Transaction */ - NETFS_OPEN, /* Open intent */ - NETFS_INODE_INFO, /* Metadata cache coherency synchronization message */ - NETFS_PAGE_CACHE, /* Page cache invalidation message */ - NETFS_READ_PAGES, /* Read multiple contiguous pages in one go */ - NETFS_RENAME, /* Rename object */ - NETFS_CAPABILITIES, /* Capabilities of the client, for example supported crypto */ - NETFS_LOCK, /* Distributed lock message */ - NETFS_XATTR_SET, /* Set extended attribute */ - NETFS_XATTR_GET, /* Get extended attribute */ - -@ext - external flags. Used by different commands to specify some extra arguments - like partial size of the embedded objects or creation flags. - -@size - size of the attached data. For NETFS_READ_PAGE and NETFS_READ_PAGES no data is attached, - but size of the requested data is incorporated here. It does not include size of the command - header (struct netfs_cmd) itself. - -@id - id of the object this command operates on. Each command can use it for own purpose. - -@start - start of the object this command operates on. Each command can use it for own purpose. - -@csize, @cpad - size and padding size of the (attached if needed) crypto information. - -Command specifications. - -@NETFS_READDIR -This command is used to sync content of the remote dir to the client. - -@ext - length of the path to object. -@size - the same. -@id - local inode number of the directory to read. -@start - zero. - - -@NETFS_READ_PAGE -This command is used to read data from remote server. -Data size does not exceed local page cache size. - -@id - inode number. -@start - first byte offset. -@size - number of bytes to read plus length of the path to object. -@ext - object path length. - - -@NETFS_CREATE -Used to create object. -It does not require that all directories on top of the object were -already created, it will create them automatically. Each object has -associated @netfs_path_entry data structure, which contains creation -mode (permissions and type) and length of the name as long as name itself. - -@start - 0 -@size - size of the all data structures needed to create a path -@id - local inode number -@ext - 0 - - -@NETFS_REMOVE -Used to remove object. - -@ext - length of the path to object. -@size - the same. -@id - local inode number. -@start - zero. - - -@NETFS_LOOKUP -Lookup information about object on server. - -@ext - length of the path to object. -@size - the same. -@id - local inode number of the directory to look object in. -@start - local inode number of the object to look at. - - -@NETFS_LINK -Create hard of symlink. -Command is sent as "object_path|target_path". - -@size - size of the above string. -@id - parent local inode number. -@start - 1 for symlink, 0 for hardlink. -@ext - size of the "object_path" above. - - -@NETFS_TRANS -Transaction header. - -@size - incorporates all embedded command sizes including theirs header sizes. -@start - transaction generation number - unique id used to find transaction. -@ext - transaction flags. Unused at the moment. -@id - 0. - - -@NETFS_OPEN -Open intent for given transaction. - -@id - local inode number. -@start - 0. -@size - path length to the object. -@ext - open flags (O_RDWR and so on). - - -@NETFS_INODE_INFO -Metadata update command. -It is sent to servers when attributes of the object are changed and received -when data or metadata were updated. It operates with the following structure: - -struct netfs_inode_info -{ - unsigned int mode; - unsigned int nlink; - unsigned int uid; - unsigned int gid; - unsigned int blocksize; - unsigned int padding; - __u64 ino; - __u64 blocks; - __u64 rdev; - __u64 size; - __u64 version; -}; - -It effectively mirrors stat(2) returned data. - - -@ext - path length to the object. -@size - the same plus size of the netfs_inode_info structure. -@id - local inode number. -@start - 0. - - -@NETFS_PAGE_CACHE -Command is only received by clients. It contains information about -page to be marked as not up-to-date. - -@id - client's inode number. -@start - last byte of the page to be invalidated. If it is not equal to - current inode size, it will be vmtruncated(). -@size - 0 -@ext - 0 - - -@NETFS_READ_PAGES -Used to read multiple contiguous pages in one go. - -@start - first byte of the contiguous region to read. -@size - contains of two fields: lower 8 bits are used to represent page cache shift - used by client, another 3 bytes are used to get number of pages. -@id - local inode number. -@ext - path length to the object. - - -@NETFS_RENAME -Used to rename object. -Attached data is formed into following string: "old_path|new_path". - -@id - local inode number. -@start - parent inode number. -@size - length of the above string. -@ext - length of the old path part. - - -@NETFS_CAPABILITIES -Used to exchange crypto capabilities with server. -If crypto capabilities are not supported by server, then client will disable it -or fail (if 'crypto_fail_unsupported' mount options was specified). - -@id - superblock index. Used to specify crypto information for group of servers. -@size - size of the attached capabilities structure. -@start - 0. -@size - 0. -@scsize - 0. - -@NETFS_LOCK -Used to send lock request/release messages. Although it sends byte range request -and is capable of flushing pages based on that, it is not used, since all Linux -filesystems lock the whole inode. - -@id - lock generation number. -@start - start of the locked range. -@size - size of the locked range. -@ext - lock type: read/write. Not used actually. 15'th bit is used to determine, - if it is lock request (1) or release (0). - -@NETFS_XATTR_SET -@NETFS_XATTR_GET -Used to set/get extended attributes for given inode. -@id - attribute generation number or xattr setting type -@start - size of the attribute (request or attached) -@size - name length, path len and data size for given attribute -@ext - path length for given object diff --git a/MAINTAINERS b/MAINTAINERS index 11b7d81f883a..c6c9cc1019ad 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -549,6 +549,15 @@ W: http://ez.analog.com/community/linux-device-drivers S: Supported F: drivers/input/misc/adxl34x.c +ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER +M: Stefan Popa <stefan.popa@analog.com> +W: http://ez.analog.com/community/linux-device-drivers +S: Supported +F: drivers/iio/accel/adxl372.c +F: drivers/iio/accel/adxl372_spi.c +F: drivers/iio/accel/adxl372_i2c.c +F: Documentation/devicetree/bindings/iio/accel/adxl372.txt + AF9013 MEDIA DRIVER M: Antti Palosaari <crope@iki.fi> L: linux-media@vger.kernel.org @@ -4388,13 +4397,6 @@ L: linux-gpio@vger.kernel.org S: Maintained F: drivers/gpio/gpio-gpio-mm.c -DIGI NEO AND CLASSIC PCI PRODUCTS -M: Lidza Louina <lidza.louina@gmail.com> -M: Mark Hounschell <markh@compro.net> -L: driverdev-devel@linuxdriverproject.org -S: Maintained -F: drivers/staging/dgnc/ - DIOLAN U2C-12 I2C DRIVER M: Guenter Roeck <linux@roeck-us.net> L: linux-i2c@vger.kernel.org @@ -5675,10 +5677,9 @@ F: Documentation/fault-injection/ F: lib/fault-inject.c FBTFT Framebuffer drivers -M: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> +S: Orphan L: dri-devel@lists.freedesktop.org L: linux-fbdev@vger.kernel.org -S: Maintained F: drivers/staging/fbtft/ FC0011 TUNER DRIVER @@ -7737,7 +7738,6 @@ IPX NETWORK LAYER L: netdev@vger.kernel.org S: Obsolete F: include/uapi/linux/ipx.h -F: drivers/staging/ipx/ IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) M: Marc Zyngier <marc.zyngier@arm.com> @@ -8716,6 +8716,13 @@ L: linux-scsi@vger.kernel.org S: Maintained F: drivers/scsi/sym53c8xx_2/ +LTC1660 DAC DRIVER +M: Marcus Folkesson <marcus.folkesson@gmail.com> +L: linux-iio@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/iio/dac/ltc1660.txt +F: drivers/iio/dac/ltc1660.c + LTC4261 HARDWARE MONITOR DRIVER M: Guenter Roeck <linux@roeck-us.net> L: linux-hwmon@vger.kernel.org @@ -9670,6 +9677,14 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/microchip/lan743x_* +MICROCHIP / ATMEL MCP3911 ADC DRIVER +M: Marcus Folkesson <marcus.folkesson@gmail.com> +M: Kent Gustavsson <kent@minoris.se> +L: linux-iio@vger.kernel.org +S: Supported +F: drivers/iio/adc/mcp3911.c +F: Documentation/devicetree/bindings/iio/adc/mcp3911.txt + MICROCHIP USB251XB DRIVER M: Richard Leitner <richard.leitner@skidata.com> L: linux-usb@vger.kernel.org @@ -10060,11 +10075,6 @@ NATSEMI ETHERNET DRIVER (DP8381x) S: Orphan F: drivers/net/ethernet/natsemi/natsemi.c -NCP FILESYSTEM -M: Petr Vandrovec <petr@vandrovec.name> -S: Obsolete -F: drivers/staging/ncpfs/ - NCR 5380 SCSI DRIVERS M: Finn Thain <fthain@telegraphics.com.au> M: Michael Schmitz <schmitzmic@gmail.com> @@ -13911,6 +13921,13 @@ L: linux-i2c@vger.kernel.org S: Maintained F: drivers/i2c/busses/i2c-stm32* +ST VL53L0X ToF RANGER(I2C) IIO DRIVER +M: Song Qiang <songqiang1304521@gmail.com> +L: linux-iio@vger.kernel.org +S: Maintained +F: drivers/iio/proximity/vl53l0x-i2c.c +F: Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt + STABLE BRANCH M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> L: stable@vger.kernel.org @@ -13930,11 +13947,6 @@ L: linux-erofs@lists.ozlabs.org S: Maintained F: drivers/staging/erofs/ -STAGING - FLARION FT1000 DRIVERS -M: Marek Belisko <marek.belisko@gmail.com> -S: Odd Fixes -F: drivers/staging/ft1000/ - STAGING - INDUSTRIAL IO M: Jonathan Cameron <jic23@kernel.org> L: linux-iio@vger.kernel.org diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig index 829dc96c9dd6..7993a67bd351 100644 --- a/drivers/iio/accel/Kconfig +++ b/drivers/iio/accel/Kconfig @@ -60,6 +60,33 @@ config ADXL345_SPI will be called adxl345_spi and you will also get adxl345_core for the core module. +config ADXL372 + tristate + select IIO_BUFFER + select IIO_TRIGGERED_BUFFER + +config ADXL372_SPI + tristate "Analog Devices ADXL372 3-Axis Accelerometer SPI Driver" + depends on SPI + select ADXL372 + select REGMAP_SPI + help + Say yes here to add support for the Analog Devices ADXL372 triaxial + acceleration sensor. + To compile this driver as a module, choose M here: the + module will be called adxl372_spi. + +config ADXL372_I2C + tristate "Analog Devices ADXL372 3-Axis Accelerometer I2C Driver" + depends on I2C + select ADXL372 + select REGMAP_I2C + help + Say yes here to add support for the Analog Devices ADXL372 triaxial + acceleration sensor. + To compile this driver as a module, choose M here: the + module will be called adxl372_i2c. + config BMA180 tristate "Bosch BMA180/BMA250 3-Axis Accelerometer Driver" depends on I2C diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile index 636d4d1b2990..56bd0215e0d4 100644 --- a/drivers/iio/accel/Makefile +++ b/drivers/iio/accel/Makefile @@ -9,6 +9,9 @@ obj-$(CONFIG_ADIS16209) += adis16209.o obj-$(CONFIG_ADXL345) += adxl345_core.o obj-$(CONFIG_ADXL345_I2C) += adxl345_i2c.o obj-$(CONFIG_ADXL345_SPI) += adxl345_spi.o +obj-$(CONFIG_ADXL372) += adxl372.o +obj-$(CONFIG_ADXL372_I2C) += adxl372_i2c.o +obj-$(CONFIG_ADXL372_SPI) += adxl372_spi.o obj-$(CONFIG_BMA180) += bma180.o obj-$(CONFIG_BMA220) += bma220_spi.o obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel-core.o diff --git a/drivers/iio/accel/adxl345_i2c.c b/drivers/iio/accel/adxl345_i2c.c index 785c89de91e7..f22f71315a0c 100644 --- a/drivers/iio/accel/adxl345_i2c.c +++ b/drivers/iio/accel/adxl345_i2c.c @@ -27,6 +27,9 @@ static int adxl345_i2c_probe(struct i2c_client *client, { struct regmap *regmap; + if (!id) + return -ENODEV; + regmap = devm_regmap_init_i2c(client, &adxl345_i2c_regmap_config); if (IS_ERR(regmap)) { dev_err(&client->dev, "Error initializing i2c regmap: %ld\n", @@ -35,7 +38,7 @@ static int adxl345_i2c_probe(struct i2c_client *client, } return adxl345_core_probe(&client->dev, regmap, id->driver_data, - id ? id->name : NULL); + id->name); } static int adxl345_i2c_remove(struct i2c_client *client) diff --git a/drivers/iio/accel/adxl372.c b/drivers/iio/accel/adxl372.c new file mode 100644 index 000000000000..3b84cb243a87 --- /dev/null +++ b/drivers/iio/accel/adxl372.c @@ -0,0 +1,975 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * ADXL372 3-Axis Digital Accelerometer core driver + * + * Copyright 2018 Analog Devices Inc. + */ + +#include <linux/bitops.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/module.h> +#include <linux/regmap.h> +#include <linux/spi/spi.h> + +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> +#include <linux/iio/buffer.h> +#include <linux/iio/events.h> +#include <linux/iio/trigger.h> +#include <linux/iio/trigger_consumer.h> +#include <linux/iio/triggered_buffer.h> + +#include "adxl372.h" + +/* ADXL372 registers definition */ +#define ADXL372_DEVID 0x00 +#define ADXL372_DEVID_MST 0x01 +#define ADXL372_PARTID 0x02 +#define ADXL372_STATUS_1 0x04 +#define ADXL372_STATUS_2 0x05 +#define ADXL372_FIFO_ENTRIES_2 0x06 +#define ADXL372_FIFO_ENTRIES_1 0x07 +#define ADXL372_X_DATA_H 0x08 +#define ADXL372_X_DATA_L 0x09 +#define ADXL372_Y_DATA_H 0x0A +#define ADXL372_Y_DATA_L 0x0B +#define ADXL372_Z_DATA_H 0x0C +#define ADXL372_Z_DATA_L 0x0D +#define ADXL372_X_MAXPEAK_H 0x15 +#define ADXL372_X_MAXPEAK_L 0x16 +#define ADXL372_Y_MAXPEAK_H 0x17 +#define ADXL372_Y_MAXPEAK_L 0x18 +#define ADXL372_Z_MAXPEAK_H 0x19 +#define ADXL372_Z_MAXPEAK_L 0x1A +#define ADXL372_OFFSET_X 0x20 +#define ADXL372_OFFSET_Y 0x21 +#define ADXL372_OFFSET_Z 0x22 +#define ADXL372_X_THRESH_ACT_H 0x23 +#define ADXL372_X_THRESH_ACT_L 0x24 +#define ADXL372_Y_THRESH_ACT_H 0x25 +#define ADXL372_Y_THRESH_ACT_L 0x26 +#define ADXL372_Z_THRESH_ACT_H 0x27 +#define ADXL372_Z_THRESH_ACT_L 0x28 +#define ADXL372_TIME_ACT 0x29 +#define ADXL372_X_THRESH_INACT_H 0x2A +#define ADXL372_X_THRESH_INACT_L 0x2B +#define ADXL372_Y_THRESH_INACT_H 0x2C +#define ADXL372_Y_THRESH_INACT_L 0x2D +#define ADXL372_Z_THRESH_INACT_H 0x2E +#define ADXL372_Z_THRESH_INACT_L 0x2F +#define ADXL372_TIME_INACT_H 0x30 +#define ADXL372_TIME_INACT_L 0x31 +#define ADXL372_X_THRESH_ACT2_H 0x32 +#define ADXL372_X_THRESH_ACT2_L 0x33 +#define ADXL372_Y_THRESH_ACT2_H 0x34 +#define ADXL372_Y_THRESH_ACT2_L 0x35 +#define ADXL372_Z_THRESH_ACT2_H 0x36 +#define ADXL372_Z_THRESH_ACT2_L 0x37 +#define ADXL372_HPF 0x38 +#define ADXL372_FIFO_SAMPLES 0x39 +#define ADXL372_FIFO_CTL 0x3A +#define ADXL372_INT1_MAP 0x3B +#define ADXL372_INT2_MAP 0x3C +#define ADXL372_TIMING 0x3D +#define ADXL372_MEASURE 0x3E +#define ADXL372_POWER_CTL 0x3F +#define ADXL372_SELF_TEST 0x40 +#define ADXL372_RESET 0x41 +#define ADXL372_FIFO_DATA 0x42 + +#define ADXL372_DEVID_VAL 0xAD +#define ADXL372_PARTID_VAL 0xFA +#define ADXL372_RESET_CODE 0x52 + +/* ADXL372_POWER_CTL */ +#define ADXL372_POWER_CTL_MODE_MSK GENMASK_ULL(1, 0) +#define ADXL372_POWER_CTL_MODE(x) (((x) & 0x3) << 0) + +/* ADXL372_MEASURE */ +#define ADXL372_MEASURE_LINKLOOP_MSK GENMASK_ULL(5, 4) +#define ADXL372_MEASURE_LINKLOOP_MODE(x) (((x) & 0x3) << 4) +#define ADXL372_MEASURE_BANDWIDTH_MSK GENMASK_ULL(2, 0) +#define ADXL372_MEASURE_BANDWIDTH_MODE(x) (((x) & 0x7) << 0) + +/* ADXL372_TIMING */ +#define ADXL372_TIMING_ODR_MSK GENMASK_ULL(7, 5) +#define ADXL372_TIMING_ODR_MODE(x) (((x) & 0x7) << 5) + +/* ADXL372_FIFO_CTL */ +#define ADXL372_FIFO_CTL_FORMAT_MSK GENMASK(5, 3) +#define ADXL372_FIFO_CTL_FORMAT_MODE(x) (((x) & 0x7) << 3) +#define ADXL372_FIFO_CTL_MODE_MSK GENMASK(2, 1) +#define ADXL372_FIFO_CTL_MODE_MODE(x) (((x) & 0x3) << 1) +#define ADXL372_FIFO_CTL_SAMPLES_MSK BIT(1) +#define ADXL372_FIFO_CTL_SAMPLES_MODE(x) (((x) > 0xFF) ? 1 : 0) + +/* ADXL372_STATUS_1 */ +#define ADXL372_STATUS_1_DATA_RDY(x) (((x) >> 0) & 0x1) +#define ADXL372_STATUS_1_FIFO_RDY(x) (((x) >> 1) & 0x1) +#define ADXL372_STATUS_1_FIFO_FULL(x) (((x) >> 2) & 0x1) +#define ADXL372_STATUS_1_FIFO_OVR(x) (((x) >> 3) & 0x1) +#define ADXL372_STATUS_1_USR_NVM_BUSY(x) (((x) >> 5) & 0x1) +#define ADXL372_STATUS_1_AWAKE(x) (((x) >> 6) & 0x1) +#define ADXL372_STATUS_1_ERR_USR_REGS(x) (((x) >> 7) & 0x1) + +/* ADXL372_INT1_MAP */ +#define ADXL372_INT1_MAP_DATA_RDY_MSK BIT(0) +#define ADXL372_INT1_MAP_DATA_RDY_MODE(x) (((x) & 0x1) << 0) +#define ADXL372_INT1_MAP_FIFO_RDY_MSK BIT(1) +#define ADXL372_INT1_MAP_FIFO_RDY_MODE(x) (((x) & 0x1) << 1) +#define ADXL372_INT1_MAP_FIFO_FULL_MSK BIT(2) +#define ADXL372_INT1_MAP_FIFO_FULL_MODE(x) (((x) & 0x1) << 2) +#define ADXL372_INT1_MAP_FIFO_OVR_MSK BIT(3) +#define ADXL372_INT1_MAP_FIFO_OVR_MODE(x) (((x) & 0x1) << 3) +#define ADXL372_INT1_MAP_INACT_MSK BIT(4) +#define ADXL372_INT1_MAP_INACT_MODE(x) (((x) & 0x1) << 4) +#define ADXL372_INT1_MAP_ACT_MSK BIT(5) +#define ADXL372_INT1_MAP_ACT_MODE(x) (((x) & 0x1) << 5) +#define ADXL372_INT1_MAP_AWAKE_MSK BIT(6) +#define ADXL372_INT1_MAP_AWAKE_MODE(x) (((x) & 0x1) << 6) +#define ADXL372_INT1_MAP_LOW_MSK BIT(7) +#define ADXL372_INT1_MAP_LOW_MODE(x) (((x) & 0x1) << 7) + +/* The ADXL372 includes a deep, 512 sample FIFO buffer */ +#define ADXL372_FIFO_SIZE 512 + +/* + * At +/- 200g with 12-bit resolution, scale is computed as: + * (200 + 200) * 9.81 / (2^12 - 1) = 0.958241 + */ +#define ADXL372_USCALE 958241 + +enum adxl372_op_mode { + ADXL372_STANDBY, + ADXL372_WAKE_UP, + ADXL372_INSTANT_ON, + ADXL372_FULL_BW_MEASUREMENT, +}; + +enum adxl372_act_proc_mode { + ADXL372_DEFAULT, + ADXL372_LINKED, + ADXL372_LOOPED, +}; + +enum adxl372_th_activity { + ADXL372_ACTIVITY, + ADXL372_ACTIVITY2, + ADXL372_INACTIVITY, +}; + +enum adxl372_odr { + ADXL372_ODR_400HZ, + ADXL372_ODR_800HZ, + ADXL372_ODR_1600HZ, + ADXL372_ODR_3200HZ, + ADXL372_ODR_6400HZ, +}; + +enum adxl372_bandwidth { + ADXL372_BW_200HZ, + ADXL372_BW_400HZ, + ADXL372_BW_800HZ, + ADXL372_BW_1600HZ, + ADXL372_BW_3200HZ, +}; + +static const unsigned int adxl372_th_reg_high_addr[3] = { + [ADXL372_ACTIVITY] = ADXL372_X_THRESH_ACT_H, + [ADXL372_ACTIVITY2] = ADXL372_X_THRESH_ACT2_H, + [ADXL372_INACTIVITY] = ADXL372_X_THRESH_INACT_H, +}; + +enum adxl372_fifo_format { + ADXL372_XYZ_FIFO, + ADXL372_X_FIFO, + ADXL372_Y_FIFO, + ADXL372_XY_FIFO, + ADXL372_Z_FIFO, + ADXL372_XZ_FIFO, + ADXL372_YZ_FIFO, + ADXL372_XYZ_PEAK_FIFO, +}; + +enum adxl372_fifo_mode { + ADXL372_FIFO_BYPASSED, + ADXL372_FIFO_STREAMED, + ADXL372_FIFO_TRIGGERED, + ADXL372_FIFO_OLD_SAVED +}; + +static const int adxl372_samp_freq_tbl[5] = { + 400, 800, 1600, 3200, 6400, +}; + +static const int adxl372_bw_freq_tbl[5] = { + 200, 400, 800, 1600, 3200, +}; + +struct adxl372_axis_lookup { + unsigned int bits; + enum adxl372_fifo_format fifo_format; +}; + +static const struct adxl372_axis_lookup adxl372_axis_lookup_table[] = { + { BIT(0), ADXL372_X_FIFO }, + { BIT(1), ADXL372_Y_FIFO }, + { BIT(2), ADXL372_Z_FIFO }, + { BIT(0) | BIT(1), ADXL372_XY_FIFO }, + { BIT(0) | BIT(2), ADXL372_XZ_FIFO }, + { BIT(1) | BIT(2), ADXL372_YZ_FIFO }, + { BIT(0) | BIT(1) | BIT(2), ADXL372_XYZ_FIFO }, +}; + +#define ADXL372_ACCEL_CHANNEL(index, reg, axis) { \ + .type = IIO_ACCEL, \ + .address = reg, \ + .modified = 1, \ + .channel2 = IIO_MOD_##axis, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ + BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ + .scan_index = index, \ + .scan_type = { \ + .sign = 's', \ + .realbits = 12, \ + .storagebits = 16, \ + .shift = 4, \ + }, \ +} + +static const struct iio_chan_spec adxl372_channels[] = { + ADXL372_ACCEL_CHANNEL(0, ADXL372_X_DATA_H, X), + ADXL372_ACCEL_CHANNEL(1, ADXL372_Y_DATA_H, Y), + ADXL372_ACCEL_CHANNEL(2, ADXL372_Z_DATA_H, Z), +}; + +struct adxl372_state { + int irq; + struct device *dev; + struct regmap *regmap; + struct iio_trigger *dready_trig; + enum adxl372_fifo_mode fifo_mode; + enum adxl372_fifo_format fifo_format; + enum adxl372_op_mode op_mode; + enum adxl372_act_proc_mode act_proc_mode; + enum adxl372_odr odr; + enum adxl372_bandwidth bw; + u32 act_time_ms; + u32 inact_time_ms; + u8 fifo_set_size; + u8 int1_bitmask; + u8 int2_bitmask; + u16 watermark; + __be16 fifo_buf[ADXL372_FIFO_SIZE]; +}; + +static const unsigned long adxl372_channel_masks[] = { + BIT(0), BIT(1), BIT(2), + BIT(0) | BIT(1), + BIT(0) | BIT(2), + BIT(1) | BIT(2), + BIT(0) | BIT(1) | BIT(2), + 0 +}; + +static int adxl372_read_axis(struct adxl372_state *st, u8 addr) +{ + __be16 regval; + int ret; + + ret = regmap_bulk_read(st->regmap, addr, ®val, sizeof(regval)); + if (ret < 0) + return ret; + + return be16_to_cpu(regval); +} + +static int adxl372_set_op_mode(struct adxl372_state *st, + enum adxl372_op_mode op_mode) +{ + int ret; + + ret = regmap_update_bits(st->regmap, ADXL372_POWER_CTL, + ADXL372_POWER_CTL_MODE_MSK, + ADXL372_POWER_CTL_MODE(op_mode)); + if (ret < 0) + return ret; + + st->op_mode = op_mode; + + return ret; +} + +static int adxl372_set_odr(struct adxl372_state *st, + enum adxl372_odr odr) +{ + int ret; + + ret = regmap_update_bits(st->regmap, ADXL372_TIMING, + ADXL372_TIMING_ODR_MSK, + ADXL372_TIMING_ODR_MODE(odr)); + if (ret < 0) + return ret; + + st->odr = odr; + + return ret; +} + +static int adxl372_find_closest_match(const int *array, + unsigned int size, int val) +{ + int i; + + for (i = 0; i < size; i++) { + if (val <= array[i]) + return i; + } + + return size - 1; +} + +static int adxl372_set_bandwidth(struct adxl372_state *st, + enum adxl372_bandwidth bw) +{ + int ret; + + ret = regmap_update_bits(st->regmap, ADXL372_MEASURE, + ADXL372_MEASURE_BANDWIDTH_MSK, + ADXL372_MEASURE_BANDWIDTH_MODE(bw)); + if (ret < 0) + return ret; + + st->bw = bw; + + return ret; +} + +static int adxl372_set_act_proc_mode(struct adxl372_state *st, + enum adxl372_act_proc_mode mode) +{ + int ret; + + ret = regmap_update_bits(st->regmap, + ADXL372_MEASURE, + ADXL372_MEASURE_LINKLOOP_MSK, + ADXL372_MEASURE_LINKLOOP_MODE(mode)); + if (ret < 0) + return ret; + + st->act_proc_mode = mode; + + return ret; +} + +static int adxl372_set_activity_threshold(struct adxl372_state *st, + enum adxl372_th_activity act, + bool ref_en, bool enable, + unsigned int threshold) +{ + unsigned char buf[6]; + unsigned char th_reg_high_val, th_reg_low_val, th_reg_high_addr; + + /* scale factor is 100 mg/code */ + th_reg_high_val = (threshold / 100) >> 3; + th_reg_low_val = ((threshold / 100) << 5) | (ref_en << 1) | enable; + th_reg_high_addr = adxl372_th_reg_high_addr[act]; + + buf[0] = th_reg_high_val; + buf[1] = th_reg_low_val; + buf[2] = th_reg_high_val; + buf[3] = th_reg_low_val; + buf[4] = th_reg_high_val; + buf[5] = th_reg_low_val; + + return regmap_bulk_write(st->regmap, th_reg_high_addr, + buf, ARRAY_SIZE(buf)); +} + +static int adxl372_set_activity_time_ms(struct adxl372_state *st, + unsigned int act_time_ms) +{ + unsigned int reg_val, scale_factor; + int ret; + + /* + * 3.3 ms per code is the scale factor of the TIME_ACT register for + * ODR = 6400 Hz. It is 6.6 ms per code for ODR = 3200 Hz and below. + */ + if (st->odr == ADXL372_ODR_6400HZ) + scale_factor = 3300; + else + scale_factor = 6600; + + reg_val = DIV_ROUND_CLOSEST(act_time_ms * 1000, scale_factor); + + /* TIME_ACT register is 8 bits wide */ + if (reg_val > 0xFF) + reg_val = 0xFF; + + ret = regmap_write(st->regmap, ADXL372_TIME_ACT, reg_val); + if (ret < 0) + return ret; + + st->act_time_ms = act_time_ms; + + return ret; +} + +static int adxl372_set_inactivity_time_ms(struct adxl372_state *st, + unsigned int inact_time_ms) +{ + unsigned int reg_val_h, reg_val_l, res, scale_factor; + int ret; + + /* + * 13 ms per code is the scale factor of the TIME_INACT register for + * ODR = 6400 Hz. It is 26 ms per code for ODR = 3200 Hz and below. + */ + if (st->odr == ADXL372_ODR_6400HZ) + scale_factor = 13; + else + scale_factor = 26; + + res = DIV_ROUND_CLOSEST(inact_time_ms, scale_factor); + reg_val_h = (res >> 8) & 0xFF; + reg_val_l = res & 0xFF; + + ret = regmap_write(st->regmap, ADXL372_TIME_INACT_H, reg_val_h); + if (ret < 0) + return ret; + + ret = regmap_write(st->regmap, ADXL372_TIME_INACT_L, reg_val_l); + if (ret < 0) + return ret; + + st->inact_time_ms = inact_time_ms; + + return ret; +} + +static int adxl372_set_interrupts(struct adxl372_state *st, + unsigned char int1_bitmask, + unsigned char int2_bitmask) +{ + int ret; + + ret = regmap_write(st->regmap, ADXL372_INT1_MAP, int1_bitmask); + if (ret < 0) + return ret; + + return regmap_write(st->regmap, ADXL372_INT2_MAP, int2_bitmask); +} + +static int adxl372_configure_fifo(struct adxl372_state *st) +{ + unsigned int fifo_samples, fifo_ctl; + int ret; + + /* FIFO must be configured while in standby mode */ + ret = adxl372_set_op_mode(st, ADXL372_STANDBY); + if (ret < 0) + return ret; + + fifo_samples = st->watermark & 0xFF; + fifo_ctl = ADXL372_FIFO_CTL_FORMAT_MODE(st->fifo_format) | + ADXL372_FIFO_CTL_MODE_MODE(st->fifo_mode) | + ADXL372_FIFO_CTL_SAMPLES_MODE(st->watermark); + + ret = regmap_write(st->regmap, ADXL372_FIFO_SAMPLES, fifo_samples); + if (ret < 0) + return ret; + + ret = regmap_write(st->regmap, ADXL372_FIFO_CTL, fifo_ctl); + if (ret < 0) + return ret; + + return adxl372_set_op_mode(st, ADXL372_FULL_BW_MEASUREMENT); +} + +static int adxl372_get_status(struct adxl372_state *st, + u8 *status1, u8 *status2, + u16 *fifo_entries) +{ + __be32 buf; + u32 val; + int ret; + + /* STATUS1, STATUS2, FIFO_ENTRIES2 and FIFO_ENTRIES are adjacent regs */ + ret = regmap_bulk_read(st->regmap, ADXL372_STATUS_1, + &buf, sizeof(buf)); + if (ret < 0) + return ret; + + val = be32_to_cpu(buf); + + *status1 = (val >> 24) & 0x0F; + *status2 = (val >> 16) & 0x0F; + /* + * FIFO_ENTRIES contains the least significant byte, and FIFO_ENTRIES2 + * contains the two most significant bits + */ + *fifo_entries = val & 0x3FF; + + return ret; +} + +static irqreturn_t adxl372_trigger_handler(int irq, void *p) +{ + struct iio_poll_func *pf = p; + struct iio_dev *indio_dev = pf->indio_dev; + struct adxl372_state *st = iio_priv(indio_dev); + u8 status1, status2; + u16 fifo_entries; + int i, ret; + + ret = adxl372_get_status(st, &status1, &status2, &fifo_entries); + if (ret < 0) + goto err; + + if (st->fifo_mode != ADXL372_FIFO_BYPASSED && + ADXL372_STATUS_1_FIFO_FULL(status1)) { + /* + * When reading data from multiple axes from the FIFO, + * to ensure that data is not overwritten and stored out + * of order at least one sample set must be left in the + * FIFO after every read. + */ + fifo_entries -= st->fifo_set_size; + + /* Read data from the FIFO */ + ret = regmap_noinc_read(st->regmap, ADXL372_FIFO_DATA, + st->fifo_buf, + fifo_entries * sizeof(u16)); + if (ret < 0) + goto err; + + /* Each sample is 2 bytes */ + for (i = 0; i < fifo_entries * sizeof(u16); + i += st->fifo_set_size * sizeof(u16)) + iio_push_to_buffers(indio_dev, &st->fifo_buf[i]); + } +err: + iio_trigger_notify_done(indio_dev->trig); + return IRQ_HANDLED; +} + +static int adxl372_setup(struct adxl372_state *st) +{ + unsigned int regval; + int ret; + + ret = regmap_read(st->regmap, ADXL372_DEVID, ®val); + if (ret < 0) + return ret; + + if (regval != ADXL372_DEVID_VAL) { + dev_err(st->dev, "Invalid chip id %x\n", regval); + return -ENODEV; + } + + ret = adxl372_set_op_mode(st, ADXL372_STANDBY); + if (ret < 0) + return ret; + + /* Set threshold for activity detection to 1g */ + ret = adxl372_set_activity_threshold(st, ADXL372_ACTIVITY, + true, true, 1000); + if (ret < 0) + return ret; + + /* Set threshold for inactivity detection to 100mg */ + ret = adxl372_set_activity_threshold(st, ADXL372_INACTIVITY, + true, true, 100); + if (ret < 0) + return ret; + + /* Set activity processing in Looped mode */ + ret = adxl372_set_act_proc_mode(st, ADXL372_LOOPED); + if (ret < 0) + return ret; + + ret = adxl372_set_odr(st, ADXL372_ODR_6400HZ); + if (ret < 0) + return ret; + + ret = adxl372_set_bandwidth(st, ADXL372_BW_3200HZ); + if (ret < 0) + return ret; + + /* Set activity timer to 1ms */ + ret = adxl372_set_activity_time_ms(st, 1); + if (ret < 0) + return ret; + + /* Set inactivity timer to 10s */ + ret = adxl372_set_inactivity_time_ms(st, 10000); + if (ret < 0) + return ret; + + /* Set the mode of operation to full bandwidth measurement mode */ + return adxl372_set_op_mode(st, ADXL372_FULL_BW_MEASUREMENT); +} + +static int adxl372_reg_access(struct iio_dev *indio_dev, + unsigned int reg, + unsigned int writeval, + unsigned int *readval) +{ + struct adxl372_state *st = iio_priv(indio_dev); + + if (readval) + return regmap_read(st->regmap, reg, readval); + else + return regmap_write(st->regmap, reg, writeval); +} + +static int adxl372_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long info) +{ + struct adxl372_state *st = iio_priv(indio_dev); + int ret; + + switch (info) { + case IIO_CHAN_INFO_RAW: + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = adxl372_read_axis(st, chan->address); + iio_device_release_direct_mode(indio_dev); + if (ret < 0) + return ret; + + *val = sign_extend32(ret >> chan->scan_type.shift, + chan->scan_type.realbits - 1); + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + *val = 0; + *val2 = ADXL372_USCALE; + return IIO_VAL_INT_PLUS_MICRO; + case IIO_CHAN_INFO_SAMP_FREQ: + *val = adxl372_samp_freq_tbl[st->odr]; + return IIO_VAL_INT; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: + *val = adxl372_bw_freq_tbl[st->bw]; + return IIO_VAL_INT; + } + + return -EINVAL; +} + +static int adxl372_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long info) +{ + struct adxl372_state *st = iio_priv(indio_dev); + int odr_index, bw_index, ret; + + switch (info) { + case IIO_CHAN_INFO_SAMP_FREQ: + odr_index = adxl372_find_closest_match(adxl372_samp_freq_tbl, + ARRAY_SIZE(adxl372_samp_freq_tbl), + val); + ret = adxl372_set_odr(st, odr_index); + if (ret < 0) + return ret; + /* + * The timer period depends on the ODR selected. + * At 3200 Hz and below, it is 6.6 ms; at 6400 Hz, it is 3.3 ms + */ + ret = adxl372_set_activity_time_ms(st, st->act_time_ms); + if (ret < 0) + return ret; + /* + * The timer period depends on the ODR selected. + * At 3200 Hz and below, it is 26 ms; at 6400 Hz, it is 13 ms + */ + ret = adxl372_set_inactivity_time_ms(st, st->inact_time_ms); + if (ret < 0) + return ret; + /* + * The maximum bandwidth is constrained to at most half of + * the ODR to ensure that the Nyquist criteria is not violated + */ + if (st->bw > odr_index) + ret = adxl372_set_bandwidth(st, odr_index); + + return ret; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: + bw_index = adxl372_find_closest_match(adxl372_bw_freq_tbl, + ARRAY_SIZE(adxl372_bw_freq_tbl), + val); + return adxl372_set_bandwidth(st, bw_index); + default: + return -EINVAL; + } +} + +static ssize_t adxl372_show_filter_freq_avail(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct iio_dev *indio_dev = dev_to_iio_dev(dev); + struct adxl372_state *st = iio_priv(indio_dev); + int i; + size_t len = 0; + + for (i = 0; i <= st->odr; i++) + len += scnprintf(buf + len, PAGE_SIZE - len, + "%d ", adxl372_bw_freq_tbl[i]); + + buf[len - 1] = '\n'; + + return len; +} + +static ssize_t adxl372_get_fifo_enabled(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct iio_dev *indio_dev = dev_to_iio_dev(dev); + struct adxl372_state *st = iio_priv(indio_dev); + + return sprintf(buf, "%d\n", st->fifo_mode); +} + +static ssize_t adxl372_get_fifo_watermark(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct iio_dev *indio_dev = dev_to_iio_dev(dev); + struct adxl372_state *st = iio_priv(indio_dev); + + return sprintf(buf, "%d\n", st->watermark); +} + +static IIO_CONST_ATTR(hwfifo_watermark_min, "1"); +static IIO_CONST_ATTR(hwfifo_watermark_max, + __stringify(ADXL372_FIFO_SIZE)); +static IIO_DEVICE_ATTR(hwfifo_watermark, 0444, + adxl372_get_fifo_watermark, NULL, 0); +static IIO_DEVICE_ATTR(hwfifo_enabled, 0444, + adxl372_get_fifo_enabled, NULL, 0); + +static const struct attribute *adxl372_fifo_attributes[] = { + &iio_const_attr_hwfifo_watermark_min.dev_attr.attr, + &iio_const_attr_hwfifo_watermark_max.dev_attr.attr, + &iio_dev_attr_hwfifo_watermark.dev_attr.attr, + &iio_dev_attr_hwfifo_enabled.dev_attr.attr, + NULL, +}; + +static int adxl372_set_watermark(struct iio_dev *indio_dev, unsigned int val) +{ + struct adxl372_state *st = iio_priv(indio_dev); + + if (val > ADXL372_FIFO_SIZE) + val = ADXL372_FIFO_SIZE; + + st->watermark = val; + + return 0; +} + +static int adxl372_buffer_postenable(struct iio_dev *indio_dev) +{ + struct adxl372_state *st = iio_priv(indio_dev); + unsigned int mask; + int i, ret; + + ret = adxl372_set_interrupts(st, ADXL372_INT1_MAP_FIFO_FULL_MSK, 0); + if (ret < 0) + return ret; + + mask = *indio_dev->active_scan_mask; + + for (i = 0; i < ARRAY_SIZE(adxl372_axis_lookup_table); i++) { + if (mask == adxl372_axis_lookup_table[i].bits) + break; + } + + if (i == ARRAY_SIZE(adxl372_axis_lookup_table)) + return -EINVAL; + + st->fifo_format = adxl372_axis_lookup_table[i].fifo_format; + st->fifo_set_size = bitmap_weight(indio_dev->active_scan_mask, + indio_dev->masklength); + /* + * The 512 FIFO samples can be allotted in several ways, such as: + * 170 sample sets of concurrent 3-axis data + * 256 sample sets of concurrent 2-axis data (user selectable) + * 512 sample sets of single-axis data + */ + if ((st->watermark * st->fifo_set_size) > ADXL372_FIFO_SIZE) + st->watermark = (ADXL372_FIFO_SIZE / st->fifo_set_size); + + st->fifo_mode = ADXL372_FIFO_STREAMED; + + ret = adxl372_configure_fifo(st); + if (ret < 0) { + st->fifo_mode = ADXL372_FIFO_BYPASSED; + adxl372_set_interrupts(st, 0, 0); + return ret; + } + + return iio_triggered_buffer_postenable(indio_dev); +} + +static int adxl372_buffer_predisable(struct iio_dev *indio_dev) +{ + struct adxl372_state *st = iio_priv(indio_dev); + int ret; + + ret = iio_triggered_buffer_predisable(indio_dev); + if (ret < 0) + return ret; + + adxl372_set_interrupts(st, 0, 0); + st->fifo_mode = ADXL372_FIFO_BYPASSED; + adxl372_configure_fifo(st); + + return 0; +} + +static const struct iio_buffer_setup_ops adxl372_buffer_ops = { + .postenable = adxl372_buffer_postenable, + .predisable = adxl372_buffer_predisable, +}; + +static int adxl372_dready_trig_set_state(struct iio_trigger *trig, + bool state) +{ + struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); + struct adxl372_state *st = iio_priv(indio_dev); + unsigned long int mask = 0; + + if (state) + mask = ADXL372_INT1_MAP_FIFO_FULL_MSK; + + return adxl372_set_interrupts(st, mask, 0); +} + +static int adxl372_validate_trigger(struct iio_dev *indio_dev, + struct iio_trigger *trig) +{ + struct adxl372_state *st = iio_priv(indio_dev); + + if (st->dready_trig != trig) + return -EINVAL; + + return 0; +} + +static const struct iio_trigger_ops adxl372_trigger_ops = { + .validate_device = &iio_trigger_validate_own_device, + .set_trigger_state = adxl372_dready_trig_set_state, +}; + +static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("400 800 1600 3200 6400"); +static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available, + 0444, adxl372_show_filter_freq_avail, NULL, 0); + +static struct attribute *adxl372_attributes[] = { + &iio_const_attr_sampling_frequency_available.dev_attr.attr, + &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group adxl372_attrs_group = { + .attrs = adxl372_attributes, +}; + +static const struct iio_info adxl372_info = { + .validate_trigger = &adxl372_validate_trigger, + .attrs = &adxl372_attrs_group, + .read_raw = adxl372_read_raw, + .write_raw = adxl372_write_raw, + .debugfs_reg_access = &adxl372_reg_access, + .hwfifo_set_watermark = adxl372_set_watermark, +}; + +bool adxl372_readable_noinc_reg(struct device *dev, unsigned int reg) +{ + return (reg == ADXL372_FIFO_DATA); +} +EXPORT_SYMBOL_GPL(adxl372_readable_noinc_reg); + +int adxl372_probe(struct device *dev, struct regmap *regmap, + int irq, const char *name) +{ + struct iio_dev *indio_dev; + struct adxl372_state *st; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st = iio_priv(indio_dev); + dev_set_drvdata(dev, indio_dev); + + st->dev = dev; + st->regmap = regmap; + st->irq = irq; + + indio_dev->channels = adxl372_channels; + indio_dev->num_channels = ARRAY_SIZE(adxl372_channels); + indio_dev->available_scan_masks = adxl372_channel_masks; + indio_dev->dev.parent = dev; + indio_dev->name = name; + indio_dev->info = &adxl372_info; + indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; + + ret = adxl372_setup(st); + if (ret < 0) { + dev_err(dev, "ADXL372 setup failed\n"); + return ret; + } + + ret = devm_iio_triggered_buffer_setup(dev, + indio_dev, NULL, + adxl372_trigger_handler, + &adxl372_buffer_ops); + if (ret < 0) + return ret; + + iio_buffer_set_attrs(indio_dev->buffer, adxl372_fifo_attributes); + + if (st->irq) { + st->dready_trig = devm_iio_trigger_alloc(dev, + "%s-dev%d", + indio_dev->name, + indio_dev->id); + if (st->dready_trig == NULL) + return -ENOMEM; + + st->dready_trig->ops = &adxl372_trigger_ops; + st->dready_trig->dev.parent = dev; + iio_trigger_set_drvdata(st->dready_trig, indio_dev); + ret = devm_iio_trigger_register(dev, st->dready_trig); + if (ret < 0) + return ret; + + indio_dev->trig = iio_trigger_get(st->dready_trig); + + ret = devm_request_threaded_irq(dev, st->irq, + iio_trigger_generic_data_rdy_poll, + NULL, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + indio_dev->name, st->dready_trig); + if (ret < 0) + return ret; + } + + return devm_iio_device_register(dev, indio_dev); +} +EXPORT_SYMBOL_GPL(adxl372_probe); + +MODULE_AUTHOR("Stefan Popa <stefan.popa@analog.com>"); +MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/accel/adxl372.h b/drivers/iio/accel/adxl372.h new file mode 100644 index 000000000000..80a0aa9714fc --- /dev/null +++ b/drivers/iio/accel/adxl372.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * ADXL372 3-Axis Digital Accelerometer + * + * Copyright 2018 Analog Devices Inc. + */ + +#ifndef _ADXL372_H_ +#define _ADXL372_H_ + +#define ADXL372_REVID 0x03 + +int adxl372_probe(struct device *dev, struct regmap *regmap, + int irq, const char *name); +bool adxl372_readable_noinc_reg(struct device *dev, unsigned int reg); + +#endif /* _ADXL372_H_ */ diff --git a/drivers/iio/accel/adxl372_i2c.c b/drivers/iio/accel/adxl372_i2c.c new file mode 100644 index 000000000000..e1affe480c77 --- /dev/null +++ b/drivers/iio/accel/adxl372_i2c.c @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * ADXL372 3-Axis Digital Accelerometer I2C driver + * + * Copyright 2018 Analog Devices Inc. + */ + +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/regmap.h> + +#include "adxl372.h" + +static const struct regmap_config adxl372_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .readable_noinc_reg = adxl372_readable_noinc_reg, +}; + +static int adxl372_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct regmap *regmap; + unsigned int regval; + int ret; + + regmap = devm_regmap_init_i2c(client, &adxl372_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret = regmap_read(regmap, ADXL372_REVID, ®val); + if (ret < 0) + return ret; + + /* Starting with the 3rd revision an I2C chip bug was fixed */ + if (regval < 3) + dev_warn(&client->dev, + "I2C might not work properly with other devices on the bus"); + + return adxl372_probe(&client->dev, regmap, client->irq, id->name); +} + +static const struct i2c_device_id adxl372_i2c_id[] = { + { "adxl372", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, adxl372_i2c_id); + +static struct i2c_driver adxl372_i2c_driver = { + .driver = { + .name = "adxl372_i2c", + }, + .probe = adxl372_i2c_probe, + .id_table = adxl372_i2c_id, +}; + +module_i2c_driver(adxl372_i2c_driver); + +MODULE_AUTHOR("Stefan Popa <stefan.popa@analog.com>"); +MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer I2C driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/accel/adxl372_spi.c b/drivers/iio/accel/adxl372_spi.c new file mode 100644 index 000000000000..e14e655ef165 --- /dev/null +++ b/drivers/iio/accel/adxl372_spi.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * ADXL372 3-Axis Digital Accelerometer SPI driver + * + * Copyright 2018 Analog Devices Inc. + */ + +#include <linux/module.h> +#include <linux/regmap.h> +#include <linux/spi/spi.h> + +#include "adxl372.h" + +static const struct regmap_config adxl372_spi_regmap_config = { + .reg_bits = 7, + .pad_bits = 1, + .val_bits = 8, + .read_flag_mask = BIT(0), + .readable_noinc_reg = adxl372_readable_noinc_reg, +}; + +static int adxl372_spi_probe(struct spi_device *spi) +{ + const struct spi_device_id *id = spi_get_device_id(spi); + struct regmap *regmap; + + regmap = devm_regmap_init_spi(spi, &adxl372_spi_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + return adxl372_probe(&spi->dev, regmap, spi->irq, id->name); +} + +static const struct spi_device_id adxl372_spi_id[] = { + { "adxl372", 0 }, + {} +}; +MODULE_DEVICE_TABLE(spi, adxl372_spi_id); + +static struct spi_driver adxl372_spi_driver = { + .driver = { + .name = "adxl372_spi", + }, + .probe = adxl372_spi_probe, + .id_table = adxl372_spi_id, +}; + +module_spi_driver(adxl372_spi_driver); + +MODULE_AUTHOR("Stefan Popa <stefan.popa@analog.com>"); +MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer SPI driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 4a754921fb6f..a52fea8749a9 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -501,6 +501,16 @@ config MCP3422 This driver can also be built as a module. If so, the module will be called mcp3422. +config MCP3911 + tristate "Microchip Technology MCP3911 driver" + depends on SPI + help + Say yes here to build support for Microchip Technology's MCP3911 + analog to digital converter. + + This driver can also be built as a module. If so, the module will be + called mcp3911. + config MEDIATEK_MT6577_AUXADC tristate "MediaTek AUXADC driver" depends on ARCH_MEDIATEK || COMPILE_TEST @@ -596,6 +606,26 @@ config QCOM_SPMI_VADC To compile this driver as a module, choose M here: the module will be called qcom-spmi-vadc. +config QCOM_SPMI_ADC5 + tristate "Qualcomm Technologies Inc. SPMI PMIC5 ADC" + depends on SPMI + select REGMAP_SPMI + select QCOM_VADC_COMMON + help + This is the IIO Voltage PMIC5 ADC driver for Qualcomm Technologies Inc. + + The driver supports multiple channels read. The ADC is a 16-bit + sigma-delta ADC. The hardware supports calibrated results for + conversion requests and clients include reading voltage phone + power, on board system thermistors connected to the PMIC ADC, + PMIC die temperature, charger temperature, battery current, USB voltage + input, voltage signals connected to supported PMIC GPIO inputs. The + hardware supports internal pull-up for thermistors and can choose between + a 100k, 30k and 400k pull up using the ADC channels. + + To compile this driver as a module, choose M here: the module will + be called qcom-spmi-adc5. + config RCAR_GYRO_ADC tristate "Renesas R-Car GyroADC driver" depends on ARCH_RCAR_GEN2 || COMPILE_TEST diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index 03db7b578f9c..a6e6a0b659e2 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -47,12 +47,14 @@ obj-$(CONFIG_MAX1363) += max1363.o obj-$(CONFIG_MAX9611) += max9611.o obj-$(CONFIG_MCP320X) += mcp320x.o obj-$(CONFIG_MCP3422) += mcp3422.o +obj-$(CONFIG_MCP3911) += mcp3911.o obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o obj-$(CONFIG_MESON_SARADC) += meson_saradc.o obj-$(CONFIG_MXS_LRADC_ADC) += mxs-lradc-adc.o obj-$(CONFIG_NAU7802) += nau7802.o obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o +obj-$(CONFIG_QCOM_SPMI_ADC5) += qcom-spmi-adc5.o obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o obj-$(CONFIG_QCOM_VADC_COMMON) += qcom-vadc-common.o obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o diff --git a/drivers/iio/adc/ad7298.c b/drivers/iio/adc/ad7298.c index 2b20c6c8ec7f..e0220825fde0 100644 --- a/drivers/iio/adc/ad7298.c +++ b/drivers/iio/adc/ad7298.c @@ -385,6 +385,6 @@ static struct spi_driver ad7298_driver = { }; module_spi_driver(ad7298_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7298 ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/ad7476.c b/drivers/iio/adc/ad7476.c index fbaae47746a8..0549686b9ef8 100644 --- a/drivers/iio/adc/ad7476.c +++ b/drivers/iio/adc/ad7476.c @@ -328,6 +328,6 @@ static struct spi_driver ad7476_driver = { }; module_spi_driver(ad7476_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/ad7793.c b/drivers/iio/adc/ad7793.c index d4bbe5b53318..4ac3ae62f56f 100644 --- a/drivers/iio/adc/ad7793.c +++ b/drivers/iio/adc/ad7793.c @@ -822,6 +822,6 @@ static struct spi_driver ad7793_driver = { }; module_spi_driver(ad7793_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7793 and similar ADCs"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/ad7887.c b/drivers/iio/adc/ad7887.c index 205c0f1761aa..9d4c2467d362 100644 --- a/drivers/iio/adc/ad7887.c +++ b/drivers/iio/adc/ad7887.c @@ -362,6 +362,6 @@ static struct spi_driver ad7887_driver = { }; module_spi_driver(ad7887_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7887 ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/ad7923.c b/drivers/iio/adc/ad7923.c index ffb7e089969c..d62dbb62be45 100644 --- a/drivers/iio/adc/ad7923.c +++ b/drivers/iio/adc/ad7923.c @@ -363,7 +363,7 @@ static struct spi_driver ad7923_driver = { }; module_spi_driver(ad7923_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>"); MODULE_DESCRIPTION("Analog Devices AD7904/AD7914/AD7923/AD7924 ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/ad799x.c b/drivers/iio/adc/ad799x.c index e1da67d5ee22..7a5b5d00a87d 100644 --- a/drivers/iio/adc/ad799x.c +++ b/drivers/iio/adc/ad799x.c @@ -892,6 +892,6 @@ static struct i2c_driver ad799x_driver = { }; module_i2c_driver(ad799x_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD799x ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c index 44b516863c9d..75d2f73582a3 100644 --- a/drivers/iio/adc/at91_adc.c +++ b/drivers/iio/adc/at91_adc.c @@ -248,12 +248,14 @@ static irqreturn_t at91_adc_trigger_handler(int irq, void *p) struct iio_poll_func *pf = p; struct iio_dev *idev = pf->indio_dev; struct at91_adc_state *st = iio_priv(idev); + struct iio_chan_spec const *chan; int i, j = 0; for (i = 0; i < idev->masklength; i++) { if (!test_bit(i, idev->active_scan_mask)) continue; - st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i)); + chan = idev->channels + i; + st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel)); j++; } @@ -279,6 +281,8 @@ static void handle_adc_eoc_trigger(int irq, struct iio_dev *idev) iio_trigger_poll(idev->trig); } else { st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb)); + /* Needed to ACK the DRDY interruption */ + at91_adc_readl(st, AT91_ADC_LCDR); st->done = true; wake_up_interruptible(&st->wq_data_avail); } diff --git a/drivers/iio/adc/envelope-detector.c b/drivers/iio/adc/envelope-detector.c index 4ebda8ab54fe..2f2b563c1162 100644 --- a/drivers/iio/adc/envelope-detector.c +++ b/drivers/iio/adc/envelope-detector.c @@ -1,13 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Driver for an envelope detector using a DAC and a comparator * * Copyright (C) 2016 Axentia Technologies AB * * Author: Peter Rosin <peda@axentia.se> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ /* diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c index ea264fa9e567..929c617db364 100644 --- a/drivers/iio/adc/fsl-imx25-gcq.c +++ b/drivers/iio/adc/fsl-imx25-gcq.c @@ -209,12 +209,14 @@ static int mx25_gcq_setup_cfgs(struct platform_device *pdev, ret = of_property_read_u32(child, "reg", ®); if (ret) { dev_err(dev, "Failed to get reg property\n"); + of_node_put(child); return ret; } if (reg >= MX25_NUM_CFGS) { dev_err(dev, "reg value is greater than the number of available configuration registers\n"); + of_node_put(child); return -EINVAL; } @@ -228,6 +230,7 @@ static int mx25_gcq_setup_cfgs(struct platform_device *pdev, if (IS_ERR(priv->vref[refp])) { dev_err(dev, "Error, trying to use external voltage reference without a vref-%s regulator.", mx25_gcq_refp_names[refp]); + of_node_put(child); return PTR_ERR(priv->vref[refp]); } priv->channel_vref_mv[reg] = @@ -240,6 +243,7 @@ static int mx25_gcq_setup_cfgs(struct platform_device *pdev, break; default: dev_err(dev, "Invalid positive reference %d\n", refp); + of_node_put(child); return -EINVAL; } @@ -254,10 +258,12 @@ static int mx25_gcq_setup_cfgs(struct platform_device *pdev, if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) { dev_err(dev, "Invalid fsl,adc-refp property value\n"); + of_node_put(child); return -EINVAL; } if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) { dev_err(dev, "Invalid fsl,adc-refn property value\n"); + of_node_put(child); return -EINVAL; } diff --git a/drivers/iio/adc/max9611.c b/drivers/iio/adc/max9611.c index 0538ff8c4ac1..643a4e66eb80 100644 --- a/drivers/iio/adc/max9611.c +++ b/drivers/iio/adc/max9611.c @@ -289,7 +289,7 @@ static int max9611_read_csa_voltage(struct max9611_dev *max9611, return ret; if (*adc_raw > 0) { - *csa_gain = gain_selectors[i]; + *csa_gain = (enum max9611_csa_gain)gain_selectors[i]; return 0; } } diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c new file mode 100644 index 000000000000..dd52f08ec82e --- /dev/null +++ b/drivers/iio/adc/mcp3911.c @@ -0,0 +1,363 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for Microchip MCP3911, Two-channel Analog Front End + * + * Copyright (C) 2018 Marcus Folkesson <marcus.folkesson@gmail.com> + * Copyright (C) 2018 Kent Gustavsson <kent@minoris.se> + */ +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/iio/iio.h> +#include <linux/module.h> +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> + +#define MCP3911_REG_CHANNEL0 0x00 +#define MCP3911_REG_CHANNEL1 0x03 +#define MCP3911_REG_MOD 0x06 +#define MCP3911_REG_PHASE 0x07 +#define MCP3911_REG_GAIN 0x09 + +#define MCP3911_REG_STATUSCOM 0x0a +#define MCP3911_STATUSCOM_CH1_24WIDTH BIT(4) +#define MCP3911_STATUSCOM_CH0_24WIDTH BIT(3) +#define MCP3911_STATUSCOM_EN_OFFCAL BIT(2) +#define MCP3911_STATUSCOM_EN_GAINCAL BIT(1) + +#define MCP3911_REG_CONFIG 0x0c +#define MCP3911_CONFIG_CLKEXT BIT(1) +#define MCP3911_CONFIG_VREFEXT BIT(2) + +#define MCP3911_REG_OFFCAL_CH0 0x0e +#define MCP3911_REG_GAINCAL_CH0 0x11 +#define MCP3911_REG_OFFCAL_CH1 0x14 +#define MCP3911_REG_GAINCAL_CH1 0x17 +#define MCP3911_REG_VREFCAL 0x1a + +#define MCP3911_CHANNEL(x) (MCP3911_REG_CHANNEL0 + x * 3) +#define MCP3911_OFFCAL(x) (MCP3911_REG_OFFCAL_CH0 + x * 6) + +/* Internal voltage reference in uV */ +#define MCP3911_INT_VREF_UV 1200000 + +#define MCP3911_REG_READ(reg, id) ((((reg) << 1) | ((id) << 5) | (1 << 0)) & 0xff) +#define MCP3911_REG_WRITE(reg, id) ((((reg) << 1) | ((id) << 5) | (0 << 0)) & 0xff) + +#define MCP3911_NUM_CHANNELS 2 + +struct mcp3911 { + struct spi_device *spi; + struct mutex lock; + struct regulator *vref; + struct clk *clki; + u32 dev_addr; +}; + +static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) +{ + int ret; + + reg = MCP3911_REG_READ(reg, adc->dev_addr); + ret = spi_write_then_read(adc->spi, ®, 1, val, len); + if (ret < 0) + return ret; + + be32_to_cpus(val); + *val >>= ((4 - len) * 8); + dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%x\n", *val, + reg >> 1); + return ret; +} + +static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) +{ + dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg); + + val <<= (3 - len) * 8; + cpu_to_be32s(&val); + val |= MCP3911_REG_WRITE(reg, adc->dev_addr); + + return spi_write(adc->spi, &val, len + 1); +} + +static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, + u32 val, u8 len) +{ + u32 tmp; + int ret; + + ret = mcp3911_read(adc, reg, &tmp, len); + if (ret) + return ret; + + val &= mask; + val |= tmp & ~mask; + return mcp3911_write(adc, reg, val, len); +} + +static int mcp3911_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *channel, int *val, + int *val2, long mask) +{ + struct mcp3911 *adc = iio_priv(indio_dev); + int ret = -EINVAL; + + mutex_lock(&adc->lock); + switch (mask) { + case IIO_CHAN_INFO_RAW: + ret = mcp3911_read(adc, + MCP3911_CHANNEL(channel->channel), val, 3); + if (ret) + goto out; + + ret = IIO_VAL_INT; + break; + + case IIO_CHAN_INFO_OFFSET: + ret = mcp3911_read(adc, + MCP3911_OFFCAL(channel->channel), val, 3); + if (ret) + goto out; + + ret = IIO_VAL_INT; + break; + + case IIO_CHAN_INFO_SCALE: + if (adc->vref) { + ret = regulator_get_voltage(adc->vref); + if (ret < 0) { + dev_err(indio_dev->dev.parent, + "failed to get vref voltage: %d\n", + ret); + goto out; + } + + *val = ret / 1000; + } else { + *val = MCP3911_INT_VREF_UV; + } + + *val2 = 24; + ret = IIO_VAL_FRACTIONAL_LOG2; + break; + } + +out: + mutex_unlock(&adc->lock); + return ret; +} + +static int mcp3911_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *channel, int val, + int val2, long mask) +{ + struct mcp3911 *adc = iio_priv(indio_dev); + int ret = -EINVAL; + + mutex_lock(&adc->lock); + switch (mask) { + case IIO_CHAN_INFO_OFFSET: + if (val2 != 0) { + ret = -EINVAL; + goto out; + } + + /* Write offset */ + ret = mcp3911_write(adc, MCP3911_OFFCAL(channel->channel), val, + 3); + if (ret) + goto out; + + /* Enable offset*/ + ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, + MCP3911_STATUSCOM_EN_OFFCAL, + MCP3911_STATUSCOM_EN_OFFCAL, 2); + break; + } + +out: + mutex_unlock(&adc->lock); + return ret; +} + +#define MCP3911_CHAN(idx) { \ + .type = IIO_VOLTAGE, \ + .indexed = 1, \ + .channel = idx, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_OFFSET) | \ + BIT(IIO_CHAN_INFO_SCALE), \ +} + +static const struct iio_chan_spec mcp3911_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), +}; + +static const struct iio_info mcp3911_info = { + .read_raw = mcp3911_read_raw, + .write_raw = mcp3911_write_raw, +}; + +static int mcp3911_config(struct mcp3911 *adc, struct device_node *of_node) +{ + u32 configreg; + int ret; + + of_property_read_u32(of_node, "device-addr", &adc->dev_addr); + if (adc->dev_addr > 3) { + dev_err(&adc->spi->dev, + "invalid device address (%i). Must be in range 0-3.\n", + adc->dev_addr); + return -EINVAL; + } + dev_dbg(&adc->spi->dev, "use device address %i\n", adc->dev_addr); + + ret = mcp3911_read(adc, MCP3911_REG_CONFIG, &configreg, 2); + if (ret) + return ret; + + if (adc->vref) { + dev_dbg(&adc->spi->dev, "use external voltage reference\n"); + configreg |= MCP3911_CONFIG_VREFEXT; + } else { + dev_dbg(&adc->spi->dev, + "use internal voltage reference (1.2V)\n"); + configreg &= ~MCP3911_CONFIG_VREFEXT; + } + + if (adc->clki) { + dev_dbg(&adc->spi->dev, "use external clock as clocksource\n"); + configreg |= MCP3911_CONFIG_CLKEXT; + } else { + dev_dbg(&adc->spi->dev, + "use crystal oscillator as clocksource\n"); + configreg &= ~MCP3911_CONFIG_CLKEXT; + } + + return mcp3911_write(adc, MCP3911_REG_CONFIG, configreg, 2); +} + +static int mcp3911_probe(struct spi_device *spi) +{ + struct iio_dev *indio_dev; + struct mcp3911 *adc; + int ret; + + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); + if (!indio_dev) + return -ENOMEM; + + adc = iio_priv(indio_dev); + adc->spi = spi; + + adc->vref = devm_regulator_get_optional(&adc->spi->dev, "vref"); + if (IS_ERR(adc->vref)) { + if (PTR_ERR(adc->vref) == -ENODEV) { + adc->vref = NULL; + } else { + dev_err(&adc->spi->dev, + "failed to get regulator (%ld)\n", + PTR_ERR(adc->vref)); + return PTR_ERR(adc->vref); + } + + } else { + ret = regulator_enable(adc->vref); + if (ret) + return ret; + } + + adc->clki = devm_clk_get(&adc->spi->dev, NULL); + if (IS_ERR(adc->clki)) { + if (PTR_ERR(adc->clki) == -ENOENT) { + adc->clki = NULL; + } else { + dev_err(&adc->spi->dev, + "failed to get adc clk (%ld)\n", + PTR_ERR(adc->clki)); + ret = PTR_ERR(adc->clki); + goto reg_disable; + } + } else { + ret = clk_prepare_enable(adc->clki); + if (ret < 0) { + dev_err(&adc->spi->dev, + "Failed to enable clki: %d\n", ret); + goto reg_disable; + } + } + + ret = mcp3911_config(adc, spi->dev.of_node); + if (ret) + goto clk_disable; + + indio_dev->dev.parent = &spi->dev; + indio_dev->dev.of_node = spi->dev.of_node; + indio_dev->name = spi_get_device_id(spi)->name; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = &mcp3911_info; + spi_set_drvdata(spi, indio_dev); + + indio_dev->channels = mcp3911_channels; + indio_dev->num_channels = ARRAY_SIZE(mcp3911_channels); + + mutex_init(&adc->lock); + + ret = iio_device_register(indio_dev); + if (ret) + goto clk_disable; + + return ret; + +clk_disable: + clk_disable_unprepare(adc->clki); +reg_disable: + if (adc->vref) + regulator_disable(adc->vref); + + return ret; +} + +static int mcp3911_remove(struct spi_device *spi) +{ + struct iio_dev *indio_dev = spi_get_drvdata(spi); + struct mcp3911 *adc = iio_priv(indio_dev); + + iio_device_unregister(indio_dev); + + clk_disable_unprepare(adc->clki); + if (adc->vref) + regulator_disable(adc->vref); + + return 0; +} + +static const struct of_device_id mcp3911_dt_ids[] = { + { .compatible = "microchip,mcp3911" }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp3911_dt_ids); + +static const struct spi_device_id mcp3911_id[] = { + { "mcp3911", 0 }, + { } +}; +MODULE_DEVICE_TABLE(spi, mcp3911_id); + +static struct spi_driver mcp3911_driver = { + .driver = { + .name = "mcp3911", + .of_match_table = mcp3911_dt_ids, + }, + .probe = mcp3911_probe, + .remove = mcp3911_remove, + .id_table = mcp3911_id, +}; +module_spi_driver(mcp3911_driver); + +MODULE_AUTHOR("Marcus Folkesson <marcus.folkesson@gmail.com>"); +MODULE_AUTHOR("Kent Gustavsson <kent@minoris.se>"); +MODULE_DESCRIPTION("Microchip Technology MCP3911"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c index da2d16dfa63e..028ccd218f82 100644 --- a/drivers/iio/adc/meson_saradc.c +++ b/drivers/iio/adc/meson_saradc.c @@ -148,7 +148,6 @@ #define MESON_SAR_ADC_DELTA_10_TS_REVE1 BIT(26) #define MESON_SAR_ADC_DELTA_10_CHAN1_DELTA_VALUE_MASK GENMASK(25, 16) #define MESON_SAR_ADC_DELTA_10_TS_REVE0 BIT(15) - #define MESON_SAR_ADC_DELTA_10_TS_C_SHIFT 11 #define MESON_SAR_ADC_DELTA_10_TS_C_MASK GENMASK(14, 11) #define MESON_SAR_ADC_DELTA_10_TS_VBG_EN BIT(10) #define MESON_SAR_ADC_DELTA_10_CHAN0_DELTA_VALUE_MASK GENMASK(9, 0) @@ -173,6 +172,7 @@ .type = IIO_VOLTAGE, \ .indexed = 1, \ .channel = _chan, \ + .address = _chan, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT(IIO_CHAN_INFO_AVERAGE_RAW), \ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ @@ -235,7 +235,7 @@ struct meson_sar_adc_data { struct meson_sar_adc_priv { struct regmap *regmap; struct regulator *vref; - const struct meson_sar_adc_data *data; + const struct meson_sar_adc_param *param; struct clk *clkin; struct clk *core_clk; struct clk *adc_sel_clk; @@ -280,7 +280,7 @@ static int meson_sar_adc_calib_val(struct iio_dev *indio_dev, int val) /* use val_calib = scale * val_raw + offset calibration function */ tmp = div_s64((s64)val * priv->calibscale, MILLION) + priv->calibbias; - return clamp(tmp, 0, (1 << priv->data->param->resolution) - 1); + return clamp(tmp, 0, (1 << priv->param->resolution) - 1); } static int meson_sar_adc_wait_busy_clear(struct iio_dev *indio_dev) @@ -324,15 +324,15 @@ static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev, regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, ®val); fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK, regval); - if (fifo_chan != chan->channel) { + if (fifo_chan != chan->address) { dev_err(&indio_dev->dev, - "ADC FIFO entry belongs to channel %d instead of %d\n", - fifo_chan, chan->channel); + "ADC FIFO entry belongs to channel %d instead of %lu\n", + fifo_chan, chan->address); return -EINVAL; } fifo_val = FIELD_GET(MESON_SAR_ADC_FIFO_RD_SAMPLE_VALUE_MASK, regval); - fifo_val &= GENMASK(priv->data->param->resolution - 1, 0); + fifo_val &= GENMASK(priv->param->resolution - 1, 0); *val = meson_sar_adc_calib_val(indio_dev, fifo_val); return 0; @@ -344,16 +344,16 @@ static void meson_sar_adc_set_averaging(struct iio_dev *indio_dev, enum meson_sar_adc_num_samples samples) { struct meson_sar_adc_priv *priv = iio_priv(indio_dev); - int val, channel = chan->channel; + int val, address = chan->address; - val = samples << MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_SHIFT(channel); + val = samples << MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_SHIFT(address); regmap_update_bits(priv->regmap, MESON_SAR_ADC_AVG_CNTL, - MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_MASK(channel), + MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_MASK(address), val); - val = mode << MESON_SAR_ADC_AVG_CNTL_AVG_MODE_SHIFT(channel); + val = mode << MESON_SAR_ADC_AVG_CNTL_AVG_MODE_SHIFT(address); regmap_update_bits(priv->regmap, MESON_SAR_ADC_AVG_CNTL, - MESON_SAR_ADC_AVG_CNTL_AVG_MODE_MASK(channel), val); + MESON_SAR_ADC_AVG_CNTL_AVG_MODE_MASK(address), val); } static void meson_sar_adc_enable_channel(struct iio_dev *indio_dev, @@ -373,23 +373,23 @@ static void meson_sar_adc_enable_channel(struct iio_dev *indio_dev, /* map channel index 0 to the channel which we want to read */ regval = FIELD_PREP(MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK(0), - chan->channel); + chan->address); regmap_update_bits(priv->regmap, MESON_SAR_ADC_CHAN_LIST, MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK(0), regval); regval = FIELD_PREP(MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK, - chan->channel); + chan->address); regmap_update_bits(priv->regmap, MESON_SAR_ADC_DETECT_IDLE_SW, MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK, regval); regval = FIELD_PREP(MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK, - chan->channel); + chan->address); regmap_update_bits(priv->regmap, MESON_SAR_ADC_DETECT_IDLE_SW, MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK, regval); - if (chan->channel == 6) + if (chan->address == 6) regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELTA_10, MESON_SAR_ADC_DELTA_10_TEMP_SEL, 0); } @@ -451,7 +451,7 @@ static int meson_sar_adc_lock(struct iio_dev *indio_dev) mutex_lock(&indio_dev->mlock); - if (priv->data->param->has_bl30_integration) { + if (priv->param->has_bl30_integration) { /* prevent BL30 from using the SAR ADC while we are using it */ regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELAY, MESON_SAR_ADC_DELAY_KERNEL_BUSY, @@ -479,7 +479,7 @@ static void meson_sar_adc_unlock(struct iio_dev *indio_dev) { struct meson_sar_adc_priv *priv = iio_priv(indio_dev); - if (priv->data->param->has_bl30_integration) + if (priv->param->has_bl30_integration) /* allow BL30 to use the SAR ADC again */ regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELAY, MESON_SAR_ADC_DELAY_KERNEL_BUSY, 0); @@ -527,8 +527,8 @@ static int meson_sar_adc_get_sample(struct iio_dev *indio_dev, if (ret) { dev_warn(indio_dev->dev.parent, - "failed to read sample for channel %d: %d\n", - chan->channel, ret); + "failed to read sample for channel %lu: %d\n", + chan->address, ret); return ret; } @@ -563,7 +563,7 @@ static int meson_sar_adc_iio_info_read_raw(struct iio_dev *indio_dev, } *val = ret / 1000; - *val2 = priv->data->param->resolution; + *val2 = priv->param->resolution; return IIO_VAL_FRACTIONAL_LOG2; case IIO_CHAN_INFO_CALIBBIAS: @@ -636,7 +636,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) */ meson_sar_adc_set_chan7_mux(indio_dev, CHAN7_MUX_CH7_INPUT); - if (priv->data->param->has_bl30_integration) { + if (priv->param->has_bl30_integration) { /* * leave sampling delay and the input clocks as configured by * BL30 to make sure BL30 gets the values it expects when @@ -716,7 +716,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) return ret; } - ret = clk_set_rate(priv->adc_clk, priv->data->param->clock_rate); + ret = clk_set_rate(priv->adc_clk, priv->param->clock_rate); if (ret) { dev_err(indio_dev->dev.parent, "failed to set adc clock rate\n"); @@ -729,7 +729,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) static void meson_sar_adc_set_bandgap(struct iio_dev *indio_dev, bool on_off) { struct meson_sar_adc_priv *priv = iio_priv(indio_dev); - const struct meson_sar_adc_param *param = priv->data->param; + const struct meson_sar_adc_param *param = priv->param; u32 enable_mask; if (param->bandgap_reg == MESON_SAR_ADC_REG11) @@ -849,13 +849,13 @@ static int meson_sar_adc_calib(struct iio_dev *indio_dev) int ret, nominal0, nominal1, value0, value1; /* use points 25% and 75% for calibration */ - nominal0 = (1 << priv->data->param->resolution) / 4; - nominal1 = (1 << priv->data->param->resolution) * 3 / 4; + nominal0 = (1 << priv->param->resolution) / 4; + nominal1 = (1 << priv->param->resolution) * 3 / 4; meson_sar_adc_set_chan7_mux(indio_dev, CHAN7_MUX_VDD_DIV4); usleep_range(10, 20); ret = meson_sar_adc_get_sample(indio_dev, - &meson_sar_adc_iio_channels[7], + &indio_dev->channels[7], MEAN_AVERAGING, EIGHT_SAMPLES, &value0); if (ret < 0) goto out; @@ -863,7 +863,7 @@ static int meson_sar_adc_calib(struct iio_dev *indio_dev) meson_sar_adc_set_chan7_mux(indio_dev, CHAN7_MUX_VDD_MUL3_DIV4); usleep_range(10, 20); ret = meson_sar_adc_get_sample(indio_dev, - &meson_sar_adc_iio_channels[7], + &indio_dev->channels[7], MEAN_AVERAGING, EIGHT_SAMPLES, &value1); if (ret < 0) goto out; @@ -979,11 +979,11 @@ MODULE_DEVICE_TABLE(of, meson_sar_adc_of_match); static int meson_sar_adc_probe(struct platform_device *pdev) { + const struct meson_sar_adc_data *match_data; struct meson_sar_adc_priv *priv; struct iio_dev *indio_dev; struct resource *res; void __iomem *base; - const struct of_device_id *match; int irq, ret; indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv)); @@ -995,15 +995,15 @@ static int meson_sar_adc_probe(struct platform_device *pdev) priv = iio_priv(indio_dev); init_completion(&priv->done); - match = of_match_device(meson_sar_adc_of_match, &pdev->dev); - if (!match) { - dev_err(&pdev->dev, "failed to match device\n"); + match_data = of_device_get_match_data(&pdev->dev); + if (!match_data) { + dev_err(&pdev->dev, "failed to get match data\n"); return -ENODEV; } - priv->data = match->data; + priv->param = match_data->param; - indio_dev->name = priv->data->name; + indio_dev->name = match_data->name; indio_dev->dev.parent = &pdev->dev; indio_dev->dev.of_node = pdev->dev.of_node; indio_dev->modes = INDIO_DIRECT_MODE; @@ -1027,7 +1027,7 @@ static int meson_sar_adc_probe(struct platform_device *pdev) return ret; priv->regmap = devm_regmap_init_mmio(&pdev->dev, base, - priv->data->param->regmap_config); + priv->param->regmap_config); if (IS_ERR(priv->regmap)) return PTR_ERR(priv->regmap); diff --git a/drivers/iio/adc/qcom-pm8xxx-xoadc.c b/drivers/iio/adc/qcom-pm8xxx-xoadc.c index b093ecddf1a8..c30c002f1fef 100644 --- a/drivers/iio/adc/qcom-pm8xxx-xoadc.c +++ b/drivers/iio/adc/qcom-pm8xxx-xoadc.c @@ -708,8 +708,8 @@ static int pm8xxx_of_xlate(struct iio_dev *indio_dev, * mux. */ if (iiospec->args_count != 2) { - dev_err(&indio_dev->dev, "wrong number of arguments for %s need 2 got %d\n", - iiospec->np->name, + dev_err(&indio_dev->dev, "wrong number of arguments for %pOFn need 2 got %d\n", + iiospec->np, iiospec->args_count); return -EINVAL; } diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c new file mode 100644 index 000000000000..f9af6b082916 --- /dev/null +++ b/drivers/iio/adc/qcom-spmi-adc5.c @@ -0,0 +1,793 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + */ + +#include <linux/bitops.h> +#include <linux/completion.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/iio/iio.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/log2.h> +#include <linux/math64.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/slab.h> + +#include <dt-bindings/iio/qcom,spmi-vadc.h> +#include "qcom-vadc-common.h" + +#define ADC5_USR_REVISION1 0x0 +#define ADC5_USR_STATUS1 0x8 +#define ADC5_USR_STATUS1_REQ_STS BIT(1) +#define ADC5_USR_STATUS1_EOC BIT(0) +#define ADC5_USR_STATUS1_REQ_STS_EOC_MASK 0x3 + +#define ADC5_USR_STATUS2 0x9 +#define ADC5_USR_STATUS2_CONV_SEQ_MASK 0x70 +#define ADC5_USR_STATUS2_CONV_SEQ_MASK_SHIFT 0x5 + +#define ADC5_USR_IBAT_MEAS 0xf +#define ADC5_USR_IBAT_MEAS_SUPPORTED BIT(0) + +#define ADC5_USR_DIG_PARAM 0x42 +#define ADC5_USR_DIG_PARAM_CAL_VAL BIT(6) +#define ADC5_USR_DIG_PARAM_CAL_VAL_SHIFT 6 +#define ADC5_USR_DIG_PARAM_CAL_SEL 0x30 +#define ADC5_USR_DIG_PARAM_CAL_SEL_SHIFT 4 +#define ADC5_USR_DIG_PARAM_DEC_RATIO_SEL 0xc +#define ADC5_USR_DIG_PARAM_DEC_RATIO_SEL_SHIFT 2 + +#define ADC5_USR_FAST_AVG_CTL 0x43 +#define ADC5_USR_FAST_AVG_CTL_EN BIT(7) +#define ADC5_USR_FAST_AVG_CTL_SAMPLES_MASK 0x7 + +#define ADC5_USR_CH_SEL_CTL 0x44 + +#define ADC5_USR_DELAY_CTL 0x45 +#define ADC5_USR_HW_SETTLE_DELAY_MASK 0xf + +#define ADC5_USR_EN_CTL1 0x46 +#define ADC5_USR_EN_CTL1_ADC_EN BIT(7) + +#define ADC5_USR_CONV_REQ 0x47 +#define ADC5_USR_CONV_REQ_REQ BIT(7) + +#define ADC5_USR_DATA0 0x50 + +#define ADC5_USR_DATA1 0x51 + +#define ADC5_USR_IBAT_DATA0 0x52 + +#define ADC5_USR_IBAT_DATA1 0x53 + +/* + * Conversion time varies based on the decimation, clock rate, fast average + * samples and measurements queued across different VADC peripherals. + * Set the timeout to a max of 100ms. + */ +#define ADC5_CONV_TIME_MIN_US 263 +#define ADC5_CONV_TIME_MAX_US 264 +#define ADC5_CONV_TIME_RETRY 400 +#define ADC5_CONV_TIMEOUT msecs_to_jiffies(100) + +/* Digital version >= 5.3 supports hw_settle_2 */ +#define ADC5_HW_SETTLE_DIFF_MINOR 3 +#define ADC5_HW_SETTLE_DIFF_MAJOR 5 + +enum adc5_cal_method { + ADC5_NO_CAL = 0, + ADC5_RATIOMETRIC_CAL, + ADC5_ABSOLUTE_CAL +}; + +enum adc5_cal_val { + ADC5_TIMER_CAL = 0, + ADC5_NEW_CAL +}; + +/** + * struct adc5_channel_prop - ADC channel property. + * @channel: channel number, refer to the channel list. + * @cal_method: calibration method. + * @cal_val: calibration value + * @decimation: sampling rate supported for the channel. + * @prescale: channel scaling performed on the input signal. + * @hw_settle_time: the time between AMUX being configured and the + * start of conversion. + * @avg_samples: ability to provide single result from the ADC + * that is an average of multiple measurements. + * @scale_fn_type: Represents the scaling function to convert voltage + * physical units desired by the client for the channel. + * @datasheet_name: Channel name used in device tree. + */ +struct adc5_channel_prop { + unsigned int channel; + enum adc5_cal_method cal_method; + enum adc5_cal_val cal_val; + unsigned int decimation; + unsigned int prescale; + unsigned int hw_settle_time; + unsigned int avg_samples; + enum vadc_scale_fn_type scale_fn_type; + const char *datasheet_name; +}; + +/** + * struct adc5_chip - ADC private structure. + * @regmap: SPMI ADC5 peripheral register map field. + * @dev: SPMI ADC5 device. + * @base: base address for the ADC peripheral. + * @nchannels: number of ADC channels. + * @chan_props: array of ADC channel properties. + * @iio_chans: array of IIO channels specification. + * @poll_eoc: use polling instead of interrupt. + * @complete: ADC result notification after interrupt is received. + * @lock: ADC lock for access to the peripheral. + * @data: software configuration data. + */ +struct adc5_chip { + struct regmap *regmap; + struct device *dev; + u16 base; + unsigned int nchannels; + struct adc5_channel_prop *chan_props; + struct iio_chan_spec *iio_chans; + bool poll_eoc; + struct completion complete; + struct mutex lock; + const struct adc5_data *data; +}; + +static const struct vadc_prescale_ratio adc5_prescale_ratios[] = { + {.num = 1, .den = 1}, + {.num = 1, .den = 3}, + {.num = 1, .den = 4}, + {.num = 1, .den = 6}, + {.num = 1, .den = 20}, + {.num = 1, .den = 8}, + {.num = 10, .den = 81}, + {.num = 1, .den = 10}, + {.num = 1, .den = 16} +}; + +static int adc5_read(struct adc5_chip *adc, u16 offset, u8 *data, int len) +{ + return regmap_bulk_read(adc->regmap, adc->base + offset, data, len); +} + +static int adc5_write(struct adc5_chip *adc, u16 offset, u8 *data, int len) +{ + return regmap_bulk_write(adc->regmap, adc->base + offset, data, len); +} + +static int adc5_prescaling_from_dt(u32 num, u32 den) +{ + unsigned int pre; + + for (pre = 0; pre < ARRAY_SIZE(adc5_prescale_ratios); pre++) + if (adc5_prescale_ratios[pre].num == num && + adc5_prescale_ratios[pre].den == den) + break; + + if (pre == ARRAY_SIZE(adc5_prescale_ratios)) + return -EINVAL; + + return pre; +} + +static int adc5_hw_settle_time_from_dt(u32 value, + const unsigned int *hw_settle) +{ + unsigned int i; + + for (i = 0; i < VADC_HW_SETTLE_SAMPLES_MAX; i++) { + if (value == hw_settle[i]) + return i; + } + + return -EINVAL; +} + +static int adc5_avg_samples_from_dt(u32 value) +{ + if (!is_power_of_2(value) || value > ADC5_AVG_SAMPLES_MAX) + return -EINVAL; + + return __ffs(value); +} + +static int adc5_decimation_from_dt(u32 value, + const unsigned int *decimation) +{ + unsigned int i; + + for (i = 0; i < ADC5_DECIMATION_SAMPLES_MAX; i++) { + if (value == decimation[i]) + return i; + } + + return -EINVAL; +} + +static int adc5_read_voltage_data(struct adc5_chip *adc, u16 *data) +{ + int ret; + u8 rslt_lsb, rslt_msb; + + ret = adc5_read(adc, ADC5_USR_DATA0, &rslt_lsb, sizeof(rslt_lsb)); + if (ret) + return ret; + + ret = adc5_read(adc, ADC5_USR_DATA1, &rslt_msb, sizeof(rslt_lsb)); + if (ret) + return ret; + + *data = (rslt_msb << 8) | rslt_lsb; + + if (*data == ADC5_USR_DATA_CHECK) { + pr_err("Invalid data:0x%x\n", *data); + return -EINVAL; + } + + pr_debug("voltage raw code:0x%x\n", *data); + + return 0; +} + +static int adc5_poll_wait_eoc(struct adc5_chip *adc) +{ + unsigned int count, retry = ADC5_CONV_TIME_RETRY; + u8 status1; + int ret; + + for (count = 0; count < retry; count++) { + ret = adc5_read(adc, ADC5_USR_STATUS1, &status1, + sizeof(status1)); + if (ret) + return ret; + + status1 &= ADC5_USR_STATUS1_REQ_STS_EOC_MASK; + if (status1 == ADC5_USR_STATUS1_EOC) + return 0; + + usleep_range(ADC5_CONV_TIME_MIN_US, ADC5_CONV_TIME_MAX_US); + } + + return -ETIMEDOUT; +} + +static void adc5_update_dig_param(struct adc5_chip *adc, + struct adc5_channel_prop *prop, u8 *data) +{ + /* Update calibration value */ + *data &= ~ADC5_USR_DIG_PARAM_CAL_VAL; + *data |= (prop->cal_val << ADC5_USR_DIG_PARAM_CAL_VAL_SHIFT); + + /* Update calibration select */ + *data &= ~ADC5_USR_DIG_PARAM_CAL_SEL; + *data |= (prop->cal_method << ADC5_USR_DIG_PARAM_CAL_SEL_SHIFT); + + /* Update decimation ratio select */ + *data &= ~ADC5_USR_DIG_PARAM_DEC_RATIO_SEL; + *data |= (prop->decimation << ADC5_USR_DIG_PARAM_DEC_RATIO_SEL_SHIFT); +} + +static int adc5_configure(struct adc5_chip *adc, + struct adc5_channel_prop *prop) +{ + int ret; + u8 buf[6]; + + /* Read registers 0x42 through 0x46 */ + ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf)); + if (ret < 0) + return ret; + + /* Digital param selection */ + adc5_update_dig_param(adc, prop, &buf[0]); + + /* Update fast average sample value */ + buf[1] &= (u8) ~ADC5_USR_FAST_AVG_CTL_SAMPLES_MASK; + buf[1] |= prop->avg_samples; + + /* Select ADC channel */ + buf[2] = prop->channel; + + /* Select HW settle delay for channel */ + buf[3] &= (u8) ~ADC5_USR_HW_SETTLE_DELAY_MASK; + buf[3] |= prop->hw_settle_time; + + /* Select ADC enable */ + buf[4] |= ADC5_USR_EN_CTL1_ADC_EN; + + /* Select CONV request */ + buf[5] |= ADC5_USR_CONV_REQ_REQ; + + if (!adc->poll_eoc) + reinit_completion(&adc->complete); + + return adc5_write(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf)); +} + +static int adc5_do_conversion(struct adc5_chip *adc, + struct adc5_channel_prop *prop, + struct iio_chan_spec const *chan, + u16 *data_volt, u16 *data_cur) +{ + int ret; + + mutex_lock(&adc->lock); + + ret = adc5_configure(adc, prop); + if (ret) { + pr_err("ADC configure failed with %d\n", ret); + goto unlock; + } + + if (adc->poll_eoc) { + ret = adc5_poll_wait_eoc(adc); + if (ret < 0) { + pr_err("EOC bit not set\n"); + goto unlock; + } + } else { + ret = wait_for_completion_timeout(&adc->complete, + ADC5_CONV_TIMEOUT); + if (!ret) { + pr_debug("Did not get completion timeout.\n"); + ret = adc5_poll_wait_eoc(adc); + if (ret < 0) { + pr_err("EOC bit not set\n"); + goto unlock; + } + } + } + + ret = adc5_read_voltage_data(adc, data_volt); +unlock: + mutex_unlock(&adc->lock); + + return ret; +} + +static irqreturn_t adc5_isr(int irq, void *dev_id) +{ + struct adc5_chip *adc = dev_id; + + complete(&adc->complete); + + return IRQ_HANDLED; +} + +static int adc5_of_xlate(struct iio_dev *indio_dev, + const struct of_phandle_args *iiospec) +{ + struct adc5_chip *adc = iio_priv(indio_dev); + int i; + + for (i = 0; i < adc->nchannels; i++) + if (adc->chan_props[i].channel == iiospec->args[0]) + return i; + + return -EINVAL; +} + +static int adc5_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, int *val2, + long mask) +{ + struct adc5_chip *adc = iio_priv(indio_dev); + struct adc5_channel_prop *prop; + u16 adc_code_volt, adc_code_cur; + int ret; + + prop = &adc->chan_props[chan->address]; + + switch (mask) { + case IIO_CHAN_INFO_PROCESSED: + ret = adc5_do_conversion(adc, prop, chan, + &adc_code_volt, &adc_code_cur); + if (ret) + return ret; + + ret = qcom_adc5_hw_scale(prop->scale_fn_type, + &adc5_prescale_ratios[prop->prescale], + adc->data, + adc_code_volt, val); + if (ret) + return ret; + + return IIO_VAL_INT; + default: + return -EINVAL; + } + + return 0; +} + +static const struct iio_info adc5_info = { + .read_raw = adc5_read_raw, + .of_xlate = adc5_of_xlate, +}; + +struct adc5_channels { + const char *datasheet_name; + unsigned int prescale_index; + enum iio_chan_type type; + long info_mask; + enum vadc_scale_fn_type scale_fn_type; +}; + +#define ADC5_CHAN(_dname, _type, _mask, _pre, _scale) \ + { \ + .datasheet_name = _dname, \ + .prescale_index = _pre, \ + .type = _type, \ + .info_mask = _mask, \ + .scale_fn_type = _scale, \ + }, \ + +#define ADC5_CHAN_TEMP(_dname, _pre, _scale) \ + ADC5_CHAN(_dname, IIO_TEMP, \ + BIT(IIO_CHAN_INFO_PROCESSED), \ + _pre, _scale) \ + +#define ADC5_CHAN_VOLT(_dname, _pre, _scale) \ + ADC5_CHAN(_dname, IIO_VOLTAGE, \ + BIT(IIO_CHAN_INFO_PROCESSED), \ + _pre, _scale) \ + +static const struct adc5_channels adc5_chans_pmic[ADC5_MAX_CHANNEL] = { + [ADC5_REF_GND] = ADC5_CHAN_VOLT("ref_gnd", 1, + SCALE_HW_CALIB_DEFAULT) + [ADC5_1P25VREF] = ADC5_CHAN_VOLT("vref_1p25", 1, + SCALE_HW_CALIB_DEFAULT) + [ADC5_VPH_PWR] = ADC5_CHAN_VOLT("vph_pwr", 3, + SCALE_HW_CALIB_DEFAULT) + [ADC5_VBAT_SNS] = ADC5_CHAN_VOLT("vbat_sns", 3, + SCALE_HW_CALIB_DEFAULT) + [ADC5_DIE_TEMP] = ADC5_CHAN_TEMP("die_temp", 1, + SCALE_HW_CALIB_PMIC_THERM) + [ADC5_USB_IN_I] = ADC5_CHAN_VOLT("usb_in_i_uv", 1, + SCALE_HW_CALIB_DEFAULT) + [ADC5_USB_IN_V_16] = ADC5_CHAN_VOLT("usb_in_v_div_16", 16, + SCALE_HW_CALIB_DEFAULT) + [ADC5_CHG_TEMP] = ADC5_CHAN_TEMP("chg_temp", 1, + SCALE_HW_CALIB_PM5_CHG_TEMP) + /* Charger prescales SBUx and MID_CHG to fit within 1.8V upper unit */ + [ADC5_SBUx] = ADC5_CHAN_VOLT("chg_sbux", 3, + SCALE_HW_CALIB_DEFAULT) + [ADC5_MID_CHG_DIV6] = ADC5_CHAN_VOLT("chg_mid_chg", 6, + SCALE_HW_CALIB_DEFAULT) + [ADC5_XO_THERM_100K_PU] = ADC5_CHAN_TEMP("xo_therm", 1, + SCALE_HW_CALIB_XOTHERM) + [ADC5_AMUX_THM1_100K_PU] = ADC5_CHAN_TEMP("amux_thm1_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_AMUX_THM2_100K_PU] = ADC5_CHAN_TEMP("amux_thm2_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_AMUX_THM3_100K_PU] = ADC5_CHAN_TEMP("amux_thm3_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_AMUX_THM2] = ADC5_CHAN_TEMP("amux_thm2", 1, + SCALE_HW_CALIB_PM5_SMB_TEMP) +}; + +static const struct adc5_channels adc5_chans_rev2[ADC5_MAX_CHANNEL] = { + [ADC5_REF_GND] = ADC5_CHAN_VOLT("ref_gnd", 1, + SCALE_HW_CALIB_DEFAULT) + [ADC5_1P25VREF] = ADC5_CHAN_VOLT("vref_1p25", 1, + SCALE_HW_CALIB_DEFAULT) + [ADC5_VPH_PWR] = ADC5_CHAN_VOLT("vph_pwr", 3, + SCALE_HW_CALIB_DEFAULT) + [ADC5_VBAT_SNS] = ADC5_CHAN_VOLT("vbat_sns", 3, + SCALE_HW_CALIB_DEFAULT) + [ADC5_VCOIN] = ADC5_CHAN_VOLT("vcoin", 3, + SCALE_HW_CALIB_DEFAULT) + [ADC5_DIE_TEMP] = ADC5_CHAN_TEMP("die_temp", 1, + SCALE_HW_CALIB_PMIC_THERM) + [ADC5_AMUX_THM1_100K_PU] = ADC5_CHAN_TEMP("amux_thm1_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_AMUX_THM2_100K_PU] = ADC5_CHAN_TEMP("amux_thm2_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_AMUX_THM3_100K_PU] = ADC5_CHAN_TEMP("amux_thm3_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_AMUX_THM4_100K_PU] = ADC5_CHAN_TEMP("amux_thm4_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_AMUX_THM5_100K_PU] = ADC5_CHAN_TEMP("amux_thm5_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_XO_THERM_100K_PU] = ADC5_CHAN_TEMP("xo_therm_100k_pu", 1, + SCALE_HW_CALIB_THERM_100K_PULLUP) +}; + +static int adc5_get_dt_channel_data(struct adc5_chip *adc, + struct adc5_channel_prop *prop, + struct device_node *node, + const struct adc5_data *data) +{ + const char *name = node->name, *channel_name; + u32 chan, value, varr[2]; + int ret; + struct device *dev = adc->dev; + + ret = of_property_read_u32(node, "reg", &chan); + if (ret) { + dev_err(dev, "invalid channel number %s\n", name); + return ret; + } + + if (chan > ADC5_PARALLEL_ISENSE_VBAT_IDATA || + !data->adc_chans[chan].datasheet_name) { + dev_err(dev, "%s invalid channel number %d\n", name, chan); + return -EINVAL; + } + + /* the channel has DT description */ + prop->channel = chan; + + channel_name = of_get_property(node, + "label", NULL) ? : node->name; + if (!channel_name) { + pr_err("Invalid channel name\n"); + return -EINVAL; + } + prop->datasheet_name = channel_name; + + ret = of_property_read_u32(node, "qcom,decimation", &value); + if (!ret) { + ret = adc5_decimation_from_dt(value, data->decimation); + if (ret < 0) { + dev_err(dev, "%02x invalid decimation %d\n", + chan, value); + return ret; + } + prop->decimation = ret; + } else { + prop->decimation = ADC5_DECIMATION_DEFAULT; + } + + ret = of_property_read_u32_array(node, "qcom,pre-scaling", varr, 2); + if (!ret) { + ret = adc5_prescaling_from_dt(varr[0], varr[1]); + if (ret < 0) { + dev_err(dev, "%02x invalid pre-scaling <%d %d>\n", + chan, varr[0], varr[1]); + return ret; + } + prop->prescale = ret; + } + + ret = of_property_read_u32(node, "qcom,hw-settle-time", &value); + if (!ret) { + u8 dig_version[2]; + + ret = adc5_read(adc, ADC5_USR_REVISION1, dig_version, + sizeof(dig_version)); + if (ret < 0) { + dev_err(dev, "Invalid dig version read %d\n", ret); + return ret; + } + + pr_debug("dig_ver:minor:%d, major:%d\n", dig_version[0], + dig_version[1]); + /* Digital controller >= 5.3 have hw_settle_2 option */ + if (dig_version[0] >= ADC5_HW_SETTLE_DIFF_MINOR && + dig_version[1] >= ADC5_HW_SETTLE_DIFF_MAJOR) + ret = adc5_hw_settle_time_from_dt(value, + data->hw_settle_2); + else + ret = adc5_hw_settle_time_from_dt(value, + data->hw_settle_1); + + if (ret < 0) { + dev_err(dev, "%02x invalid hw-settle-time %d us\n", + chan, value); + return ret; + } + prop->hw_settle_time = ret; + } else { + prop->hw_settle_time = VADC_DEF_HW_SETTLE_TIME; + } + + ret = of_property_read_u32(node, "qcom,avg-samples", &value); + if (!ret) { + ret = adc5_avg_samples_from_dt(value); + if (ret < 0) { + dev_err(dev, "%02x invalid avg-samples %d\n", + chan, value); + return ret; + } + prop->avg_samples = ret; + } else { + prop->avg_samples = VADC_DEF_AVG_SAMPLES; + } + + if (of_property_read_bool(node, "qcom,ratiometric")) + prop->cal_method = ADC5_RATIOMETRIC_CAL; + else + prop->cal_method = ADC5_ABSOLUTE_CAL; + + /* + * Default to using timer calibration. Using a fresh calibration value + * for every conversion will increase the overall time for a request. + */ + prop->cal_val = ADC5_TIMER_CAL; + + dev_dbg(dev, "%02x name %s\n", chan, name); + + return 0; +} + +static const struct adc5_data adc5_data_pmic = { + .full_scale_code_volt = 0x70e4, + .full_scale_code_cur = 0x2710, + .adc_chans = adc5_chans_pmic, + .decimation = (unsigned int [ADC5_DECIMATION_SAMPLES_MAX]) + {250, 420, 840}, + .hw_settle_1 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX]) + {15, 100, 200, 300, 400, 500, 600, 700, + 800, 900, 1, 2, 4, 6, 8, 10}, + .hw_settle_2 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX]) + {15, 100, 200, 300, 400, 500, 600, 700, + 1, 2, 4, 8, 16, 32, 64, 128}, +}; + +static const struct adc5_data adc5_data_pmic_rev2 = { + .full_scale_code_volt = 0x4000, + .full_scale_code_cur = 0x1800, + .adc_chans = adc5_chans_rev2, + .decimation = (unsigned int [ADC5_DECIMATION_SAMPLES_MAX]) + {256, 512, 1024}, + .hw_settle_1 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX]) + {0, 100, 200, 300, 400, 500, 600, 700, + 800, 900, 1, 2, 4, 6, 8, 10}, + .hw_settle_2 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX]) + {15, 100, 200, 300, 400, 500, 600, 700, + 1, 2, 4, 8, 16, 32, 64, 128}, +}; + +static const struct of_device_id adc5_match_table[] = { + { + .compatible = "qcom,spmi-adc5", + .data = &adc5_data_pmic, + }, + { + .compatible = "qcom,spmi-adc-rev2", + .data = &adc5_data_pmic_rev2, + }, + { } +}; + +static int adc5_get_dt_data(struct adc5_chip *adc, struct device_node *node) +{ + const struct adc5_channels *adc_chan; + struct iio_chan_spec *iio_chan; + struct adc5_channel_prop prop, *chan_props; + struct device_node *child; + unsigned int index = 0; + const struct of_device_id *id; + const struct adc5_data *data; + int ret; + + adc->nchannels = of_get_available_child_count(node); + if (!adc->nchannels) + return -EINVAL; + + adc->iio_chans = devm_kcalloc(adc->dev, adc->nchannels, + sizeof(*adc->iio_chans), GFP_KERNEL); + if (!adc->iio_chans) + return -ENOMEM; + + adc->chan_props = devm_kcalloc(adc->dev, adc->nchannels, + sizeof(*adc->chan_props), GFP_KERNEL); + if (!adc->chan_props) + return -ENOMEM; + + chan_props = adc->chan_props; + iio_chan = adc->iio_chans; + id = of_match_node(adc5_match_table, node); + if (id) + data = id->data; + else + data = &adc5_data_pmic; + adc->data = data; + + for_each_available_child_of_node(node, child) { + ret = adc5_get_dt_channel_data(adc, &prop, child, data); + if (ret) { + of_node_put(child); + return ret; + } + + prop.scale_fn_type = + data->adc_chans[prop.channel].scale_fn_type; + *chan_props = prop; + adc_chan = &data->adc_chans[prop.channel]; + + iio_chan->channel = prop.channel; + iio_chan->datasheet_name = prop.datasheet_name; + iio_chan->extend_name = prop.datasheet_name; + iio_chan->info_mask_separate = adc_chan->info_mask; + iio_chan->type = adc_chan->type; + iio_chan->address = index; + iio_chan++; + chan_props++; + index++; + } + + return 0; +} + +static int adc5_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + struct device *dev = &pdev->dev; + struct iio_dev *indio_dev; + struct adc5_chip *adc; + struct regmap *regmap; + int ret, irq_eoc; + u32 reg; + + regmap = dev_get_regmap(dev->parent, NULL); + if (!regmap) + return -ENODEV; + + ret = of_property_read_u32(node, "reg", ®); + if (ret < 0) + return ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); + if (!indio_dev) + return -ENOMEM; + + adc = iio_priv(indio_dev); + adc->regmap = regmap; + adc->dev = dev; + adc->base = reg; + init_completion(&adc->complete); + mutex_init(&adc->lock); + + ret = adc5_get_dt_data(adc, node); + if (ret) { + pr_err("adc get dt data failed\n"); + return ret; + } + + irq_eoc = platform_get_irq(pdev, 0); + if (irq_eoc < 0) { + if (irq_eoc == -EPROBE_DEFER || irq_eoc == -EINVAL) + return irq_eoc; + adc->poll_eoc = true; + } else { + ret = devm_request_irq(dev, irq_eoc, adc5_isr, 0, + "pm-adc5", adc); + if (ret) + return ret; + } + + indio_dev->dev.parent = dev; + indio_dev->dev.of_node = node; + indio_dev->name = pdev->name; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = &adc5_info; + indio_dev->channels = adc->iio_chans; + indio_dev->num_channels = adc->nchannels; + + return devm_iio_device_register(dev, indio_dev); +} + +static struct platform_driver adc5_driver = { + .driver = { + .name = "qcom-spmi-adc5.c", + .of_match_table = adc5_match_table, + }, + .probe = adc5_probe, +}; +module_platform_driver(adc5_driver); + +MODULE_ALIAS("platform:qcom-spmi-adc5"); +MODULE_DESCRIPTION("Qualcomm Technologies Inc. PMIC5 ADC driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c index fe3d7826783c..dcd7fb5b9fb2 100644 --- a/drivers/iio/adc/qcom-vadc-common.c +++ b/drivers/iio/adc/qcom-vadc-common.c @@ -47,8 +47,79 @@ static const struct vadc_map_pt adcmap_100k_104ef_104fb[] = { {44, 125} }; +/* + * Voltage to temperature table for 100k pull up for NTCG104EF104 with + * 1.875V reference. + */ +static const struct vadc_map_pt adcmap_100k_104ef_104fb_1875_vref[] = { + { 1831, -40000 }, + { 1814, -35000 }, + { 1791, -30000 }, + { 1761, -25000 }, + { 1723, -20000 }, + { 1675, -15000 }, + { 1616, -10000 }, + { 1545, -5000 }, + { 1463, 0 }, + { 1370, 5000 }, + { 1268, 10000 }, + { 1160, 15000 }, + { 1049, 20000 }, + { 937, 25000 }, + { 828, 30000 }, + { 726, 35000 }, + { 630, 40000 }, + { 544, 45000 }, + { 467, 50000 }, + { 399, 55000 }, + { 340, 60000 }, + { 290, 65000 }, + { 247, 70000 }, + { 209, 75000 }, + { 179, 80000 }, + { 153, 85000 }, + { 130, 90000 }, + { 112, 95000 }, + { 96, 100000 }, + { 82, 105000 }, + { 71, 110000 }, + { 62, 115000 }, + { 53, 120000 }, + { 46, 125000 }, +}; + +static int qcom_vadc_scale_hw_calib_volt( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_uv); +static int qcom_vadc_scale_hw_calib_therm( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec); +static int qcom_vadc_scale_hw_smb_temp( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec); +static int qcom_vadc_scale_hw_chg5_temp( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec); +static int qcom_vadc_scale_hw_calib_die_temp( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec); + +static struct qcom_adc5_scale_type scale_adc5_fn[] = { + [SCALE_HW_CALIB_DEFAULT] = {qcom_vadc_scale_hw_calib_volt}, + [SCALE_HW_CALIB_THERM_100K_PULLUP] = {qcom_vadc_scale_hw_calib_therm}, + [SCALE_HW_CALIB_XOTHERM] = {qcom_vadc_scale_hw_calib_therm}, + [SCALE_HW_CALIB_PMIC_THERM] = {qcom_vadc_scale_hw_calib_die_temp}, + [SCALE_HW_CALIB_PM5_CHG_TEMP] = {qcom_vadc_scale_hw_chg5_temp}, + [SCALE_HW_CALIB_PM5_SMB_TEMP] = {qcom_vadc_scale_hw_smb_temp}, +}; + static int qcom_vadc_map_voltage_temp(const struct vadc_map_pt *pts, - u32 tablesize, s32 input, s64 *output) + u32 tablesize, s32 input, int *output) { bool descending = 1; u32 i = 0; @@ -128,7 +199,7 @@ static int qcom_vadc_scale_therm(const struct vadc_linear_graph *calib_graph, bool absolute, u16 adc_code, int *result_mdec) { - s64 voltage = 0, result = 0; + s64 voltage = 0; int ret; qcom_vadc_scale_calib(calib_graph, adc_code, absolute, &voltage); @@ -138,12 +209,11 @@ static int qcom_vadc_scale_therm(const struct vadc_linear_graph *calib_graph, ret = qcom_vadc_map_voltage_temp(adcmap_100k_104ef_104fb, ARRAY_SIZE(adcmap_100k_104ef_104fb), - voltage, &result); + voltage, result_mdec); if (ret) return ret; - result *= 1000; - *result_mdec = result; + *result_mdec *= 1000; return 0; } @@ -191,6 +261,99 @@ static int qcom_vadc_scale_chg_temp(const struct vadc_linear_graph *calib_graph, return 0; } +static int qcom_vadc_scale_code_voltage_factor(u16 adc_code, + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + unsigned int factor) +{ + s64 voltage, temp, adc_vdd_ref_mv = 1875; + + /* + * The normal data range is between 0V to 1.875V. On cases where + * we read low voltage values, the ADC code can go beyond the + * range and the scale result is incorrect so we clamp the values + * for the cases where the code represents a value below 0V + */ + if (adc_code > VADC5_MAX_CODE) + adc_code = 0; + + /* (ADC code * vref_vadc (1.875V)) / full_scale_code */ + voltage = (s64) adc_code * adc_vdd_ref_mv * 1000; + voltage = div64_s64(voltage, data->full_scale_code_volt); + if (voltage > 0) { + voltage *= prescale->den; + temp = prescale->num * factor; + voltage = div64_s64(voltage, temp); + } else { + voltage = 0; + } + + return (int) voltage; +} + +static int qcom_vadc_scale_hw_calib_volt( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_uv) +{ + *result_uv = qcom_vadc_scale_code_voltage_factor(adc_code, + prescale, data, 1); + + return 0; +} + +static int qcom_vadc_scale_hw_calib_therm( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec) +{ + int voltage; + + voltage = qcom_vadc_scale_code_voltage_factor(adc_code, + prescale, data, 1000); + + /* Map voltage to temperature from look-up table */ + return qcom_vadc_map_voltage_temp(adcmap_100k_104ef_104fb_1875_vref, + ARRAY_SIZE(adcmap_100k_104ef_104fb_1875_vref), + voltage, result_mdec); +} + +static int qcom_vadc_scale_hw_calib_die_temp( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec) +{ + *result_mdec = qcom_vadc_scale_code_voltage_factor(adc_code, + prescale, data, 2); + *result_mdec -= KELVINMIL_CELSIUSMIL; + + return 0; +} + +static int qcom_vadc_scale_hw_smb_temp( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec) +{ + *result_mdec = qcom_vadc_scale_code_voltage_factor(adc_code * 100, + prescale, data, PMIC5_SMB_TEMP_SCALE_FACTOR); + *result_mdec = PMIC5_SMB_TEMP_CONSTANT - *result_mdec; + + return 0; +} + +static int qcom_vadc_scale_hw_chg5_temp( + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec) +{ + *result_mdec = qcom_vadc_scale_code_voltage_factor(adc_code, + prescale, data, 4); + *result_mdec = PMIC5_CHG_TEMP_SCALE_FACTOR - *result_mdec; + + return 0; +} + int qcom_vadc_scale(enum vadc_scale_fn_type scaletype, const struct vadc_linear_graph *calib_graph, const struct vadc_prescale_ratio *prescale, @@ -221,6 +384,22 @@ int qcom_vadc_scale(enum vadc_scale_fn_type scaletype, } EXPORT_SYMBOL(qcom_vadc_scale); +int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype, + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result) +{ + if (!(scaletype >= SCALE_HW_CALIB_DEFAULT && + scaletype < SCALE_HW_CALIB_INVALID)) { + pr_err("Invalid scale type %d\n", scaletype); + return -EINVAL; + } + + return scale_adc5_fn[scaletype].scale_fn(prescale, data, + adc_code, result); +} +EXPORT_SYMBOL(qcom_adc5_hw_scale); + int qcom_vadc_decimation_from_dt(u32 value) { if (!is_power_of_2(value) || value < VADC_DECIMATION_MIN || diff --git a/drivers/iio/adc/qcom-vadc-common.h b/drivers/iio/adc/qcom-vadc-common.h index 1d5354ff5c72..bbb1fa02b382 100644 --- a/drivers/iio/adc/qcom-vadc-common.h +++ b/drivers/iio/adc/qcom-vadc-common.h @@ -25,15 +25,31 @@ #define VADC_DECIMATION_MIN 512 #define VADC_DECIMATION_MAX 4096 +#define ADC5_DEF_VBAT_PRESCALING 1 /* 1:3 */ +#define ADC5_DECIMATION_SHORT 250 +#define ADC5_DECIMATION_MEDIUM 420 +#define ADC5_DECIMATION_LONG 840 +/* Default decimation - 1024 for rev2, 840 for pmic5 */ +#define ADC5_DECIMATION_DEFAULT 2 +#define ADC5_DECIMATION_SAMPLES_MAX 3 #define VADC_HW_SETTLE_DELAY_MAX 10000 +#define VADC_HW_SETTLE_SAMPLES_MAX 16 #define VADC_AVG_SAMPLES_MAX 512 +#define ADC5_AVG_SAMPLES_MAX 16 #define KELVINMIL_CELSIUSMIL 273150 +#define PMIC5_CHG_TEMP_SCALE_FACTOR 377500 +#define PMIC5_SMB_TEMP_CONSTANT 419400 +#define PMIC5_SMB_TEMP_SCALE_FACTOR 356 #define PMI_CHG_SCALE_1 -138890 #define PMI_CHG_SCALE_2 391750000000LL +#define VADC5_MAX_CODE 0x7fff +#define ADC5_FULL_SCALE_CODE 0x70e4 +#define ADC5_USR_DATA_CHECK 0x8000 + /** * struct vadc_map_pt - Map the graph representation for ADC channel * @x: Represent the ADC digitized code. @@ -89,6 +105,18 @@ struct vadc_prescale_ratio { * SCALE_PMIC_THERM: Returns result in milli degree's Centigrade. * SCALE_XOTHERM: Returns XO thermistor voltage in millidegC. * SCALE_PMI_CHG_TEMP: Conversion for PMI CHG temp + * SCALE_HW_CALIB_DEFAULT: Default scaling to convert raw adc code to + * voltage (uV) with hardware applied offset/slope values to adc code. + * SCALE_HW_CALIB_THERM_100K_PULLUP: Returns temperature in millidegC using + * lookup table. The hardware applies offset/slope to adc code. + * SCALE_HW_CALIB_XOTHERM: Returns XO thermistor voltage in millidegC using + * 100k pullup. The hardware applies offset/slope to adc code. + * SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade. + * The hardware applies offset/slope to adc code. + * SCALE_HW_CALIB_PM5_CHG_TEMP: Returns result in millidegrees for PMIC5 + * charger temperature. + * SCALE_HW_CALIB_PM5_SMB_TEMP: Returns result in millidegrees for PMIC5 + * SMB1390 temperature. */ enum vadc_scale_fn_type { SCALE_DEFAULT = 0, @@ -96,6 +124,22 @@ enum vadc_scale_fn_type { SCALE_PMIC_THERM, SCALE_XOTHERM, SCALE_PMI_CHG_TEMP, + SCALE_HW_CALIB_DEFAULT, + SCALE_HW_CALIB_THERM_100K_PULLUP, + SCALE_HW_CALIB_XOTHERM, + SCALE_HW_CALIB_PMIC_THERM, + SCALE_HW_CALIB_PM5_CHG_TEMP, + SCALE_HW_CALIB_PM5_SMB_TEMP, + SCALE_HW_CALIB_INVALID, +}; + +struct adc5_data { + const u32 full_scale_code_volt; + const u32 full_scale_code_cur; + const struct adc5_channels *adc_chans; + unsigned int *decimation; + unsigned int *hw_settle_1; + unsigned int *hw_settle_2; }; int qcom_vadc_scale(enum vadc_scale_fn_type scaletype, @@ -104,6 +148,16 @@ int qcom_vadc_scale(enum vadc_scale_fn_type scaletype, bool absolute, u16 adc_code, int *result_mdec); +struct qcom_adc5_scale_type { + int (*scale_fn)(const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, u16 adc_code, int *result); +}; + +int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype, + const struct vadc_prescale_ratio *prescale, + const struct adc5_data *data, + u16 adc_code, int *result_mdec); + int qcom_vadc_decimation_from_dt(u32 value); #endif /* QCOM_VADC_COMMON_H */ diff --git a/drivers/iio/adc/rcar-gyroadc.c b/drivers/iio/adc/rcar-gyroadc.c index dcb50172186f..4e982b51bcda 100644 --- a/drivers/iio/adc/rcar-gyroadc.c +++ b/drivers/iio/adc/rcar-gyroadc.c @@ -343,8 +343,8 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev) for_each_child_of_node(np, child) { of_id = of_match_node(rcar_gyroadc_child_match, child); if (!of_id) { - dev_err(dev, "Ignoring unsupported ADC \"%s\".", - child->name); + dev_err(dev, "Ignoring unsupported ADC \"%pOFn\".", + child); continue; } @@ -381,16 +381,16 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev) ret = of_property_read_u32(child, "reg", ®); if (ret) { dev_err(dev, - "Failed to get child reg property of ADC \"%s\".\n", - child->name); + "Failed to get child reg property of ADC \"%pOFn\".\n", + child); return ret; } /* Channel number is too high. */ if (reg >= num_channels) { dev_err(dev, - "Only %i channels supported with %s, but reg = <%i>.\n", - num_channels, child->name, reg); + "Only %i channels supported with %pOFn, but reg = <%i>.\n", + num_channels, child, reg); return ret; } } diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c index 2b60efea0c39..7940b23dcad9 100644 --- a/drivers/iio/adc/sc27xx_adc.c +++ b/drivers/iio/adc/sc27xx_adc.c @@ -5,10 +5,12 @@ #include <linux/iio/iio.h> #include <linux/interrupt.h> #include <linux/module.h> +#include <linux/nvmem-consumer.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/regmap.h> +#include <linux/slab.h> /* PMIC global registers definition */ #define SC27XX_MODULE_EN 0xc08 @@ -87,16 +89,73 @@ struct sc27xx_adc_linear_graph { * should use the small-scale graph, and if more than 1.2v, we should use the * big-scale graph. */ -static const struct sc27xx_adc_linear_graph big_scale_graph = { +static struct sc27xx_adc_linear_graph big_scale_graph = { 4200, 3310, 3600, 2832, }; -static const struct sc27xx_adc_linear_graph small_scale_graph = { +static struct sc27xx_adc_linear_graph small_scale_graph = { 1000, 3413, 100, 341, }; +static const struct sc27xx_adc_linear_graph big_scale_graph_calib = { + 4200, 856, + 3600, 733, +}; + +static const struct sc27xx_adc_linear_graph small_scale_graph_calib = { + 1000, 833, + 100, 80, +}; + +static int sc27xx_adc_get_calib_data(u32 calib_data, int calib_adc) +{ + return ((calib_data & 0xff) + calib_adc - 128) * 4; +} + +static int sc27xx_adc_scale_calibration(struct sc27xx_adc_data *data, + bool big_scale) +{ + const struct sc27xx_adc_linear_graph *calib_graph; + struct sc27xx_adc_linear_graph *graph; + struct nvmem_cell *cell; + const char *cell_name; + u32 calib_data = 0; + void *buf; + size_t len; + + if (big_scale) { + calib_graph = &big_scale_graph_calib; + graph = &big_scale_graph; + cell_name = "big_scale_calib"; + } else { + calib_graph = &small_scale_graph_calib; + graph = &small_scale_graph; + cell_name = "small_scale_calib"; + } + + cell = nvmem_cell_get(data->dev, cell_name); + if (IS_ERR(cell)) + return PTR_ERR(cell); + + buf = nvmem_cell_read(cell, &len); + nvmem_cell_put(cell); + + if (IS_ERR(buf)) + return PTR_ERR(buf); + + memcpy(&calib_data, buf, min(len, sizeof(u32))); + + /* Only need to calibrate the adc values in the linear graph. */ + graph->adc0 = sc27xx_adc_get_calib_data(calib_data, calib_graph->adc0); + graph->adc1 = sc27xx_adc_get_calib_data(calib_data >> 8, + calib_graph->adc1); + + kfree(buf); + return 0; +} + static int sc27xx_adc_get_ratio(int channel, int scale) { switch (channel) { @@ -209,7 +268,7 @@ static void sc27xx_adc_volt_ratio(struct sc27xx_adc_data *data, *div_denominator = ratio & SC27XX_RATIO_DENOMINATOR_MASK; } -static int sc27xx_adc_to_volt(const struct sc27xx_adc_linear_graph *graph, +static int sc27xx_adc_to_volt(struct sc27xx_adc_linear_graph *graph, int raw_adc) { int tmp; @@ -273,6 +332,17 @@ static int sc27xx_adc_read_raw(struct iio_dev *indio_dev, int ret, tmp; switch (mask) { + case IIO_CHAN_INFO_RAW: + mutex_lock(&indio_dev->mlock); + ret = sc27xx_adc_read(data, chan->channel, scale, &tmp); + mutex_unlock(&indio_dev->mlock); + + if (ret) + return ret; + + *val = tmp; + return IIO_VAL_INT; + case IIO_CHAN_INFO_PROCESSED: mutex_lock(&indio_dev->mlock); ret = sc27xx_adc_read_processed(data, chan->channel, scale, @@ -315,48 +385,47 @@ static const struct iio_info sc27xx_info = { .write_raw = &sc27xx_adc_write_raw, }; -#define SC27XX_ADC_CHANNEL(index) { \ +#define SC27XX_ADC_CHANNEL(index, mask) { \ .type = IIO_VOLTAGE, \ .channel = index, \ - .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | \ - BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_separate = mask | BIT(IIO_CHAN_INFO_SCALE), \ .datasheet_name = "CH##index", \ .indexed = 1, \ } static const struct iio_chan_spec sc27xx_channels[] = { - SC27XX_ADC_CHANNEL(0), - SC27XX_ADC_CHANNEL(1), - SC27XX_ADC_CHANNEL(2), - SC27XX_ADC_CHANNEL(3), - SC27XX_ADC_CHANNEL(4), - SC27XX_ADC_CHANNEL(5), - SC27XX_ADC_CHANNEL(6), - SC27XX_ADC_CHANNEL(7), - SC27XX_ADC_CHANNEL(8), - SC27XX_ADC_CHANNEL(9), - SC27XX_ADC_CHANNEL(10), - SC27XX_ADC_CHANNEL(11), - SC27XX_ADC_CHANNEL(12), - SC27XX_ADC_CHANNEL(13), - SC27XX_ADC_CHANNEL(14), - SC27XX_ADC_CHANNEL(15), - SC27XX_ADC_CHANNEL(16), - SC27XX_ADC_CHANNEL(17), - SC27XX_ADC_CHANNEL(18), - SC27XX_ADC_CHANNEL(19), - SC27XX_ADC_CHANNEL(20), - SC27XX_ADC_CHANNEL(21), - SC27XX_ADC_CHANNEL(22), - SC27XX_ADC_CHANNEL(23), - SC27XX_ADC_CHANNEL(24), - SC27XX_ADC_CHANNEL(25), - SC27XX_ADC_CHANNEL(26), - SC27XX_ADC_CHANNEL(27), - SC27XX_ADC_CHANNEL(28), - SC27XX_ADC_CHANNEL(29), - SC27XX_ADC_CHANNEL(30), - SC27XX_ADC_CHANNEL(31), + SC27XX_ADC_CHANNEL(0, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(1, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(2, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(3, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(4, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(5, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(6, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(7, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(8, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(9, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(10, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(11, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(12, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(13, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(14, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(15, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(16, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(17, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(18, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(19, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(20, BIT(IIO_CHAN_INFO_RAW)), + SC27XX_ADC_CHANNEL(21, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(22, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(23, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(24, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(25, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(26, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(27, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(28, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(29, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(30, BIT(IIO_CHAN_INFO_PROCESSED)), + SC27XX_ADC_CHANNEL(31, BIT(IIO_CHAN_INFO_PROCESSED)), }; static int sc27xx_adc_enable(struct sc27xx_adc_data *data) @@ -380,6 +449,15 @@ static int sc27xx_adc_enable(struct sc27xx_adc_data *data) if (ret) goto disable_clk; + /* ADC channel scales' calibration from nvmem device */ + ret = sc27xx_adc_scale_calibration(data, true); + if (ret) + goto disable_clk; + + ret = sc27xx_adc_scale_calibration(data, false); + if (ret) + goto disable_clk; + return 0; disable_clk: diff --git a/drivers/iio/adc/ti-ads7950.c b/drivers/iio/adc/ti-ads7950.c index a5bd5944bc66..0ad63592cc3c 100644 --- a/drivers/iio/adc/ti-ads7950.c +++ b/drivers/iio/adc/ti-ads7950.c @@ -51,7 +51,7 @@ struct ti_ads7950_state { struct spi_device *spi; - struct spi_transfer ring_xfer[TI_ADS7950_MAX_CHAN + 2]; + struct spi_transfer ring_xfer; struct spi_transfer scan_single_xfer[3]; struct spi_message ring_msg; struct spi_message scan_single_msg; @@ -65,11 +65,11 @@ struct ti_ads7950_state { * DMA (thus cache coherency maintenance) requires the * transfer buffers to live in their own cache lines. */ - __be16 rx_buf[TI_ADS7950_MAX_CHAN + TI_ADS7950_TIMESTAMP_SIZE] + u16 rx_buf[TI_ADS7950_MAX_CHAN + 2 + TI_ADS7950_TIMESTAMP_SIZE] ____cacheline_aligned; - __be16 tx_buf[TI_ADS7950_MAX_CHAN]; - __be16 single_tx; - __be16 single_rx; + u16 tx_buf[TI_ADS7950_MAX_CHAN + 2]; + u16 single_tx; + u16 single_rx; }; @@ -108,7 +108,7 @@ enum ti_ads7950_id { .realbits = bits, \ .storagebits = 16, \ .shift = 12 - (bits), \ - .endianness = IIO_BE, \ + .endianness = IIO_CPU, \ }, \ } @@ -249,23 +249,14 @@ static int ti_ads7950_update_scan_mode(struct iio_dev *indio_dev, len = 0; for_each_set_bit(i, active_scan_mask, indio_dev->num_channels) { cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(i) | st->settings; - st->tx_buf[len++] = cpu_to_be16(cmd); + st->tx_buf[len++] = cmd; } /* Data for the 1st channel is not returned until the 3rd transfer */ - len += 2; - for (i = 0; i < len; i++) { - if ((i + 2) < len) - st->ring_xfer[i].tx_buf = &st->tx_buf[i]; - if (i >= 2) - st->ring_xfer[i].rx_buf = &st->rx_buf[i - 2]; - st->ring_xfer[i].len = 2; - st->ring_xfer[i].cs_change = 1; - } - /* make sure last transfer's cs_change is not set */ - st->ring_xfer[len - 1].cs_change = 0; + st->tx_buf[len++] = 0; + st->tx_buf[len++] = 0; - spi_message_init_with_transfers(&st->ring_msg, st->ring_xfer, len); + st->ring_xfer.len = len * 2; return 0; } @@ -281,7 +272,7 @@ static irqreturn_t ti_ads7950_trigger_handler(int irq, void *p) if (ret < 0) goto out; - iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf, + iio_push_to_buffers_with_timestamp(indio_dev, &st->rx_buf[2], iio_get_time_ns(indio_dev)); out: @@ -298,13 +289,13 @@ static int ti_ads7950_scan_direct(struct iio_dev *indio_dev, unsigned int ch) mutex_lock(&indio_dev->mlock); cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(ch) | st->settings; - st->single_tx = cpu_to_be16(cmd); + st->single_tx = cmd; ret = spi_sync(st->spi, &st->scan_single_msg); if (ret) goto out; - ret = be16_to_cpu(st->single_rx); + ret = st->single_rx; out: mutex_unlock(&indio_dev->mlock); @@ -378,6 +369,14 @@ static int ti_ads7950_probe(struct spi_device *spi) const struct ti_ads7950_chip_info *info; int ret; + spi->bits_per_word = 16; + spi->mode |= SPI_CS_WORD; + ret = spi_setup(spi); + if (ret < 0) { + dev_err(&spi->dev, "Error in spi setup\n"); + return ret; + } + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); if (!indio_dev) return -ENOMEM; @@ -398,6 +397,16 @@ static int ti_ads7950_probe(struct spi_device *spi) indio_dev->num_channels = info->num_channels; indio_dev->info = &ti_ads7950_info; + /* build spi ring message */ + spi_message_init(&st->ring_msg); + + st->ring_xfer.tx_buf = &st->tx_buf[0]; + st->ring_xfer.rx_buf = &st->rx_buf[0]; + /* len will be set later */ + st->ring_xfer.cs_change = true; + + spi_message_add_tail(&st->ring_xfer, &st->ring_msg); + /* * Setup default message. The sample is read at the end of the first * transfer, then it takes one full cycle to convert the sample and one diff --git a/drivers/iio/amplifiers/ad8366.c b/drivers/iio/amplifiers/ad8366.c index 0138337aedd1..4b76b61ba4be 100644 --- a/drivers/iio/amplifiers/ad8366.c +++ b/drivers/iio/amplifiers/ad8366.c @@ -209,6 +209,6 @@ static struct spi_driver ad8366_driver = { module_spi_driver(ad8366_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD8366 VGA"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/chemical/bme680.h b/drivers/iio/chemical/bme680.h index e049323f209a..0ae89b87e2d6 100644 --- a/drivers/iio/chemical/bme680.h +++ b/drivers/iio/chemical/bme680.h @@ -4,10 +4,10 @@ #define BME680_REG_CHIP_I2C_ID 0xD0 #define BME680_REG_CHIP_SPI_ID 0x50 -#define BME680_CHIP_ID_VAL 0x61 +#define BME680_CHIP_ID_VAL 0x61 #define BME680_REG_SOFT_RESET_I2C 0xE0 #define BME680_REG_SOFT_RESET_SPI 0x60 -#define BME680_CMD_SOFTRESET 0xB6 +#define BME680_CMD_SOFTRESET 0xB6 #define BME680_REG_STATUS 0x73 #define BME680_SPI_MEM_PAGE_BIT BIT(4) #define BME680_SPI_MEM_PAGE_1_VAL 1 @@ -18,6 +18,7 @@ #define BME680_REG_GAS_MSB 0x2A #define BME680_REG_GAS_R_LSB 0x2B #define BME680_GAS_STAB_BIT BIT(4) +#define BME680_GAS_RANGE_MASK GENMASK(3, 0) #define BME680_REG_CTRL_HUMIDITY 0x72 #define BME680_OSRS_HUMIDITY_MASK GENMASK(2, 0) @@ -26,9 +27,8 @@ #define BME680_OSRS_TEMP_MASK GENMASK(7, 5) #define BME680_OSRS_PRESS_MASK GENMASK(4, 2) #define BME680_MODE_MASK GENMASK(1, 0) - -#define BME680_MODE_FORCED 1 -#define BME680_MODE_SLEEP 0 +#define BME680_MODE_FORCED 1 +#define BME680_MODE_SLEEP 0 #define BME680_REG_CONFIG 0x75 #define BME680_FILTER_MASK GENMASK(4, 2) @@ -39,24 +39,21 @@ #define BME680_MAX_OVERFLOW_VAL 0x40000000 #define BME680_HUM_REG_SHIFT_VAL 4 -#define BME680_BIT_H1_DATA_MSK 0x0F +#define BME680_BIT_H1_DATA_MASK GENMASK(3, 0) #define BME680_REG_RES_HEAT_RANGE 0x02 -#define BME680_RHRANGE_MSK 0x30 +#define BME680_RHRANGE_MASK GENMASK(5, 4) #define BME680_REG_RES_HEAT_VAL 0x00 #define BME680_REG_RANGE_SW_ERR 0x04 -#define BME680_RSERROR_MSK 0xF0 +#define BME680_RSERROR_MASK GENMASK(7, 4) #define BME680_REG_RES_HEAT_0 0x5A #define BME680_REG_GAS_WAIT_0 0x64 -#define BME680_GAS_RANGE_MASK 0x0F #define BME680_ADC_GAS_RES_SHIFT 6 #define BME680_AMB_TEMP 25 #define BME680_REG_CTRL_GAS_1 0x71 #define BME680_RUN_GAS_MASK BIT(4) #define BME680_NB_CONV_MASK GENMASK(3, 0) -#define BME680_RUN_GAS_EN_BIT BIT(4) -#define BME680_NB_CONV_0_VAL 0 #define BME680_REG_MEAS_STAT_0 0x1D #define BME680_GAS_MEAS_BIT BIT(6) diff --git a/drivers/iio/chemical/bme680_core.c b/drivers/iio/chemical/bme680_core.c index 7d9bb62baa3f..70c1fe4366f4 100644 --- a/drivers/iio/chemical/bme680_core.c +++ b/drivers/iio/chemical/bme680_core.c @@ -91,8 +91,6 @@ static const struct iio_chan_spec bme680_channels[] = { }, }; -static const int bme680_oversampling_avail[] = { 1, 2, 4, 8, 16 }; - static int bme680_read_calib(struct bme680_data *data, struct bme680_calib *calib) { @@ -102,16 +100,14 @@ static int bme680_read_calib(struct bme680_data *data, __le16 buf; /* Temperature related coefficients */ - ret = regmap_bulk_read(data->regmap, BME680_T1_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_T1_LSB_REG, (u8 *) &buf, 2); if (ret < 0) { dev_err(dev, "failed to read BME680_T1_LSB_REG\n"); return ret; } calib->par_t1 = le16_to_cpu(buf); - ret = regmap_bulk_read(data->regmap, BME680_T2_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_T2_LSB_REG, (u8 *) &buf, 2); if (ret < 0) { dev_err(dev, "failed to read BME680_T2_LSB_REG\n"); return ret; @@ -126,16 +122,14 @@ static int bme680_read_calib(struct bme680_data *data, calib->par_t3 = tmp; /* Pressure related coefficients */ - ret = regmap_bulk_read(data->regmap, BME680_P1_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_P1_LSB_REG, (u8 *) &buf, 2); if (ret < 0) { dev_err(dev, "failed to read BME680_P1_LSB_REG\n"); return ret; } calib->par_p1 = le16_to_cpu(buf); - ret = regmap_bulk_read(data->regmap, BME680_P2_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_P2_LSB_REG, (u8 *) &buf, 2); if (ret < 0) { dev_err(dev, "failed to read BME680_P2_LSB_REG\n"); return ret; @@ -149,16 +143,14 @@ static int bme680_read_calib(struct bme680_data *data, } calib->par_p3 = tmp; - ret = regmap_bulk_read(data->regmap, BME680_P4_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_P4_LSB_REG, (u8 *) &buf, 2); if (ret < 0) { dev_err(dev, "failed to read BME680_P4_LSB_REG\n"); return ret; } calib->par_p4 = le16_to_cpu(buf); - ret = regmap_bulk_read(data->regmap, BME680_P5_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_P5_LSB_REG, (u8 *) &buf, 2); if (ret < 0) { dev_err(dev, "failed to read BME680_P5_LSB_REG\n"); return ret; @@ -179,16 +171,14 @@ static int bme680_read_calib(struct bme680_data *data, } calib->par_p7 = tmp; - ret = regmap_bulk_read(data->regmap, BME680_P8_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_P8_LSB_REG, (u8 *) &buf, 2); if (ret < 0) { dev_err(dev, "failed to read BME680_P8_LSB_REG\n"); return ret; } calib->par_p8 = le16_to_cpu(buf); - ret = regmap_bulk_read(data->regmap, BME680_P9_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_P9_LSB_REG, (u8 *) &buf, 2); if (ret < 0) { dev_err(dev, "failed to read BME680_P9_LSB_REG\n"); return ret; @@ -208,30 +198,26 @@ static int bme680_read_calib(struct bme680_data *data, dev_err(dev, "failed to read BME680_H1_MSB_REG\n"); return ret; } - ret = regmap_read(data->regmap, BME680_H1_LSB_REG, &tmp_lsb); if (ret < 0) { dev_err(dev, "failed to read BME680_H1_LSB_REG\n"); return ret; } - calib->par_h1 = (tmp_msb << BME680_HUM_REG_SHIFT_VAL) | - (tmp_lsb & BME680_BIT_H1_DATA_MSK); + (tmp_lsb & BME680_BIT_H1_DATA_MASK); ret = regmap_read(data->regmap, BME680_H2_MSB_REG, &tmp_msb); if (ret < 0) { dev_err(dev, "failed to read BME680_H2_MSB_REG\n"); return ret; } - ret = regmap_read(data->regmap, BME680_H2_LSB_REG, &tmp_lsb); if (ret < 0) { dev_err(dev, "failed to read BME680_H2_LSB_REG\n"); return ret; } - calib->par_h2 = (tmp_msb << BME680_HUM_REG_SHIFT_VAL) | - (tmp_lsb >> BME680_HUM_REG_SHIFT_VAL); + (tmp_lsb >> BME680_HUM_REG_SHIFT_VAL); ret = regmap_read(data->regmap, BME680_H3_REG, &tmp); if (ret < 0) { @@ -276,8 +262,8 @@ static int bme680_read_calib(struct bme680_data *data, } calib->par_gh1 = tmp; - ret = regmap_bulk_read(data->regmap, BME680_GH2_LSB_REG, - (u8 *) &buf, 2); + ret = regmap_bulk_read(data->regmap, BME680_GH2_LSB_REG, (u8 *) &buf, + 2); if (ret < 0) { dev_err(dev, "failed to read BME680_GH2_LSB_REG\n"); return ret; @@ -297,7 +283,7 @@ static int bme680_read_calib(struct bme680_data *data, dev_err(dev, "failed to read resistance heat range\n"); return ret; } - calib->res_heat_range = (tmp & BME680_RHRANGE_MSK) / 16; + calib->res_heat_range = FIELD_GET(BME680_RHRANGE_MASK, tmp); ret = regmap_read(data->regmap, BME680_REG_RES_HEAT_VAL, &tmp); if (ret < 0) { @@ -311,7 +297,7 @@ static int bme680_read_calib(struct bme680_data *data, dev_err(dev, "failed to read range software error\n"); return ret; } - calib->range_sw_err = (tmp & BME680_RSERROR_MSK) / 16; + calib->range_sw_err = FIELD_GET(BME680_RSERROR_MASK, tmp); return 0; } @@ -408,10 +394,7 @@ static u32 bme680_compensate_humid(struct bme680_data *data, var6 = (var4 * var5) >> 1; calc_hum = (((var3 + var6) >> 10) * 1000) >> 12; - if (calc_hum > 100000) /* Cap at 100%rH */ - calc_hum = 100000; - else if (calc_hum < 0) - calc_hum = 0; + calc_hum = clamp(calc_hum, 0, 100000); /* clamp between 0-100 %rH */ return calc_hum; } @@ -518,12 +501,20 @@ static int bme680_set_mode(struct bme680_data *data, bool mode) return ret; } +static u8 bme680_oversampling_to_reg(u8 val) +{ + return ilog2(val) + 1; +} + static int bme680_chip_config(struct bme680_data *data) { struct device *dev = regmap_get_device(data->regmap); int ret; - u8 osrs = FIELD_PREP(BME680_OSRS_HUMIDITY_MASK, - data->oversampling_humid + 1); + u8 osrs; + + osrs = FIELD_PREP( + BME680_OSRS_HUMIDITY_MASK, + bme680_oversampling_to_reg(data->oversampling_humid)); /* * Highly recommended to set oversampling of humidity before * temperature/pressure oversampling. @@ -544,12 +535,12 @@ static int bme680_chip_config(struct bme680_data *data) return ret; } - osrs = FIELD_PREP(BME680_OSRS_TEMP_MASK, data->oversampling_temp + 1) | - FIELD_PREP(BME680_OSRS_PRESS_MASK, data->oversampling_press + 1); - + osrs = FIELD_PREP(BME680_OSRS_TEMP_MASK, + bme680_oversampling_to_reg(data->oversampling_temp)) | + FIELD_PREP(BME680_OSRS_PRESS_MASK, + bme680_oversampling_to_reg(data->oversampling_press)); ret = regmap_write_bits(data->regmap, BME680_REG_CTRL_MEAS, - BME680_OSRS_TEMP_MASK | - BME680_OSRS_PRESS_MASK, + BME680_OSRS_TEMP_MASK | BME680_OSRS_PRESS_MASK, osrs); if (ret < 0) dev_err(dev, "failed to write ctrl_meas register\n"); @@ -577,14 +568,15 @@ static int bme680_gas_config(struct bme680_data *data) /* set target heating duration */ ret = regmap_write(data->regmap, BME680_REG_GAS_WAIT_0, heatr_dur); if (ret < 0) { - dev_err(dev, "failted to write gas_wait_0 register\n"); + dev_err(dev, "failed to write gas_wait_0 register\n"); return ret; } - /* Selecting the runGas and NB conversion settings for the sensor */ + /* Enable the gas sensor and select heater profile set-point 0 */ ret = regmap_update_bits(data->regmap, BME680_REG_CTRL_GAS_1, BME680_RUN_GAS_MASK | BME680_NB_CONV_MASK, - BME680_RUN_GAS_EN_BIT | BME680_NB_CONV_0_VAL); + FIELD_PREP(BME680_RUN_GAS_MASK, 1) | + FIELD_PREP(BME680_NB_CONV_MASK, 0)); if (ret < 0) dev_err(dev, "failed to write ctrl_gas_1 register\n"); @@ -782,13 +774,13 @@ static int bme680_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_OVERSAMPLING_RATIO: switch (chan->type) { case IIO_TEMP: - *val = 1 << data->oversampling_temp; + *val = data->oversampling_temp; return IIO_VAL_INT; case IIO_PRESSURE: - *val = 1 << data->oversampling_press; + *val = data->oversampling_press; return IIO_VAL_INT; case IIO_HUMIDITYRELATIVE: - *val = 1 << data->oversampling_humid; + *val = data->oversampling_humid; return IIO_VAL_INT; default: return -EINVAL; @@ -798,52 +790,9 @@ static int bme680_read_raw(struct iio_dev *indio_dev, } } -static int bme680_write_oversampling_ratio_temp(struct bme680_data *data, - int val) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(bme680_oversampling_avail); i++) { - if (bme680_oversampling_avail[i] == val) { - data->oversampling_temp = ilog2(val); - - return bme680_chip_config(data); - } - } - - return -EINVAL; -} - -static int bme680_write_oversampling_ratio_press(struct bme680_data *data, - int val) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(bme680_oversampling_avail); i++) { - if (bme680_oversampling_avail[i] == val) { - data->oversampling_press = ilog2(val); - - return bme680_chip_config(data); - } - } - - return -EINVAL; -} - -static int bme680_write_oversampling_ratio_humid(struct bme680_data *data, - int val) +static bool bme680_is_valid_oversampling(int rate) { - int i; - - for (i = 0; i < ARRAY_SIZE(bme680_oversampling_avail); i++) { - if (bme680_oversampling_avail[i] == val) { - data->oversampling_humid = ilog2(val); - - return bme680_chip_config(data); - } - } - - return -EINVAL; + return (rate > 0 && rate <= 16 && is_power_of_2(rate)); } static int bme680_write_raw(struct iio_dev *indio_dev, @@ -852,18 +801,31 @@ static int bme680_write_raw(struct iio_dev *indio_dev, { struct bme680_data *data = iio_priv(indio_dev); + if (val2 != 0) + return -EINVAL; + switch (mask) { case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + { + if (!bme680_is_valid_oversampling(val)) + return -EINVAL; + switch (chan->type) { case IIO_TEMP: - return bme680_write_oversampling_ratio_temp(data, val); + data->oversampling_temp = val; + break; case IIO_PRESSURE: - return bme680_write_oversampling_ratio_press(data, val); + data->oversampling_press = val; + break; case IIO_HUMIDITYRELATIVE: - return bme680_write_oversampling_ratio_humid(data, val); + data->oversampling_humid = val; + break; default: return -EINVAL; } + + return bme680_chip_config(data); + } default: return -EINVAL; } @@ -925,9 +887,9 @@ int bme680_core_probe(struct device *dev, struct regmap *regmap, indio_dev->modes = INDIO_DIRECT_MODE; /* default values for the sensor */ - data->oversampling_humid = ilog2(2); /* 2X oversampling rate */ - data->oversampling_press = ilog2(4); /* 4X oversampling rate */ - data->oversampling_temp = ilog2(8); /* 8X oversampling rate */ + data->oversampling_humid = 2; /* 2X oversampling rate */ + data->oversampling_press = 4; /* 4X oversampling rate */ + data->oversampling_temp = 8; /* 8X oversampling rate */ data->heater_temp = 320; /* degree Celsius */ data->heater_dur = 150; /* milliseconds */ diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 80beb64e9e0c..bb2057fd1b6f 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -120,6 +120,16 @@ config AD5624R_SPI Say yes here to build support for Analog Devices AD5624R, AD5644R and AD5664R converters (DAC). This driver uses the common SPI interface. +config LTC1660 + tristate "Linear Technology LTC1660/LTC1665 DAC SPI driver" + depends on SPI + help + Say yes here to build support for Linear Technology + LTC1660 and LTC1665 Digital to Analog Converters. + + To compile this driver as a module, choose M here: the + module will be called ltc1660. + config LTC2632 tristate "Linear Technology LTC2632-12/10/8 DAC spi driver" depends on SPI diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index a1b37cf99441..2ac93cc4a389 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -29,6 +29,7 @@ obj-$(CONFIG_CIO_DAC) += cio-dac.o obj-$(CONFIG_DPOT_DAC) += dpot-dac.o obj-$(CONFIG_DS4424) += ds4424.o obj-$(CONFIG_LPC18XX_DAC) += lpc18xx_dac.o +obj-$(CONFIG_LTC1660) += ltc1660.o obj-$(CONFIG_LTC2632) += ltc2632.o obj-$(CONFIG_M62332) += m62332.o obj-$(CONFIG_MAX517) += max517.o diff --git a/drivers/iio/dac/ad5064.c b/drivers/iio/dac/ad5064.c index bf4fc40ec84d..2f98cb2a3b96 100644 --- a/drivers/iio/dac/ad5064.c +++ b/drivers/iio/dac/ad5064.c @@ -808,6 +808,40 @@ static int ad5064_set_config(struct ad5064_state *st, unsigned int val) return ad5064_write(st, cmd, 0, val, 0); } +static int ad5064_request_vref(struct ad5064_state *st, struct device *dev) +{ + unsigned int i; + int ret; + + for (i = 0; i < ad5064_num_vref(st); ++i) + st->vref_reg[i].supply = ad5064_vref_name(st, i); + + if (!st->chip_info->internal_vref) + return devm_regulator_bulk_get(dev, ad5064_num_vref(st), + st->vref_reg); + + /* + * This assumes that when the regulator has an internal VREF + * there is only one external VREF connection, which is + * currently the case for all supported devices. + */ + st->vref_reg[0].consumer = devm_regulator_get_optional(dev, "vref"); + if (!IS_ERR(st->vref_reg[0].consumer)) + return 0; + + ret = PTR_ERR(st->vref_reg[0].consumer); + if (ret != -ENODEV) + return ret; + + /* If no external regulator was supplied use the internal VREF */ + st->use_internal_vref = true; + ret = ad5064_set_config(st, AD5064_CONFIG_INT_VREF_ENABLE); + if (ret) + dev_err(dev, "Failed to enable internal vref: %d\n", ret); + + return ret; +} + static int ad5064_probe(struct device *dev, enum ad5064_type type, const char *name, ad5064_write_func write) { @@ -828,22 +862,11 @@ static int ad5064_probe(struct device *dev, enum ad5064_type type, st->dev = dev; st->write = write; - for (i = 0; i < ad5064_num_vref(st); ++i) - st->vref_reg[i].supply = ad5064_vref_name(st, i); + ret = ad5064_request_vref(st, dev); + if (ret) + return ret; - ret = devm_regulator_bulk_get(dev, ad5064_num_vref(st), - st->vref_reg); - if (ret) { - if (!st->chip_info->internal_vref) - return ret; - st->use_internal_vref = true; - ret = ad5064_set_config(st, AD5064_CONFIG_INT_VREF_ENABLE); - if (ret) { - dev_err(dev, "Failed to enable internal vref: %d\n", - ret); - return ret; - } - } else { + if (!st->use_internal_vref) { ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg); if (ret) return ret; diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c index fd26a4272fc5..c3426708b6b5 100644 --- a/drivers/iio/dac/ad5446.c +++ b/drivers/iio/dac/ad5446.c @@ -628,6 +628,6 @@ static void __exit ad5446_exit(void) } module_exit(ad5446_exit); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/dac/ad5504.c b/drivers/iio/dac/ad5504.c index d9037ea59168..0ae23a268017 100644 --- a/drivers/iio/dac/ad5504.c +++ b/drivers/iio/dac/ad5504.c @@ -369,6 +369,6 @@ static struct spi_driver ad5504_driver = { }; module_spi_driver(ad5504_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD5501/AD5501 DAC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c index 2ddbfc3fdbae..0e134b13967a 100644 --- a/drivers/iio/dac/ad5686.c +++ b/drivers/iio/dac/ad5686.c @@ -470,6 +470,6 @@ int ad5686_remove(struct device *dev) } EXPORT_SYMBOL_GPL(ad5686_remove); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/dac/ad5758.c b/drivers/iio/dac/ad5758.c index bd36333257af..ef41f12bf262 100644 --- a/drivers/iio/dac/ad5758.c +++ b/drivers/iio/dac/ad5758.c @@ -12,6 +12,7 @@ #include <linux/module.h> #include <linux/property.h> #include <linux/spi/spi.h> +#include <linux/gpio/consumer.h> #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> @@ -108,6 +109,7 @@ struct ad5758_range { struct ad5758_state { struct spi_device *spi; struct mutex lock; + struct gpio_desc *gpio_reset; struct ad5758_range out_range; unsigned int dc_dc_mode; unsigned int dc_dc_ilim; @@ -474,6 +476,21 @@ static int ad5758_internal_buffers_en(struct ad5758_state *st, bool enable) AD5758_CAL_MEM_UNREFRESHED_MSK); } +static int ad5758_reset(struct ad5758_state *st) +{ + if (st->gpio_reset) { + gpiod_set_value(st->gpio_reset, 0); + usleep_range(100, 1000); + gpiod_set_value(st->gpio_reset, 1); + usleep_range(100, 1000); + + return 0; + } else { + /* Perform a software reset */ + return ad5758_soft_reset(st); + } +} + static int ad5758_reg_access(struct iio_dev *indio_dev, unsigned int reg, unsigned int writeval, @@ -768,13 +785,18 @@ static int ad5758_init(struct ad5758_state *st) { int regval, ret; + st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(st->gpio_reset)) + return PTR_ERR(st->gpio_reset); + /* Disable CRC checks */ ret = ad5758_crc_disable(st); if (ret < 0) return ret; - /* Perform a software reset */ - ret = ad5758_soft_reset(st); + /* Perform a reset */ + ret = ad5758_reset(st); if (ret < 0) return ret; diff --git a/drivers/iio/dac/ad5791.c b/drivers/iio/dac/ad5791.c index 7569bf6868c2..84ce5e6ecf3f 100644 --- a/drivers/iio/dac/ad5791.c +++ b/drivers/iio/dac/ad5791.c @@ -467,6 +467,6 @@ static struct spi_driver ad5791_driver = { }; module_spi_driver(ad5791_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/dac/dpot-dac.c b/drivers/iio/dac/dpot-dac.c index aaa2103d7c2b..a791d0a09d3b 100644 --- a/drivers/iio/dac/dpot-dac.c +++ b/drivers/iio/dac/dpot-dac.c @@ -1,13 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * IIO DAC emulation driver using a digital potentiometer * * Copyright (C) 2016 Axentia Technologies AB * * Author: Peter Rosin <peda@axentia.se> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ /* diff --git a/drivers/iio/dac/ltc1660.c b/drivers/iio/dac/ltc1660.c new file mode 100644 index 000000000000..10866838c72a --- /dev/null +++ b/drivers/iio/dac/ltc1660.c @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for Linear Technology LTC1665/LTC1660, 8 channels DAC + * + * Copyright (C) 2018 Marcus Folkesson <marcus.folkesson@gmail.com> + */ +#include <linux/bitops.h> +#include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/regulator/consumer.h> +#include <linux/regmap.h> +#include <linux/spi/spi.h> + +#define LTC1660_REG_WAKE 0x0 +#define LTC1660_REG_DAC_A 0x1 +#define LTC1660_REG_DAC_B 0x2 +#define LTC1660_REG_DAC_C 0x3 +#define LTC1660_REG_DAC_D 0x4 +#define LTC1660_REG_DAC_E 0x5 +#define LTC1660_REG_DAC_F 0x6 +#define LTC1660_REG_DAC_G 0x7 +#define LTC1660_REG_DAC_H 0x8 +#define LTC1660_REG_SLEEP 0xe + +#define LTC1660_NUM_CHANNELS 8 + +static const struct regmap_config ltc1660_regmap_config = { + .reg_bits = 4, + .val_bits = 12, +}; + +enum ltc1660_supported_device_ids { + ID_LTC1660, + ID_LTC1665, +}; + +struct ltc1660_priv { + struct spi_device *spi; + struct regmap *regmap; + struct regulator *vref_reg; + unsigned int value[LTC1660_NUM_CHANNELS]; + unsigned int vref_mv; +}; + +static int ltc1660_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, + int *val2, + long mask) +{ + struct ltc1660_priv *priv = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + *val = priv->value[chan->channel]; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + *val = regulator_get_voltage(priv->vref_reg); + if (*val < 0) { + dev_err(&priv->spi->dev, "failed to read vref regulator: %d\n", + *val); + return *val; + } + + /* Convert to mV */ + *val /= 1000; + *val2 = chan->scan_type.realbits; + return IIO_VAL_FRACTIONAL_LOG2; + default: + return -EINVAL; + } +} + +static int ltc1660_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, + int val2, + long mask) +{ + struct ltc1660_priv *priv = iio_priv(indio_dev); + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + if (val2 != 0) + return -EINVAL; + + if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0)) + return -EINVAL; + + ret = regmap_write(priv->regmap, chan->channel, + (val << chan->scan_type.shift)); + if (!ret) + priv->value[chan->channel] = val; + + return ret; + default: + return -EINVAL; + } +} + +#define LTC1660_CHAN(chan, bits) { \ + .type = IIO_VOLTAGE, \ + .indexed = 1, \ + .output = 1, \ + .channel = chan, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .scan_type = { \ + .sign = 'u', \ + .realbits = (bits), \ + .storagebits = 16, \ + .shift = 12 - (bits), \ + }, \ +} + +#define LTC1660_OCTAL_CHANNELS(bits) { \ + LTC1660_CHAN(LTC1660_REG_DAC_A, bits), \ + LTC1660_CHAN(LTC1660_REG_DAC_B, bits), \ + LTC1660_CHAN(LTC1660_REG_DAC_C, bits), \ + LTC1660_CHAN(LTC1660_REG_DAC_D, bits), \ + LTC1660_CHAN(LTC1660_REG_DAC_E, bits), \ + LTC1660_CHAN(LTC1660_REG_DAC_F, bits), \ + LTC1660_CHAN(LTC1660_REG_DAC_G, bits), \ + LTC1660_CHAN(LTC1660_REG_DAC_H, bits), \ +} + +static const struct iio_chan_spec ltc1660_channels[][LTC1660_NUM_CHANNELS] = { + [ID_LTC1660] = LTC1660_OCTAL_CHANNELS(10), + [ID_LTC1665] = LTC1660_OCTAL_CHANNELS(8), +}; + +static const struct iio_info ltc1660_info = { + .read_raw = <c1660_read_raw, + .write_raw = <c1660_write_raw, +}; + +static int __maybe_unused ltc1660_suspend(struct device *dev) +{ + struct ltc1660_priv *priv = iio_priv(spi_get_drvdata( + to_spi_device(dev))); + return regmap_write(priv->regmap, LTC1660_REG_SLEEP, 0x00); +} + +static int __maybe_unused ltc1660_resume(struct device *dev) +{ + struct ltc1660_priv *priv = iio_priv(spi_get_drvdata( + to_spi_device(dev))); + return regmap_write(priv->regmap, LTC1660_REG_WAKE, 0x00); +} +static SIMPLE_DEV_PM_OPS(ltc1660_pm_ops, ltc1660_suspend, ltc1660_resume); + +static int ltc1660_probe(struct spi_device *spi) +{ + struct iio_dev *indio_dev; + struct ltc1660_priv *priv; + const struct spi_device_id *id = spi_get_device_id(spi); + int ret; + + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*priv)); + if (indio_dev == NULL) + return -ENOMEM; + + priv = iio_priv(indio_dev); + priv->regmap = devm_regmap_init_spi(spi, <c1660_regmap_config); + if (IS_ERR(priv->regmap)) { + dev_err(&spi->dev, "failed to register spi regmap %ld\n", + PTR_ERR(priv->regmap)); + return PTR_ERR(priv->regmap); + } + + priv->vref_reg = devm_regulator_get(&spi->dev, "vref"); + if (IS_ERR(priv->vref_reg)) { + dev_err(&spi->dev, "vref regulator not specified\n"); + return PTR_ERR(priv->vref_reg); + } + + ret = regulator_enable(priv->vref_reg); + if (ret) { + dev_err(&spi->dev, "failed to enable vref regulator: %d\n", + ret); + return ret; + } + + priv->spi = spi; + spi_set_drvdata(spi, indio_dev); + indio_dev->dev.parent = &spi->dev; + indio_dev->info = <c1660_info; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->channels = ltc1660_channels[id->driver_data]; + indio_dev->num_channels = LTC1660_NUM_CHANNELS; + indio_dev->name = id->name; + + ret = iio_device_register(indio_dev); + if (ret) { + dev_err(&spi->dev, "failed to register iio device: %d\n", + ret); + goto error_disable_reg; + } + + return 0; + +error_disable_reg: + regulator_disable(priv->vref_reg); + + return ret; +} + +static int ltc1660_remove(struct spi_device *spi) +{ + struct iio_dev *indio_dev = spi_get_drvdata(spi); + struct ltc1660_priv *priv = iio_priv(indio_dev); + + iio_device_unregister(indio_dev); + regulator_disable(priv->vref_reg); + + return 0; +} + +static const struct of_device_id ltc1660_dt_ids[] = { + { .compatible = "lltc,ltc1660", .data = (void *)ID_LTC1660 }, + { .compatible = "lltc,ltc1665", .data = (void *)ID_LTC1665 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ltc1660_dt_ids); + +static const struct spi_device_id ltc1660_id[] = { + {"ltc1660", ID_LTC1660}, + {"ltc1665", ID_LTC1665}, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(spi, ltc1660_id); + +static struct spi_driver ltc1660_driver = { + .driver = { + .name = "ltc1660", + .of_match_table = ltc1660_dt_ids, + .pm = <c1660_pm_ops, + }, + .probe = ltc1660_probe, + .remove = ltc1660_remove, + .id_table = ltc1660_id, +}; +module_spi_driver(ltc1660_driver); + +MODULE_AUTHOR("Marcus Folkesson <marcus.folkesson@gmail.com>"); +MODULE_DESCRIPTION("Linear Technology LTC1660/LTC1665 DAC"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/dac/max517.c b/drivers/iio/dac/max517.c index 1d853247a205..451d10e323cf 100644 --- a/drivers/iio/dac/max517.c +++ b/drivers/iio/dac/max517.c @@ -113,15 +113,14 @@ static int max517_write_raw(struct iio_dev *indio_dev, return ret; } -#ifdef CONFIG_PM_SLEEP -static int max517_suspend(struct device *dev) +static int __maybe_unused max517_suspend(struct device *dev) { u8 outbuf = COMMAND_PD; return i2c_master_send(to_i2c_client(dev), &outbuf, 1); } -static int max517_resume(struct device *dev) +static int __maybe_unused max517_resume(struct device *dev) { u8 outbuf = 0; @@ -129,10 +128,6 @@ static int max517_resume(struct device *dev) } static SIMPLE_DEV_PM_OPS(max517_pm_ops, max517_suspend, max517_resume); -#define MAX517_PM_OPS (&max517_pm_ops) -#else -#define MAX517_PM_OPS NULL -#endif static const struct iio_info max517_info = { .read_raw = max517_read_raw, @@ -229,7 +224,7 @@ MODULE_DEVICE_TABLE(i2c, max517_id); static struct i2c_driver max517_driver = { .driver = { .name = MAX517_DRV_NAME, - .pm = MAX517_PM_OPS, + .pm = &max517_pm_ops, }, .probe = max517_probe, .remove = max517_remove, diff --git a/drivers/iio/dac/max5821.c b/drivers/iio/dac/max5821.c index d0ecc1fdd8fc..f0cf6903dcd2 100644 --- a/drivers/iio/dac/max5821.c +++ b/drivers/iio/dac/max5821.c @@ -270,8 +270,7 @@ static int max5821_write_raw(struct iio_dev *indio_dev, } } -#ifdef CONFIG_PM_SLEEP -static int max5821_suspend(struct device *dev) +static int __maybe_unused max5821_suspend(struct device *dev) { u8 outbuf[2] = { MAX5821_EXTENDED_COMMAND_MODE, MAX5821_EXTENDED_DAC_A | @@ -281,7 +280,7 @@ static int max5821_suspend(struct device *dev) return i2c_master_send(to_i2c_client(dev), outbuf, 2); } -static int max5821_resume(struct device *dev) +static int __maybe_unused max5821_resume(struct device *dev) { u8 outbuf[2] = { MAX5821_EXTENDED_COMMAND_MODE, MAX5821_EXTENDED_DAC_A | @@ -292,10 +291,6 @@ static int max5821_resume(struct device *dev) } static SIMPLE_DEV_PM_OPS(max5821_pm_ops, max5821_suspend, max5821_resume); -#define MAX5821_PM_OPS (&max5821_pm_ops) -#else -#define MAX5821_PM_OPS NULL -#endif /* CONFIG_PM_SLEEP */ static const struct iio_info max5821_info = { .read_raw = max5821_read_raw, @@ -392,7 +387,7 @@ static struct i2c_driver max5821_driver = { .driver = { .name = "max5821", .of_match_table = max5821_of_match, - .pm = MAX5821_PM_OPS, + .pm = &max5821_pm_ops, }, .probe = max5821_probe, .remove = max5821_remove, diff --git a/drivers/iio/dac/mcp4725.c b/drivers/iio/dac/mcp4725.c index 8b5aad4c32d9..6d71fd905e29 100644 --- a/drivers/iio/dac/mcp4725.c +++ b/drivers/iio/dac/mcp4725.c @@ -45,7 +45,7 @@ struct mcp4725_data { struct regulator *vref_reg; }; -static int mcp4725_suspend(struct device *dev) +static int __maybe_unused mcp4725_suspend(struct device *dev) { struct mcp4725_data *data = iio_priv(i2c_get_clientdata( to_i2c_client(dev))); @@ -58,7 +58,7 @@ static int mcp4725_suspend(struct device *dev) return i2c_master_send(data->client, outbuf, 2); } -static int mcp4725_resume(struct device *dev) +static int __maybe_unused mcp4725_resume(struct device *dev) { struct mcp4725_data *data = iio_priv(i2c_get_clientdata( to_i2c_client(dev))); @@ -71,13 +71,7 @@ static int mcp4725_resume(struct device *dev) return i2c_master_send(data->client, outbuf, 2); } - -#ifdef CONFIG_PM_SLEEP static SIMPLE_DEV_PM_OPS(mcp4725_pm_ops, mcp4725_suspend, mcp4725_resume); -#define MCP4725_PM_OPS (&mcp4725_pm_ops) -#else -#define MCP4725_PM_OPS NULL -#endif static ssize_t mcp4725_store_eeprom(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) @@ -547,7 +541,7 @@ static struct i2c_driver mcp4725_driver = { .driver = { .name = MCP4725_DRV_NAME, .of_match_table = of_match_ptr(mcp4725_of_match), - .pm = MCP4725_PM_OPS, + .pm = &mcp4725_pm_ops, }, .probe = mcp4725_probe, .remove = mcp4725_remove, diff --git a/drivers/iio/dac/mcp4922.c b/drivers/iio/dac/mcp4922.c index bf9aa3fc0534..b5190d1dae8e 100644 --- a/drivers/iio/dac/mcp4922.c +++ b/drivers/iio/dac/mcp4922.c @@ -94,17 +94,22 @@ static int mcp4922_write_raw(struct iio_dev *indio_dev, long mask) { struct mcp4922_state *state = iio_priv(indio_dev); + int ret; if (val2 != 0) return -EINVAL; switch (mask) { case IIO_CHAN_INFO_RAW: - if (val > GENMASK(chan->scan_type.realbits-1, 0)) + if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0)) return -EINVAL; val <<= chan->scan_type.shift; - state->value[chan->channel] = val; - return mcp4922_spi_write(state, chan->channel, val); + + ret = mcp4922_spi_write(state, chan->channel, val); + if (!ret) + state->value[chan->channel] = val; + return ret; + default: return -EINVAL; } diff --git a/drivers/iio/dac/ti-dac5571.c b/drivers/iio/dac/ti-dac5571.c index e39d1e901353..f6dcd8bce2b0 100644 --- a/drivers/iio/dac/ti-dac5571.c +++ b/drivers/iio/dac/ti-dac5571.c @@ -421,6 +421,7 @@ MODULE_DEVICE_TABLE(i2c, dac5571_id); static struct i2c_driver dac5571_driver = { .driver = { .name = "ti-dac5571", + .of_match_table = of_match_ptr(dac5571_of_id), }, .probe = dac5571_probe, .remove = dac5571_remove, diff --git a/drivers/iio/frequency/ad9523.c b/drivers/iio/frequency/ad9523.c index f4a508107f0d..f3f94fbdd20a 100644 --- a/drivers/iio/frequency/ad9523.c +++ b/drivers/iio/frequency/ad9523.c @@ -1078,6 +1078,6 @@ static struct spi_driver ad9523_driver = { }; module_spi_driver(ad9523_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD9523 CLOCKDIST/PLL"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/frequency/adf4350.c b/drivers/iio/frequency/adf4350.c index 6d768431d90e..f4748ff243f7 100644 --- a/drivers/iio/frequency/adf4350.c +++ b/drivers/iio/frequency/adf4350.c @@ -388,7 +388,7 @@ static struct adf4350_platform_data *adf4350_parse_dt(struct device *dev) if (!pdata) return NULL; - strncpy(&pdata->name[0], np->name, SPI_NAME_SIZE - 1); + snprintf(&pdata->name[0], SPI_NAME_SIZE - 1, "%pOFn", np); tmp = 10000; of_property_read_u32(np, "adi,channel-spacing", &tmp); diff --git a/drivers/iio/health/max30102.c b/drivers/iio/health/max30102.c index 15ccadc74891..3e29562ce374 100644 --- a/drivers/iio/health/max30102.c +++ b/drivers/iio/health/max30102.c @@ -282,9 +282,11 @@ static int max30102_read_measurement(struct max30102_data *data, switch (measurements) { case 3: MAX30102_COPY_DATA(2); - case 2: /* fall-through */ + /* fall through */ + case 2: MAX30102_COPY_DATA(1); - case 1: /* fall-through */ + /* fall through */ + case 1: MAX30102_COPY_DATA(0); break; default: diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c index d80ef468508a..1e428c196a82 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c @@ -23,6 +23,7 @@ #include <linux/iio/iio.h> #include <linux/acpi.h> #include <linux/platform_device.h> +#include <linux/regulator/consumer.h> #include "inv_mpu_iio.h" /* @@ -926,6 +927,39 @@ error_power_off: return result; } +static int inv_mpu_core_enable_regulator(struct inv_mpu6050_state *st) +{ + int result; + + result = regulator_enable(st->vddio_supply); + if (result) { + dev_err(regmap_get_device(st->map), + "Failed to enable regulator: %d\n", result); + } else { + /* Give the device a little bit of time to start up. */ + usleep_range(35000, 70000); + } + + return result; +} + +static int inv_mpu_core_disable_regulator(struct inv_mpu6050_state *st) +{ + int result; + + result = regulator_disable(st->vddio_supply); + if (result) + dev_err(regmap_get_device(st->map), + "Failed to disable regulator: %d\n", result); + + return result; +} + +static void inv_mpu_core_disable_regulator_action(void *_data) +{ + inv_mpu_core_disable_regulator(_data); +} + int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) { @@ -992,6 +1026,28 @@ int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, return -EINVAL; } + st->vddio_supply = devm_regulator_get(dev, "vddio"); + if (IS_ERR(st->vddio_supply)) { + if (PTR_ERR(st->vddio_supply) != -EPROBE_DEFER) + dev_err(dev, "Failed to get vddio regulator %d\n", + (int)PTR_ERR(st->vddio_supply)); + + return PTR_ERR(st->vddio_supply); + } + + result = inv_mpu_core_enable_regulator(st); + if (result) + return result; + + result = devm_add_action(dev, inv_mpu_core_disable_regulator_action, + st); + if (result) { + inv_mpu_core_disable_regulator_action(st); + dev_err(dev, "Failed to setup regulator cleanup action %d\n", + result); + return result; + } + /* power is turned on inside check chip type*/ result = inv_check_and_setup_chip(st); if (result) @@ -1051,7 +1107,12 @@ static int inv_mpu_resume(struct device *dev) int result; mutex_lock(&st->lock); + result = inv_mpu_core_enable_regulator(st); + if (result) + goto out_unlock; + result = inv_mpu6050_set_power_itg(st, true); +out_unlock: mutex_unlock(&st->lock); return result; @@ -1064,6 +1125,7 @@ static int inv_mpu_suspend(struct device *dev) mutex_lock(&st->lock); result = inv_mpu6050_set_power_itg(st, false); + inv_mpu_core_disable_regulator(st); mutex_unlock(&st->lock); return result; diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h index e69a59659dbc..6bcc11fc1b88 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h @@ -129,6 +129,7 @@ struct inv_mpu6050_hw { * @chip_period: chip internal period estimation (~1kHz). * @it_timestamp: timestamp from previous interrupt. * @data_timestamp: timestamp for next data sample. + * @vddio_supply voltage regulator for the chip. */ struct inv_mpu6050_state { struct mutex lock; @@ -149,6 +150,7 @@ struct inv_mpu6050_state { s64 chip_period; s64 it_timestamp; s64 data_timestamp; + struct regulator *vddio_supply; }; /*register and associated bit definition*/ diff --git a/drivers/iio/imu/st_lsm6dsx/Kconfig b/drivers/iio/imu/st_lsm6dsx/Kconfig index ccc817e17eb8..094fd006b63d 100644 --- a/drivers/iio/imu/st_lsm6dsx/Kconfig +++ b/drivers/iio/imu/st_lsm6dsx/Kconfig @@ -9,7 +9,7 @@ config IIO_ST_LSM6DSX help Say yes here to build support for STMicroelectronics LSM6DSx imu sensor. Supported devices: lsm6ds3, lsm6ds3h, lsm6dsl, lsm6dsm, - ism330dlc + ism330dlc, lsm6dso To compile this driver as a module, choose M here: the module will be called st_lsm6dsx. diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h index edcd838037cd..ef73519a0fb6 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -19,6 +19,7 @@ #define ST_LSM6DSL_DEV_NAME "lsm6dsl" #define ST_LSM6DSM_DEV_NAME "lsm6dsm" #define ST_ISM330DLC_DEV_NAME "ism330dlc" +#define ST_LSM6DSO_DEV_NAME "lsm6dso" enum st_lsm6dsx_hw_id { ST_LSM6DS3_ID, @@ -26,14 +27,20 @@ enum st_lsm6dsx_hw_id { ST_LSM6DSL_ID, ST_LSM6DSM_ID, ST_ISM330DLC_ID, + ST_LSM6DSO_ID, ST_LSM6DSX_MAX_ID, }; -#define ST_LSM6DSX_BUFF_SIZE 400 +#define ST_LSM6DSX_BUFF_SIZE 512 #define ST_LSM6DSX_CHAN_SIZE 2 #define ST_LSM6DSX_SAMPLE_SIZE 6 +#define ST_LSM6DSX_TAG_SIZE 1 +#define ST_LSM6DSX_TAGGED_SAMPLE_SIZE (ST_LSM6DSX_SAMPLE_SIZE + \ + ST_LSM6DSX_TAG_SIZE) #define ST_LSM6DSX_MAX_WORD_LEN ((32 / ST_LSM6DSX_SAMPLE_SIZE) * \ ST_LSM6DSX_SAMPLE_SIZE) +#define ST_LSM6DSX_MAX_TAGGED_WORD_LEN ((32 / ST_LSM6DSX_TAGGED_SAMPLE_SIZE) \ + * ST_LSM6DSX_TAGGED_SAMPLE_SIZE) #define ST_LSM6DSX_SHIFT_VAL(val, mask) (((val) << __ffs(mask)) & (mask)) struct st_lsm6dsx_reg { @@ -41,13 +48,17 @@ struct st_lsm6dsx_reg { u8 mask; }; +struct st_lsm6dsx_hw; + /** * struct st_lsm6dsx_fifo_ops - ST IMU FIFO settings + * @read_fifo: Read FIFO callback. * @fifo_th: FIFO threshold register info (addr + mask). * @fifo_diff: FIFO diff status register info (addr + mask). * @th_wl: FIFO threshold word length. */ struct st_lsm6dsx_fifo_ops { + int (*read_fifo)(struct st_lsm6dsx_hw *hw); struct { u8 addr; u16 mask; @@ -79,6 +90,7 @@ struct st_lsm6dsx_hw_ts_settings { * @max_fifo_size: Sensor max fifo length in FIFO words. * @id: List of hw id supported by the driver configuration. * @decimator: List of decimator register info (addr + mask). + * @batch: List of FIFO batching register info (addr + mask). * @fifo_ops: Sensor hw FIFO parameters. * @ts_settings: Hw timer related settings. */ @@ -87,6 +99,7 @@ struct st_lsm6dsx_settings { u16 max_fifo_size; enum st_lsm6dsx_hw_id id[ST_LSM6DSX_MAX_ID]; struct st_lsm6dsx_reg decimator[ST_LSM6DSX_MAX_ID]; + struct st_lsm6dsx_reg batch[ST_LSM6DSX_MAX_ID]; struct st_lsm6dsx_fifo_ops fifo_ops; struct st_lsm6dsx_hw_ts_settings ts_settings; }; @@ -175,5 +188,8 @@ int st_lsm6dsx_update_watermark(struct st_lsm6dsx_sensor *sensor, int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw); int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw, enum st_lsm6dsx_fifo_mode fifo_mode); +int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw); +int st_lsm6dsx_read_tagged_fifo(struct st_lsm6dsx_hw *hw); +int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val); #endif /* ST_LSM6DSX_H */ diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c index 631360b14ca7..b5263fc522ca 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c @@ -12,6 +12,11 @@ * buffer contains the data of all the enabled FIFO data sets * (e.g. Gx, Gy, Gz, Ax, Ay, Az), then data are repeated depending on the * value of the decimation factor and ODR set for each FIFO data set. + * + * LSM6DSO: The FIFO buffer can be configured to store data from gyroscope and + * accelerometer. Each sample is queued with a tag (1B) indicating data source + * (gyroscope, accelerometer, hw timer). + * * FIFO supported modes: * - BYPASS: FIFO disabled * - CONTINUOUS: FIFO enabled. When the buffer is full, the FIFO index @@ -46,6 +51,7 @@ #define ST_LSM6DSX_FIFO_ODR_MASK GENMASK(6, 3) #define ST_LSM6DSX_FIFO_EMPTY_MASK BIT(12) #define ST_LSM6DSX_REG_FIFO_OUTL_ADDR 0x3e +#define ST_LSM6DSX_REG_FIFO_OUT_TAG_ADDR 0x78 #define ST_LSM6DSX_REG_TS_RESET_ADDR 0x42 #define ST_LSM6DSX_MAX_FIFO_ODR_VAL 0x08 @@ -58,6 +64,12 @@ struct st_lsm6dsx_decimator_entry { u8 val; }; +enum st_lsm6dsx_fifo_tag { + ST_LSM6DSX_GYRO_TAG = 0x01, + ST_LSM6DSX_ACC_TAG = 0x02, + ST_LSM6DSX_TS_TAG = 0x04, +}; + static const struct st_lsm6dsx_decimator_entry st_lsm6dsx_decimator_table[] = { { 0, 0x0 }, @@ -177,12 +189,34 @@ static int st_lsm6dsx_set_fifo_odr(struct st_lsm6dsx_sensor *sensor, bool enable) { struct st_lsm6dsx_hw *hw = sensor->hw; + const struct st_lsm6dsx_reg *batch_reg; u8 data; - data = hw->enable_mask ? ST_LSM6DSX_MAX_FIFO_ODR_VAL : 0; - return regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_FIFO_MODE_ADDR, - ST_LSM6DSX_FIFO_ODR_MASK, - FIELD_PREP(ST_LSM6DSX_FIFO_ODR_MASK, data)); + batch_reg = &hw->settings->batch[sensor->id]; + if (batch_reg->addr) { + int val; + + if (enable) { + int err; + + err = st_lsm6dsx_check_odr(sensor, sensor->odr, + &data); + if (err < 0) + return err; + } else { + data = 0; + } + val = ST_LSM6DSX_SHIFT_VAL(data, batch_reg->mask); + return regmap_update_bits(hw->regmap, batch_reg->addr, + batch_reg->mask, val); + } else { + data = hw->enable_mask ? ST_LSM6DSX_MAX_FIFO_ODR_VAL : 0; + return regmap_update_bits(hw->regmap, + ST_LSM6DSX_REG_FIFO_MODE_ADDR, + ST_LSM6DSX_FIFO_ODR_MASK, + FIELD_PREP(ST_LSM6DSX_FIFO_ODR_MASK, + data)); + } } int st_lsm6dsx_update_watermark(struct st_lsm6dsx_sensor *sensor, u16 watermark) @@ -250,21 +284,21 @@ static int st_lsm6dsx_reset_hw_ts(struct st_lsm6dsx_hw *hw) } /* - * Set max bulk read to ST_LSM6DSX_MAX_WORD_LEN in order to avoid - * a kmalloc for each bus access + * Set max bulk read to ST_LSM6DSX_MAX_WORD_LEN/ST_LSM6DSX_MAX_TAGGED_WORD_LEN + * in order to avoid a kmalloc for each bus access */ -static inline int st_lsm6dsx_read_block(struct st_lsm6dsx_hw *hw, u8 *data, - unsigned int data_len) +static inline int st_lsm6dsx_read_block(struct st_lsm6dsx_hw *hw, u8 addr, + u8 *data, unsigned int data_len, + unsigned int max_word_len) { unsigned int word_len, read_len = 0; int err; while (read_len < data_len) { word_len = min_t(unsigned int, data_len - read_len, - ST_LSM6DSX_MAX_WORD_LEN); - err = regmap_bulk_read(hw->regmap, - ST_LSM6DSX_REG_FIFO_OUTL_ADDR, - data + read_len, word_len); + max_word_len); + err = regmap_bulk_read(hw->regmap, addr, data + read_len, + word_len); if (err < 0) return err; read_len += word_len; @@ -282,7 +316,7 @@ static inline int st_lsm6dsx_read_block(struct st_lsm6dsx_hw *hw, u8 *data, * * Return: Number of bytes read from the FIFO */ -static int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) +int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) { u16 fifo_len, pattern_len = hw->sip * ST_LSM6DSX_SAMPLE_SIZE; u16 fifo_diff_mask = hw->settings->fifo_ops.fifo_diff.mask; @@ -314,7 +348,9 @@ static int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) gyro_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_GYRO]); for (read_len = 0; read_len < fifo_len; read_len += pattern_len) { - err = st_lsm6dsx_read_block(hw, hw->buff, pattern_len); + err = st_lsm6dsx_read_block(hw, ST_LSM6DSX_REG_FIFO_OUTL_ADDR, + hw->buff, pattern_len, + ST_LSM6DSX_MAX_WORD_LEN); if (err < 0) { dev_err(hw->dev, "failed to read pattern from fifo (err=%d)\n", @@ -400,13 +436,111 @@ static int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw) return read_len; } +/** + * st_lsm6dsx_read_tagged_fifo() - LSM6DSO read FIFO routine + * @hw: Pointer to instance of struct st_lsm6dsx_hw. + * + * Read samples from the hw FIFO and push them to IIO buffers. + * + * Return: Number of bytes read from the FIFO + */ +int st_lsm6dsx_read_tagged_fifo(struct st_lsm6dsx_hw *hw) +{ + u16 pattern_len = hw->sip * ST_LSM6DSX_TAGGED_SAMPLE_SIZE; + u16 fifo_len, fifo_diff_mask; + struct st_lsm6dsx_sensor *acc_sensor, *gyro_sensor; + u8 iio_buff[ST_LSM6DSX_IIO_BUFF_SIZE], tag; + bool reset_ts = false; + int i, err, read_len; + __le16 fifo_status; + s64 ts = 0; + + err = regmap_bulk_read(hw->regmap, + hw->settings->fifo_ops.fifo_diff.addr, + &fifo_status, sizeof(fifo_status)); + if (err < 0) { + dev_err(hw->dev, "failed to read fifo status (err=%d)\n", + err); + return err; + } + + fifo_diff_mask = hw->settings->fifo_ops.fifo_diff.mask; + fifo_len = (le16_to_cpu(fifo_status) & fifo_diff_mask) * + ST_LSM6DSX_TAGGED_SAMPLE_SIZE; + if (!fifo_len) + return 0; + + acc_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); + gyro_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_GYRO]); + + for (read_len = 0; read_len < fifo_len; read_len += pattern_len) { + err = st_lsm6dsx_read_block(hw, + ST_LSM6DSX_REG_FIFO_OUT_TAG_ADDR, + hw->buff, pattern_len, + ST_LSM6DSX_MAX_TAGGED_WORD_LEN); + if (err < 0) { + dev_err(hw->dev, + "failed to read pattern from fifo (err=%d)\n", + err); + return err; + } + + for (i = 0; i < pattern_len; + i += ST_LSM6DSX_TAGGED_SAMPLE_SIZE) { + memcpy(iio_buff, &hw->buff[i + ST_LSM6DSX_TAG_SIZE], + ST_LSM6DSX_SAMPLE_SIZE); + + tag = hw->buff[i] >> 3; + switch (tag) { + case ST_LSM6DSX_TS_TAG: + /* + * hw timestamp is 4B long and it is stored + * in FIFO according to this schema: + * B0 = ts[7:0], B1 = ts[15:8], B2 = ts[23:16], + * B3 = ts[31:24] + */ + ts = le32_to_cpu(*((__le32 *)iio_buff)); + /* + * check if hw timestamp engine is going to + * reset (the sensor generates an interrupt + * to signal the hw timestamp will reset in + * 1.638s) + */ + if (!reset_ts && ts >= 0xffff0000) + reset_ts = true; + ts *= ST_LSM6DSX_TS_SENSITIVITY; + break; + case ST_LSM6DSX_GYRO_TAG: + iio_push_to_buffers_with_timestamp( + hw->iio_devs[ST_LSM6DSX_ID_GYRO], + iio_buff, gyro_sensor->ts_ref + ts); + break; + case ST_LSM6DSX_ACC_TAG: + iio_push_to_buffers_with_timestamp( + hw->iio_devs[ST_LSM6DSX_ID_ACC], + iio_buff, acc_sensor->ts_ref + ts); + break; + default: + break; + } + } + } + + if (unlikely(reset_ts)) { + err = st_lsm6dsx_reset_hw_ts(hw); + if (err < 0) + return err; + } + return read_len; +} + int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw) { int err; mutex_lock(&hw->fifo_lock); - st_lsm6dsx_read_fifo(hw); + hw->settings->fifo_ops.read_fifo(hw); err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_BYPASS); mutex_unlock(&hw->fifo_lock); @@ -478,7 +612,7 @@ static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) int count; mutex_lock(&hw->fifo_lock); - count = st_lsm6dsx_read_fifo(hw); + count = hw->settings->fifo_ops.read_fifo(hw); mutex_unlock(&hw->fifo_lock); return !count ? IRQ_NONE : IRQ_HANDLED; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c index aebbe0ddd8d8..2ad3c610e4b6 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -23,6 +23,12 @@ * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 * - FIFO size: 4KB * + * - LSM6DSO + * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 + * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 + * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 + * - FIFO size: 3KB + * * Copyright 2016 STMicroelectronics Inc. * * Lorenzo Bianconi <lorenzo.bianconi@st.com> @@ -171,6 +177,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { }, }, .fifo_ops = { + .read_fifo = st_lsm6dsx_read_fifo, .fifo_th = { .addr = 0x06, .mask = GENMASK(11, 0), @@ -217,6 +224,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { }, }, .fifo_ops = { + .read_fifo = st_lsm6dsx_read_fifo, .fifo_th = { .addr = 0x06, .mask = GENMASK(11, 0), @@ -265,6 +273,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { }, }, .fifo_ops = { + .read_fifo = st_lsm6dsx_read_fifo, .fifo_th = { .addr = 0x06, .mask = GENMASK(10, 0), @@ -294,6 +303,45 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { }, }, }, + { + .wai = 0x6c, + .max_fifo_size = 512, + .id = { + [0] = ST_LSM6DSO_ID, + }, + .batch = { + [ST_LSM6DSX_ID_ACC] = { + .addr = 0x09, + .mask = GENMASK(3, 0), + }, + [ST_LSM6DSX_ID_GYRO] = { + .addr = 0x09, + .mask = GENMASK(7, 4), + }, + }, + .fifo_ops = { + .read_fifo = st_lsm6dsx_read_tagged_fifo, + .fifo_th = { + .addr = 0x07, + .mask = GENMASK(8, 0), + }, + .fifo_diff = { + .addr = 0x3a, + .mask = GENMASK(8, 0), + }, + .th_wl = 1, + }, + .ts_settings = { + .timer_en = { + .addr = 0x19, + .mask = BIT(5), + }, + .decimator = { + .addr = 0x0a, + .mask = GENMASK(7, 6), + }, + }, + }, }; #define ST_LSM6DSX_CHANNEL(chan_type, addr, mod, scan_idx) \ @@ -395,8 +443,7 @@ static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, return 0; } -static int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, - u8 *val) +int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val) { int i; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c index 377c4e9997da..448b7bc1e578 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c @@ -61,6 +61,10 @@ static const struct of_device_id st_lsm6dsx_i2c_of_match[] = { .compatible = "st,ism330dlc", .data = (void *)ST_ISM330DLC_ID, }, + { + .compatible = "st,lsm6dso", + .data = (void *)ST_LSM6DSO_ID, + }, {}, }; MODULE_DEVICE_TABLE(of, st_lsm6dsx_i2c_of_match); @@ -71,6 +75,7 @@ static const struct i2c_device_id st_lsm6dsx_i2c_id_table[] = { { ST_LSM6DSL_DEV_NAME, ST_LSM6DSL_ID }, { ST_LSM6DSM_DEV_NAME, ST_LSM6DSM_ID }, { ST_ISM330DLC_DEV_NAME, ST_ISM330DLC_ID }, + { ST_LSM6DSO_DEV_NAME, ST_LSM6DSO_ID }, {}, }; MODULE_DEVICE_TABLE(i2c, st_lsm6dsx_i2c_id_table); diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c index fec5c6ce7eb7..b1df8a6973e6 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c @@ -61,6 +61,10 @@ static const struct of_device_id st_lsm6dsx_spi_of_match[] = { .compatible = "st,ism330dlc", .data = (void *)ST_ISM330DLC_ID, }, + { + .compatible = "st,lsm6dso", + .data = (void *)ST_LSM6DSO_ID, + }, {}, }; MODULE_DEVICE_TABLE(of, st_lsm6dsx_spi_of_match); @@ -71,6 +75,7 @@ static const struct spi_device_id st_lsm6dsx_spi_id_table[] = { { ST_LSM6DSL_DEV_NAME, ST_LSM6DSL_ID }, { ST_LSM6DSM_DEV_NAME, ST_LSM6DSM_ID }, { ST_ISM330DLC_DEV_NAME, ST_ISM330DLC_ID }, + { ST_LSM6DSO_DEV_NAME, ST_LSM6DSO_ID }, {}, }; MODULE_DEVICE_TABLE(spi, st_lsm6dsx_spi_id_table); diff --git a/drivers/iio/light/bh1750.c b/drivers/iio/light/bh1750.c index a814828e69f5..28347df78cff 100644 --- a/drivers/iio/light/bh1750.c +++ b/drivers/iio/light/bh1750.c @@ -1,12 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * ROHM BH1710/BH1715/BH1721/BH1750/BH1751 ambient light sensor driver * * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * * Data sheets: * http://rohmfs.rohm.com/en/products/databook/datasheet/ic/sensor/light/bh1710fvc-e.pdf * http://rohmfs.rohm.com/en/products/databook/datasheet/ic/sensor/light/bh1715fvc-e.pdf @@ -281,8 +278,7 @@ static int bh1750_remove(struct i2c_client *client) return 0; } -#ifdef CONFIG_PM_SLEEP -static int bh1750_suspend(struct device *dev) +static int __maybe_unused bh1750_suspend(struct device *dev) { int ret; struct bh1750_data *data = @@ -300,10 +296,6 @@ static int bh1750_suspend(struct device *dev) } static SIMPLE_DEV_PM_OPS(bh1750_pm_ops, bh1750_suspend, NULL); -#define BH1750_PM_OPS (&bh1750_pm_ops) -#else -#define BH1750_PM_OPS NULL -#endif static const struct i2c_device_id bh1750_id[] = { { "bh1710", BH1710 }, @@ -315,10 +307,21 @@ static const struct i2c_device_id bh1750_id[] = { }; MODULE_DEVICE_TABLE(i2c, bh1750_id); +static const struct of_device_id bh1750_of_match[] = { + { .compatible = "rohm,bh1710", }, + { .compatible = "rohm,bh1715", }, + { .compatible = "rohm,bh1721", }, + { .compatible = "rohm,bh1750", }, + { .compatible = "rohm,bh1751", }, + { } +}; +MODULE_DEVICE_TABLE(of, bh1750_of_match); + static struct i2c_driver bh1750_driver = { .driver = { .name = "bh1750", - .pm = BH1750_PM_OPS, + .of_match_table = bh1750_of_match, + .pm = &bh1750_pm_ops, }, .probe = bh1750_probe, .remove = bh1750_remove, diff --git a/drivers/iio/light/max44000.c b/drivers/iio/light/max44000.c index 4067dff2ff6a..d3fb460cfbdc 100644 --- a/drivers/iio/light/max44000.c +++ b/drivers/iio/light/max44000.c @@ -99,7 +99,6 @@ static const int max44000_alspga_shift[] = {0, 2, 4, 7}; * Handling this internally is also required for buffer support because the * channel's scan_type can't be modified dynamically. */ -static const int max44000_alstim_shift[] = {0, 2, 4, 6}; #define MAX44000_ALSTIM_SHIFT(alstim) (2 * (alstim)) /* Available integration times with pretty manual alignment: */ diff --git a/drivers/iio/light/tsl2772.c b/drivers/iio/light/tsl2772.c index df5b2a0da96c..83cece921843 100644 --- a/drivers/iio/light/tsl2772.c +++ b/drivers/iio/light/tsl2772.c @@ -20,6 +20,7 @@ #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> #include <linux/platform_data/tsl2772.h> +#include <linux/regulator/consumer.h> /* Cal defs */ #define PROX_STAT_CAL 0 @@ -107,6 +108,11 @@ #define TSL2772_ALS_GAIN_TRIM_MIN 250 #define TSL2772_ALS_GAIN_TRIM_MAX 4000 +#define TSL2772_MAX_PROX_LEDS 2 + +#define TSL2772_BOOT_MIN_SLEEP_TIME 10000 +#define TSL2772_BOOT_MAX_SLEEP_TIME 28000 + /* Device family members */ enum { tsl2571, @@ -118,7 +124,8 @@ enum { tsl2672, tmd2672, tsl2772, - tmd2772 + tmd2772, + apds9930, }; enum { @@ -141,11 +148,21 @@ struct tsl2772_chip_info { const struct iio_info *info; }; +static const int tsl2772_led_currents[][2] = { + { 100000, TSL2772_100_mA }, + { 50000, TSL2772_50_mA }, + { 25000, TSL2772_25_mA }, + { 13000, TSL2772_13_mA }, + { 0, 0 } +}; + struct tsl2772_chip { kernel_ulong_t id; struct mutex prox_mutex; struct mutex als_mutex; struct i2c_client *client; + struct regulator *vdd_supply; + struct regulator *vddio_supply; u16 prox_data; struct tsl2772_als_info als_cur_info; struct tsl2772_settings settings; @@ -197,6 +214,12 @@ static const struct tsl2772_lux tmd2x72_lux_table[TSL2772_DEF_LUX_TABLE_SZ] = { { 0, 0 }, }; +static const struct tsl2772_lux apds9930_lux_table[TSL2772_DEF_LUX_TABLE_SZ] = { + { 52000, 96824 }, + { 38792, 67132 }, + { 0, 0 }, +}; + static const struct tsl2772_lux *tsl2772_default_lux_table_group[] = { [tsl2571] = tsl2x71_lux_table, [tsl2671] = tsl2x71_lux_table, @@ -208,6 +231,7 @@ static const struct tsl2772_lux *tsl2772_default_lux_table_group[] = { [tmd2672] = tmd2x72_lux_table, [tsl2772] = tsl2x72_lux_table, [tmd2772] = tmd2x72_lux_table, + [apds9930] = apds9930_lux_table, }; static const struct tsl2772_settings tsl2772_default_settings = { @@ -258,6 +282,7 @@ static const int tsl2772_int_time_avail[][6] = { [tmd2672] = { 0, 2730, 0, 2730, 0, 699000 }, [tsl2772] = { 0, 2730, 0, 2730, 0, 699000 }, [tmd2772] = { 0, 2730, 0, 2730, 0, 699000 }, + [apds9930] = { 0, 2730, 0, 2730, 0, 699000 }, }; static int tsl2772_int_calibscale_avail[] = { 1, 8, 16, 120 }; @@ -283,7 +308,8 @@ static const u8 device_channel_config[] = { [tsl2672] = PRX2, [tmd2672] = PRX2, [tsl2772] = ALSPRX2, - [tmd2772] = ALSPRX2 + [tmd2772] = ALSPRX2, + [apds9930] = ALSPRX2, }; static int tsl2772_read_status(struct tsl2772_chip *chip) @@ -497,6 +523,7 @@ static int tsl2772_get_prox(struct iio_dev *indio_dev) case tmd2672: case tsl2772: case tmd2772: + case apds9930: if (!(ret & TSL2772_STA_PRX_VALID)) { ret = -EINVAL; goto prox_poll_err; @@ -515,6 +542,75 @@ prox_poll_err: return ret; } +static int tsl2772_read_prox_led_current(struct tsl2772_chip *chip) +{ + struct device_node *of_node = chip->client->dev.of_node; + int ret, tmp, i; + + ret = of_property_read_u32(of_node, "led-max-microamp", &tmp); + if (ret < 0) + return ret; + + for (i = 0; tsl2772_led_currents[i][0] != 0; i++) { + if (tmp == tsl2772_led_currents[i][0]) { + chip->settings.prox_power = tsl2772_led_currents[i][1]; + return 0; + } + } + + dev_err(&chip->client->dev, "Invalid value %d for led-max-microamp\n", + tmp); + + return -EINVAL; + +} + +static int tsl2772_read_prox_diodes(struct tsl2772_chip *chip) +{ + struct device_node *of_node = chip->client->dev.of_node; + int i, ret, num_leds, prox_diode_mask; + u32 leds[TSL2772_MAX_PROX_LEDS]; + + ret = of_property_count_u32_elems(of_node, "amstaos,proximity-diodes"); + if (ret < 0) + return ret; + + num_leds = ret; + if (num_leds > TSL2772_MAX_PROX_LEDS) + num_leds = TSL2772_MAX_PROX_LEDS; + + ret = of_property_read_u32_array(of_node, "amstaos,proximity-diodes", + leds, num_leds); + if (ret < 0) { + dev_err(&chip->client->dev, + "Invalid value for amstaos,proximity-diodes: %d.\n", + ret); + return ret; + } + + prox_diode_mask = 0; + for (i = 0; i < num_leds; i++) { + if (leds[i] == 0) + prox_diode_mask |= TSL2772_DIODE0; + else if (leds[i] == 1) + prox_diode_mask |= TSL2772_DIODE1; + else { + dev_err(&chip->client->dev, + "Invalid value %d in amstaos,proximity-diodes.\n", + leds[i]); + return -EINVAL; + } + } + + return 0; +} + +static void tsl2772_parse_dt(struct tsl2772_chip *chip) +{ + tsl2772_read_prox_led_current(chip); + tsl2772_read_prox_diodes(chip); +} + /** * tsl2772_defaults() - Populates the device nominal operating parameters * with those provided by a 'platform' data struct or @@ -541,6 +637,8 @@ static void tsl2772_defaults(struct tsl2772_chip *chip) memcpy(chip->tsl2772_device_lux, tsl2772_default_lux_table_group[chip->id], TSL2772_DEFAULT_TABLE_BYTES); + + tsl2772_parse_dt(chip); } /** @@ -595,6 +693,52 @@ static int tsl2772_als_calibrate(struct iio_dev *indio_dev) return ret; } +static void tsl2772_disable_regulators_action(void *_data) +{ + struct tsl2772_chip *chip = _data; + + regulator_disable(chip->vdd_supply); + regulator_disable(chip->vddio_supply); +} + +static int tsl2772_enable_regulator(struct tsl2772_chip *chip, + struct regulator *regulator) +{ + int ret; + + ret = regulator_enable(regulator); + if (ret < 0) { + dev_err(&chip->client->dev, "Failed to enable regulator: %d\n", + ret); + return ret; + } + + return 0; +} + +static struct regulator *tsl2772_get_regulator(struct tsl2772_chip *chip, + char *name) +{ + struct regulator *regulator; + int ret; + + regulator = devm_regulator_get(&chip->client->dev, name); + if (IS_ERR(regulator)) { + if (PTR_ERR(regulator) != -EPROBE_DEFER) + dev_err(&chip->client->dev, + "Failed to get %s regulator %d\n", + name, (int)PTR_ERR(regulator)); + + return regulator; + } + + ret = tsl2772_enable_regulator(chip, regulator); + if (ret < 0) + return ERR_PTR(ret); + + return regulator; +} + static int tsl2772_chip_on(struct iio_dev *indio_dev) { struct tsl2772_chip *chip = iio_priv(indio_dev); @@ -1260,6 +1404,7 @@ static int tsl2772_device_id_verif(int id, int target) case tmd2672: case tsl2772: case tmd2772: + case apds9930: return (id & 0xf0) == SWORDFISH_ID; } @@ -1652,6 +1797,27 @@ static int tsl2772_probe(struct i2c_client *clientp, chip->client = clientp; i2c_set_clientdata(clientp, indio_dev); + chip->vddio_supply = tsl2772_get_regulator(chip, "vddio"); + if (IS_ERR(chip->vddio_supply)) + return PTR_ERR(chip->vddio_supply); + + chip->vdd_supply = tsl2772_get_regulator(chip, "vdd"); + if (IS_ERR(chip->vdd_supply)) { + regulator_disable(chip->vddio_supply); + return PTR_ERR(chip->vdd_supply); + } + + ret = devm_add_action(&clientp->dev, tsl2772_disable_regulators_action, + chip); + if (ret < 0) { + tsl2772_disable_regulators_action(chip); + dev_err(&clientp->dev, "Failed to setup regulator cleanup action %d\n", + ret); + return ret; + } + + usleep_range(TSL2772_BOOT_MIN_SLEEP_TIME, TSL2772_BOOT_MAX_SLEEP_TIME); + ret = i2c_smbus_read_byte_data(chip->client, TSL2772_CMD_REG | TSL2772_CHIPID); if (ret < 0) @@ -1725,13 +1891,33 @@ static int tsl2772_probe(struct i2c_client *clientp, static int tsl2772_suspend(struct device *dev) { struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct tsl2772_chip *chip = iio_priv(indio_dev); + int ret; + + ret = tsl2772_chip_off(indio_dev); + regulator_disable(chip->vdd_supply); + regulator_disable(chip->vddio_supply); - return tsl2772_chip_off(indio_dev); + return ret; } static int tsl2772_resume(struct device *dev) { struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct tsl2772_chip *chip = iio_priv(indio_dev); + int ret; + + ret = tsl2772_enable_regulator(chip, chip->vddio_supply); + if (ret < 0) + return ret; + + ret = tsl2772_enable_regulator(chip, chip->vdd_supply); + if (ret < 0) { + regulator_disable(chip->vddio_supply); + return ret; + } + + usleep_range(TSL2772_BOOT_MIN_SLEEP_TIME, TSL2772_BOOT_MAX_SLEEP_TIME); return tsl2772_chip_on(indio_dev); } @@ -1758,6 +1944,7 @@ static const struct i2c_device_id tsl2772_idtable[] = { { "tmd2672", tmd2672 }, { "tsl2772", tsl2772 }, { "tmd2772", tmd2772 }, + { "apds9930", apds9930}, {} }; @@ -1774,6 +1961,7 @@ static const struct of_device_id tsl2772_of_match[] = { { .compatible = "amstaos,tmd2672" }, { .compatible = "amstaos,tsl2772" }, { .compatible = "amstaos,tmd2772" }, + { .compatible = "avago,apds9930" }, {} }; MODULE_DEVICE_TABLE(of, tsl2772_of_match); diff --git a/drivers/iio/magnetometer/hmc5843.h b/drivers/iio/magnetometer/hmc5843.h index 76a5d7484d8d..a75224cf99df 100644 --- a/drivers/iio/magnetometer/hmc5843.h +++ b/drivers/iio/magnetometer/hmc5843.h @@ -31,7 +31,7 @@ enum hmc5843_ids { }; /** - * struct hcm5843_data - device specific data + * struct hmc5843_data - device specific data * @dev: actual device * @lock: update and read regmap data * @regmap: hardware access register maps diff --git a/drivers/iio/multiplexer/iio-mux.c b/drivers/iio/multiplexer/iio-mux.c index e1f44cecdef4..0422ef57914c 100644 --- a/drivers/iio/multiplexer/iio-mux.c +++ b/drivers/iio/multiplexer/iio-mux.c @@ -1,13 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * IIO multiplexer driver * * Copyright (C) 2017 Axentia Technologies AB * * Author: Peter Rosin <peda@axentia.se> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #include <linux/err.h> diff --git a/drivers/iio/potentiometer/max5481.c b/drivers/iio/potentiometer/max5481.c index ffe2761333a2..6d2f13fa5662 100644 --- a/drivers/iio/potentiometer/max5481.c +++ b/drivers/iio/potentiometer/max5481.c @@ -137,7 +137,6 @@ static int max5481_probe(struct spi_device *spi) struct iio_dev *indio_dev; struct max5481_data *data; const struct spi_device_id *id = spi_get_device_id(spi); - const struct of_device_id *match; int ret; indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*data)); @@ -149,10 +148,8 @@ static int max5481_probe(struct spi_device *spi) data->spi = spi; - match = of_match_device(of_match_ptr(max5481_match), &spi->dev); - if (match) - data->cfg = of_device_get_match_data(&spi->dev); - else + data->cfg = of_device_get_match_data(&spi->dev); + if (!data->cfg) data->cfg = &max5481_cfg[id->driver_data]; indio_dev->name = id->name; diff --git a/drivers/iio/potentiometer/mcp4018.c b/drivers/iio/potentiometer/mcp4018.c index 320a7c929777..62151b2a2b12 100644 --- a/drivers/iio/potentiometer/mcp4018.c +++ b/drivers/iio/potentiometer/mcp4018.c @@ -147,7 +147,6 @@ static int mcp4018_probe(struct i2c_client *client) struct device *dev = &client->dev; struct mcp4018_data *data; struct iio_dev *indio_dev; - const struct of_device_id *match; if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE)) { @@ -162,10 +161,8 @@ static int mcp4018_probe(struct i2c_client *client) i2c_set_clientdata(client, indio_dev); data->client = client; - match = of_match_device(of_match_ptr(mcp4018_of_match), dev); - if (match) - data->cfg = of_device_get_match_data(dev); - else + data->cfg = of_device_get_match_data(dev); + if (!data->cfg) data->cfg = &mcp4018_cfg[i2c_match_id(mcp4018_id, client)->driver_data]; indio_dev->dev.parent = dev; @@ -190,4 +187,4 @@ module_i2c_driver(mcp4018_driver); MODULE_AUTHOR("Peter Rosin <peda@axentia.se>"); MODULE_DESCRIPTION("MCP4018 digital potentiometer"); -MODULE_LICENSE("GPL"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/potentiometer/mcp4531.c b/drivers/iio/potentiometer/mcp4531.c index df894af6cccb..d71a22d71a30 100644 --- a/drivers/iio/potentiometer/mcp4531.c +++ b/drivers/iio/potentiometer/mcp4531.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Industrial I/O driver for Microchip digital potentiometers * Copyright (c) 2015 Axentia Technologies AB @@ -22,10 +23,6 @@ * mcp4652 2 257 5, 10, 50, 100 01011xx * mcp4661 2 257 5, 10, 50, 100 0101xxx * mcp4662 2 257 5, 10, 50, 100 01011xx - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. */ #include <linux/module.h> @@ -360,7 +357,6 @@ static int mcp4531_probe(struct i2c_client *client) struct device *dev = &client->dev; struct mcp4531_data *data; struct iio_dev *indio_dev; - const struct of_device_id *match; if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) { @@ -375,10 +371,8 @@ static int mcp4531_probe(struct i2c_client *client) i2c_set_clientdata(client, indio_dev); data->client = client; - match = of_match_device(of_match_ptr(mcp4531_of_match), dev); - if (match) - data->cfg = of_device_get_match_data(dev); - else + data->cfg = of_device_get_match_data(dev); + if (!data->cfg) data->cfg = &mcp4531_cfg[i2c_match_id(mcp4531_id, client)->driver_data]; indio_dev->dev.parent = dev; @@ -403,4 +397,4 @@ module_i2c_driver(mcp4531_driver); MODULE_AUTHOR("Peter Rosin <peda@axentia.se>"); MODULE_DESCRIPTION("MCP4531 digital potentiometer"); -MODULE_LICENSE("GPL"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/pressure/ms5611.h b/drivers/iio/pressure/ms5611.h index ead9e9f85894..bc06271fa38b 100644 --- a/drivers/iio/pressure/ms5611.h +++ b/drivers/iio/pressure/ms5611.h @@ -1,12 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * MS5611 pressure and temperature sensor driver * * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * */ #ifndef _MS5611_H diff --git a/drivers/iio/pressure/ms5611_core.c b/drivers/iio/pressure/ms5611_core.c index f950cfde5db9..2f598ad91621 100644 --- a/drivers/iio/pressure/ms5611_core.c +++ b/drivers/iio/pressure/ms5611_core.c @@ -1,12 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * MS5611 pressure and temperature sensor driver * * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * * Data sheet: * http://www.meas-spec.com/downloads/MS5611-01BA03.pdf * http://www.meas-spec.com/downloads/MS5607-02BA03.pdf diff --git a/drivers/iio/pressure/ms5611_i2c.c b/drivers/iio/pressure/ms5611_i2c.c index 55fb5fc0b6ea..8089c59adce5 100644 --- a/drivers/iio/pressure/ms5611_i2c.c +++ b/drivers/iio/pressure/ms5611_i2c.c @@ -1,12 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * MS5611 pressure and temperature sensor driver (I2C bus) * * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * * 7-bit I2C slave addresses: * * 0x77 (CSB pin low) @@ -117,9 +114,7 @@ static int ms5611_i2c_remove(struct i2c_client *client) #if defined(CONFIG_OF) static const struct of_device_id ms5611_i2c_matches[] = { { .compatible = "meas,ms5611" }, - { .compatible = "ms5611" }, { .compatible = "meas,ms5607" }, - { .compatible = "ms5607" }, { } }; MODULE_DEVICE_TABLE(of, ms5611_i2c_matches); diff --git a/drivers/iio/pressure/ms5611_spi.c b/drivers/iio/pressure/ms5611_spi.c index 932e05001e1a..b463eaa799ab 100644 --- a/drivers/iio/pressure/ms5611_spi.c +++ b/drivers/iio/pressure/ms5611_spi.c @@ -1,12 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * MS5611 pressure and temperature sensor driver (SPI bus) * * Copyright (c) Tomasz Duszynski <tduszyns@gmail.com> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * */ #include <linux/delay.h> @@ -119,9 +116,7 @@ static int ms5611_spi_remove(struct spi_device *spi) #if defined(CONFIG_OF) static const struct of_device_id ms5611_spi_matches[] = { { .compatible = "meas,ms5611" }, - { .compatible = "ms5611" }, { .compatible = "meas,ms5607" }, - { .compatible = "ms5607" }, { } }; MODULE_DEVICE_TABLE(of, ms5611_spi_matches); diff --git a/drivers/iio/proximity/Kconfig b/drivers/iio/proximity/Kconfig index 388ef70c11d2..b99367a89f81 100644 --- a/drivers/iio/proximity/Kconfig +++ b/drivers/iio/proximity/Kconfig @@ -92,4 +92,15 @@ config SRF08 To compile this driver as a module, choose M here: the module will be called srf08. +config VL53L0X_I2C + tristate "STMicroelectronics VL53L0X ToF ranger sensor (I2C)" + depends on I2C + help + Say Y here to build a driver for STMicroelectronics VL53L0X + ToF ranger sensors with i2c interface. + This driver can be used to measure the distance of objects. + + To compile this driver as a module, choose M here: the + module will be called vl53l0x-i2c. + endmenu diff --git a/drivers/iio/proximity/Makefile b/drivers/iio/proximity/Makefile index cac3d7d3325e..6d031f903c4c 100644 --- a/drivers/iio/proximity/Makefile +++ b/drivers/iio/proximity/Makefile @@ -11,3 +11,5 @@ obj-$(CONFIG_RFD77402) += rfd77402.o obj-$(CONFIG_SRF04) += srf04.o obj-$(CONFIG_SRF08) += srf08.o obj-$(CONFIG_SX9500) += sx9500.o +obj-$(CONFIG_VL53L0X_I2C) += vl53l0x-i2c.o + diff --git a/drivers/iio/proximity/isl29501.c b/drivers/iio/proximity/isl29501.c index e5e94540f404..5ae549075b27 100644 --- a/drivers/iio/proximity/isl29501.c +++ b/drivers/iio/proximity/isl29501.c @@ -232,7 +232,6 @@ static u32 isl29501_register_write(struct isl29501_private *isl29501, u32 value) { const struct isl29501_register_desc *reg = &isl29501_registers[name]; - u8 msb, lsb; int ret; if (!reg->msb && value > U8_MAX) @@ -241,22 +240,15 @@ static u32 isl29501_register_write(struct isl29501_private *isl29501, if (value > U16_MAX) return -ERANGE; - if (!reg->msb) { - lsb = value & 0xFF; - } else { - msb = (value >> 8) & 0xFF; - lsb = value & 0xFF; - } - mutex_lock(&isl29501->lock); if (reg->msb) { ret = i2c_smbus_write_byte_data(isl29501->client, - reg->msb, msb); + reg->msb, value >> 8); if (ret < 0) goto err; } - ret = i2c_smbus_write_byte_data(isl29501->client, reg->lsb, lsb); + ret = i2c_smbus_write_byte_data(isl29501->client, reg->lsb, value); err: mutex_unlock(&isl29501->lock); diff --git a/drivers/iio/proximity/vl53l0x-i2c.c b/drivers/iio/proximity/vl53l0x-i2c.c new file mode 100644 index 000000000000..b48216cc1858 --- /dev/null +++ b/drivers/iio/proximity/vl53l0x-i2c.c @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Support for ST VL53L0X FlightSense ToF Ranging Sensor on a i2c bus. + * + * Copyright (C) 2016 STMicroelectronics Imaging Division. + * Copyright (C) 2018 Song Qiang <songqiang1304521@gmail.com> + * + * Datasheet available at + * <https://www.st.com/resource/en/datasheet/vl53l0x.pdf> + * + * Default 7-bit i2c slave address 0x29. + * + * TODO: FIFO buffer, continuous mode, interrupts, range selection, + * sensor ID check. + */ + +#include <linux/delay.h> +#include <linux/i2c.h> +#include <linux/module.h> + +#include <linux/iio/iio.h> + +#define VL_REG_SYSRANGE_START 0x00 + +#define VL_REG_SYSRANGE_MODE_MASK GENMASK(3, 0) +#define VL_REG_SYSRANGE_MODE_SINGLESHOT 0x00 +#define VL_REG_SYSRANGE_MODE_START_STOP BIT(0) +#define VL_REG_SYSRANGE_MODE_BACKTOBACK BIT(1) +#define VL_REG_SYSRANGE_MODE_TIMED BIT(2) +#define VL_REG_SYSRANGE_MODE_HISTOGRAM BIT(3) + +#define VL_REG_RESULT_INT_STATUS 0x13 +#define VL_REG_RESULT_RANGE_STATUS 0x14 +#define VL_REG_RESULT_RANGE_STATUS_COMPLETE BIT(0) + +struct vl53l0x_data { + struct i2c_client *client; +}; + +static int vl53l0x_read_proximity(struct vl53l0x_data *data, + const struct iio_chan_spec *chan, + int *val) +{ + struct i2c_client *client = data->client; + u16 tries = 20; + u8 buffer[12]; + int ret; + + ret = i2c_smbus_write_byte_data(client, VL_REG_SYSRANGE_START, 1); + if (ret < 0) + return ret; + + do { + ret = i2c_smbus_read_byte_data(client, + VL_REG_RESULT_RANGE_STATUS); + if (ret < 0) + return ret; + + if (ret & VL_REG_RESULT_RANGE_STATUS_COMPLETE) + break; + + usleep_range(1000, 5000); + } while (--tries); + if (!tries) + return -ETIMEDOUT; + + ret = i2c_smbus_read_i2c_block_data(client, VL_REG_RESULT_RANGE_STATUS, + 12, buffer); + if (ret < 0) + return ret; + else if (ret != 12) + return -EREMOTEIO; + + /* Values should be between 30~1200 in millimeters. */ + *val = (buffer[10] << 8) + buffer[11]; + + return 0; +} + +static const struct iio_chan_spec vl53l0x_channels[] = { + { + .type = IIO_DISTANCE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + }, +}; + +static int vl53l0x_read_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + int *val, int *val2, long mask) +{ + struct vl53l0x_data *data = iio_priv(indio_dev); + int ret; + + if (chan->type != IIO_DISTANCE) + return -EINVAL; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + ret = vl53l0x_read_proximity(data, chan, val); + if (ret < 0) + return ret; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + *val = 0; + *val2 = 1000; + + return IIO_VAL_INT_PLUS_MICRO; + default: + return -EINVAL; + } +} + +static const struct iio_info vl53l0x_info = { + .read_raw = vl53l0x_read_raw, +}; + +static int vl53l0x_probe(struct i2c_client *client) +{ + struct vl53l0x_data *data; + struct iio_dev *indio_dev; + + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); + if (!indio_dev) + return -ENOMEM; + + data = iio_priv(indio_dev); + data->client = client; + i2c_set_clientdata(client, indio_dev); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_I2C_BLOCK | + I2C_FUNC_SMBUS_BYTE_DATA)) + return -EOPNOTSUPP; + + indio_dev->dev.parent = &client->dev; + indio_dev->name = "vl53l0x"; + indio_dev->info = &vl53l0x_info; + indio_dev->channels = vl53l0x_channels; + indio_dev->num_channels = ARRAY_SIZE(vl53l0x_channels); + indio_dev->modes = INDIO_DIRECT_MODE; + + return devm_iio_device_register(&client->dev, indio_dev); +} + +static const struct of_device_id st_vl53l0x_dt_match[] = { + { .compatible = "st,vl53l0x", }, + { } +}; +MODULE_DEVICE_TABLE(of, st_vl53l0x_dt_match); + +static struct i2c_driver vl53l0x_driver = { + .driver = { + .name = "vl53l0x-i2c", + .of_match_table = st_vl53l0x_dt_match, + }, + .probe_new = vl53l0x_probe, +}; +module_i2c_driver(vl53l0x_driver); + +MODULE_AUTHOR("Song Qiang <songqiang1304521@gmail.com>"); +MODULE_DESCRIPTION("ST vl53l0x ToF ranging sensor driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/trigger/iio-trig-sysfs.c b/drivers/iio/trigger/iio-trig-sysfs.c index 3f0dc9a1a514..45c4897295d6 100644 --- a/drivers/iio/trigger/iio-trig-sysfs.c +++ b/drivers/iio/trigger/iio-trig-sysfs.c @@ -222,7 +222,7 @@ static void __exit iio_sysfs_trig_exit(void) } module_exit(iio_sysfs_trig_exit); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Sysfs based trigger for the iio subsystem"); MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:iio-trig-sysfs"); diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 1abf76be2aa8..7c015536360d 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -80,8 +80,6 @@ source "drivers/staging/netlogic/Kconfig" source "drivers/staging/mt29f_spinand/Kconfig" -source "drivers/staging/dgnc/Kconfig" - source "drivers/staging/gs_fpgaboot/Kconfig" source "drivers/staging/unisys/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index ab0cbe8815b1..a79b3fe20cf0 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -29,7 +29,6 @@ obj-$(CONFIG_STAGING_BOARD) += board/ obj-$(CONFIG_LTE_GDM724X) += gdm724x/ obj-$(CONFIG_FIREWIRE_SERIAL) += fwserial/ obj-$(CONFIG_GOLDFISH) += goldfish/ -obj-$(CONFIG_DGNC) += dgnc/ obj-$(CONFIG_MTD_SPINAND_MT29F) += mt29f_spinand/ obj-$(CONFIG_GS_FPGABOOT) += gs_fpgaboot/ obj-$(CONFIG_UNISYSSPAR) += unisys/ diff --git a/drivers/staging/android/ion/ion.h b/drivers/staging/android/ion/ion.h index 16cbd38a7160..c006fc1e5a16 100644 --- a/drivers/staging/android/ion/ion.h +++ b/drivers/staging/android/ion/ion.h @@ -157,8 +157,6 @@ struct ion_heap_ops { * @lock: protects the free list * @waitqueue: queue to wait on from deferred free thread * @task: task struct of deferred free thread - * @debug_show: called when heap debug file is read to add any - * heap specific debug info to output * * Represents a pool of memory from which buffers can be made. In some * systems the only heap is regular system memory allocated via vmalloc. @@ -179,9 +177,6 @@ struct ion_heap { spinlock_t free_lock; wait_queue_head_t waitqueue; struct task_struct *task; - - int (*debug_show)(struct ion_heap *heap, struct seq_file *s, - void *unused); }; /** diff --git a/drivers/staging/android/ion/ion_system_heap.c b/drivers/staging/android/ion/ion_system_heap.c index 701eb9f3b0f1..548bb02c0ca6 100644 --- a/drivers/staging/android/ion/ion_system_heap.c +++ b/drivers/staging/android/ion/ion_system_heap.c @@ -212,29 +212,6 @@ static struct ion_heap_ops system_heap_ops = { .shrink = ion_system_heap_shrink, }; -static int ion_system_heap_debug_show(struct ion_heap *heap, struct seq_file *s, - void *unused) -{ - struct ion_system_heap *sys_heap = container_of(heap, - struct ion_system_heap, - heap); - int i; - struct ion_page_pool *pool; - - for (i = 0; i < NUM_ORDERS; i++) { - pool = sys_heap->pools[i]; - - seq_printf(s, "%d order %u highmem pages %lu total\n", - pool->high_count, pool->order, - (PAGE_SIZE << pool->order) * pool->high_count); - seq_printf(s, "%d order %u lowmem pages %lu total\n", - pool->low_count, pool->order, - (PAGE_SIZE << pool->order) * pool->low_count); - } - - return 0; -} - static void ion_system_heap_destroy_pools(struct ion_page_pool **pools) { int i; @@ -281,7 +258,6 @@ static struct ion_heap *__ion_system_heap_create(void) if (ion_system_heap_create_pools(heap->pools)) goto free_heap; - heap->heap.debug_show = ion_system_heap_debug_show; return &heap->heap; free_heap: diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c index abeee0ecc122..c18bf31f55b6 100644 --- a/drivers/staging/axis-fifo/axis-fifo.c +++ b/drivers/staging/axis-fifo/axis-fifo.c @@ -27,8 +27,6 @@ #include <linux/interrupt.h> #include <linux/param.h> #include <linux/fs.h> -#include <linux/device.h> -#include <linux/cdev.h> #include <linux/types.h> #include <linux/uaccess.h> #include <linux/jiffies.h> @@ -364,11 +362,11 @@ static ssize_t axis_fifo_read(struct file *f, char __user *buf, * if nothing is currently available */ spin_lock_irq(&fifo->read_queue_lock); - ret = wait_event_interruptible_lock_irq_timeout( - fifo->read_queue, - ioread32(fifo->base_addr + XLLF_RDFO_OFFSET), - fifo->read_queue_lock, - (read_timeout >= 0) ? msecs_to_jiffies(read_timeout) : + ret = wait_event_interruptible_lock_irq_timeout + (fifo->read_queue, + ioread32(fifo->base_addr + XLLF_RDFO_OFFSET), + fifo->read_queue_lock, + (read_timeout >= 0) ? msecs_to_jiffies(read_timeout) : MAX_SCHEDULE_TIMEOUT); spin_unlock_irq(&fifo->read_queue_lock); @@ -482,12 +480,12 @@ static ssize_t axis_fifo_write(struct file *f, const char __user *buf, * currently enough room in the fifo */ spin_lock_irq(&fifo->write_queue_lock); - ret = wait_event_interruptible_lock_irq_timeout( - fifo->write_queue, - ioread32(fifo->base_addr + XLLF_TDFV_OFFSET) + ret = wait_event_interruptible_lock_irq_timeout + (fifo->write_queue, + ioread32(fifo->base_addr + XLLF_TDFV_OFFSET) >= words_to_write, - fifo->write_queue_lock, - (write_timeout >= 0) ? msecs_to_jiffies(write_timeout) : + fifo->write_queue_lock, + (write_timeout >= 0) ? msecs_to_jiffies(write_timeout) : MAX_SCHEDULE_TIMEOUT); spin_unlock_irq(&fifo->write_queue_lock); @@ -1089,6 +1087,8 @@ static int __init axis_fifo_init(void) pr_info("axis-fifo driver loaded with parameters read_timeout = %i, write_timeout = %i\n", read_timeout, write_timeout); axis_fifo_driver_class = class_create(THIS_MODULE, DRIVER_NAME); + if (IS_ERR(axis_fifo_driver_class)) + return PTR_ERR(axis_fifo_driver_class); return platform_driver_register(&axis_fifo_driver); } diff --git a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c index cae7e6e695b0..15b7a82f4b1e 100644 --- a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c +++ b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c @@ -199,10 +199,10 @@ static int clk_wzrd_probe(struct platform_device *pdev) ret = -ENOMEM; goto err_disable_clk; } - clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor( - &pdev->dev, clk_name, - __clk_get_name(clk_wzrd->clk_in1), - 0, reg, 1); + clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor + (&pdev->dev, clk_name, + __clk_get_name(clk_wzrd->clk_in1), + 0, reg, 1); kfree(clk_name); if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul])) { dev_err(&pdev->dev, "unable to register fixed-factor clock\n"); @@ -219,10 +219,10 @@ static int clk_wzrd_probe(struct platform_device *pdev) goto err_rm_int_clk; } - clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_fixed_factor( - &pdev->dev, clk_name, - __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), - 0, 1, reg); + clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_fixed_factor + (&pdev->dev, clk_name, + __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]), + 0, 1, reg); if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) { dev_err(&pdev->dev, "unable to register divider clock\n"); ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); @@ -243,8 +243,8 @@ static int clk_wzrd_probe(struct platform_device *pdev) reg = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(2) + i * 12); reg &= WZRD_CLKOUT_DIVIDE_MASK; reg >>= WZRD_CLKOUT_DIVIDE_SHIFT; - clk_wzrd->clkout[i] = clk_register_fixed_factor(&pdev->dev, - clkout_name, clk_name, 0, 1, reg); + clk_wzrd->clkout[i] = clk_register_fixed_factor + (&pdev->dev, clkout_name, clk_name, 0, 1, reg); if (IS_ERR(clk_wzrd->clkout[i])) { int j; diff --git a/drivers/staging/comedi/Kconfig b/drivers/staging/comedi/Kconfig index 583bce9bb18e..9ab1ee7d36bf 100644 --- a/drivers/staging/comedi/Kconfig +++ b/drivers/staging/comedi/Kconfig @@ -1313,5 +1313,9 @@ config COMEDI_NI_LABPC_ISADMA config COMEDI_NI_TIO tristate + select COMEDI_NI_ROUTING + +config COMEDI_NI_ROUTING + tristate endif # COMEDI diff --git a/drivers/staging/comedi/comedi.h b/drivers/staging/comedi/comedi.h index bb961ac79b7e..e90b17775284 100644 --- a/drivers/staging/comedi/comedi.h +++ b/drivers/staging/comedi/comedi.h @@ -107,6 +107,7 @@ #define INSN_WRITE (1 | INSN_MASK_WRITE) #define INSN_BITS (2 | INSN_MASK_READ | INSN_MASK_WRITE) #define INSN_CONFIG (3 | INSN_MASK_READ | INSN_MASK_WRITE) +#define INSN_DEVICE_CONFIG (INSN_CONFIG | INSN_MASK_SPECIAL) #define INSN_GTOD (4 | INSN_MASK_READ | INSN_MASK_SPECIAL) #define INSN_WAIT (5 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) #define INSN_INTTRIG (6 | INSN_MASK_WRITE | INSN_MASK_SPECIAL) @@ -301,6 +302,8 @@ enum comedi_io_direction { * @INSN_CONFIG_PWM_SET_H_BRIDGE: Set PWM H bridge duty cycle and polarity for * a relay simultaneously. * @INSN_CONFIG_PWM_GET_H_BRIDGE: Get PWM H bridge duty cycle and polarity. + * @INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: Get the hardware timing restraints, + * regardless of trigger sources. */ enum configuration_ids { INSN_CONFIG_DIO_INPUT = COMEDI_INPUT, @@ -344,7 +347,25 @@ enum configuration_ids { INSN_CONFIG_PWM_GET_PERIOD = 5001, INSN_CONFIG_GET_PWM_STATUS = 5002, INSN_CONFIG_PWM_SET_H_BRIDGE = 5003, - INSN_CONFIG_PWM_GET_H_BRIDGE = 5004 + INSN_CONFIG_PWM_GET_H_BRIDGE = 5004, + INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS = 5005, +}; + +/** + * enum device_configuration_ids - COMEDI configuration instruction codes global + * to an entire device. + * @INSN_DEVICE_CONFIG_TEST_ROUTE: Validate the possibility of a + * globally-named route + * @INSN_DEVICE_CONFIG_CONNECT_ROUTE: Connect a globally-named route + * @INSN_DEVICE_CONFIG_DISCONNECT_ROUTE:Disconnect a globally-named route + * @INSN_DEVICE_CONFIG_GET_ROUTES: Get a list of all globally-named routes + * that are valid for a particular device. + */ +enum device_config_route_ids { + INSN_DEVICE_CONFIG_TEST_ROUTE = 0, + INSN_DEVICE_CONFIG_CONNECT_ROUTE = 1, + INSN_DEVICE_CONFIG_DISCONNECT_ROUTE = 2, + INSN_DEVICE_CONFIG_GET_ROUTES = 3, }; /** @@ -928,6 +949,157 @@ enum i8254_mode { I8254_BINARY = 0 }; +/* *** BEGIN GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */ + +/* + * Common National Instruments Terminal/Signal names. + * Some of these have no NI_ prefix as they are useful for non-NI hardware, such + * as those that utilize the PXI/RTSI trigger lines. + * + * NOTE ABOUT THE CHOICE OF NAMES HERE AND THE CAMELSCRIPT: + * The choice to use CamelScript and the exact names below is for + * maintainability, clarity, similarity to manufacturer's documentation, + * _and_ a mitigation for confusion that has plagued the use of these drivers + * for years! + * + * More detail: + * There have been significant confusions over the past many years for users + * when trying to understand how to connect to/from signals and terminals on + * NI hardware using comedi. The major reason for this is that the actual + * register values were exposed and required to be used by users. Several + * major reasons exist why this caused major confusion for users: + * 1) The register values are _NOT_ in user documentation, but rather in + * arcane locations, such as a few register programming manuals that are + * increasingly hard to find and the NI MHDDK (comments in in example code). + * There is no one place to find the various valid values of the registers. + * 2) The register values are _NOT_ completely consistent. There is no way to + * gain any sense of intuition of which values, or even enums one should use + * for various registers. There was some attempt in prior use of comedi to + * name enums such that a user might know which enums should be used for + * varying purposes, but the end-user had to gain a knowledge of register + * values to correctly wield this approach. + * 3) The names for signals and registers found in the various register level + * programming manuals and vendor-provided documentation are _not_ even + * close to the same names that are in the end-user documentation. + * + * Similar, albeit less, confusion plagued NI's previous version of their own + * drivers. Earlier than 2003, NI greatly simplified the situation for users + * by releasing a new API that abstracted the names of signals/terminals to a + * common and intuitive set of names. + * + * The names below mirror the names chosen and well documented by NI. These + * names are exposed to the user via the comedilib user library. By keeping + * the names below, in spite of the use of CamelScript, maintenance will be + * greatly eased and confusion for users _and_ comedi developers will be + * greatly reduced. + */ + +/* + * Base of abstracted NI names. + * The first 16 bits of *_arg are reserved for channel selection. + * Since we only actually need the first 4 or 5 bits for all register values on + * NI select registers anyways, we'll identify all values >= (1<<15) as being an + * abstracted NI signal/terminal name. + * These values are also used/returned by INSN_DEVICE_CONFIG_TEST_ROUTE, + * INSN_DEVICE_CONFIG_CONNECT_ROUTE, INSN_DEVICE_CONFIG_DISCONNECT_ROUTE, + * and INSN_DEVICE_CONFIG_GET_ROUTES. + */ +#define NI_NAMES_BASE 0x8000u +/* + * not necessarily all allowed 64 PFIs are valid--certainly not for all devices + */ +#define NI_PFI(x) (NI_NAMES_BASE + ((x) & 0x3f)) +/* 8 trigger lines by standard, Some devices cannot talk to all eight. */ +#define TRIGGER_LINE(x) (NI_PFI(-1) + 1 + ((x) & 0x7)) +/* 4 RTSI shared MUXes to route signals to/from TRIGGER_LINES on NI hardware */ +#define NI_RTSI_BRD(x) (TRIGGER_LINE(-1) + 1 + ((x) & 0x3)) + +/* *** Counter/timer names : 8 counters max *** */ +#define NI_COUNTER_NAMES_BASE (NI_RTSI_BRD(-1) + 1) +#define NI_MAX_COUNTERS 7 +#define NI_CtrSource(x) (NI_COUNTER_NAMES_BASE + ((x) & NI_MAX_COUNTERS)) +/* Gate, Aux, A,B,Z are all treated, at times as gates */ +#define NI_GATES_NAMES_BASE (NI_CtrSource(-1) + 1) +#define NI_CtrGate(x) (NI_GATES_NAMES_BASE + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrAux(x) (NI_CtrGate(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrA(x) (NI_CtrAux(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrB(x) (NI_CtrA(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrZ(x) (NI_CtrB(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_GATES_NAMES_MAX NI_CtrZ(-1) +#define NI_CtrArmStartTrigger(x) (NI_CtrZ(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_CtrInternalOutput(x) \ + (NI_CtrArmStartTrigger(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +/** external pin(s) labeled conveniently as Ctr<i>Out. */ +#define NI_CtrOut(x) (NI_CtrInternalOutput(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +/** For Buffered sampling of ctr -- x series capability. */ +#define NI_CtrSampleClock(x) (NI_CtrOut(-1) + 1 + ((x) & NI_MAX_COUNTERS)) +#define NI_COUNTER_NAMES_MAX NI_CtrSampleClock(-1) + +enum ni_common_signal_names { + /* PXI_Star: this is a non-NI-specific signal */ + PXI_Star = NI_COUNTER_NAMES_MAX + 1, + PXI_Clk10, + PXIe_Clk100, + NI_AI_SampleClock, + NI_AI_SampleClockTimebase, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_ConvertClockTimebase, + NI_AI_PauseTrigger, + NI_AI_HoldCompleteEvent, + NI_AI_HoldComplete, + NI_AI_ExternalMUXClock, + NI_AI_STOP, /* pulse signal that occurs when a update is finished(?) */ + NI_AO_SampleClock, + NI_AO_SampleClockTimebase, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_SampleClockTimebase, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_SampleClock, + NI_DO_SampleClockTimebase, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_MasterTimebase, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100MHzTimebase, + NI_200MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + NI_WatchdogExpiredEvent, + NI_WatchdogExpirationTrigger, + NI_SCXI_Trig1, + NI_LogicLow, + NI_LogicHigh, + NI_ExternalStrobe, + NI_PFI_DO, + NI_CaseGround, + /* special internal signal used as variable source for RTSI bus: */ + NI_RGOUT0, + + /* just a name to make the next more convenient, regardless of above */ + _NI_NAMES_MAX_PLUS_1, + NI_NUM_NAMES = _NI_NAMES_MAX_PLUS_1 - NI_NAMES_BASE, +}; + +/* *** END GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */ + #define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x))) #define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b) diff --git a/drivers/staging/comedi/comedi_fops.c b/drivers/staging/comedi/comedi_fops.c index e18b61cdbdeb..c1c6b2b4ab91 100644 --- a/drivers/staging/comedi/comedi_fops.c +++ b/drivers/staging/comedi/comedi_fops.c @@ -1216,6 +1216,10 @@ static int check_insn_config_length(struct comedi_insn *insn, if (insn->n == 6) return 0; break; + case INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: + if (insn->n >= 4) + return 0; + break; /* * by default we allow the insn since we don't have checks for * all possible cases yet @@ -1230,6 +1234,57 @@ static int check_insn_config_length(struct comedi_insn *insn, return -EINVAL; } +static int check_insn_device_config_length(struct comedi_insn *insn, + unsigned int *data) +{ + if (insn->n < 1) + return -EINVAL; + + switch (data[0]) { + case INSN_DEVICE_CONFIG_TEST_ROUTE: + case INSN_DEVICE_CONFIG_CONNECT_ROUTE: + case INSN_DEVICE_CONFIG_DISCONNECT_ROUTE: + if (insn->n == 3) + return 0; + break; + case INSN_DEVICE_CONFIG_GET_ROUTES: + /* + * Big enough for config_id and the length of the userland + * memory buffer. Additional length should be in factors of 2 + * to communicate any returned route pairs (source,destination). + */ + if (insn->n >= 2) + return 0; + break; + } + return -EINVAL; +} + +/** + * get_valid_routes() - Calls low-level driver get_valid_routes function to + * either return a count of valid routes to user, or copy + * of list of all valid device routes to buffer in + * userspace. + * @dev: comedi device pointer + * @data: data from user insn call. The length of the data must be >= 2. + * data[0] must contain the INSN_DEVICE_CONFIG config_id. + * data[1](input) contains the number of _pairs_ for which memory is + * allotted from the user. If the user specifies '0', then only + * the number of pairs available is returned. + * data[1](output) returns either the number of pairs available (if none + * where requested) or the number of _pairs_ that are copied back + * to the user. + * data[2::2] returns each (source, destination) pair. + * + * Return: -EINVAL if low-level driver does not allocate and return routes as + * expected. Returns 0 otherwise. + */ +static int get_valid_routes(struct comedi_device *dev, unsigned int *data) +{ + data[1] = dev->get_valid_routes(dev, data[1], data + 2); + return 0; +} + static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn, unsigned int *data, void *file) { @@ -1293,6 +1348,24 @@ static int parse_insn(struct comedi_device *dev, struct comedi_insn *insn, if (ret >= 0) ret = 1; break; + case INSN_DEVICE_CONFIG: + ret = check_insn_device_config_length(insn, data); + if (ret) + break; + + if (data[0] == INSN_DEVICE_CONFIG_GET_ROUTES) { + /* + * data[1] should be the number of _pairs_ that + * the memory can hold. + */ + data[1] = (insn->n - 2) / 2; + ret = get_valid_routes(dev, data); + break; + } + + /* other global device config instructions. */ + ret = dev->insn_device_config(dev, insn, data); + break; default: dev_dbg(dev->class_dev, "invalid insn\n"); ret = -EINVAL; diff --git a/drivers/staging/comedi/comedidev.h b/drivers/staging/comedi/comedidev.h index 5775a93917f4..a7d569cfca5d 100644 --- a/drivers/staging/comedi/comedidev.h +++ b/drivers/staging/comedi/comedidev.h @@ -516,6 +516,15 @@ struct comedi_driver { * called when @use_count changes from 0 to 1. * @close: Optional pointer to a function set by the low-level driver to be * called when @use_count changed from 1 to 0. + * @insn_device_config: Optional pointer to a handler for all sub-instructions + * except %INSN_DEVICE_CONFIG_GET_ROUTES of the %INSN_DEVICE_CONFIG + * instruction. If this is not initialized by the low-level driver, a + * default handler will be set during post-configuration. + * @get_valid_routes: Optional pointer to a handler for the + * %INSN_DEVICE_CONFIG_GET_ROUTES sub-instruction of the + * %INSN_DEVICE_CONFIG instruction set. If this is not initialized by the + * low-level driver, a default handler that copies zero routes back to the + * user will be used. * * This is the main control data structure for a COMEDI device (as far as the * COMEDI core is concerned). There are two groups of COMEDI devices - @@ -565,6 +574,11 @@ struct comedi_device { int (*open)(struct comedi_device *dev); void (*close)(struct comedi_device *dev); + int (*insn_device_config)(struct comedi_device *dev, + struct comedi_insn *insn, unsigned int *data); + unsigned int (*get_valid_routes)(struct comedi_device *dev, + unsigned int n_pairs, + unsigned int *pair_data); }; /* diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c index 57dd63d548b7..eefa62f42c0f 100644 --- a/drivers/staging/comedi/drivers.c +++ b/drivers/staging/comedi/drivers.c @@ -211,6 +211,19 @@ static int poll_invalid(struct comedi_device *dev, struct comedi_subdevice *s) return -EINVAL; } +static int insn_device_inval(struct comedi_device *dev, + struct comedi_insn *insn, unsigned int *data) +{ + return -EINVAL; +} + +static unsigned int get_zero_valid_routes(struct comedi_device *dev, + unsigned int n_pairs, + unsigned int *pair_data) +{ + return 0; +} + int insn_inval(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { @@ -652,6 +665,12 @@ static int __comedi_device_postconfig(struct comedi_device *dev) int ret; int i; + if (!dev->insn_device_config) + dev->insn_device_config = insn_device_inval; + + if (!dev->get_valid_routes) + dev->get_valid_routes = get_zero_valid_routes; + for (i = 0; i < dev->n_subdevices; i++) { s = &dev->subdevices[i]; diff --git a/drivers/staging/comedi/drivers/Makefile b/drivers/staging/comedi/drivers/Makefile index 98b42b47dfe1..b24ac00cab73 100644 --- a/drivers/staging/comedi/drivers/Makefile +++ b/drivers/staging/comedi/drivers/Makefile @@ -137,6 +137,33 @@ obj-$(CONFIG_COMEDI_VMK80XX) += vmk80xx.o obj-$(CONFIG_COMEDI_MITE) += mite.o obj-$(CONFIG_COMEDI_NI_TIO) += ni_tio.o obj-$(CONFIG_COMEDI_NI_TIOCMD) += ni_tiocmd.o +obj-$(CONFIG_COMEDI_NI_ROUTING) += ni_routing.o +ni_routing-objs += ni_routes.o \ + ni_routing/ni_route_values.o \ + ni_routing/ni_route_values/ni_660x.o \ + ni_routing/ni_route_values/ni_eseries.o \ + ni_routing/ni_route_values/ni_mseries.o \ + ni_routing/ni_device_routes.o \ + ni_routing/ni_device_routes/pxi-6030e.o \ + ni_routing/ni_device_routes/pci-6070e.o \ + ni_routing/ni_device_routes/pci-6220.o \ + ni_routing/ni_device_routes/pci-6221.o \ + ni_routing/ni_device_routes/pxi-6224.o \ + ni_routing/ni_device_routes/pxi-6225.o \ + ni_routing/ni_device_routes/pci-6229.o \ + ni_routing/ni_device_routes/pci-6251.o \ + ni_routing/ni_device_routes/pxi-6251.o \ + ni_routing/ni_device_routes/pxie-6251.o \ + ni_routing/ni_device_routes/pci-6254.o \ + ni_routing/ni_device_routes/pci-6259.o \ + ni_routing/ni_device_routes/pci-6534.o \ + ni_routing/ni_device_routes/pxie-6535.o \ + ni_routing/ni_device_routes/pci-6602.o \ + ni_routing/ni_device_routes/pci-6713.o \ + ni_routing/ni_device_routes/pci-6723.o \ + ni_routing/ni_device_routes/pci-6733.o \ + ni_routing/ni_device_routes/pxi-6733.o \ + ni_routing/ni_device_routes/pxie-6738.o obj-$(CONFIG_COMEDI_NI_LABPC) += ni_labpc_common.o obj-$(CONFIG_COMEDI_NI_LABPC_ISADMA) += ni_labpc_isadma.o @@ -145,3 +172,4 @@ obj-$(CONFIG_COMEDI_8255_SA) += 8255.o obj-$(CONFIG_COMEDI_AMPLC_DIO200) += amplc_dio200_common.o obj-$(CONFIG_COMEDI_AMPLC_PC236) += amplc_pc236_common.o obj-$(CONFIG_COMEDI_DAS08) += das08.o +obj-$(CONFIG_COMEDI_TESTS) += tests/ diff --git a/drivers/staging/comedi/drivers/comedi_test.c b/drivers/staging/comedi/drivers/comedi_test.c index d437af721bd8..ef4c7c8a2b71 100644 --- a/drivers/staging/comedi/drivers/comedi_test.c +++ b/drivers/staging/comedi/drivers/comedi_test.c @@ -626,6 +626,48 @@ static int waveform_ao_insn_write(struct comedi_device *dev, return insn->n; } +static int waveform_ai_insn_config(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + if (data[0] == INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS) { + /* + * input: data[1], data[2] : scan_begin_src, convert_src + * output: data[1], data[2] : scan_begin_min, convert_min + */ + if (data[1] == TRIG_FOLLOW) { + /* exactly TRIG_FOLLOW case */ + data[1] = 0; + data[2] = NSEC_PER_USEC; + } else { + data[1] = NSEC_PER_USEC; + if (data[2] & TRIG_TIMER) + data[2] = NSEC_PER_USEC; + else + data[2] = 0; + } + return 0; + } + + return -EINVAL; +} + +static int waveform_ao_insn_config(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + if (data[0] == INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS) { + /* we don't care about actual channels */ + data[1] = NSEC_PER_USEC; /* scan_begin_min */ + data[2] = 0; /* convert_min */ + return 0; + } + + return -EINVAL; +} + static int waveform_common_attach(struct comedi_device *dev, int amplitude, int period) { @@ -658,6 +700,7 @@ static int waveform_common_attach(struct comedi_device *dev, s->do_cmd = waveform_ai_cmd; s->do_cmdtest = waveform_ai_cmdtest; s->cancel = waveform_ai_cancel; + s->insn_config = waveform_ai_insn_config; s = &dev->subdevices[1]; dev->write_subdev = s; @@ -673,6 +716,7 @@ static int waveform_common_attach(struct comedi_device *dev, s->do_cmd = waveform_ao_cmd; s->do_cmdtest = waveform_ao_cmdtest; s->cancel = waveform_ao_cancel; + s->insn_config = waveform_ao_insn_config; /* Our default loopback value is just a 0V flatline */ for (i = 0; i < s->n_chan; i++) diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c index e521ed9d0887..e70a461e723f 100644 --- a/drivers/staging/comedi/drivers/ni_660x.c +++ b/drivers/staging/comedi/drivers/ni_660x.c @@ -7,7 +7,7 @@ * Driver: ni_660x * Description: National Instruments 660x counter/timer boards * Devices: [National Instruments] PCI-6601 (ni_660x), PCI-6602, PXI-6602, - * PXI-6608, PCI-6624, PXI-6624 + * PCI-6608, PXI-6608, PCI-6624, PXI-6624 * Author: J.P. Mellor <jpmellor@rose-hulman.edu>, * Herman.Bruyninckx@mech.kuleuven.ac.be, * Wim.Meeussen@mech.kuleuven.ac.be, @@ -31,6 +31,7 @@ #include "mite.h" #include "ni_tio.h" +#include "ni_routes.h" /* See Register-Level Programmer Manual page 3.1 */ enum ni_660x_register { @@ -201,6 +202,7 @@ enum ni_660x_boardid { BOARD_PCI6601, BOARD_PCI6602, BOARD_PXI6602, + BOARD_PCI6608, BOARD_PXI6608, BOARD_PCI6624, BOARD_PXI6624 @@ -224,6 +226,10 @@ static const struct ni_660x_board ni_660x_boards[] = { .name = "PXI-6602", .n_chips = 2, }, + [BOARD_PCI6608] = { + .name = "PCI-6608", + .n_chips = 2, + }, [BOARD_PXI6608] = { .name = "PXI-6608", .n_chips = 2, @@ -259,6 +265,7 @@ struct ni_660x_private { unsigned int dma_cfg[NI660X_MAX_CHIPS]; unsigned int io_cfg[NI660X_NUM_PFI_CHANNELS]; u64 io_dir; + struct ni_route_tables routing_tables; }; static void ni_660x_write(struct comedi_device *dev, unsigned int chip, @@ -561,6 +568,10 @@ static void ni_660x_select_pfi_output(struct comedi_device *dev, unsigned int idle_chip = 0; unsigned int bits; + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + if (board->n_chips > 1) { if (out_sel == NI_660X_PFI_OUTPUT_COUNTER && chan >= 8 && chan <= 23) { @@ -589,11 +600,54 @@ static void ni_660x_select_pfi_output(struct comedi_device *dev, ni_660x_write(dev, active_chip, bits, NI660X_IO_CFG(chan)); } +static void ni_660x_set_pfi_direction(struct comedi_device *dev, + unsigned int chan, + unsigned int direction) +{ + struct ni_660x_private *devpriv = dev->private; + u64 bit; + + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + + bit = 1ULL << chan; + + if (direction == COMEDI_OUTPUT) { + devpriv->io_dir |= bit; + /* reset the output to currently assigned output value */ + ni_660x_select_pfi_output(dev, chan, devpriv->io_cfg[chan]); + } else { + devpriv->io_dir &= ~bit; + /* set pin to high-z; do not change currently assigned route */ + ni_660x_select_pfi_output(dev, chan, 0); + } +} + +static unsigned int ni_660x_get_pfi_direction(struct comedi_device *dev, + unsigned int chan) +{ + struct ni_660x_private *devpriv = dev->private; + u64 bit; + + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + + bit = 1ULL << chan; + + return (devpriv->io_dir & bit) ? COMEDI_OUTPUT : COMEDI_INPUT; +} + static int ni_660x_set_pfi_routing(struct comedi_device *dev, unsigned int chan, unsigned int source) { struct ni_660x_private *devpriv = dev->private; + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + switch (source) { case NI_660X_PFI_OUTPUT_COUNTER: if (chan < 8) @@ -607,36 +661,56 @@ static int ni_660x_set_pfi_routing(struct comedi_device *dev, } devpriv->io_cfg[chan] = source; - if (devpriv->io_dir & (1ULL << chan)) + if (ni_660x_get_pfi_direction(dev, chan) == COMEDI_OUTPUT) ni_660x_select_pfi_output(dev, chan, devpriv->io_cfg[chan]); return 0; } +static int ni_660x_get_pfi_routing(struct comedi_device *dev, unsigned int chan) +{ + struct ni_660x_private *devpriv = dev->private; + + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + + return devpriv->io_cfg[chan]; +} + +static void ni_660x_set_pfi_filter(struct comedi_device *dev, + unsigned int chan, unsigned int value) +{ + unsigned int val; + + if (chan >= NI_PFI(0)) + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + + val = ni_660x_read(dev, 0, NI660X_IO_CFG(chan)); + val &= ~NI660X_IO_CFG_IN_SEL_MASK(chan); + val |= NI660X_IO_CFG_IN_SEL(chan, value); + ni_660x_write(dev, 0, val, NI660X_IO_CFG(chan)); +} + static int ni_660x_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { - struct ni_660x_private *devpriv = dev->private; unsigned int chan = CR_CHAN(insn->chanspec); - u64 bit = 1ULL << chan; - unsigned int val; int ret; switch (data[0]) { case INSN_CONFIG_DIO_OUTPUT: - devpriv->io_dir |= bit; - ni_660x_select_pfi_output(dev, chan, devpriv->io_cfg[chan]); + ni_660x_set_pfi_direction(dev, chan, COMEDI_OUTPUT); break; case INSN_CONFIG_DIO_INPUT: - devpriv->io_dir &= ~bit; - ni_660x_select_pfi_output(dev, chan, 0); /* high-z */ + ni_660x_set_pfi_direction(dev, chan, COMEDI_INPUT); break; case INSN_CONFIG_DIO_QUERY: - data[1] = (devpriv->io_dir & bit) ? COMEDI_OUTPUT - : COMEDI_INPUT; + data[1] = ni_660x_get_pfi_direction(dev, chan); break; case INSN_CONFIG_SET_ROUTING: @@ -646,14 +720,11 @@ static int ni_660x_dio_insn_config(struct comedi_device *dev, break; case INSN_CONFIG_GET_ROUTING: - data[1] = devpriv->io_cfg[chan]; + data[1] = ni_660x_get_pfi_routing(dev, chan); break; case INSN_CONFIG_FILTER: - val = ni_660x_read(dev, 0, NI660X_IO_CFG(chan)); - val &= ~NI660X_IO_CFG_IN_SEL_MASK(chan); - val |= NI660X_IO_CFG_IN_SEL(chan, data[1]); - ni_660x_write(dev, 0, val, NI660X_IO_CFG(chan)); + ni_660x_set_pfi_filter(dev, chan, data[1]); break; default: @@ -663,6 +734,240 @@ static int ni_660x_dio_insn_config(struct comedi_device *dev, return insn->n; } +static unsigned int _ni_get_valid_routes(struct comedi_device *dev, + unsigned int n_pairs, + unsigned int *pair_data) +{ + struct ni_660x_private *devpriv = dev->private; + + return ni_get_valid_routes(&devpriv->routing_tables, n_pairs, + pair_data); +} + +/* + * Retrieves the current source of the output selector for the given + * destination. If the terminal for the destination is not already configured + * as an output, this function returns -EINVAL as error. + * + * Return: The register value of the destination output selector; + * -EINVAL if terminal is not configured for output. + */ +static inline int get_output_select_source(int dest, struct comedi_device *dev) +{ + struct ni_660x_private *devpriv = dev->private; + int reg = -1; + + if (channel_is_pfi(dest)) { + if (ni_660x_get_pfi_direction(dev, dest) == COMEDI_OUTPUT) + reg = ni_660x_get_pfi_routing(dev, dest); + } else if (channel_is_rtsi(dest)) { + dev_dbg(dev->class_dev, + "%s: unhandled rtsi destination (%d) queried\n", + __func__, dest); + /* + * The following can be enabled when RTSI routing info is + * determined (not currently documented): + * if (ni_get_rtsi_direction(dev, dest) == COMEDI_OUTPUT) { + * reg = ni_get_rtsi_routing(dev, dest); + + * if (reg == NI_RTSI_OUTPUT_RGOUT0) { + * dest = NI_RGOUT0; ** prepare for lookup below ** + * reg = get_rgout0_reg(dev); + * } else if (reg >= NI_RTSI_OUTPUT_RTSI_BRD(0) && + * reg <= NI_RTSI_OUTPUT_RTSI_BRD(3)) { + * const int i = reg - NI_RTSI_OUTPUT_RTSI_BRD(0); + + * dest = NI_RTSI_BRD(i); ** prepare for lookup ** + * reg = get_ith_rtsi_brd_reg(i, dev); + * } + * } + */ + } else if (channel_is_ctr(dest)) { + reg = ni_tio_get_routing(devpriv->counter_dev, dest); + } else { + dev_dbg(dev->class_dev, + "%s: unhandled destination (%d) queried\n", + __func__, dest); + } + + if (reg >= 0) + return ni_find_route_source(CR_CHAN(reg), dest, + &devpriv->routing_tables); + return -EINVAL; +} + +/* + * Test a route: + * + * Return: -1 if not connectible; + * 0 if connectible and not connected; + * 1 if connectible and connected. + */ +static inline int test_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_660x_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + + if (reg < 0) + return -1; + if (get_output_select_source(dest, dev) != CR_CHAN(src)) + return 0; + return 1; +} + +/* Connect the actual route. */ +static inline int connect_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_660x_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + s8 current_src; + + if (reg < 0) + /* route is not valid */ + return -EINVAL; + + current_src = get_output_select_source(dest, dev); + if (current_src == CR_CHAN(src)) + return -EALREADY; + if (current_src >= 0) + /* destination mux is already busy. complain, don't overwrite */ + return -EBUSY; + + /* The route is valid and available. Now connect... */ + if (channel_is_pfi(CR_CHAN(dest))) { + /* + * set routing and then direction so that the output does not + * first get generated with the wrong pin + */ + ni_660x_set_pfi_routing(dev, dest, reg); + ni_660x_set_pfi_direction(dev, dest, COMEDI_OUTPUT); + } else if (channel_is_rtsi(CR_CHAN(dest))) { + dev_dbg(dev->class_dev, "%s: unhandled rtsi destination (%d)\n", + __func__, dest); + return -EINVAL; + /* + * The following can be enabled when RTSI routing info is + * determined (not currently documented): + * if (reg == NI_RTSI_OUTPUT_RGOUT0) { + * int ret = incr_rgout0_src_use(src, dev); + + * if (ret < 0) + * return ret; + * } else if (ni_rtsi_route_requires_mux(reg)) { + * ** Attempt to allocate and route (src->brd) ** + * int brd = incr_rtsi_brd_src_use(src, dev); + + * if (brd < 0) + * return brd; + + * ** Now lookup the register value for (brd->dest) ** + * reg = ni_lookup_route_register(brd, CR_CHAN(dest), + * &devpriv->routing_tables); + * } + + * ni_set_rtsi_direction(dev, dest, COMEDI_OUTPUT); + * ni_set_rtsi_routing(dev, dest, reg); + */ + } else if (channel_is_ctr(CR_CHAN(dest))) { + /* + * we are adding back the channel modifier info to set + * invert/edge info passed by the user + */ + ni_tio_set_routing(devpriv->counter_dev, dest, + reg | (src & ~CR_CHAN(-1))); + } else { + return -EINVAL; + } + return 0; +} + +static inline int disconnect_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_660x_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), CR_CHAN(dest), + &devpriv->routing_tables); + + if (reg < 0) + /* route is not valid */ + return -EINVAL; + if (get_output_select_source(dest, dev) != CR_CHAN(src)) + /* cannot disconnect something not connected */ + return -EINVAL; + + /* The route is valid and is connected. Now disconnect... */ + if (channel_is_pfi(CR_CHAN(dest))) { + unsigned int source = ((CR_CHAN(dest) - NI_PFI(0)) < 8) + ? NI_660X_PFI_OUTPUT_DIO + : NI_660X_PFI_OUTPUT_COUNTER; + + /* set the pfi to high impedance, and disconnect */ + ni_660x_set_pfi_direction(dev, dest, COMEDI_INPUT); + ni_660x_set_pfi_routing(dev, dest, source); + } else if (channel_is_rtsi(CR_CHAN(dest))) { + dev_dbg(dev->class_dev, "%s: unhandled rtsi destination (%d)\n", + __func__, dest); + return -EINVAL; + /* + * The following can be enabled when RTSI routing info is + * determined (not currently documented): + * if (reg == NI_RTSI_OUTPUT_RGOUT0) { + * int ret = decr_rgout0_src_use(src, dev); + + * if (ret < 0) + * return ret; + * } else if (ni_rtsi_route_requires_mux(reg)) { + * ** find which RTSI_BRD line is source for rtsi pin ** + * int brd = ni_find_route_source( + * ni_get_rtsi_routing(dev, dest), CR_CHAN(dest), + * &devpriv->routing_tables); + + * if (brd < 0) + * return brd; + + * ** decrement/disconnect RTSI_BRD line from source ** + * decr_rtsi_brd_src_use(src, brd, dev); + * } + + * ** set rtsi output selector to default state ** + * reg = default_rtsi_routing[CR_CHAN(dest) - TRIGGER_LINE(0)]; + * ni_set_rtsi_direction(dev, dest, COMEDI_INPUT); + * ni_set_rtsi_routing(dev, dest, reg); + */ + } else if (channel_is_ctr(CR_CHAN(dest))) { + ni_tio_unset_routing(devpriv->counter_dev, dest); + } else { + return -EINVAL; + } + return 0; +} + +static int ni_global_insn_config(struct comedi_device *dev, + struct comedi_insn *insn, + unsigned int *data) +{ + switch (data[0]) { + case INSN_DEVICE_CONFIG_TEST_ROUTE: + data[0] = test_route(data[1], data[2], dev); + return 2; + case INSN_DEVICE_CONFIG_CONNECT_ROUTE: + return connect_route(data[1], data[2], dev); + case INSN_DEVICE_CONFIG_DISCONNECT_ROUTE: + return disconnect_route(data[1], data[2], dev); + /* + * This case is already handled one level up. + * case INSN_DEVICE_CONFIG_GET_ROUTES: + */ + default: + return -EINVAL; + } + return 1; +} + static void ni_660x_init_tio_chips(struct comedi_device *dev, unsigned int n_chips) { @@ -730,12 +1035,30 @@ static int ni_660x_auto_attach(struct comedi_device *dev, ni_660x_init_tio_chips(dev, board->n_chips); + /* prepare the device for globally-named routes. */ + if (ni_assign_device_routes("ni_660x", board->name, + &devpriv->routing_tables) < 0) { + dev_warn(dev->class_dev, "%s: %s device has no signal routing table.\n", + __func__, board->name); + dev_warn(dev->class_dev, "%s: High level NI signal names will not be available for this %s board.\n", + __func__, board->name); + } else { + /* + * only(?) assign insn_device_config if we have global names for + * this device. + */ + dev->insn_device_config = ni_global_insn_config; + dev->get_valid_routes = _ni_get_valid_routes; + } + n_counters = board->n_chips * NI660X_COUNTERS_PER_CHIP; gpct_dev = ni_gpct_device_construct(dev, ni_660x_gpct_write, ni_660x_gpct_read, ni_gpct_variant_660x, - n_counters); + n_counters, + NI660X_COUNTERS_PER_CHIP, + &devpriv->routing_tables); if (!gpct_dev) return -ENOMEM; devpriv->counter_dev = gpct_dev; @@ -822,7 +1145,7 @@ static int ni_660x_auto_attach(struct comedi_device *dev, : NI_660X_PFI_OUTPUT_COUNTER; ni_660x_set_pfi_routing(dev, i, source); - ni_660x_select_pfi_output(dev, i, 0); /* high-z */ + ni_660x_set_pfi_direction(dev, i, COMEDI_INPUT);/* high-z */ } /* Counter subdevices (4 NI TIO General Purpose Counters per chip) */ @@ -831,9 +1154,6 @@ static int ni_660x_auto_attach(struct comedi_device *dev, if (i < n_counters) { struct ni_gpct *counter = &gpct_dev->counters[i]; - counter->chip_index = i / NI660X_COUNTERS_PER_CHIP; - counter->counter_index = i % NI660X_COUNTERS_PER_CHIP; - s->type = COMEDI_SUBD_COUNTER; s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL | SDF_CMD_READ; @@ -915,6 +1235,7 @@ static const struct pci_device_id ni_660x_pci_table[] = { { PCI_VDEVICE(NI, 0x1310), BOARD_PCI6602 }, { PCI_VDEVICE(NI, 0x1360), BOARD_PXI6602 }, { PCI_VDEVICE(NI, 0x2c60), BOARD_PCI6601 }, + { PCI_VDEVICE(NI, 0x2db0), BOARD_PCI6608 }, { PCI_VDEVICE(NI, 0x2cc0), BOARD_PXI6608 }, { PCI_VDEVICE(NI, 0x1e30), BOARD_PCI6624 }, { PCI_VDEVICE(NI, 0x1e40), BOARD_PXI6624 }, diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c index 4dee2fc37aed..2d1e0325d04d 100644 --- a/drivers/staging/comedi/drivers/ni_mio_common.c +++ b/drivers/staging/comedi/drivers/ni_mio_common.c @@ -351,7 +351,8 @@ static const struct mio_regmap m_series_stc_write_regmap[] = { [NISTC_AO_PERSONAL_REG] = { 0x19c, 2 }, [NISTC_RTSI_TRIGA_OUT_REG] = { 0x19e, 2 }, [NISTC_RTSI_TRIGB_OUT_REG] = { 0x1a0, 2 }, - [NISTC_RTSI_BOARD_REG] = { 0, 0 }, /* Unknown */ + /* doc for following line: mhddk/nimseries/ChipObjects/tMSeries.h */ + [NISTC_RTSI_BOARD_REG] = { 0x1a2, 2 }, [NISTC_CFG_MEM_CLR_REG] = { 0x1a4, 2 }, [NISTC_ADC_FIFO_CLR_REG] = { 0x1a6, 2 }, [NISTC_DAC_FIFO_CLR_REG] = { 0x1a8, 2 }, @@ -2006,7 +2007,6 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, const struct ni_board_struct *board = dev->board_ptr; struct ni_private *devpriv = dev->private; int err = 0; - unsigned int tmp; unsigned int sources; /* Step 1 : check if triggers are trivially valid */ @@ -2047,12 +2047,9 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); break; case TRIG_EXT: - tmp = CR_CHAN(cmd->start_arg); - - if (tmp > 16) - tmp = 16; - tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE)); - err |= comedi_check_trigger_arg_is(&cmd->start_arg, tmp); + err |= ni_check_trigger_arg_roffs(CR_CHAN(cmd->start_arg), + NI_AI_StartTrigger, + &devpriv->routing_tables, 1); break; } @@ -2064,12 +2061,9 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, 0xffffff); } else if (cmd->scan_begin_src == TRIG_EXT) { /* external trigger */ - unsigned int tmp = CR_CHAN(cmd->scan_begin_arg); - - if (tmp > 16) - tmp = 16; - tmp |= (cmd->scan_begin_arg & (CR_INVERT | CR_EDGE)); - err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, tmp); + err |= ni_check_trigger_arg_roffs(CR_CHAN(cmd->scan_begin_arg), + NI_AI_SampleClock, + &devpriv->routing_tables, 1); } else { /* TRIG_OTHER */ err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0); } @@ -2087,12 +2081,9 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, } } else if (cmd->convert_src == TRIG_EXT) { /* external trigger */ - unsigned int tmp = CR_CHAN(cmd->convert_arg); - - if (tmp > 16) - tmp = 16; - tmp |= (cmd->convert_arg & (CR_ALT_FILTER | CR_INVERT)); - err |= comedi_check_trigger_arg_is(&cmd->convert_arg, tmp); + err |= ni_check_trigger_arg_roffs(CR_CHAN(cmd->convert_arg), + NI_AI_ConvertClock, + &devpriv->routing_tables, 1); } else if (cmd->convert_src == TRIG_NOW) { err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); } @@ -2118,7 +2109,7 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, /* step 4: fix up any arguments */ if (cmd->scan_begin_src == TRIG_TIMER) { - tmp = cmd->scan_begin_arg; + unsigned int tmp = cmd->scan_begin_arg; cmd->scan_begin_arg = ni_timer_to_ns(dev, ni_ns_to_timer(dev, cmd->scan_begin_arg, @@ -2128,7 +2119,7 @@ static int ni_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, } if (cmd->convert_src == TRIG_TIMER) { if (!devpriv->is_611x && !devpriv->is_6143) { - tmp = cmd->convert_arg; + unsigned int tmp = cmd->convert_arg; cmd->convert_arg = ni_timer_to_ns(dev, ni_ns_to_timer(dev, cmd->convert_arg, @@ -2206,8 +2197,10 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) NISTC_AI_TRIG_START1_SEL(0); break; case TRIG_EXT: - ai_trig |= NISTC_AI_TRIG_START1_SEL(CR_CHAN(cmd->start_arg) + - 1); + ai_trig |= NISTC_AI_TRIG_START1_SEL( + ni_get_reg_value_roffs(CR_CHAN(cmd->start_arg), + NI_AI_StartTrigger, + &devpriv->routing_tables, 1)); if (cmd->start_arg & CR_INVERT) ai_trig |= NISTC_AI_TRIG_START1_POLARITY; @@ -2317,8 +2310,10 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) (cmd->scan_begin_arg & ~CR_EDGE) != (cmd->convert_arg & ~CR_EDGE)) start_stop_select |= NISTC_AI_START_SYNC; - start_stop_select |= - NISTC_AI_START_SEL(1 + CR_CHAN(cmd->scan_begin_arg)); + start_stop_select |= NISTC_AI_START_SEL( + ni_get_reg_value_roffs(CR_CHAN(cmd->scan_begin_arg), + NI_AI_SampleClock, + &devpriv->routing_tables, 1)); ni_stc_writew(dev, start_stop_select, NISTC_AI_START_STOP_REG); break; } @@ -2346,8 +2341,10 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ni_stc_writew(dev, mode2, NISTC_AI_MODE2_REG); break; case TRIG_EXT: - mode1 |= NISTC_AI_MODE1_CONVERT_SRC(1 + - CR_CHAN(cmd->convert_arg)); + mode1 |= NISTC_AI_MODE1_CONVERT_SRC( + ni_get_reg_value_roffs(CR_CHAN(cmd->convert_arg), + NI_AI_ConvertClock, + &devpriv->routing_tables, 1)); if ((cmd->convert_arg & CR_INVERT) == 0) mode1 |= NISTC_AI_MODE1_CONVERT_POLARITY; ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); @@ -2464,6 +2461,7 @@ static int ni_ai_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { + const struct ni_board_struct *board = dev->board_ptr; struct ni_private *devpriv = dev->private; if (insn->n < 1) @@ -2498,6 +2496,15 @@ static int ni_ai_insn_config(struct comedi_device *dev, } } return 2; + case INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: + /* we don't care about actual channels */ + /* data[3] : chanlist_len */ + data[1] = ni_min_ai_scan_period_ns(dev, data[3]); + if (devpriv->is_611x || devpriv->is_6143) + data[2] = 0; /* simultaneous output */ + else + data[2] = board->ai_speed; + return 0; default: break; } @@ -2834,6 +2841,11 @@ static int ni_ao_insn_config(struct comedi_device *dev, return 0; case INSN_CONFIG_ARM: return ni_ao_arm(dev, s); + case INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: + /* we don't care about actual channels */ + data[1] = board->ao_speed; + data[2] = 0; + return 0; default: break; } @@ -2955,7 +2967,10 @@ static void ni_ao_cmd_set_trigger(struct comedi_device *dev, trigsel = NISTC_AO_TRIG_START1_EDGE | NISTC_AO_TRIG_START1_SYNC; } else { /* TRIG_EXT */ - trigsel = NISTC_AO_TRIG_START1_SEL(CR_CHAN(cmd->start_arg) + 1); + trigsel = NISTC_AO_TRIG_START1_SEL( + ni_get_reg_value_roffs(CR_CHAN(cmd->start_arg), + NI_AO_StartTrigger, + &devpriv->routing_tables, 1)); /* 0=active high, 1=active low. see daq-stc 3-24 (p186) */ if (cmd->start_arg & CR_INVERT) trigsel |= NISTC_AO_TRIG_START1_POLARITY; @@ -3117,7 +3132,9 @@ static void ni_ao_cmd_set_update(struct comedi_device *dev, /* FIXME: assert scan_begin_arg != 0, ret failure otherwise */ devpriv->ao_cmd2 |= NISTC_AO_CMD2_BC_GATE_ENA; devpriv->ao_mode1 |= NISTC_AO_MODE1_UPDATE_SRC( - CR_CHAN(cmd->scan_begin_arg)); + ni_get_reg_value(CR_CHAN(cmd->scan_begin_arg), + NI_AO_SampleClock, + &devpriv->routing_tables)); if (cmd->scan_begin_arg & CR_INVERT) devpriv->ao_mode1 |= NISTC_AO_MODE1_UPDATE_SRC_POLARITY; } @@ -3313,12 +3330,9 @@ static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); break; case TRIG_EXT: - tmp = CR_CHAN(cmd->start_arg); - - if (tmp > 18) - tmp = 18; - tmp |= (cmd->start_arg & (CR_INVERT | CR_EDGE)); - err |= comedi_check_trigger_arg_is(&cmd->start_arg, tmp); + err |= ni_check_trigger_arg_roffs(CR_CHAN(cmd->start_arg), + NI_AO_StartTrigger, + &devpriv->routing_tables, 1); break; } @@ -3328,6 +3342,10 @@ static int ni_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, err |= comedi_check_trigger_arg_max(&cmd->scan_begin_arg, devpriv->clock_ns * 0xffffff); + } else { /* TRIG_EXT */ + err |= ni_check_trigger_arg(CR_CHAN(cmd->scan_begin_arg), + NI_AO_SampleClock, + &devpriv->routing_tables); } err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); @@ -3475,6 +3493,15 @@ static int ni_m_series_dio_insn_config(struct comedi_device *dev, { int ret; + if (data[0] == INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS) { + const struct ni_board_struct *board = dev->board_ptr; + + /* we don't care about actual channels */ + data[1] = board->dio_speed; + data[2] = 0; + return 0; + } + ret = comedi_dio_insn_config(dev, s, insn, data, 0); if (ret) return ret; @@ -3516,8 +3543,8 @@ static int ni_cdio_check_chanlist(struct comedi_device *dev, static int ni_cdio_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_cmd *cmd) { + struct ni_private *devpriv = dev->private; int err = 0; - int tmp; /* Step 1 : check if triggers are trivially valid */ @@ -3537,9 +3564,15 @@ static int ni_cdio_cmdtest(struct comedi_device *dev, err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); - tmp = cmd->scan_begin_arg; - tmp &= CR_PACK_FLAGS(NI_M_CDO_MODE_SAMPLE_SRC_MASK, 0, 0, CR_INVERT); - if (tmp != cmd->scan_begin_arg) + /* + * Although NI_D[IO]_SampleClock are the same, perhaps we should still, + * for completeness, test whether the cmd is output or input? + */ + err |= ni_check_trigger_arg(CR_CHAN(cmd->scan_begin_arg), + NI_DO_SampleClock, + &devpriv->routing_tables); + if (CR_RANGE(cmd->scan_begin_arg) != 0 || + CR_AREF(cmd->scan_begin_arg) != 0) err |= -EINVAL; err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); @@ -3627,9 +3660,16 @@ static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) int retval; ni_writel(dev, NI_M_CDO_CMD_RESET, NI_M_CDIO_CMD_REG); + /* + * Although NI_D[IO]_SampleClock are the same, perhaps we should still, + * for completeness, test whether the cmd is output or input(?) + */ cdo_mode_bits = NI_M_CDO_MODE_FIFO_MODE | NI_M_CDO_MODE_HALT_ON_ERROR | - NI_M_CDO_MODE_SAMPLE_SRC(CR_CHAN(cmd->scan_begin_arg)); + NI_M_CDO_MODE_SAMPLE_SRC( + ni_get_reg_value(CR_CHAN(cmd->scan_begin_arg), + NI_DO_SampleClock, + &devpriv->routing_tables)); if (cmd->scan_begin_arg & CR_INVERT) cdo_mode_bits |= NI_M_CDO_MODE_POLARITY; ni_writel(dev, cdo_mode_bits, NI_M_CDO_MODE_REG); @@ -4551,24 +4591,33 @@ static unsigned int ni_get_pfi_routing(struct comedi_device *dev, { struct ni_private *devpriv = dev->private; + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } return (devpriv->is_m_series) ? ni_m_series_get_pfi_routing(dev, chan) : ni_old_get_pfi_routing(dev, chan); } +/* Sets the output mux for the specified PFI channel. */ static int ni_set_pfi_routing(struct comedi_device *dev, unsigned int chan, unsigned int source) { struct ni_private *devpriv = dev->private; + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } return (devpriv->is_m_series) ? ni_m_series_set_pfi_routing(dev, chan, source) : ni_old_set_pfi_routing(dev, chan, source); } -static int ni_config_filter(struct comedi_device *dev, - unsigned int pfi_channel, - enum ni_pfi_filter_select filter) +static int ni_config_pfi_filter(struct comedi_device *dev, + unsigned int chan, + enum ni_pfi_filter_select filter) { struct ni_private *devpriv = dev->private; unsigned int bits; @@ -4576,19 +4625,46 @@ static int ni_config_filter(struct comedi_device *dev, if (!devpriv->is_m_series) return -ENOTSUPP; + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } + bits = ni_readl(dev, NI_M_PFI_FILTER_REG); - bits &= ~NI_M_PFI_FILTER_SEL_MASK(pfi_channel); - bits |= NI_M_PFI_FILTER_SEL(pfi_channel, filter); + bits &= ~NI_M_PFI_FILTER_SEL_MASK(chan); + bits |= NI_M_PFI_FILTER_SEL(chan, filter); ni_writel(dev, bits, NI_M_PFI_FILTER_REG); return 0; } +static void ni_set_pfi_direction(struct comedi_device *dev, int chan, + unsigned int direction) +{ + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } + direction = (direction == COMEDI_OUTPUT) ? 1u : 0u; + ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, direction); +} + +static int ni_get_pfi_direction(struct comedi_device *dev, int chan) +{ + struct ni_private *devpriv = dev->private; + + if (chan >= NI_PFI(0)) { + /* allow new and old names of pfi channels to work. */ + chan -= NI_PFI(0); + } + return devpriv->io_bidirection_pin_reg & (1 << chan) ? + COMEDI_OUTPUT : COMEDI_INPUT; +} + static int ni_pfi_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { - struct ni_private *devpriv = dev->private; unsigned int chan; if (insn->n < 1) @@ -4598,23 +4674,19 @@ static int ni_pfi_insn_config(struct comedi_device *dev, switch (data[0]) { case COMEDI_OUTPUT: - ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, 1); - break; case COMEDI_INPUT: - ni_set_bits(dev, NISTC_IO_BIDIR_PIN_REG, 1 << chan, 0); + ni_set_pfi_direction(dev, chan, data[0]); break; case INSN_CONFIG_DIO_QUERY: - data[1] = - (devpriv->io_bidirection_pin_reg & (1 << chan)) ? - COMEDI_OUTPUT : COMEDI_INPUT; - return 0; + data[1] = ni_get_pfi_direction(dev, chan); + break; case INSN_CONFIG_SET_ROUTING: return ni_set_pfi_routing(dev, chan, data[1]); case INSN_CONFIG_GET_ROUTING: data[1] = ni_get_pfi_routing(dev, chan); break; case INSN_CONFIG_FILTER: - return ni_config_filter(dev, chan, data[1]); + return ni_config_pfi_filter(dev, chan, data[1]); default: return -EINVAL; } @@ -4980,7 +5052,10 @@ static int ni_valid_rtsi_output_source(struct comedi_device *dev, case NI_RTSI_OUTPUT_G_SRC0: case NI_RTSI_OUTPUT_G_GATE0: case NI_RTSI_OUTPUT_RGOUT0: - case NI_RTSI_OUTPUT_RTSI_BRD_0: + case NI_RTSI_OUTPUT_RTSI_BRD(0): + case NI_RTSI_OUTPUT_RTSI_BRD(1): + case NI_RTSI_OUTPUT_RTSI_BRD(2): + case NI_RTSI_OUTPUT_RTSI_BRD(3): return 1; case NI_RTSI_OUTPUT_RTSI_OSC: return (devpriv->is_m_series) ? 1 : 0; @@ -4994,6 +5069,10 @@ static int ni_set_rtsi_routing(struct comedi_device *dev, { struct ni_private *devpriv = dev->private; + if (chan >= TRIGGER_LINE(0)) + /* allow new and old names of rtsi channels to work. */ + chan -= TRIGGER_LINE(0); + if (ni_valid_rtsi_output_source(dev, chan, src) == 0) return -EINVAL; if (chan < 4) { @@ -5001,11 +5080,18 @@ static int ni_set_rtsi_routing(struct comedi_device *dev, devpriv->rtsi_trig_a_output_reg |= NISTC_RTSI_TRIG(chan, src); ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg, NISTC_RTSI_TRIGA_OUT_REG); - } else if (chan < 8) { + } else if (chan < NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) { devpriv->rtsi_trig_b_output_reg &= ~NISTC_RTSI_TRIG_MASK(chan); devpriv->rtsi_trig_b_output_reg |= NISTC_RTSI_TRIG(chan, src); ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg, NISTC_RTSI_TRIGB_OUT_REG); + } else if (chan != NISTC_RTSI_TRIG_OLD_CLK_CHAN) { + /* probably should never reach this, since the + * ni_valid_rtsi_output_source above errors out if chan is too + * high + */ + dev_err(dev->class_dev, "%s: unknown rtsi channel\n", __func__); + return -EINVAL; } return 2; } @@ -5015,31 +5101,35 @@ static unsigned int ni_get_rtsi_routing(struct comedi_device *dev, { struct ni_private *devpriv = dev->private; + if (chan >= TRIGGER_LINE(0)) + /* allow new and old names of rtsi channels to work. */ + chan -= TRIGGER_LINE(0); + if (chan < 4) { return NISTC_RTSI_TRIG_TO_SRC(chan, devpriv->rtsi_trig_a_output_reg); } else if (chan < NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) { return NISTC_RTSI_TRIG_TO_SRC(chan, devpriv->rtsi_trig_b_output_reg); - } else { - if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) - return NI_RTSI_OUTPUT_RTSI_OSC; - dev_err(dev->class_dev, "bug! should never get here?\n"); - return 0; + } else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) { + return NI_RTSI_OUTPUT_RTSI_OSC; } + + dev_err(dev->class_dev, "%s: unknown rtsi channel\n", __func__); + return -EINVAL; } -static int ni_rtsi_insn_config(struct comedi_device *dev, - struct comedi_subdevice *s, - struct comedi_insn *insn, - unsigned int *data) +static void ni_set_rtsi_direction(struct comedi_device *dev, int chan, + unsigned int direction) { struct ni_private *devpriv = dev->private; - unsigned int chan = CR_CHAN(insn->chanspec); unsigned int max_chan = NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series); - switch (data[0]) { - case INSN_CONFIG_DIO_OUTPUT: + if (chan >= TRIGGER_LINE(0)) + /* allow new and old names of rtsi channels to work. */ + chan -= TRIGGER_LINE(0); + + if (direction == COMEDI_OUTPUT) { if (chan < max_chan) { devpriv->rtsi_trig_direction_reg |= NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series); @@ -5047,10 +5137,7 @@ static int ni_rtsi_insn_config(struct comedi_device *dev, devpriv->rtsi_trig_direction_reg |= NISTC_RTSI_TRIG_DRV_CLK; } - ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg, - NISTC_RTSI_TRIG_DIR_REG); - break; - case INSN_CONFIG_DIO_INPUT: + } else { if (chan < max_chan) { devpriv->rtsi_trig_direction_reg &= ~NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series); @@ -5058,23 +5145,53 @@ static int ni_rtsi_insn_config(struct comedi_device *dev, devpriv->rtsi_trig_direction_reg &= ~NISTC_RTSI_TRIG_DRV_CLK; } - ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg, - NISTC_RTSI_TRIG_DIR_REG); + } + ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg, + NISTC_RTSI_TRIG_DIR_REG); +} + +static int ni_get_rtsi_direction(struct comedi_device *dev, int chan) +{ + struct ni_private *devpriv = dev->private; + unsigned int max_chan = NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series); + + if (chan >= TRIGGER_LINE(0)) + /* allow new and old names of rtsi channels to work. */ + chan -= TRIGGER_LINE(0); + + if (chan < max_chan) { + return (devpriv->rtsi_trig_direction_reg & + NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series)) + ? COMEDI_OUTPUT : COMEDI_INPUT; + } else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) { + return (devpriv->rtsi_trig_direction_reg & + NISTC_RTSI_TRIG_DRV_CLK) + ? COMEDI_OUTPUT : COMEDI_INPUT; + } + return -EINVAL; +} + +static int ni_rtsi_insn_config(struct comedi_device *dev, + struct comedi_subdevice *s, + struct comedi_insn *insn, + unsigned int *data) +{ + struct ni_private *devpriv = dev->private; + unsigned int chan = CR_CHAN(insn->chanspec); + + switch (data[0]) { + case COMEDI_OUTPUT: + case COMEDI_INPUT: + ni_set_rtsi_direction(dev, chan, data[0]); break; - case INSN_CONFIG_DIO_QUERY: - if (chan < max_chan) { - data[1] = - (devpriv->rtsi_trig_direction_reg & - NISTC_RTSI_TRIG_DIR(chan, devpriv->is_m_series)) - ? INSN_CONFIG_DIO_OUTPUT - : INSN_CONFIG_DIO_INPUT; - } else if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN) { - data[1] = (devpriv->rtsi_trig_direction_reg & - NISTC_RTSI_TRIG_DRV_CLK) - ? INSN_CONFIG_DIO_OUTPUT - : INSN_CONFIG_DIO_INPUT; - } + case INSN_CONFIG_DIO_QUERY: { + int ret = ni_get_rtsi_direction(dev, chan); + + if (ret < 0) + return ret; + data[1] = ret; return 2; + } case INSN_CONFIG_SET_CLOCK_SRC: return ni_set_master_clock(dev, data[1], data[2]); case INSN_CONFIG_GET_CLOCK_SRC: @@ -5083,9 +5200,14 @@ static int ni_rtsi_insn_config(struct comedi_device *dev, return 3; case INSN_CONFIG_SET_ROUTING: return ni_set_rtsi_routing(dev, chan, data[1]); - case INSN_CONFIG_GET_ROUTING: - data[1] = ni_get_rtsi_routing(dev, chan); + case INSN_CONFIG_GET_ROUTING: { + int ret = ni_get_rtsi_routing(dev, chan); + + if (ret < 0) + return ret; + data[1] = ret; return 2; + } default: return -EINVAL; } @@ -5102,9 +5224,275 @@ static int ni_rtsi_insn_bits(struct comedi_device *dev, return insn->n; } +/* + * Default routing for RTSI trigger lines. + * + * These values are used here in the init function, as well as in the + * disconnect_route function, after a RTSI route has been disconnected. + */ +static const int default_rtsi_routing[] = { + [0] = NI_RTSI_OUTPUT_ADR_START1, + [1] = NI_RTSI_OUTPUT_ADR_START2, + [2] = NI_RTSI_OUTPUT_SCLKG, + [3] = NI_RTSI_OUTPUT_DACUPDN, + [4] = NI_RTSI_OUTPUT_DA_START1, + [5] = NI_RTSI_OUTPUT_G_SRC0, + [6] = NI_RTSI_OUTPUT_G_GATE0, + [7] = NI_RTSI_OUTPUT_RTSI_OSC, +}; + +/* + * Route signals through RGOUT0 terminal. + * @reg: raw register value of RGOUT0 bits (only bit0 is important). + * @dev: comedi device handle. + */ +static void set_rgout0_reg(int reg, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + + if (devpriv->is_m_series) { + devpriv->rtsi_trig_direction_reg &= + ~NISTC_RTSI_TRIG_DIR_SUB_SEL1; + devpriv->rtsi_trig_direction_reg |= + (reg << NISTC_RTSI_TRIG_DIR_SUB_SEL1_SHIFT) & + NISTC_RTSI_TRIG_DIR_SUB_SEL1; + ni_stc_writew(dev, devpriv->rtsi_trig_direction_reg, + NISTC_RTSI_TRIG_DIR_REG); + } else { + devpriv->rtsi_trig_b_output_reg &= ~NISTC_RTSI_TRIGB_SUB_SEL1; + devpriv->rtsi_trig_b_output_reg |= + (reg << NISTC_RTSI_TRIGB_SUB_SEL1_SHIFT) & + NISTC_RTSI_TRIGB_SUB_SEL1; + ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg, + NISTC_RTSI_TRIGB_OUT_REG); + } +} + +static int get_rgout0_reg(struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg; + + if (devpriv->is_m_series) + reg = (devpriv->rtsi_trig_direction_reg & + NISTC_RTSI_TRIG_DIR_SUB_SEL1) + >> NISTC_RTSI_TRIG_DIR_SUB_SEL1_SHIFT; + else + reg = (devpriv->rtsi_trig_b_output_reg & + NISTC_RTSI_TRIGB_SUB_SEL1) + >> NISTC_RTSI_TRIGB_SUB_SEL1_SHIFT; + return reg; +} + +static inline int get_rgout0_src(struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg = get_rgout0_reg(dev); + + return ni_find_route_source(reg, NI_RGOUT0, &devpriv->routing_tables); +} + +/* + * Route signals through RGOUT0 terminal and increment the RGOUT0 use for this + * particular route. + * @src: device-global signal name + * @dev: comedi device handle + * + * Return: -EINVAL if the source is not valid to route to RGOUT0; + * -EBUSY if the RGOUT0 is already used; + * 0 if successful. + */ +static int incr_rgout0_src_use(int src, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_lookup_route_register(CR_CHAN(src), NI_RGOUT0, + &devpriv->routing_tables); + + if (reg < 0) + return -EINVAL; + + if (devpriv->rgout0_usage > 0 && get_rgout0_reg(dev) != reg) + return -EBUSY; + + ++devpriv->rgout0_usage; + set_rgout0_reg(reg, dev); + return 0; +} + +/* + * Unroute signals through RGOUT0 terminal and deccrement the RGOUT0 use for + * this particular source. This function does not actually unroute anything + * with respect to RGOUT0. It does, on the other hand, decrement the usage + * counter for the current src->RGOUT0 mapping. + * + * Return: -EINVAL if the source is not already routed to RGOUT0 (or usage is + * already at zero); 0 if successful. + */ +static int decr_rgout0_src_use(int src, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_lookup_route_register(CR_CHAN(src), NI_RGOUT0, + &devpriv->routing_tables); + + if (devpriv->rgout0_usage > 0 && get_rgout0_reg(dev) == reg) { + --devpriv->rgout0_usage; + if (!devpriv->rgout0_usage) + set_rgout0_reg(0, dev); /* ok default? */ + return 0; + } + return -EINVAL; +} + +/* + * Route signals through given NI_RTSI_BRD mux. + * @i: index of mux to route + * @reg: raw register value of RTSI_BRD bits + * @dev: comedi device handle + */ +static void set_ith_rtsi_brd_reg(int i, int reg, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg_i_sz = 3; /* value for e-series */ + int reg_i_mask; + int reg_i_shift; + + if (devpriv->is_m_series) + reg_i_sz = 4; + reg_i_mask = ~((~0) << reg_i_sz); + reg_i_shift = i * reg_i_sz; + + /* clear out the current reg_i for ith brd */ + devpriv->rtsi_shared_mux_reg &= ~(reg_i_mask << reg_i_shift); + /* (softcopy) write the new reg_i for ith brd */ + devpriv->rtsi_shared_mux_reg |= (reg & reg_i_mask) << reg_i_shift; + /* (hardcopy) write the new reg_i for ith brd */ + ni_stc_writew(dev, devpriv->rtsi_shared_mux_reg, NISTC_RTSI_BOARD_REG); +} + +static int get_ith_rtsi_brd_reg(int i, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg_i_sz = 3; /* value for e-series */ + int reg_i_mask; + int reg_i_shift; + + if (devpriv->is_m_series) + reg_i_sz = 4; + reg_i_mask = ~((~0) << reg_i_sz); + reg_i_shift = i * reg_i_sz; + + return (devpriv->rtsi_shared_mux_reg >> reg_i_shift) & reg_i_mask; +} + +static inline int get_rtsi_brd_src(int brd, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int brd_index = brd; + int reg; + + if (brd >= NI_RTSI_BRD(0)) + brd_index = brd - NI_RTSI_BRD(0); + else + brd = NI_RTSI_BRD(brd); + /* + * And now: + * brd : device-global name + * brd_index : index number of RTSI_BRD mux + */ + + reg = get_ith_rtsi_brd_reg(brd_index, dev); + + return ni_find_route_source(reg, brd, &devpriv->routing_tables); +} + +/* + * Route signals through NI_RTSI_BRD mux and increment the use counter for this + * particular route. + * + * Return: -EINVAL if the source is not valid to route to NI_RTSI_BRD(i); + * -EBUSY if all NI_RTSI_BRD muxes are already used; + * NI_RTSI_BRD(i) of allocated ith mux if successful. + */ +static int incr_rtsi_brd_src_use(int src, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int first_available = -1; + int err = -EINVAL; + s8 reg; + int i; + + /* first look for a mux that is already configured to provide src */ + for (i = 0; i < NUM_RTSI_SHARED_MUXS; ++i) { + reg = ni_lookup_route_register(CR_CHAN(src), NI_RTSI_BRD(i), + &devpriv->routing_tables); + + if (reg < 0) + continue; /* invalid route */ + + if (!devpriv->rtsi_shared_mux_usage[i]) { + if (first_available < 0) + /* found the first unused, but usable mux */ + first_available = i; + } else { + /* + * we've seen at least one possible route, so change the + * final error to -EBUSY in case there are no muxes + * available. + */ + err = -EBUSY; + + if (get_ith_rtsi_brd_reg(i, dev) == reg) { + /* + * we've found a mux that is already being used + * to provide the requested signal. Reuse it. + */ + goto success; + } + } + } + + if (first_available < 0) + return err; + + /* we did not find a mux to reuse, but there is at least one usable */ + i = first_available; + +success: + ++devpriv->rtsi_shared_mux_usage[i]; + set_ith_rtsi_brd_reg(i, reg, dev); + return NI_RTSI_BRD(i); +} + +/* + * Unroute signals through NI_RTSI_BRD mux and decrement the user counter for + * this particular route. + * + * Return: -EINVAL if the source is not already routed to rtsi_brd(i) (or usage + * is already at zero); 0 if successful. + */ +static int decr_rtsi_brd_src_use(int src, int rtsi_brd, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_lookup_route_register(CR_CHAN(src), rtsi_brd, + &devpriv->routing_tables); + const int i = rtsi_brd - NI_RTSI_BRD(0); + + if (devpriv->rtsi_shared_mux_usage[i] > 0 && + get_ith_rtsi_brd_reg(i, dev) == reg) { + --devpriv->rtsi_shared_mux_usage[i]; + if (!devpriv->rtsi_shared_mux_usage[i]) + set_ith_rtsi_brd_reg(i, 0, dev); /* ok default? */ + return 0; + } + + return -EINVAL; +} + static void ni_rtsi_init(struct comedi_device *dev) { struct ni_private *devpriv = dev->private; + int i; /* Initialises the RTSI bus signal switch to a default state */ @@ -5117,28 +5505,328 @@ static void ni_rtsi_init(struct comedi_device *dev) /* Set clock mode to internal */ if (ni_set_master_clock(dev, NI_MIO_INTERNAL_CLOCK, 0) < 0) dev_err(dev->class_dev, "ni_set_master_clock failed, bug?\n"); - /* default internal lines routing to RTSI bus lines */ - devpriv->rtsi_trig_a_output_reg = - NISTC_RTSI_TRIG(0, NI_RTSI_OUTPUT_ADR_START1) | - NISTC_RTSI_TRIG(1, NI_RTSI_OUTPUT_ADR_START2) | - NISTC_RTSI_TRIG(2, NI_RTSI_OUTPUT_SCLKG) | - NISTC_RTSI_TRIG(3, NI_RTSI_OUTPUT_DACUPDN); - ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg, - NISTC_RTSI_TRIGA_OUT_REG); - devpriv->rtsi_trig_b_output_reg = - NISTC_RTSI_TRIG(4, NI_RTSI_OUTPUT_DA_START1) | - NISTC_RTSI_TRIG(5, NI_RTSI_OUTPUT_G_SRC0) | - NISTC_RTSI_TRIG(6, NI_RTSI_OUTPUT_G_GATE0); - if (devpriv->is_m_series) - devpriv->rtsi_trig_b_output_reg |= - NISTC_RTSI_TRIG(7, NI_RTSI_OUTPUT_RTSI_OSC); - ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg, - NISTC_RTSI_TRIGB_OUT_REG); + /* default internal lines routing to RTSI bus lines */ + for (i = 0; i < 8; ++i) { + ni_set_rtsi_direction(dev, i, COMEDI_INPUT); + ni_set_rtsi_routing(dev, i, default_rtsi_routing[i]); + } + + /* + * Sets the source and direction of the 4 on board lines. + * This configures all board lines to be: + * for e-series: + * 1) inputs (not sure what "output" would mean) + * 2) copying TRIGGER_LINE(0) (or RTSI0) output + * for m-series: + * copying NI_PFI(0) output + */ + devpriv->rtsi_shared_mux_reg = 0; + for (i = 0; i < 4; ++i) + set_ith_rtsi_brd_reg(i, 0, dev); + memset(devpriv->rtsi_shared_mux_usage, 0, + sizeof(devpriv->rtsi_shared_mux_usage)); + + /* initialize rgout0 pin as unused. */ + devpriv->rgout0_usage = 0; + set_rgout0_reg(0, dev); +} + +/* Get route of GPFO_i/CtrOut pins */ +static inline int ni_get_gout_routing(unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + unsigned int reg = devpriv->an_trig_etc_reg; + + switch (dest) { + case 0: + if (reg & NISTC_ATRIG_ETC_GPFO_0_ENA) + return NISTC_ATRIG_ETC_GPFO_0_SEL_TO_SRC(reg); + break; + case 1: + if (reg & NISTC_ATRIG_ETC_GPFO_1_ENA) + return NISTC_ATRIG_ETC_GPFO_1_SEL_TO_SRC(reg); + break; + } + + return -EINVAL; +} + +/* Set route of GPFO_i/CtrOut pins */ +static inline int ni_disable_gout_routing(unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + + switch (dest) { + case 0: + devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_GPFO_0_ENA; + break; + case 1: + devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_GPFO_1_ENA; + break; + default: + return -EINVAL; + } + + ni_stc_writew(dev, devpriv->an_trig_etc_reg, NISTC_ATRIG_ETC_REG); + return 0; +} + +/* Set route of GPFO_i/CtrOut pins */ +static inline int ni_set_gout_routing(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + + switch (dest) { + case 0: + /* clear reg */ + devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_GPFO_0_SEL(-1); + /* set reg */ + devpriv->an_trig_etc_reg |= NISTC_ATRIG_ETC_GPFO_0_ENA + | NISTC_ATRIG_ETC_GPFO_0_SEL(src); + break; + case 1: + /* clear reg */ + devpriv->an_trig_etc_reg &= ~NISTC_ATRIG_ETC_GPFO_1_SEL; + src = src ? NISTC_ATRIG_ETC_GPFO_1_SEL : 0; + /* set reg */ + devpriv->an_trig_etc_reg |= NISTC_ATRIG_ETC_GPFO_1_ENA | src; + break; + default: + return -EINVAL; + } + + ni_stc_writew(dev, devpriv->an_trig_etc_reg, NISTC_ATRIG_ETC_REG); + return 0; +} + +/* + * Retrieves the current source of the output selector for the given + * destination. If the terminal for the destination is not already configured + * as an output, this function returns -EINVAL as error. + * + * Return: the register value of the destination output selector; + * -EINVAL if terminal is not configured for output. + */ +static int get_output_select_source(int dest, struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + int reg = -1; + + if (channel_is_pfi(dest)) { + if (ni_get_pfi_direction(dev, dest) == COMEDI_OUTPUT) + reg = ni_get_pfi_routing(dev, dest); + } else if (channel_is_rtsi(dest)) { + if (ni_get_rtsi_direction(dev, dest) == COMEDI_OUTPUT) { + reg = ni_get_rtsi_routing(dev, dest); + + if (reg == NI_RTSI_OUTPUT_RGOUT0) { + dest = NI_RGOUT0; /* prepare for lookup below */ + reg = get_rgout0_reg(dev); + } else if (reg >= NI_RTSI_OUTPUT_RTSI_BRD(0) && + reg <= NI_RTSI_OUTPUT_RTSI_BRD(3)) { + const int i = reg - NI_RTSI_OUTPUT_RTSI_BRD(0); + + dest = NI_RTSI_BRD(i); /* prepare for lookup */ + reg = get_ith_rtsi_brd_reg(i, dev); + } + } + } else if (dest >= NI_CtrOut(0) && dest <= NI_CtrOut(-1)) { + /* + * not handled by ni_tio. Only available for GPFO registers in + * e/m series. + */ + dest -= NI_CtrOut(0); + if (dest > 1) + /* there are only two g_out outputs. */ + return -EINVAL; + reg = ni_get_gout_routing(dest, dev); + } else if (channel_is_ctr(dest)) { + reg = ni_tio_get_routing(devpriv->counter_dev, dest); + } else { + dev_dbg(dev->class_dev, "%s: unhandled destination (%d) queried\n", + __func__, dest); + } + + if (reg >= 0) + return ni_find_route_source(CR_CHAN(reg), dest, + &devpriv->routing_tables); + return -EINVAL; +} + +/* + * Test a route: + * + * Return: -1 if not connectible; + * 0 if connectible and not connected; + * 1 if connectible and connected. + */ +static int test_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + + if (reg < 0) + return -1; + if (get_output_select_source(dest, dev) != CR_CHAN(src)) + return 0; + return 1; +} + +/* Connect the actual route. */ +static int connect_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + s8 current_src; + + if (reg < 0) + /* route is not valid */ + return -EINVAL; + + current_src = get_output_select_source(dest, dev); + if (current_src == CR_CHAN(src)) + return -EALREADY; + if (current_src >= 0) + /* destination mux is already busy. complain, don't overwrite */ + return -EBUSY; + + /* The route is valid and available. Now connect... */ + if (channel_is_pfi(dest)) { + /* set routing source, then open output */ + ni_set_pfi_routing(dev, dest, reg); + ni_set_pfi_direction(dev, dest, COMEDI_OUTPUT); + } else if (channel_is_rtsi(dest)) { + if (reg == NI_RTSI_OUTPUT_RGOUT0) { + int ret = incr_rgout0_src_use(src, dev); + + if (ret < 0) + return ret; + } else if (ni_rtsi_route_requires_mux(reg)) { + /* Attempt to allocate and route (src->brd) */ + int brd = incr_rtsi_brd_src_use(src, dev); + + if (brd < 0) + return brd; + + /* Now lookup the register value for (brd->dest) */ + reg = ni_lookup_route_register( + brd, dest, &devpriv->routing_tables); + } + + ni_set_rtsi_direction(dev, dest, COMEDI_OUTPUT); + ni_set_rtsi_routing(dev, dest, reg); + } else if (dest >= NI_CtrOut(0) && dest <= NI_CtrOut(-1)) { + /* + * not handled by ni_tio. Only available for GPFO registers in + * e/m series. + */ + dest -= NI_CtrOut(0); + if (dest > 1) + /* there are only two g_out outputs. */ + return -EINVAL; + if (ni_set_gout_routing(src, dest, dev)) + return -EINVAL; + } else if (channel_is_ctr(dest)) { + /* + * we are adding back the channel modifier info to set + * invert/edge info passed by the user + */ + ni_tio_set_routing(devpriv->counter_dev, dest, + reg | (src & ~CR_CHAN(-1))); + } else { + return -EINVAL; + } + return 0; +} + +static int disconnect_route(unsigned int src, unsigned int dest, + struct comedi_device *dev) +{ + struct ni_private *devpriv = dev->private; + s8 reg = ni_route_to_register(CR_CHAN(src), dest, + &devpriv->routing_tables); + + if (reg < 0) + /* route is not valid */ + return -EINVAL; + if (get_output_select_source(dest, dev) != src) + /* cannot disconnect something not connected */ + return -EINVAL; + + /* The route is valid and is connected. Now disconnect... */ + if (channel_is_pfi(dest)) { + /* set the pfi to high impedance, and disconnect */ + ni_set_pfi_direction(dev, dest, COMEDI_INPUT); + ni_set_pfi_routing(dev, dest, NI_PFI_OUTPUT_PFI_DEFAULT); + } else if (channel_is_rtsi(dest)) { + if (reg == NI_RTSI_OUTPUT_RGOUT0) { + int ret = decr_rgout0_src_use(src, dev); + + if (ret < 0) + return ret; + } else if (ni_rtsi_route_requires_mux(reg)) { + /* find which RTSI_BRD line is source for rtsi pin */ + int brd = ni_find_route_source( + ni_get_rtsi_routing(dev, dest), dest, + &devpriv->routing_tables); + + if (brd < 0) + return brd; + + /* decrement/disconnect RTSI_BRD line from source */ + decr_rtsi_brd_src_use(src, brd, dev); + } + + /* set rtsi output selector to default state */ + reg = default_rtsi_routing[dest - TRIGGER_LINE(0)]; + ni_set_rtsi_direction(dev, dest, COMEDI_INPUT); + ni_set_rtsi_routing(dev, dest, reg); + } else if (dest >= NI_CtrOut(0) && dest <= NI_CtrOut(-1)) { + /* + * not handled by ni_tio. Only available for GPFO registers in + * e/m series. + */ + dest -= NI_CtrOut(0); + if (dest > 1) + /* there are only two g_out outputs. */ + return -EINVAL; + reg = ni_disable_gout_routing(dest, dev); + } else if (channel_is_ctr(dest)) { + ni_tio_unset_routing(devpriv->counter_dev, dest); + } else { + return -EINVAL; + } + return 0; +} + +static int ni_global_insn_config(struct comedi_device *dev, + struct comedi_insn *insn, + unsigned int *data) +{ + switch (data[0]) { + case INSN_DEVICE_CONFIG_TEST_ROUTE: + data[0] = test_route(data[1], data[2], dev); + return 2; + case INSN_DEVICE_CONFIG_CONNECT_ROUTE: + return connect_route(data[1], data[2], dev); + case INSN_DEVICE_CONFIG_DISCONNECT_ROUTE: + return disconnect_route(data[1], data[2], dev); /* - * Sets the source and direction of the 4 on board lines - * ni_stc_writew(dev, 0, NISTC_RTSI_BOARD_REG); + * This case is already handled one level up. + * case INSN_DEVICE_CONFIG_GET_ROUTES: */ + default: + return -EINVAL; + } + return 1; } #ifdef PCIDMA @@ -5244,6 +5932,16 @@ static int ni_alloc_private(struct comedi_device *dev) return 0; } +static unsigned int _ni_get_valid_routes(struct comedi_device *dev, + unsigned int n_pairs, + unsigned int *pair_data) +{ + struct ni_private *devpriv = dev->private; + + return ni_get_valid_routes(&devpriv->routing_tables, n_pairs, + pair_data); +} + static int ni_E_init(struct comedi_device *dev, unsigned int interrupt_pin, unsigned int irq_polarity) { @@ -5252,6 +5950,24 @@ static int ni_E_init(struct comedi_device *dev, struct comedi_subdevice *s; int ret; int i; + const char *dev_family = devpriv->is_m_series ? "ni_mseries" + : "ni_eseries"; + + /* prepare the device for globally-named routes. */ + if (ni_assign_device_routes(dev_family, board->name, + &devpriv->routing_tables) < 0) { + dev_warn(dev->class_dev, "%s: %s device has no signal routing table.\n", + __func__, board->name); + dev_warn(dev->class_dev, "%s: High level NI signal names will not be available for this %s board.\n", + __func__, board->name); + } else { + /* + * only(?) assign insn_device_config if we have global names for + * this device. + */ + dev->insn_device_config = ni_global_insn_config; + dev->get_valid_routes = _ni_get_valid_routes; + } if (board->n_aochan > MAX_N_AO_CHAN) { dev_err(dev->class_dev, "bug! n_aochan > MAX_N_AO_CHAN\n"); @@ -5508,7 +6224,9 @@ static int ni_E_init(struct comedi_device *dev, (devpriv->is_m_series) ? ni_gpct_variant_m_series : ni_gpct_variant_e_series, - NUM_GPCT); + NUM_GPCT, + NUM_GPCT, + &devpriv->routing_tables); if (!devpriv->counter_dev) return -ENOMEM; @@ -5517,8 +6235,6 @@ static int ni_E_init(struct comedi_device *dev, struct ni_gpct *gpct = &devpriv->counter_dev->counters[i]; /* setup and initialize the counter */ - gpct->chip_index = 0; - gpct->counter_index = i; ni_tio_init_counter(gpct); s = &dev->subdevices[NI_GPCT_SUBDEV(i)]; @@ -5544,6 +6260,10 @@ static int ni_E_init(struct comedi_device *dev, s->private = gpct; } + /* Initialize GPFO_{0,1} to produce output of counters */ + ni_set_gout_routing(0, 0, dev); /* output of counter 0; DAQ STC, p338 */ + ni_set_gout_routing(0, 1, dev); /* output of counter 1; DAQ STC, p338 */ + /* Frequency output subdevice */ s = &dev->subdevices[NI_FREQ_OUT_SUBDEV]; s->type = COMEDI_SUBD_COUNTER; diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c index 6692af5ff79b..b9a0dc6eac44 100644 --- a/drivers/staging/comedi/drivers/ni_pcidio.c +++ b/drivers/staging/comedi/drivers/ni_pcidio.c @@ -260,18 +260,22 @@ enum nidio_boardid { struct nidio_board { const char *name; unsigned int uses_firmware:1; + unsigned int dio_speed; }; static const struct nidio_board nidio_boards[] = { [BOARD_PCIDIO_32HS] = { .name = "pci-dio-32hs", + .dio_speed = 50, }, [BOARD_PXI6533] = { .name = "pxi-6533", + .dio_speed = 50, }, [BOARD_PCI6534] = { .name = "pci-6534", .uses_firmware = 1, + .dio_speed = 50, }, }; @@ -467,6 +471,15 @@ static int ni_pcidio_insn_config(struct comedi_device *dev, { int ret; + if (data[0] == INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS) { + const struct nidio_board *board = dev->board_ptr; + + /* we don't care about actual channels */ + data[1] = board->dio_speed; + data[2] = 0; + return 0; + } + ret = comedi_dio_insn_config(dev, s, insn, data, 0); if (ret) return ret; diff --git a/drivers/staging/comedi/drivers/ni_pcimio.c b/drivers/staging/comedi/drivers/ni_pcimio.c index f9e466d18b3f..14b26fffe049 100644 --- a/drivers/staging/comedi/drivers/ni_pcimio.c +++ b/drivers/staging/comedi/drivers/ni_pcimio.c @@ -693,6 +693,7 @@ static const struct ni_board_struct ni_boards[] = { .ai_speed = 4000, .reg_type = ni_reg_622x, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6221] = { .name = "pci-6221", @@ -708,6 +709,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_622x, .ao_speed = 1200, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6221_37PIN] = { .name = "pci-6221_37pin", @@ -738,6 +740,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_622x, .ao_speed = 1200, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6224] = { .name = "pci-6224", @@ -749,6 +752,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_622x, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PXI6224] = { .name = "pxi-6224", @@ -760,6 +764,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_622x, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6225] = { .name = "pci-6225", @@ -776,6 +781,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 1200, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PXI6225] = { .name = "pxi-6225", @@ -792,6 +798,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 1200, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6229] = { .name = "pci-6229", @@ -824,6 +831,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 1200, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 1000, }, [BOARD_PCI6250] = { .name = "pci-6250", @@ -844,6 +852,7 @@ static const struct ni_board_struct ni_boards[] = { .ai_speed = 800, .reg_type = ni_reg_625x, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6251] = { .name = "pci-6251", @@ -859,6 +868,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PXI6251] = { .name = "pxi-6251", @@ -874,6 +884,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCIE6251] = { .name = "pcie-6251", @@ -889,6 +900,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PXIE6251] = { .name = "pxie-6251", @@ -904,6 +916,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6254] = { .name = "pci-6254", @@ -926,6 +939,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_625x, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6259] = { .name = "pci-6259", @@ -958,6 +972,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 350, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCIE6259] = { .name = "pcie-6259", @@ -990,6 +1005,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 350, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6280] = { .name = "pci-6280", @@ -1012,6 +1028,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_fifo_depth = 8191, .reg_type = ni_reg_628x, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6281] = { .name = "pci-6281", @@ -1027,6 +1044,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_628x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PXI6281] = { .name = "pxi-6281", @@ -1042,6 +1060,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_628x, .ao_speed = 350, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6284] = { .name = "pci-6284", @@ -1064,6 +1083,7 @@ static const struct ni_board_struct ni_boards[] = { .reg_type = ni_reg_628x, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6289] = { .name = "pci-6289", @@ -1096,6 +1116,7 @@ static const struct ni_board_struct ni_boards[] = { .ao_speed = 350, .has_32dio_chan = 1, .caldac = { caldac_none }, + .dio_speed = 100, }, [BOARD_PCI6143] = { .name = "pci-6143", diff --git a/drivers/staging/comedi/drivers/ni_routes.c b/drivers/staging/comedi/drivers/ni_routes.c new file mode 100644 index 000000000000..eb61494dc2bd --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routes.c @@ -0,0 +1,523 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routes.c + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/module.h> +#include <linux/slab.h> +#include <linux/bsearch.h> +#include <linux/sort.h> + +#include "../comedi.h" + +#include "ni_routes.h" +#include "ni_routing/ni_route_values.h" +#include "ni_routing/ni_device_routes.h" + +/* + * This is defined in ni_routing/ni_route_values.h: + * #define B(x) ((x) - NI_NAMES_BASE) + */ + +/* + * These are defined in ni_routing/ni_route_values.h to identify clearly + * elements of the table that were set. In other words, entries that are zero + * are invalid. To get the value to use for the register, one must mask out the + * high bit. + * + * #define V(x) ((x) | 0x80) + * + * #define UNMARK(x) ((x) & (~(0x80))) + * + */ + +/* Helper for accessing data. */ +#define RVi(table, src, dest) ((table)[(dest) * NI_NUM_NAMES + (src)]) + +static const size_t route_table_size = NI_NUM_NAMES * NI_NUM_NAMES; + +/* + * Find the proper route_values and ni_device_routes tables for this particular + * device. + * + * Return: -ENODATA if either was not found; 0 if both were found. + */ +static int ni_find_device_routes(const char *device_family, + const char *board_name, + struct ni_route_tables *tables) +{ + const struct ni_device_routes *dr = NULL; + const u8 *rv = NULL; + int i; + + /* First, find the register_values table for this device family */ + for (i = 0; ni_all_route_values[i]; ++i) { + if (memcmp(ni_all_route_values[i]->family, device_family, + strnlen(device_family, 30)) == 0) { + rv = &ni_all_route_values[i]->register_values[0][0]; + break; + } + } + + if (!rv) + return -ENODATA; + + /* Second, find the set of routes valid for this device. */ + for (i = 0; ni_device_routes_list[i]; ++i) { + if (memcmp(ni_device_routes_list[i]->device, board_name, + strnlen(board_name, 30)) == 0) { + dr = ni_device_routes_list[i]; + break; + } + } + + if (!dr) + return -ENODATA; + + tables->route_values = rv; + tables->valid_routes = dr; + + return 0; +} + +/** + * ni_assign_device_routes() - Assign the proper lookup table for NI signal + * routing to the specified NI device. + * + * Return: -ENODATA if assignment was not successful; 0 if successful. + */ +int ni_assign_device_routes(const char *device_family, + const char *board_name, + struct ni_route_tables *tables) +{ + memset(tables, 0, sizeof(struct ni_route_tables)); + return ni_find_device_routes(device_family, board_name, tables); +} +EXPORT_SYMBOL_GPL(ni_assign_device_routes); + +/** + * ni_count_valid_routes() - Count the number of valid routes. + * @tables: Routing tables for which to count all valid routes. + */ +unsigned int ni_count_valid_routes(const struct ni_route_tables *tables) +{ + int total = 0; + int i; + + for (i = 0; i < tables->valid_routes->n_route_sets; ++i) { + const struct ni_route_set *R = &tables->valid_routes->routes[i]; + int j; + + for (j = 0; j < R->n_src; ++j) { + const int src = R->src[j]; + const int dest = R->dest; + const u8 *rv = tables->route_values; + + if (RVi(rv, B(src), B(dest))) + /* direct routing is valid */ + ++total; + else if (channel_is_rtsi(dest) && + (RVi(rv, B(src), B(NI_RGOUT0)) || + RVi(rv, B(src), B(NI_RTSI_BRD(0))) || + RVi(rv, B(src), B(NI_RTSI_BRD(1))) || + RVi(rv, B(src), B(NI_RTSI_BRD(2))) || + RVi(rv, B(src), B(NI_RTSI_BRD(3))))) { + ++total; + } + } + } + return total; +} +EXPORT_SYMBOL_GPL(ni_count_valid_routes); + +/** + * ni_get_valid_routes() - Implements INSN_DEVICE_CONFIG_GET_ROUTES. + * @tables: pointer to relevant set of routing tables. + * @n_pairs: Number of pairs for which memory is allocated by the user. If + * the user specifies '0', only the number of available pairs is + * returned. + * @pair_data: Pointer to memory allocated to return pairs back to user. Each + * even, odd indexed member of this array will hold source, + * destination of a route pair respectively. + * + * Return: the number of valid routes if n_pairs == 0; otherwise, the number of + * valid routes copied. + */ +unsigned int ni_get_valid_routes(const struct ni_route_tables *tables, + unsigned int n_pairs, + unsigned int *pair_data) +{ + unsigned int n_valid = ni_count_valid_routes(tables); + int i; + + if (n_pairs == 0 || n_valid == 0) + return n_valid; + + if (!pair_data) + return 0; + + n_valid = 0; + + for (i = 0; i < tables->valid_routes->n_route_sets; ++i) { + const struct ni_route_set *R = &tables->valid_routes->routes[i]; + int j; + + for (j = 0; j < R->n_src; ++j) { + const int src = R->src[j]; + const int dest = R->dest; + bool valid = false; + const u8 *rv = tables->route_values; + + if (RVi(rv, B(src), B(dest))) + /* direct routing is valid */ + valid = true; + else if (channel_is_rtsi(dest) && + (RVi(rv, B(src), B(NI_RGOUT0)) || + RVi(rv, B(src), B(NI_RTSI_BRD(0))) || + RVi(rv, B(src), B(NI_RTSI_BRD(1))) || + RVi(rv, B(src), B(NI_RTSI_BRD(2))) || + RVi(rv, B(src), B(NI_RTSI_BRD(3))))) { + /* indirect routing also valid */ + valid = true; + } + + if (valid) { + pair_data[2 * n_valid] = src; + pair_data[2 * n_valid + 1] = dest; + ++n_valid; + } + + if (n_valid >= n_pairs) + return n_valid; + } + } + return n_valid; +} +EXPORT_SYMBOL_GPL(ni_get_valid_routes); + +/** + * List of NI global signal names that, as destinations, are only routeable + * indirectly through the *_arg elements of the comedi_cmd structure. + */ +static const int NI_CMD_DESTS[] = { + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, +}; + +/** + * ni_is_cmd_dest() - Determine whether the given destination is only + * configurable via a comedi_cmd struct. + * @dest: Destination to test. + */ +bool ni_is_cmd_dest(int dest) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(NI_CMD_DESTS); ++i) + if (NI_CMD_DESTS[i] == dest) + return true; + return false; +} +EXPORT_SYMBOL_GPL(ni_is_cmd_dest); + +/* **** BEGIN Routes sort routines **** */ +static int _ni_sort_destcmp(const void *va, const void *vb) +{ + const struct ni_route_set *a = va; + const struct ni_route_set *b = vb; + + if (a->dest < b->dest) + return -1; + else if (a->dest > b->dest) + return 1; + return 0; +} + +static int _ni_sort_srccmp(const void *vsrc0, const void *vsrc1) +{ + const int *src0 = vsrc0; + const int *src1 = vsrc1; + + if (*src0 < *src1) + return -1; + else if (*src0 > *src1) + return 1; + return 0; +} + +/** + * ni_sort_device_routes() - Sort the list of valid device signal routes in + * preparation for use. + * @valid_routes: pointer to ni_device_routes struct to sort. + */ +void ni_sort_device_routes(struct ni_device_routes *valid_routes) +{ + unsigned int n; + + /* 1. Count and set the number of ni_route_set objects. */ + valid_routes->n_route_sets = 0; + while (valid_routes->routes[valid_routes->n_route_sets].dest != 0) + ++valid_routes->n_route_sets; + + /* 2. sort all ni_route_set objects by destination. */ + sort(valid_routes->routes, valid_routes->n_route_sets, + sizeof(struct ni_route_set), _ni_sort_destcmp, NULL); + + /* 3. Loop through each route_set for sorting. */ + for (n = 0; n < valid_routes->n_route_sets; ++n) { + struct ni_route_set *rs = &valid_routes->routes[n]; + + /* 3a. Count and set the number of sources. */ + rs->n_src = 0; + while (rs->src[rs->n_src]) + ++rs->n_src; + + /* 3a. Sort sources. */ + sort(valid_routes->routes[n].src, valid_routes->routes[n].n_src, + sizeof(int), _ni_sort_srccmp, NULL); + } +} +EXPORT_SYMBOL_GPL(ni_sort_device_routes); + +/* sort all valid device signal routes in prep for use */ +static void ni_sort_all_device_routes(void) +{ + unsigned int i; + + for (i = 0; ni_device_routes_list[i]; ++i) + ni_sort_device_routes(ni_device_routes_list[i]); +} + +/* **** BEGIN Routes search routines **** */ +static int _ni_bsearch_destcmp(const void *vkey, const void *velt) +{ + const int *key = vkey; + const struct ni_route_set *elt = velt; + + if (*key < elt->dest) + return -1; + else if (*key > elt->dest) + return 1; + return 0; +} + +static int _ni_bsearch_srccmp(const void *vkey, const void *velt) +{ + const int *key = vkey; + const int *elt = velt; + + if (*key < *elt) + return -1; + else if (*key > *elt) + return 1; + return 0; +} + +/** + * ni_find_route_set() - Finds the proper route set with the specified + * destination. + * @destination: Destination of which to search for the route set. + * @valid_routes: Pointer to device routes within which to search. + * + * Return: NULL if no route_set is found with the specified @destination; + * otherwise, a pointer to the route_set if found. + */ +const struct ni_route_set * +ni_find_route_set(const int destination, + const struct ni_device_routes *valid_routes) +{ + return bsearch(&destination, valid_routes->routes, + valid_routes->n_route_sets, sizeof(struct ni_route_set), + _ni_bsearch_destcmp); +} +EXPORT_SYMBOL_GPL(ni_find_route_set); + +/** + * ni_route_set_has_source() - Determines whether the given source is in + * included given route_set. + * + * Return: true if found; false otherwise. + */ +bool ni_route_set_has_source(const struct ni_route_set *routes, + const int source) +{ + if (!bsearch(&source, routes->src, routes->n_src, sizeof(int), + _ni_bsearch_srccmp)) + return false; + return true; +} +EXPORT_SYMBOL_GPL(ni_route_set_has_source); + +/** + * ni_lookup_route_register() - Look up a register value for a particular route + * without checking whether the route is valid for + * the particular device. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Return: -EINVAL if the specified route is not valid for this device family. + */ +s8 ni_lookup_route_register(int src, int dest, + const struct ni_route_tables *tables) +{ + s8 regval; + + /* + * Be sure to use the B() macro to subtract off the NI_NAMES_BASE before + * indexing into the route_values array. + */ + src = B(src); + dest = B(dest); + if (src < 0 || src >= NI_NUM_NAMES || dest < 0 || dest >= NI_NUM_NAMES) + return -EINVAL; + regval = RVi(tables->route_values, src, dest); + if (!regval) + return -EINVAL; + /* mask out the valid-value marking bit */ + return UNMARK(regval); +} +EXPORT_SYMBOL_GPL(ni_lookup_route_register); + +/** + * ni_route_to_register() - Validates and converts the specified signal route + * (src-->dest) to the value used at the appropriate + * register. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Generally speaking, most routes require the first six bits and a few require + * 7 bits. Special handling is given for the return value when the route is to + * be handled by the RTSI sub-device. In this case, the returned register may + * not be sufficient to define the entire route path, but rather may only + * indicate the intermediate route. For example, if the route must go through + * the RGOUT0 pin, the (src->RGOUT0) register value will be returned. + * Similarly, if the route must go through the NI_RTSI_BRD lines, the BIT(6) + * will be set: + * + * if route does not need RTSI_BRD lines: + * bits 0:7 : register value + * for a route that must go through RGOUT0 pin, this will be equal + * to the (src->RGOUT0) register value. + * else: * route is (src->RTSI_BRD(x), RTSI_BRD(x)->TRIGGER_LINE(i)) * + * bits 0:5 : zero + * bits 6 : set to 1 + * bits 7:7 : zero + * + * Return: register value to be used for source at destination with special + * cases given above; Otherwise, -1 if the specified route is not valid for + * this particular device. + */ +s8 ni_route_to_register(const int src, const int dest, + const struct ni_route_tables *tables) +{ + const struct ni_route_set *routes = + ni_find_route_set(dest, tables->valid_routes); + const u8 *rv; + s8 regval; + + /* first check to see if source is listed with bunch of destinations. */ + if (!routes) + return -1; + /* 2nd, check to see if destination is in list of source's targets. */ + if (!ni_route_set_has_source(routes, src)) + return -1; + /* + * finally, check to see if we know how to route... + * Be sure to use the B() macro to subtract off the NI_NAMES_BASE before + * indexing into the route_values array. + */ + rv = tables->route_values; + regval = RVi(rv, B(src), B(dest)); + + /* + * if we did not validate the route, we'll see if we can route through + * one of the muxes + */ + if (!regval && channel_is_rtsi(dest)) { + regval = RVi(rv, B(src), B(NI_RGOUT0)); + if (!regval && (RVi(rv, B(src), B(NI_RTSI_BRD(0))) || + RVi(rv, B(src), B(NI_RTSI_BRD(1))) || + RVi(rv, B(src), B(NI_RTSI_BRD(2))) || + RVi(rv, B(src), B(NI_RTSI_BRD(3))))) + regval = BIT(6); + } + + if (!regval) + return -1; + /* mask out the valid-value marking bit */ + return UNMARK(regval); +} +EXPORT_SYMBOL_GPL(ni_route_to_register); + +/** + * ni_find_route_source() - Finds the signal source corresponding to a signal + * route (src-->dest) of the specified routing register + * value and the specified route destination on the + * specified device. + * + * Note that this function does _not_ validate the source based on device + * routes. + * + * Return: The NI signal value (e.g. NI_PFI(0) or PXI_Clk10) if found. + * If the source was not found (i.e. the register value is not + * valid for any routes to the destination), -EINVAL is returned. + */ +int ni_find_route_source(const u8 src_sel_reg_value, int dest, + const struct ni_route_tables *tables) +{ + int src; + + dest = B(dest); /* subtract NI names offset */ + /* ensure we are not going to under/over run the route value table */ + if (dest < 0 || dest >= NI_NUM_NAMES) + return -EINVAL; + for (src = 0; src < NI_NUM_NAMES; ++src) + if (RVi(tables->route_values, src, dest) == + V(src_sel_reg_value)) + return src + NI_NAMES_BASE; + return -EINVAL; +} +EXPORT_SYMBOL_GPL(ni_find_route_source); + +/* **** END Routes search routines **** */ + +/* **** BEGIN simple module entry/exit functions **** */ +static int __init ni_routes_module_init(void) +{ + ni_sort_all_device_routes(); + return 0; +} + +static void __exit ni_routes_module_exit(void) +{ +} + +module_init(ni_routes_module_init); +module_exit(ni_routes_module_exit); + +MODULE_AUTHOR("Comedi http://www.comedi.org"); +MODULE_DESCRIPTION("Comedi helper for routing signals-->terminals for NI"); +MODULE_LICENSE("GPL"); +/* **** END simple module entry/exit functions **** */ diff --git a/drivers/staging/comedi/drivers/ni_routes.h b/drivers/staging/comedi/drivers/ni_routes.h new file mode 100644 index 000000000000..3211a16adc6f --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routes.h @@ -0,0 +1,329 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routes.h + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTES_H +#define _COMEDI_DRIVERS_NI_ROUTES_H + +#include <linux/types.h> +#include <linux/errno.h> + +#ifndef NI_ROUTE_VALUE_EXTERNAL_CONVERSION +#include <linux/bitops.h> +#endif + +#include "../comedi.h" + +/** + * struct ni_route_set - Set of destinations with a common source. + * @dest: Destination of all sources in this route set. + * @n_src: Number of sources for this route set. + * @src: List of sources that all map to the same destination. + */ +struct ni_route_set { + int dest; + int n_src; + int *src; +}; + +/** + * struct ni_device_routes - List of all src->dest sets for a particular device. + * @device: Name of board/device (e.g. pxi-6733). + * @n_route_sets: Number of route sets that are valid for this device. + * @routes: List of route sets that are valid for this device. + */ +struct ni_device_routes { + const char *device; + int n_route_sets; + struct ni_route_set *routes; +}; + +/** + * struct ni_route_tables - Register values and valid routes for a device. + * @valid_routes: Pointer to a all valid route sets for a single device. + * @route_values: Pointer to register values for all routes for the family to + * which the device belongs. + * + * Link to the valid src->dest routes and the register values used to assign + * such routes for that particular device. + */ +struct ni_route_tables { + const struct ni_device_routes *valid_routes; + const u8 *route_values; +}; + +/* + * ni_assign_device_routes() - Assign the proper lookup table for NI signal + * routing to the specified NI device. + * + * Return: -ENODATA if assignment was not successful; 0 if successful. + */ +int ni_assign_device_routes(const char *device_family, + const char *board_name, + struct ni_route_tables *tables); + +/* + * ni_find_route_set() - Finds the proper route set with the specified + * destination. + * @destination: Destination of which to search for the route set. + * @valid_routes: Pointer to device routes within which to search. + * + * Return: NULL if no route_set is found with the specified @destination; + * otherwise, a pointer to the route_set if found. + */ +const struct ni_route_set * +ni_find_route_set(const int destination, + const struct ni_device_routes *valid_routes); + +/* + * ni_route_set_has_source() - Determines whether the given source is in + * included given route_set. + * + * Return: true if found; false otherwise. + */ +bool ni_route_set_has_source(const struct ni_route_set *routes, const int src); + +/* + * ni_route_to_register() - Validates and converts the specified signal route + * (src-->dest) to the value used at the appropriate + * register. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Generally speaking, most routes require the first six bits and a few require + * 7 bits. Special handling is given for the return value when the route is to + * be handled by the RTSI sub-device. In this case, the returned register may + * not be sufficient to define the entire route path, but rather may only + * indicate the intermediate route. For example, if the route must go through + * the RGOUT0 pin, the (src->RGOUT0) register value will be returned. + * Similarly, if the route must go through the NI_RTSI_BRD lines, the BIT(6) + * will be set: + * + * if route does not need RTSI_BRD lines: + * bits 0:7 : register value + * for a route that must go through RGOUT0 pin, this will be equal + * to the (src->RGOUT0) register value. + * else: * route is (src->RTSI_BRD(x), RTSI_BRD(x)->TRIGGER_LINE(i)) * + * bits 0:5 : zero + * bits 6 : set to 1 + * bits 7:7 : zero + * + * Return: register value to be used for source at destination with special + * cases given above; Otherwise, -1 if the specified route is not valid for + * this particular device. + */ +s8 ni_route_to_register(const int src, const int dest, + const struct ni_route_tables *tables); + +static inline bool ni_rtsi_route_requires_mux(s8 value) +{ + return value & BIT(6); +} + +/* + * ni_lookup_route_register() - Look up a register value for a particular route + * without checking whether the route is valid for + * the particular device. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Return: -EINVAL if the specified route is not valid for this device family. + */ +s8 ni_lookup_route_register(int src, int dest, + const struct ni_route_tables *tables); + +/** + * route_is_valid() - Determines whether the specified signal route (src-->dest) + * is valid for the given NI comedi_device. + * @src: global-identifier for route source + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * + * Return: True if the route is valid, otherwise false. + */ +static inline bool route_is_valid(const int src, const int dest, + const struct ni_route_tables *tables) +{ + return ni_route_to_register(src, dest, tables) >= 0; +} + +/* + * ni_is_cmd_dest() - Determine whether the given destination is only + * configurable via a comedi_cmd struct. + * @dest: Destination to test. + */ +bool ni_is_cmd_dest(int dest); + +static inline bool channel_is_pfi(int channel) +{ + return NI_PFI(0) <= channel && channel <= NI_PFI(-1); +} + +static inline bool channel_is_rtsi(int channel) +{ + return TRIGGER_LINE(0) <= channel && channel <= TRIGGER_LINE(-1); +} + +static inline bool channel_is_ctr(int channel) +{ + return channel >= NI_COUNTER_NAMES_BASE && + channel <= NI_COUNTER_NAMES_MAX; +} + +/* + * ni_count_valid_routes() - Count the number of valid routes. + * @tables: Routing tables for which to count all valid routes. + */ +unsigned int ni_count_valid_routes(const struct ni_route_tables *tables); + +/* + * ni_get_valid_routes() - Implements INSN_DEVICE_CONFIG_GET_ROUTES. + * @tables: pointer to relevant set of routing tables. + * @n_pairs: Number of pairs for which memory is allocated by the user. If + * the user specifies '0', only the number of available pairs is + * returned. + * @pair_data: Pointer to memory allocated to return pairs back to user. Each + * even, odd indexed member of this array will hold source, + * destination of a route pair respectively. + * + * Return: the number of valid routes if n_pairs == 0; otherwise, the number of + * valid routes copied. + */ +unsigned int ni_get_valid_routes(const struct ni_route_tables *tables, + unsigned int n_pairs, + unsigned int *pair_data); + +/* + * ni_sort_device_routes() - Sort the list of valid device signal routes in + * preparation for use. + * @valid_routes: pointer to ni_device_routes struct to sort. + */ +void ni_sort_device_routes(struct ni_device_routes *valid_routes); + +/* + * ni_find_route_source() - Finds the signal source corresponding to a signal + * route (src-->dest) of the specified routing register + * value and the specified route destination on the + * specified device. + * + * Note that this function does _not_ validate the source based on device + * routes. + * + * Return: The NI signal value (e.g. NI_PFI(0) or PXI_Clk10) if found. + * If the source was not found (i.e. the register value is not + * valid for any routes to the destination), -EINVAL is returned. + */ +int ni_find_route_source(const u8 src_sel_reg_value, const int dest, + const struct ni_route_tables *tables); + +/** + * route_register_is_valid() - Determines whether the register value for the + * specified route destination on the specified + * device is valid. + */ +static inline bool route_register_is_valid(const u8 src_sel_reg_value, + const int dest, + const struct ni_route_tables *tables) +{ + return ni_find_route_source(src_sel_reg_value, dest, tables) >= 0; +} + +/** + * ni_get_reg_value_roffs() - Determines the proper register value for a + * particular valid NI signal/terminal route. + * @src: Either a direct register value or one of NI_* signal names. + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * @direct_reg_offset: + * Compatibility compensation argument. This argument allows us to + * arbitrarily apply an offset to src if src is a direct register + * value reference. This is necessary to be compatible with + * definitions of register values as previously exported directly + * to user space. + * + * Return: the register value (>0) to be used at the destination if the src is + * valid for the given destination; -1 otherwise. + */ +static inline s8 ni_get_reg_value_roffs(int src, const int dest, + const struct ni_route_tables *tables, + const int direct_reg_offset) +{ + if (src < NI_NAMES_BASE) { + src += direct_reg_offset; + /* + * In this case, the src is expected to actually be a register + * value. + */ + if (route_register_is_valid(src, dest, tables)) + return src; + return -1; + } + + /* + * Otherwise, the src is expected to be one of the abstracted NI + * signal/terminal names. + */ + return ni_route_to_register(src, dest, tables); +} + +static inline int ni_get_reg_value(const int src, const int dest, + const struct ni_route_tables *tables) +{ + return ni_get_reg_value_roffs(src, dest, tables, 0); +} + +/** + * ni_check_trigger_arg_roffs() - Checks the trigger argument (*_arg) of an NI + * device to ensure that the *_arg value + * corresponds to _either_ a valid register value + * to define a trigger source, _or_ a valid NI + * signal/terminal name that has a valid route to + * the destination on the particular device. + * @src: Either a direct register value or one of NI_* signal names. + * @dest: global-identifier for route destination + * @tables: pointer to relevant set of routing tables. + * @direct_reg_offset: + * Compatibility compensation argument. This argument allows us to + * arbitrarily apply an offset to src if src is a direct register + * value reference. This is necessary to be compatible with + * definitions of register values as previously exported directly + * to user space. + * + * Return: 0 if the src (either register value or NI signal/terminal name) is + * valid for the destination; -EINVAL otherwise. + */ +static inline +int ni_check_trigger_arg_roffs(int src, const int dest, + const struct ni_route_tables *tables, + const int direct_reg_offset) +{ + if (ni_get_reg_value_roffs(src, dest, tables, direct_reg_offset) < 0) + return -EINVAL; + return 0; +} + +static inline int ni_check_trigger_arg(const int src, const int dest, + const struct ni_route_tables *tables) +{ + return ni_check_trigger_arg_roffs(src, dest, tables, 0); +} + +#endif /* _COMEDI_DRIVERS_NI_ROUTES_H */ diff --git a/drivers/staging/comedi/drivers/ni_routing/README b/drivers/staging/comedi/drivers/ni_routing/README new file mode 100644 index 000000000000..b65c4ebedbc4 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/README @@ -0,0 +1,240 @@ +Framework for Maintaining Common National Instruments Terminal/Signal names + +The contents of this directory are primarily for maintaining and formatting all +known valid signal routes for various National Instruments devices. + +Some background: + There have been significant confusions over the past many years for users + when trying to understand how to connect to/from signals and terminals on + NI hardware using comedi. The major reason for this is that the actual + register values were exposed and required to be used by users. Several + major reasons exist why this caused major confusion for users: + + 1) The register values are _NOT_ in user documentation, but rather in + arcane locations, such as a few register programming manuals that are + increasingly hard to find and the NI-MHDDK (comments in in example code). + There is no one place to find the various valid values of the registers. + + 2) The register values are _NOT_ completely consistent. There is no way to + gain any sense of intuition of which values, or even enums one should use + for various registers. There was some attempt in prior use of comedi to + name enums such that a user might know which enums should be used for + varying purposes, but the end-user had to gain a knowledge of register + values to correctly wield this approach. + + 3) The names for signals and registers found in the various register level + programming manuals and vendor-provided documentation are _not_ even + close to the same names that are in the end-user documentation. + + 4) The sets of routes that are valid are not consistent from device to device. + One additional major challenge is that this information does not seem to be + obtainable in any programmatic fashion, neither through the proprietary + NIDAQmx(-base) c-libraries, nor with register level programming, _nor_ + through any documentation. In fact, the only consistent source of this + information is through the proprietary NI-MAX software, which currently only + runs on Windows platforms. A further challenge is that this information + cannot be exported from NI-MAX, except by screenshot. + + + +The content of this directory is part of an effort to greatly simplify the use +of signal routing capabilities of National Instruments data-acquisition and +control hardware. In order to facilitate the transfer of register-level +information _and_ the knowledge of valid routes per device, a few specific +choices were made: + + +1) The names of the National Instruments signals/terminals that are used in this + directory are chosen to be consistent with (a) the NI's user level + documentation, (b) NI's user-level code, (c) the information as provided by + the proprietary NI-MAX software, and (d) the user interface code provided by + the user-land comedilib library. + + The impact of this choice implies that one allows the use of CamelScript names + in the kernel. In short, the choice to use CamelScript and the exact names + below is for maintainability, clarity, similarity to manufacturer's + documentation, _and_ a mitigation for confusion that has plagued the use of + these drivers for years! + +2) The bulk of the real content for this directory is stored in two separate + collections (i.e. sub-directories) of tables stored in c source files: + + (a) ni_route_values/ni_[series-label]series.c + + This data represents all the various register values to use for the + multiple different signal MUXes for the specific device families. + + The values are all wrapped in one of three macros to help document and + track which values have been implemented and tested. + These macros are: + V(<value>) : register value is valid, tested, and implemented + I(<value>) : register value is implemented but needs testing + U(<value>) : register value is not implemented + + The actual function of these macros will depend on whether the code is + compiled in the kernel or whether it is compiled into the conversion + tools. For the conversion tools, it can be used to indicate the status + of the register value. For the kernel, V() and I() both perform the + same function and prepare data to be used; U() zeroes out the value to + ensure that it cannot be used. + + *** It would be a great help for users to test these values such that + these files can be correctly marked/documented *** + + (b) ni_device_routes/[board-name].c + + This data represents the known set of valid signal routes that are + possible for each specific board. Although the family defines the + register values to use for a particular signal MUX, not all possible + signals are actually available on each board. + + In order for a particular board to take advantage of the effort to + simplify/clarify signal routing on NI devices, a corresponding + [board-name].c file must be created. This file should reflect the known + valid _direct_ routing capabilities of the board. + + As noted above, the only known consistent source of information for + valid device routes comes from the proprietary National Instruments + Windows software, NI-MAX. Also, as noted above, this information can + only be visually conveyed from NI-MAX to other media. To make this + easier, the naming conventions used in the [board-name].c file are + similar to the naming conventions as presented by NI-MAX. + + +3) Two other files aggregate the above data to integrate it into comedi: + ni_route_values.c + ni_device_routes.c + + When adding a new [board-name].c file, be sure to also add in the line in + ni_device_routes.c to include this information into comedi. + + +4) Several tools have been included to convert from/to the c file formats. + These tools are best used/demonstrated via the included Makefile targets: + (a) `make csv-files` + Creates new csv-files using content of c-files of existing + ni_routing/* content. New csv files are placed in csv + sub-directory. + + As noted above, the only consistent source of information of valid + device routes comes from the proprietary National Instruments Windows + software, NI-MAX. Also, as noted above, this information can only be + visually conveyed from NI-MAX to other media. This make target creates + spreadsheet representations of the routing data. The choice of using a + spreadsheet (ala CSV) to copy this information allows for easy direct + visual comparison to the NI-MAX "Valid Routes" tables. + + Furthermore, the register-level information is much easier to identify and + correct when entire families of NI devices are shown side by side in table + format. This is made easy by using a file-storage format that can be + loaded into a spreadsheet application. + + Finally, .csv content is very easy to edit and read using a variety of + tools, including spreadsheets or various other scripting languages. In + fact, the tools provided here enable quick conversion of the + spreadsheet-like .csv format to c-files that follow the kernel coding + conventions. + + + (b) `make c-files` + Creates new c-files using content of csv sub-directory. These + new c-files can be compared to the active content in the + ni_routing directory. + (c) `make csv-blank` + Create a new blank csv file. This is useful for establishing a + new data table for either a device family (less likely) or a + specific board of an existing device family (more likely). + (d) `make clean` + Remove all generated files/directories. + (e) `make everything` + Build all csv-files, then all new c-files. + + + + +In summary, similar confusion about signal routing configuration, albeit less, +plagued NI's previous version of their own proprietary drivers. Earlier than +2003, NI greatly simplified the situation for users by releasing a new API that +abstracted the names of signals/terminals to a common and intuitive set of +names. In addition, this new API provided a much more common interface to use +for most of NI hardware. + +Comedi already provides such a common interface for data-acquisition and control +hardware. This effort complements comedi's abstraction layers by further +abstracting much more of the use cases for NI hardware, but allowing users _and_ +developers to directly refer to NI documentation (user-level, register-level, +and the register-level examples of the NI-MHDDK). + + + +-------------------------------------------------------------------------------- +Various naming conventions and relations: +-------------------------------------------------------------------------------- +These are various notes that help to relate the naming conventions used in the +NI-STC with those naming conventions used here. +-------------------------------------------------------------------------------- + + Signal sources for most signals-destinations are given a specific naming + convention, although the register values are not consistent. This next table + shows the mapping between the names used in comedi for NI and those names + typically used within the NI-STC documentation. + + (comedi) (NI-STC input or output) (NOTE) + ------------------------------------------------------------------------------ + TRIGGER_LINE(i) RTSI_Trig_i_Output_Select i in range [0..7] + NI_AI_STOP AI_STOP + NI_AI_SampleClock AI_START_Select + NI_AI_SampleClockTimebase AI_SI If internal sample + clock signal is used + NI_AI_StartTrigger AI_START1_Select + NI_AI_ReferenceTrigger AI_START2_Select for pre-triggered + acquisition---not + currently supported + in comedi + NI_AI_ConvertClock AI_CONVERT_Source_Select + NI_AI_ConvertClockTimebase AI_SI2 If internal convert + signal is used + NI_AI_HoldCompleteEvent + NI_AI_PauseTrigger AI_External_Gate + NI_AO_SampleClock AO_UPDATE + NI_AO_SampleClockTimebase AO_UI + NI_AO_StartTrigger AO_START1 + NI_AO_PauseTrigger AO_External_Gate + NI_DI_SampleClock + NI_DO_SampleClock + NI_MasterTimebase + NI_20MHzTimebase TIMEBASE 1 && TIMEBASE 3 if no higher clock exists + NI_80MHzTimebase TIMEBASE 3 + NI_100kHzTimebase TIMEBASE 2 + NI_10MHzRefClock + PXI_Clk10 + NI_CtrOut(0) GPFO_0 external ctr0out pin + NI_CtrOut(1) GPFO_1 external ctr1out pin + NI_CtrSource(0) + NI_CtrSource(1) + NI_CtrGate(0) + NI_CtrGate(1) + NI_CtrInternalOutput(0) G_OUT0, G0_TC for Ctr1Source, Ctr1Gate + NI_CtrInternalOutput(1) G_OUT1, G1_TC for Ctr0Source, Ctr0Gate + NI_RGOUT0 RGOUT0 internal signal + NI_FrequencyOutput + #NI_FrequencyOutputTimebase + NI_ChangeDetectionEvent + NI_RTSI_BRD(0) + NI_RTSI_BRD(1) + NI_RTSI_BRD(2) + NI_RTSI_BRD(3) + #NI_SoftwareStrobe + NI_LogicLow + NI_CtrA(0) G0_A_Select see M-Series user + manual (371022K-01) + NI_CtrA(1) G1_A_Select see M-Series user + manual (371022K-01) + NI_CtrB(0) G0_B_Select, up/down see M-Series user + manual (371022K-01) + NI_CtrB(1) G1_B_Select, up/down see M-Series user + manual (371022K-01) + NI_CtrZ(0) see M-Series user + manual (371022K-01) + NI_CtrZ(1) see M-Series user + manual (371022K-01) diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c new file mode 100644 index 000000000000..7b6a74dfe48b --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "ni_device_routes.h" +#include "ni_device_routes/all.h" + +struct ni_device_routes *const ni_device_routes_list[] = { + &ni_pxi_6030e_device_routes, + &ni_pci_6070e_device_routes, + &ni_pci_6220_device_routes, + &ni_pci_6221_device_routes, + &ni_pxi_6224_device_routes, + &ni_pxi_6225_device_routes, + &ni_pci_6229_device_routes, + &ni_pci_6251_device_routes, + &ni_pxi_6251_device_routes, + &ni_pxie_6251_device_routes, + &ni_pci_6254_device_routes, + &ni_pci_6259_device_routes, + &ni_pci_6534_device_routes, + &ni_pci_6602_device_routes, + &ni_pci_6713_device_routes, + &ni_pci_6723_device_routes, + &ni_pci_6733_device_routes, + &ni_pxi_6733_device_routes, + NULL, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.h b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.h new file mode 100644 index 000000000000..b9f1c47d19e1 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file is meant to be included by comedi/drivers/ni_routes.c + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTINT_NI_DEVICE_ROUTES_H +#define _COMEDI_DRIVERS_NI_ROUTINT_NI_DEVICE_ROUTES_H + +#include "../ni_routes.h" + +extern struct ni_device_routes *const ni_device_routes_list[]; + +#endif /* _COMEDI_DRIVERS_NI_ROUTINT_NI_DEVICE_ROUTES_H */ diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/all.h b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/all.h new file mode 100644 index 000000000000..78b24138acb7 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/all.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/all.h + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H +#define _COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H + +#include "../ni_device_routes.h" + +extern struct ni_device_routes ni_pxi_6030e_device_routes; +extern struct ni_device_routes ni_pci_6070e_device_routes; +extern struct ni_device_routes ni_pci_6220_device_routes; +extern struct ni_device_routes ni_pci_6221_device_routes; +extern struct ni_device_routes ni_pxi_6224_device_routes; +extern struct ni_device_routes ni_pxi_6225_device_routes; +extern struct ni_device_routes ni_pci_6229_device_routes; +extern struct ni_device_routes ni_pci_6251_device_routes; +extern struct ni_device_routes ni_pxi_6251_device_routes; +extern struct ni_device_routes ni_pxie_6251_device_routes; +extern struct ni_device_routes ni_pci_6254_device_routes; +extern struct ni_device_routes ni_pci_6259_device_routes; +extern struct ni_device_routes ni_pci_6534_device_routes; +extern struct ni_device_routes ni_pxie_6535_device_routes; +extern struct ni_device_routes ni_pci_6602_device_routes; +extern struct ni_device_routes ni_pci_6713_device_routes; +extern struct ni_device_routes ni_pci_6723_device_routes; +extern struct ni_device_routes ni_pci_6733_device_routes; +extern struct ni_device_routes ni_pxi_6733_device_routes; +extern struct ni_device_routes ni_pxie_6738_device_routes; + +#endif //_COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c new file mode 100644 index 000000000000..f1126a0cb285 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c @@ -0,0 +1,639 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6070e_device_routes = { + .device = "pci-6070e", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + NI_AI_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + NI_AI_ConvertClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + NI_AI_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_AI_SampleClockTimebase, + NI_MasterTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_HoldComplete, + .src = (int[]){ + NI_AI_HoldCompleteEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6220.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6220.c new file mode 100644 index 000000000000..74a59222963f --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6220.c @@ -0,0 +1,1418 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6220.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6220_device_routes = { + .device = "pci-6220", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6221.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6221.c new file mode 100644 index 000000000000..44dcbabf2a99 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6221.c @@ -0,0 +1,1602 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6221.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6221_device_routes = { + .device = "pci-6221", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6229.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6229.c new file mode 100644 index 000000000000..fa5794e4e2b3 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6229.c @@ -0,0 +1,1602 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6229.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6229_device_routes = { + .device = "pci-6229", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6251.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6251.c new file mode 100644 index 000000000000..645fd1cd2de4 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6251.c @@ -0,0 +1,1652 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6251.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6251_device_routes = { + .device = "pci-6251", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6254.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6254.c new file mode 100644 index 000000000000..056a240cd3a2 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6254.c @@ -0,0 +1,1464 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6254.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6254_device_routes = { + .device = "pci-6254", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6259.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6259.c new file mode 100644 index 000000000000..e0b5fa78c3bc --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6259.c @@ -0,0 +1,1652 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6259.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6259_device_routes = { + .device = "pci-6259", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6534.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6534.c new file mode 100644 index 000000000000..a2472ed288cf --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6534.c @@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6534.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6534_device_routes = { + .device = "pci-6534", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6602.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6602.c new file mode 100644 index 000000000000..91de9dac2d6a --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6602.c @@ -0,0 +1,3378 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6602.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6602_device_routes = { + .device = "pci-6602", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(2), + .src = (int[]){ + NI_80MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_80MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_PFI(7), + NI_PFI(15), + NI_PFI(23), + NI_PFI(31), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_PFI(7), + NI_PFI(15), + NI_PFI(23), + NI_PFI(31), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + NI_CtrGate(7), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + NI_CtrSource(7), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + NI_PFI(6), + NI_PFI(14), + NI_PFI(22), + NI_PFI(30), + NI_PFI(38), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + NI_PFI(6), + NI_PFI(14), + NI_PFI(22), + NI_PFI(30), + NI_PFI(38), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + NI_CtrGate(6), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + NI_CtrSource(6), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(16), + .src = (int[]){ + NI_PFI(5), + NI_PFI(13), + NI_PFI(21), + NI_PFI(29), + NI_PFI(37), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(17), + .src = (int[]){ + NI_PFI(5), + NI_PFI(13), + NI_PFI(21), + NI_PFI(29), + NI_PFI(37), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(18), + .src = (int[]){ + NI_CtrGate(5), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(19), + .src = (int[]){ + NI_CtrSource(5), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(20), + .src = (int[]){ + NI_PFI(4), + NI_PFI(12), + NI_PFI(28), + NI_PFI(36), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(21), + .src = (int[]){ + NI_PFI(4), + NI_PFI(12), + NI_PFI(20), + NI_PFI(28), + NI_PFI(36), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(22), + .src = (int[]){ + NI_CtrGate(4), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(23), + .src = (int[]){ + NI_CtrSource(4), + NI_LogicLow, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(24), + .src = (int[]){ + NI_PFI(3), + NI_PFI(11), + NI_PFI(19), + NI_PFI(27), + NI_PFI(35), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(3), + NI_CtrSource(7), + NI_CtrGate(3), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(25), + .src = (int[]){ + NI_PFI(3), + NI_PFI(11), + NI_PFI(19), + NI_PFI(27), + NI_PFI(35), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(3), + NI_CtrSource(7), + NI_CtrGate(3), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(26), + .src = (int[]){ + NI_CtrGate(3), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(27), + .src = (int[]){ + NI_CtrSource(3), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(28), + .src = (int[]){ + NI_PFI(2), + NI_PFI(10), + NI_PFI(18), + NI_PFI(26), + NI_PFI(34), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(2), + NI_CtrSource(6), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(29), + .src = (int[]){ + NI_PFI(2), + NI_PFI(10), + NI_PFI(18), + NI_PFI(26), + NI_PFI(34), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(2), + NI_CtrSource(6), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(30), + .src = (int[]){ + NI_CtrGate(2), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(31), + .src = (int[]){ + NI_CtrSource(2), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(32), + .src = (int[]){ + NI_PFI(1), + NI_PFI(9), + NI_PFI(17), + NI_PFI(25), + NI_PFI(33), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(5), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(33), + .src = (int[]){ + NI_PFI(1), + NI_PFI(9), + NI_PFI(17), + NI_PFI(25), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(5), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(34), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(35), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(36), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(5), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(37), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(5), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(38), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(39), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(3), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(7), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(3), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(6), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(6), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(6), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(7), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(7), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(7), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + NI_PFI(16), + NI_PFI(17), + NI_PFI(18), + NI_PFI(19), + NI_PFI(20), + NI_PFI(21), + NI_PFI(22), + NI_PFI(23), + NI_PFI(24), + NI_PFI(25), + NI_PFI(26), + NI_PFI(27), + NI_PFI(28), + NI_PFI(29), + NI_PFI(30), + NI_PFI(31), + NI_PFI(32), + NI_PFI(33), + NI_PFI(34), + NI_PFI(35), + NI_PFI(36), + NI_PFI(37), + NI_PFI(38), + NI_PFI(39), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(4), + NI_CtrSource(5), + NI_CtrSource(6), + NI_CtrGate(4), + NI_CtrGate(5), + NI_CtrGate(6), + NI_CtrInternalOutput(4), + NI_CtrInternalOutput(5), + NI_CtrInternalOutput(6), + NI_LogicLow, + NI_LogicHigh, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6713.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6713.c new file mode 100644 index 000000000000..d378b36d2084 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6713.c @@ -0,0 +1,400 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6713.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6713_device_routes = { + .device = "pci-6713", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6723.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6723.c new file mode 100644 index 000000000000..e0cc57ab06e7 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6723.c @@ -0,0 +1,400 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6723.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6723_device_routes = { + .device = "pci-6723", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6733.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6733.c new file mode 100644 index 000000000000..f6e1e17ab854 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pci-6733.c @@ -0,0 +1,428 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pci-6733.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pci_6733_device_routes = { + .device = "pci-6733", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c new file mode 100644 index 000000000000..9978d632117f --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c @@ -0,0 +1,608 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6030e_device_routes = { + .device = "pxi-6030e", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + NI_AI_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + NI_AI_ReferenceTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + NI_AI_ConvertClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + NI_AI_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_AI_SampleClockTimebase, + NI_MasterTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_HoldComplete, + .src = (int[]){ + NI_AI_HoldCompleteEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c new file mode 100644 index 000000000000..1b89e27d7aa5 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c @@ -0,0 +1,1432 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6224_device_routes = { + .device = "pxi-6224", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c new file mode 100644 index 000000000000..10dfc34bc87c --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c @@ -0,0 +1,1613 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6225_device_routes = { + .device = "pxi-6225", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c new file mode 100644 index 000000000000..25db4b7363de --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c @@ -0,0 +1,1655 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6251_device_routes = { + .device = "pxi-6251", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + PXI_Star, + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + PXI_Star, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Star, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c new file mode 100644 index 000000000000..27da4433fc4a --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c @@ -0,0 +1,428 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxi_6733_device_routes = { + .device = "pxi-6733", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_CtrSource(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_CtrGate(1), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + NI_CtrSource(0), + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + NI_CtrGate(0), + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + PXI_Star, + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + PXI_Star, + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(1), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(0), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrOut(1), + .src = (int[]){ + NI_CtrInternalOutput(1), + 0, /* Termination */ + } + }, + { + .dest = PXI_Star, + .src = (int[]){ + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrInternalOutput(0), + NI_CtrOut(0), + NI_AO_SampleClock, + NI_AO_StartTrigger, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_CtrInternalOutput(1), + PXI_Star, + NI_AO_SampleClockTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(7), + PXI_Star, + NI_MasterTimebase, + NI_20MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + PXI_Star, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + PXI_Star, + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + PXI_Star, + NI_AO_SampleClock, + 0, /* Termination */ + } + }, + { + .dest = NI_MasterTimebase, + .src = (int[]){ + TRIGGER_LINE(7), + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c new file mode 100644 index 000000000000..8354fe971d59 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c @@ -0,0 +1,1656 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxie_6251_device_routes = { + .device = "pxie-6251", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(8), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(9), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(10), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(11), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(12), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(13), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(14), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(15), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_DI_SampleClock, + NI_DO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AI_ConvertClock, + NI_AI_PauseTrigger, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_10MHzRefClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(1), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrGate(0), + PXI_Clk10, + NI_20MHzTimebase, + NI_80MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(1), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_AI_StartTrigger, + NI_AI_ReferenceTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_ConvertClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_ConvertClockTimebase, + .src = (int[]){ + NI_AI_SampleClockTimebase, + NI_20MHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AO_SampleClockTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100kHzTimebase, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AI_StartTrigger, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_PFI(8), + NI_PFI(9), + NI_PFI(10), + NI_PFI(11), + NI_PFI(12), + NI_PFI(13), + NI_PFI(14), + NI_PFI(15), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_AI_SampleClock, + NI_AI_ConvertClock, + NI_AO_SampleClock, + NI_FrequencyOutput, + NI_ChangeDetectionEvent, + NI_AnalogComparisonEvent, + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c new file mode 100644 index 000000000000..2ebb679e0129 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c @@ -0,0 +1,575 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxie_6535_device_routes = { + .device = "pxie-6535", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_InputBufferFull, + NI_DI_ReadyForStartEvent, + NI_DI_ReadyForTransferEventBurst, + NI_DI_ReadyForTransferEventPipelined, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_OutputBufferFull, + NI_DO_DataActiveEvent, + NI_DO_ReadyForStartEvent, + NI_DO_ReadyForTransferEvent, + NI_ChangeDetectionEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(5), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(4), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { + .dest = NI_DO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { + .dest = NI_DO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c new file mode 100644 index 000000000000..d88504314d7f --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c @@ -0,0 +1,3083 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "all.h" + +struct ni_device_routes ni_pxie_6738_device_routes = { + .device = "pxie-6738", + .routes = (struct ni_route_set[]){ + { + .dest = NI_PFI(0), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(1), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(2), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(3), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(4), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(5), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(6), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_PFI(7), + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(4), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(5), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(6), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = TRIGGER_LINE(7), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrZ(0), + NI_CtrZ(1), + NI_CtrZ(2), + NI_CtrZ(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + PXI_Clk10, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + PXI_Clk10, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + PXI_Clk10, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSource(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + PXI_Clk10, + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrGate(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrAux(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrA(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrB(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrZ(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrArmStartTrigger(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSampleClock(0), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSampleClock(1), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSampleClock(2), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_CtrSampleClock(3), + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClockTimebase, + NI_DI_SampleClock, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_AO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_DI_SampleClockTimebase, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_ReferenceTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DI_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DO_SampleClock, + NI_DO_StartTrigger, + NI_DO_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClock, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_DO_SampleClockTimebase, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_SampleClockTimebase, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + PXI_Clk10, + NI_20MHzTimebase, + NI_100MHzTimebase, + NI_100kHzTimebase, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_StartTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_DO_PauseTrigger, + .src = (int[]){ + NI_PFI(0), + NI_PFI(1), + NI_PFI(2), + NI_PFI(3), + NI_PFI(4), + NI_PFI(5), + NI_PFI(6), + NI_PFI(7), + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + NI_CtrSource(0), + NI_CtrSource(1), + NI_CtrSource(2), + NI_CtrSource(3), + NI_CtrGate(0), + NI_CtrGate(1), + NI_CtrGate(2), + NI_CtrGate(3), + NI_CtrArmStartTrigger(0), + NI_CtrArmStartTrigger(1), + NI_CtrArmStartTrigger(2), + NI_CtrArmStartTrigger(3), + NI_CtrInternalOutput(0), + NI_CtrInternalOutput(1), + NI_CtrInternalOutput(2), + NI_CtrInternalOutput(3), + NI_CtrSampleClock(0), + NI_CtrSampleClock(1), + NI_CtrSampleClock(2), + NI_CtrSampleClock(3), + NI_AO_SampleClock, + NI_AO_StartTrigger, + NI_AO_PauseTrigger, + NI_DI_SampleClock, + NI_DI_StartTrigger, + NI_DI_ReferenceTrigger, + NI_DI_PauseTrigger, + NI_10MHzRefClock, + NI_ChangeDetectionEvent, + NI_WatchdogExpiredEvent, + 0, /* Termination */ + } + }, + { + .dest = NI_WatchdogExpirationTrigger, + .src = (int[]){ + TRIGGER_LINE(0), + TRIGGER_LINE(1), + TRIGGER_LINE(2), + TRIGGER_LINE(3), + TRIGGER_LINE(4), + TRIGGER_LINE(5), + TRIGGER_LINE(6), + TRIGGER_LINE(7), + 0, /* Termination */ + } + }, + { /* Termination of list */ + .dest = 0, + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c new file mode 100644 index 000000000000..5901762734ed --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values.c + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes the tables that are a list of all the values of various + * signals routes available on NI hardware. In many cases, one does not + * explicitly make these routes, rather one might indicate that something is + * used as the source of one particular trigger or another (using + * *_src=TRIG_EXT). + * + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "ni_route_values.h" +#include "ni_route_values/all.h" + +const struct family_route_values *const ni_all_route_values[] = { + &ni_660x_route_values, + &ni_eseries_route_values, + &ni_mseries_route_values, + NULL, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values.h b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.h new file mode 100644 index 000000000000..80e0145fb82b --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values.h + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTINT_NI_ROUTE_VALUES_H +#define _COMEDI_DRIVERS_NI_ROUTINT_NI_ROUTE_VALUES_H + +#include "../../comedi.h" +#include <linux/types.h> + +/* + * This file includes the tables that are a list of all the values of various + * signals routes available on NI hardware. In many cases, one does not + * explicitly make these routes, rather one might indicate that something is + * used as the source of one particular trigger or another (using + * *_src=TRIG_EXT). + * + * This file is meant to be included by comedi/drivers/ni_routes.c + */ + +#define B(x) ((x) - NI_NAMES_BASE) + +/** Marks a register value as valid, implemented, and tested. */ +#define V(x) (((x) & 0x7f) | 0x80) + +#ifndef NI_ROUTE_VALUE_EXTERNAL_CONVERSION + /** Marks a register value as implemented but needing testing. */ + #define I(x) V(x) + /** Marks a register value as not implemented. */ + #define U(x) 0x0 + + typedef u8 register_type; +#else + /** Marks a register value as implemented but needing testing. */ + #define I(x) (((x) & 0x7f) | 0x100) + /** Marks a register value as not implemented. */ + #define U(x) (((x) & 0x7f) | 0x200) + + /** Tests whether a register is marked as valid/implemented/tested */ + #define MARKED_V(x) (((x) & 0x80) != 0) + /** Tests whether a register is implemented but not tested */ + #define MARKED_I(x) (((x) & 0x100) != 0) + /** Tests whether a register is not implemented */ + #define MARKED_U(x) (((x) & 0x200) != 0) + + /* need more space to store extra marks */ + typedef u16 register_type; +#endif + +/* Mask out the marking bit(s). */ +#define UNMARK(x) ((x) & 0x7f) + +/* + * Gi_SRC(x,1) implements Gi_Src_SubSelect = 1 + * + * This appears to only really be a valid MUX for m-series devices. + */ +#define Gi_SRC(val, subsel) ((val) | ((subsel) << 6)) + +/** + * struct family_route_values - Register values for all routes for a particular + * family. + * @family: lower-case string representation of a specific series or family of + * devices from National Instruments where each member of this family + * shares the same register values for the various signal MUXes. It + * should be noted that not all devices of any family have access to + * all routes defined. + * @register_values: Table of all register values for various signal MUXes on + * National Instruments devices. The first index of this table is the + * signal destination (i.e. identification of the signal MUX). The + * second index of this table is the signal source (i.e. input of the + * signal MUX). + */ +struct family_route_values { + const char *family; + const register_type register_values[NI_NUM_NAMES][NI_NUM_NAMES]; + +}; + +extern const struct family_route_values *const ni_all_route_values[]; + +#endif /* _COMEDI_DRIVERS_NI_ROUTINT_NI_ROUTE_VALUES_H */ diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values/all.h b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/all.h new file mode 100644 index 000000000000..7227461500b5 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/all.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values/all.h + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H +#define _COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H + +#include "../ni_route_values.h" + +extern const struct family_route_values ni_660x_route_values; +extern const struct family_route_values ni_eseries_route_values; +extern const struct family_route_values ni_mseries_route_values; + +#endif //_COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_660x.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_660x.c new file mode 100644 index 000000000000..f1c7e6646261 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_660x.c @@ -0,0 +1,650 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values/ni_660x.c + * Route information for NI_660X boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes a list of all the values of various signals routes + * available on NI 660x hardware. In many cases, one does not explicitly make + * these routes, rather one might indicate that something is used as the source + * of one particular trigger or another (using *_src=TRIG_EXT). + * + * The contents of this file can be generated using the tools in + * comedi/drivers/ni_routing/tools. This file also contains specific notes to + * this family of devices. + * + * Please use those tools to help maintain the contents of this file, but be + * mindful to not lose the notes already made in this file, since these notes + * are critical to a complete undertsanding of the register values of this + * family. + */ + +#include "../ni_route_values.h" +#include "all.h" + +const struct family_route_values ni_660x_route_values = { + .family = "ni_660x", + .register_values = { + /* + * destination = { + * source = register value, + * ... + * } + */ + [B(NI_PFI(8))] = { + [B(NI_CtrInternalOutput(7))] = I(1), + }, + [B(NI_PFI(10))] = { + [B(NI_CtrGate(7))] = I(1), + }, + [B(NI_PFI(11))] = { + [B(NI_CtrSource(7))] = I(1), + }, + [B(NI_PFI(12))] = { + [B(NI_CtrInternalOutput(6))] = I(1), + }, + [B(NI_PFI(14))] = { + [B(NI_CtrGate(6))] = I(1), + }, + [B(NI_PFI(15))] = { + [B(NI_CtrSource(6))] = I(1), + }, + [B(NI_PFI(16))] = { + [B(NI_CtrInternalOutput(5))] = I(1), + }, + [B(NI_PFI(18))] = { + [B(NI_CtrGate(5))] = I(1), + }, + [B(NI_PFI(19))] = { + [B(NI_CtrSource(5))] = I(1), + }, + [B(NI_PFI(20))] = { + [B(NI_CtrInternalOutput(4))] = I(1), + }, + [B(NI_PFI(22))] = { + [B(NI_CtrGate(4))] = I(1), + }, + [B(NI_PFI(23))] = { + [B(NI_CtrSource(4))] = I(1), + }, + [B(NI_PFI(24))] = { + [B(NI_CtrInternalOutput(3))] = I(1), + }, + [B(NI_PFI(26))] = { + [B(NI_CtrGate(3))] = I(1), + }, + [B(NI_PFI(27))] = { + [B(NI_CtrSource(3))] = I(1), + }, + [B(NI_PFI(28))] = { + [B(NI_CtrInternalOutput(2))] = I(1), + }, + [B(NI_PFI(30))] = { + [B(NI_CtrGate(2))] = I(1), + }, + [B(NI_PFI(31))] = { + [B(NI_CtrSource(2))] = I(1), + }, + [B(NI_PFI(32))] = { + [B(NI_CtrInternalOutput(1))] = I(1), + }, + [B(NI_PFI(34))] = { + [B(NI_CtrGate(1))] = I(1), + }, + [B(NI_PFI(35))] = { + [B(NI_CtrSource(1))] = I(1), + }, + [B(NI_PFI(36))] = { + [B(NI_CtrInternalOutput(0))] = I(1), + }, + [B(NI_PFI(38))] = { + [B(NI_CtrGate(0))] = I(1), + }, + [B(NI_PFI(39))] = { + [B(NI_CtrSource(0))] = I(1), + }, + [B(NI_CtrSource(0))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2 /* or 1 */), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(1))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(1))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3 /* or 1 */), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(2))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(2))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4 /* or 1 */), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(3))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(3))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5 /* or 1 */), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(4))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(4))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6 /* or 1 */), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(5))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(5))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7 /* or 1 */), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(6))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(6))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9), + [B(NI_PFI(15))] = U(8 /* or 1 */), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(7))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(7))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(11))] = U(9 /* or 1 */), + [B(NI_PFI(15))] = U(8), + [B(NI_PFI(19))] = U(7), + [B(NI_PFI(23))] = U(6), + [B(NI_PFI(27))] = U(5), + [B(NI_PFI(31))] = U(4), + [B(NI_PFI(35))] = U(3), + [B(NI_PFI(39))] = U(2), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrGate(0))] = U(10), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(30), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrGate(0))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2 /* or 1 */), + [B(NI_PFI(39))] = I(0), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(1))] = I(10), + [B(NI_CtrInternalOutput(1))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(1))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3 /* or 1 */), + [B(NI_PFI(35))] = I(0), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(2))] = I(10), + [B(NI_CtrInternalOutput(2))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(2))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4 /* or 1 */), + [B(NI_PFI(31))] = I(0), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(3))] = I(10), + [B(NI_CtrInternalOutput(3))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(3))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5 /* or 1 */), + [B(NI_PFI(27))] = I(0), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(4))] = I(10), + [B(NI_CtrInternalOutput(4))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(4))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6 /* or 1 */), + [B(NI_PFI(23))] = I(0), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(5))] = I(10), + [B(NI_CtrInternalOutput(5))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(5))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7 /* or 1 */), + [B(NI_PFI(19))] = I(0), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(6))] = I(10), + [B(NI_CtrInternalOutput(6))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(6))] = { + [B(NI_PFI(10))] = I(9), + [B(NI_PFI(14))] = I(8 /* or 1 */), + [B(NI_PFI(15))] = I(0), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(7))] = I(10), + [B(NI_CtrInternalOutput(7))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrGate(7))] = { + [B(NI_PFI(10))] = I(9 /* or 1 */), + [B(NI_PFI(11))] = I(0), + [B(NI_PFI(14))] = I(8), + [B(NI_PFI(18))] = I(7), + [B(NI_PFI(22))] = I(6), + [B(NI_PFI(26))] = I(5), + [B(NI_PFI(30))] = I(4), + [B(NI_PFI(34))] = I(3), + [B(NI_PFI(38))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(0))] = I(10), + [B(NI_CtrInternalOutput(0))] = I(20), + [B(NI_LogicLow)] = I(31 /* or 30 */), + }, + [B(NI_CtrAux(0))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2 /* or 1 */), + [B(NI_PFI(39))] = I(0), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(1))] = I(10), + [B(NI_CtrGate(1))] = I(30), + [B(NI_CtrInternalOutput(1))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(1))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3 /* or 1 */), + [B(NI_PFI(35))] = I(0), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(2))] = I(10), + [B(NI_CtrGate(2))] = I(30), + [B(NI_CtrInternalOutput(2))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(2))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4 /* or 1 */), + [B(NI_PFI(31))] = I(0), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(3))] = I(10), + [B(NI_CtrGate(3))] = I(30), + [B(NI_CtrInternalOutput(3))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(3))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5 /* or 1 */), + [B(NI_PFI(27))] = I(0), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(4))] = I(10), + [B(NI_CtrGate(4))] = I(30), + [B(NI_CtrInternalOutput(4))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(4))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6 /* or 1 */), + [B(NI_PFI(23))] = I(0), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(5))] = I(10), + [B(NI_CtrGate(5))] = I(30), + [B(NI_CtrInternalOutput(5))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(5))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7 /* or 1 */), + [B(NI_PFI(19))] = I(0), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(6))] = I(10), + [B(NI_CtrGate(6))] = I(30), + [B(NI_CtrInternalOutput(6))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(6))] = { + [B(NI_PFI(9))] = I(9), + [B(NI_PFI(13))] = I(8 /* or 1 */), + [B(NI_PFI(15))] = I(0), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(7))] = I(10), + [B(NI_CtrGate(7))] = I(30), + [B(NI_CtrInternalOutput(7))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(7))] = { + [B(NI_PFI(9))] = I(9 /* or 1 */), + [B(NI_PFI(11))] = I(0), + [B(NI_PFI(13))] = I(8), + [B(NI_PFI(17))] = I(7), + [B(NI_PFI(21))] = I(6), + [B(NI_PFI(25))] = I(5), + [B(NI_PFI(29))] = I(4), + [B(NI_PFI(33))] = I(3), + [B(NI_PFI(37))] = I(2), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrSource(0))] = I(10), + [B(NI_CtrGate(0))] = I(30), + [B(NI_CtrInternalOutput(0))] = I(20), + [B(NI_LogicLow)] = I(31), + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_eseries.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_eseries.c new file mode 100644 index 000000000000..d1ab3c9ce585 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_eseries.c @@ -0,0 +1,602 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values/ni_eseries.c + * Route information for NI_ESERIES boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes a list of all the values of various signals routes + * available on NI 660x hardware. In many cases, one does not explicitly make + * these routes, rather one might indicate that something is used as the source + * of one particular trigger or another (using *_src=TRIG_EXT). + * + * The contents of this file can be generated using the tools in + * comedi/drivers/ni_routing/tools. This file also contains specific notes to + * this family of devices. + * + * Please use those tools to help maintain the contents of this file, but be + * mindful to not lose the notes already made in this file, since these notes + * are critical to a complete undertsanding of the register values of this + * family. + */ + +#include "../ni_route_values.h" +#include "all.h" + +/* + * Note that for e-series devices, the backplane TRIGGER_LINE(6) is generally + * not connected to RTSI(6). + */ + +const struct family_route_values ni_eseries_route_values = { + .family = "ni_eseries", + .register_values = { + /* + * destination = { + * source = register value, + * ... + * } + */ + [B(NI_PFI(0))] = { + [B(NI_AI_StartTrigger)] = I(NI_PFI_OUTPUT_AI_START1), + }, + [B(NI_PFI(1))] = { + [B(NI_AI_ReferenceTrigger)] = I(NI_PFI_OUTPUT_AI_START2), + }, + [B(NI_PFI(2))] = { + [B(NI_AI_ConvertClock)] = I(NI_PFI_OUTPUT_AI_CONVERT), + }, + [B(NI_PFI(3))] = { + [B(NI_CtrSource(1))] = I(NI_PFI_OUTPUT_G_SRC1), + }, + [B(NI_PFI(4))] = { + [B(NI_CtrGate(1))] = I(NI_PFI_OUTPUT_G_GATE1), + }, + [B(NI_PFI(5))] = { + [B(NI_AO_SampleClock)] = I(NI_PFI_OUTPUT_AO_UPDATE_N), + }, + [B(NI_PFI(6))] = { + [B(NI_AO_StartTrigger)] = I(NI_PFI_OUTPUT_AO_START1), + }, + [B(NI_PFI(7))] = { + [B(NI_AI_SampleClock)] = I(NI_PFI_OUTPUT_AI_START_PULSE), + }, + [B(NI_PFI(8))] = { + [B(NI_CtrSource(0))] = I(NI_PFI_OUTPUT_G_SRC0), + }, + [B(NI_PFI(9))] = { + [B(NI_CtrGate(0))] = I(NI_PFI_OUTPUT_G_GATE0), + }, + [B(TRIGGER_LINE(0))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(1))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(2))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(3))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(4))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(5))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(6))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(7))] = { + [B(NI_20MHzTimebase)] = I(NI_RTSI_OUTPUT_RTSI_OSC), + }, + [B(NI_RTSI_BRD(0))] = { + [B(TRIGGER_LINE(0))] = I(0), + [B(TRIGGER_LINE(1))] = I(1), + [B(TRIGGER_LINE(2))] = I(2), + [B(TRIGGER_LINE(3))] = I(3), + [B(TRIGGER_LINE(4))] = I(4), + [B(TRIGGER_LINE(5))] = I(5), + [B(TRIGGER_LINE(6))] = I(6), + [B(PXI_Star)] = I(6), + [B(NI_AI_STOP)] = I(7), + }, + [B(NI_RTSI_BRD(1))] = { + [B(TRIGGER_LINE(0))] = I(0), + [B(TRIGGER_LINE(1))] = I(1), + [B(TRIGGER_LINE(2))] = I(2), + [B(TRIGGER_LINE(3))] = I(3), + [B(TRIGGER_LINE(4))] = I(4), + [B(TRIGGER_LINE(5))] = I(5), + [B(TRIGGER_LINE(6))] = I(6), + [B(PXI_Star)] = I(6), + [B(NI_AI_STOP)] = I(7), + }, + [B(NI_RTSI_BRD(2))] = { + [B(TRIGGER_LINE(0))] = I(0), + [B(TRIGGER_LINE(1))] = I(1), + [B(TRIGGER_LINE(2))] = I(2), + [B(TRIGGER_LINE(3))] = I(3), + [B(TRIGGER_LINE(4))] = I(4), + [B(TRIGGER_LINE(5))] = I(5), + [B(TRIGGER_LINE(6))] = I(6), + [B(PXI_Star)] = I(6), + [B(NI_AI_SampleClock)] = I(7), + }, + [B(NI_RTSI_BRD(3))] = { + [B(TRIGGER_LINE(0))] = I(0), + [B(TRIGGER_LINE(1))] = I(1), + [B(TRIGGER_LINE(2))] = I(2), + [B(TRIGGER_LINE(3))] = I(3), + [B(TRIGGER_LINE(4))] = I(4), + [B(TRIGGER_LINE(5))] = I(5), + [B(TRIGGER_LINE(6))] = I(6), + [B(PXI_Star)] = I(6), + [B(NI_AI_SampleClock)] = I(7), + }, + [B(NI_CtrSource(0))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrInternalOutput(1))] = U(19), + [B(PXI_Star)] = U(17), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(1))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(NI_CtrInternalOutput(0))] = U(19), + [B(PXI_Star)] = U(17), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrGate(0))] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(1))] = I(20), + [B(PXI_Star)] = I(17), + [B(NI_AI_StartTrigger)] = I(21), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrGate(1))] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(0))] = I(20), + [B(PXI_Star)] = I(17), + [B(NI_AI_StartTrigger)] = I(21), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrOut(0))] = { + [B(TRIGGER_LINE(0))] = I(1), + [B(TRIGGER_LINE(1))] = I(2), + [B(TRIGGER_LINE(2))] = I(3), + [B(TRIGGER_LINE(3))] = I(4), + [B(TRIGGER_LINE(4))] = I(5), + [B(TRIGGER_LINE(5))] = I(6), + [B(TRIGGER_LINE(6))] = I(7), + [B(NI_CtrInternalOutput(0))] = I(0), + [B(PXI_Star)] = I(7), + }, + [B(NI_CtrOut(1))] = { + [B(NI_CtrInternalOutput(1))] = I(0), + }, + [B(NI_AI_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(0))] = I(19), + [B(PXI_Star)] = I(17), + [B(NI_AI_SampleClockTimebase)] = I(0), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_SampleClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_100kHzTimebase)] = U(19), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AI_StartTrigger)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(0))] = I(18), + [B(PXI_Star)] = I(17), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_ReferenceTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AI_ConvertClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(0))] = I(19), + [B(PXI_Star)] = I(17), + [B(NI_AI_ConvertClockTimebase)] = I(0), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_ConvertClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_AI_SampleClockTimebase)] = U(0), + [B(NI_20MHzTimebase)] = U(1), + }, + [B(NI_AI_PauseTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AO_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(NI_CtrInternalOutput(1))] = I(19), + [B(PXI_Star)] = I(17), + [B(NI_AO_SampleClockTimebase)] = I(0), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AO_SampleClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_100kHzTimebase)] = U(19), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AO_StartTrigger)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(PXI_Star)] = I(17), + /* + * for the signal route + * (NI_AI_StartTrigger->NI_AO_StartTrigger), MHDDK says + * used register value 18 and DAQ-STC says 19. + * Hoping that the MHDDK is correct--being a "working" + * example. + */ + [B(NI_AI_StartTrigger)] = I(18), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AO_PauseTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(PXI_Star)] = U(17), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_MasterTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(TRIGGER_LINE(7))] = U(1), + [B(PXI_Star)] = U(2), + [B(PXI_Clk10)] = U(3), + [B(NI_10MHzRefClock)] = U(0), + }, + /* + * This symbol is not defined and nothing for this is + * implemented--just including this because data was found in + * the NI-STC for it--can't remember where. + * [B(NI_FrequencyOutTimebase)] = { + * ** These are not currently implemented in ni modules ** + * [B(NI_20MHzTimebase)] = U(0), + * [B(NI_100kHzTimebase)] = U(1), + * }, + */ + [B(NI_RGOUT0)] = { + [B(NI_CtrInternalOutput(0))] = I(0), + [B(NI_CtrOut(0))] = I(1), + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_mseries.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_mseries.c new file mode 100644 index 000000000000..c59d8afe0ae9 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values/ni_mseries.c @@ -0,0 +1,1752 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/ni_route_values/ni_mseries.c + * Route information for NI_MSERIES boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes a list of all the values of various signals routes + * available on NI 660x hardware. In many cases, one does not explicitly make + * these routes, rather one might indicate that something is used as the source + * of one particular trigger or another (using *_src=TRIG_EXT). + * + * The contents of this file can be generated using the tools in + * comedi/drivers/ni_routing/tools. This file also contains specific notes to + * this family of devices. + * + * Please use those tools to help maintain the contents of this file, but be + * mindful to not lose the notes already made in this file, since these notes + * are critical to a complete undertsanding of the register values of this + * family. + */ + +#include "../ni_route_values.h" +#include "all.h" + +/* + * GATE SELECT NOTE: + * CtrAux and CtrArmStartrigger register values are not documented in the + * DAQ-STC. There is some evidence that using CtrGate values is valid (see + * comedi.h). Some information and hints exist in the M-Series user manual + * (ni-62xx user-manual 371022K-01). + */ + +const struct family_route_values ni_mseries_route_values = { + .family = "ni_mseries", + .register_values = { + /* + * destination = { + * source = register value, + * ... + * } + */ + [B(NI_PFI(0))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(1))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(2))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(3))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(4))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(5))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(6))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(7))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(8))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(9))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(10))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(11))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(12))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(13))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(14))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(NI_PFI(15))] = { + [B(TRIGGER_LINE(0))] = I(18), + [B(TRIGGER_LINE(1))] = I(19), + [B(TRIGGER_LINE(2))] = I(20), + [B(TRIGGER_LINE(3))] = I(21), + [B(TRIGGER_LINE(4))] = I(22), + [B(TRIGGER_LINE(5))] = I(23), + [B(TRIGGER_LINE(6))] = I(24), + [B(TRIGGER_LINE(7))] = I(25), + [B(NI_CtrSource(0))] = I(9), + [B(NI_CtrSource(1))] = I(4), + [B(NI_CtrGate(0))] = I(10), + [B(NI_CtrGate(1))] = I(5), + [B(NI_CtrInternalOutput(0))] = I(13), + [B(NI_CtrInternalOutput(1))] = I(14), + [B(PXI_Star)] = I(26), + [B(NI_AI_SampleClock)] = I(8), + [B(NI_AI_StartTrigger)] = I(1), + [B(NI_AI_ReferenceTrigger)] = I(2), + [B(NI_AI_ConvertClock)] = I(3), + [B(NI_AI_ExternalMUXClock)] = I(12), + [B(NI_AO_SampleClock)] = I(6), + [B(NI_AO_StartTrigger)] = I(7), + [B(NI_DI_SampleClock)] = I(29), + [B(NI_DO_SampleClock)] = I(30), + [B(NI_FrequencyOutput)] = I(15), + [B(NI_ChangeDetectionEvent)] = I(28), + [B(NI_AnalogComparisonEvent)] = I(17), + [B(NI_SCXI_Trig1)] = I(27), + [B(NI_ExternalStrobe)] = I(11), + [B(NI_PFI_DO)] = I(16), + }, + [B(TRIGGER_LINE(0))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(1))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(2))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(3))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(4))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(5))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(6))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(TRIGGER_LINE(7))] = { + [B(NI_RTSI_BRD(0))] = I(8), + [B(NI_RTSI_BRD(1))] = I(9), + [B(NI_RTSI_BRD(2))] = I(10), + [B(NI_RTSI_BRD(3))] = I(11), + [B(NI_CtrSource(0))] = I(5), + [B(NI_CtrGate(0))] = I(6), + [B(NI_AI_StartTrigger)] = I(0), + [B(NI_AI_ReferenceTrigger)] = I(1), + [B(NI_AI_ConvertClock)] = I(2), + [B(NI_AO_SampleClock)] = I(3), + [B(NI_AO_StartTrigger)] = I(4), + /* + * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be + * RTSI_OSC according to MHDDK mseries source. There + * are hints in comedi that show that this is actually a + * 20MHz source for 628x cards(?) + */ + [B(NI_10MHzRefClock)] = I(12), + [B(NI_RGOUT0)] = I(7), + }, + [B(NI_RTSI_BRD(0))] = { + [B(NI_PFI(0))] = I(0), + [B(NI_PFI(1))] = I(1), + [B(NI_PFI(2))] = I(2), + [B(NI_PFI(3))] = I(3), + [B(NI_PFI(4))] = I(4), + [B(NI_PFI(5))] = I(5), + [B(NI_CtrSource(1))] = I(11), + [B(NI_CtrGate(1))] = I(10), + [B(NI_CtrZ(0))] = I(13), + [B(NI_CtrZ(1))] = I(12), + [B(NI_CtrOut(1))] = I(9), + [B(NI_AI_SampleClock)] = I(15), + [B(NI_AI_PauseTrigger)] = I(7), + [B(NI_AO_PauseTrigger)] = I(6), + [B(NI_FrequencyOutput)] = I(8), + [B(NI_AnalogComparisonEvent)] = I(14), + }, + [B(NI_RTSI_BRD(1))] = { + [B(NI_PFI(0))] = I(0), + [B(NI_PFI(1))] = I(1), + [B(NI_PFI(2))] = I(2), + [B(NI_PFI(3))] = I(3), + [B(NI_PFI(4))] = I(4), + [B(NI_PFI(5))] = I(5), + [B(NI_CtrSource(1))] = I(11), + [B(NI_CtrGate(1))] = I(10), + [B(NI_CtrZ(0))] = I(13), + [B(NI_CtrZ(1))] = I(12), + [B(NI_CtrOut(1))] = I(9), + [B(NI_AI_SampleClock)] = I(15), + [B(NI_AI_PauseTrigger)] = I(7), + [B(NI_AO_PauseTrigger)] = I(6), + [B(NI_FrequencyOutput)] = I(8), + [B(NI_AnalogComparisonEvent)] = I(14), + }, + [B(NI_RTSI_BRD(2))] = { + [B(NI_PFI(0))] = I(0), + [B(NI_PFI(1))] = I(1), + [B(NI_PFI(2))] = I(2), + [B(NI_PFI(3))] = I(3), + [B(NI_PFI(4))] = I(4), + [B(NI_PFI(5))] = I(5), + [B(NI_CtrSource(1))] = I(11), + [B(NI_CtrGate(1))] = I(10), + [B(NI_CtrZ(0))] = I(13), + [B(NI_CtrZ(1))] = I(12), + [B(NI_CtrOut(1))] = I(9), + [B(NI_AI_SampleClock)] = I(15), + [B(NI_AI_PauseTrigger)] = I(7), + [B(NI_AO_PauseTrigger)] = I(6), + [B(NI_FrequencyOutput)] = I(8), + [B(NI_AnalogComparisonEvent)] = I(14), + }, + [B(NI_RTSI_BRD(3))] = { + [B(NI_PFI(0))] = I(0), + [B(NI_PFI(1))] = I(1), + [B(NI_PFI(2))] = I(2), + [B(NI_PFI(3))] = I(3), + [B(NI_PFI(4))] = I(4), + [B(NI_PFI(5))] = I(5), + [B(NI_CtrSource(1))] = I(11), + [B(NI_CtrGate(1))] = I(10), + [B(NI_CtrZ(0))] = I(13), + [B(NI_CtrZ(1))] = I(12), + [B(NI_CtrOut(1))] = I(9), + [B(NI_AI_SampleClock)] = I(15), + [B(NI_AI_PauseTrigger)] = I(7), + [B(NI_AO_PauseTrigger)] = I(6), + [B(NI_FrequencyOutput)] = I(8), + [B(NI_AnalogComparisonEvent)] = I(14), + }, + [B(NI_CtrSource(0))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(NI_CtrGate(1))] = U(Gi_SRC(20, 0)), + [B(NI_CtrInternalOutput(1))] = U(19), + [B(PXI_Star)] = U(Gi_SRC(20, 1)), + [B(PXI_Clk10)] = U(29), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(Gi_SRC(30, 0)), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_AnalogComparisonEvent)] = U(Gi_SRC(30, 1)), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrSource(1))] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(NI_CtrGate(0))] = U(Gi_SRC(20, 0)), + [B(NI_CtrInternalOutput(0))] = U(19), + [B(PXI_Star)] = U(Gi_SRC(20, 1)), + [B(PXI_Clk10)] = U(29), + [B(NI_20MHzTimebase)] = U(0), + [B(NI_80MHzTimebase)] = U(Gi_SRC(30, 0)), + [B(NI_100kHzTimebase)] = U(18), + [B(NI_AnalogComparisonEvent)] = U(Gi_SRC(30, 1)), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_CtrGate(0))] = { + [B(NI_PFI(0))] = I(1 /* source: mhddk examples */), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(1))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(1))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrGate(1))] = { + /* source for following line: mhddk examples */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(0))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(0))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(0))] = { + /* these are just a guess; see GATE SELECT NOTE */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(1))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(1))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrAux(1))] = { + /* these are just a guess; see GATE SELECT NOTE */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(0))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(0))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrA(0))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrA(1))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrB(0))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrB(1))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrZ(0))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrZ(1))] = { + /* + * See nimseries/Examples for outputs; inputs a guess + * from device routes shown on NI-MAX. + * see M-Series user manual (371022K-01) + */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrArmStartTrigger(0))] = { + /* these are just a guess; see GATE SELECT NOTE */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(1))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(1))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrArmStartTrigger(1))] = { + /* these are just a guess; see GATE SELECT NOTE */ + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrSource(0))] = I(29), + /* source for following line: mhddk GP examples */ + [B(NI_CtrInternalOutput(0))] = I(20), + [B(PXI_Star)] = I(19), + [B(NI_AI_StartTrigger)] = I(28), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_CtrOut(0))] = { + [B(TRIGGER_LINE(0))] = I(1), + [B(TRIGGER_LINE(1))] = I(2), + [B(TRIGGER_LINE(2))] = I(3), + [B(TRIGGER_LINE(3))] = I(4), + [B(TRIGGER_LINE(4))] = I(5), + [B(TRIGGER_LINE(5))] = I(6), + [B(TRIGGER_LINE(6))] = I(7), + [B(NI_CtrInternalOutput(0))] = I(0), + }, + [B(NI_CtrOut(1))] = { + [B(NI_CtrInternalOutput(1))] = I(0), + }, + [B(NI_AI_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(19), + [B(NI_CtrInternalOutput(1))] = I(28), + [B(PXI_Star)] = I(20), + [B(NI_AI_SampleClockTimebase)] = I(0), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_SCXI_Trig1)] = I(29), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_SampleClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(PXI_Clk10)] = U(29), + /* + * For routes (*->NI_AI_SampleClockTimebase) and + * (*->NI_AO_SampleClockTimebase), tMSeries.h of MHDDK + * shows 0 value as selecting ground (case ground?) and + * 28 value selecting TIMEBASE 1. + */ + [B(NI_20MHzTimebase)] = U(28), + [B(NI_100kHzTimebase)] = U(19), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + [B(NI_CaseGround)] = U(0), + }, + [B(NI_AI_StartTrigger)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(18), + [B(NI_CtrInternalOutput(1))] = I(19), + [B(PXI_Star)] = I(20), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_ReferenceTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AI_ConvertClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + /* source for following line: mhddk example headers */ + [B(NI_CtrInternalOutput(0))] = I(19), + /* source for following line: mhddk example headers */ + [B(NI_CtrInternalOutput(1))] = I(18), + [B(PXI_Star)] = I(20), + [B(NI_AI_ConvertClockTimebase)] = I(0), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AI_ConvertClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_AI_SampleClockTimebase)] = U(0), + [B(NI_20MHzTimebase)] = U(1), + }, + [B(NI_AI_PauseTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_AO_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(18), + [B(NI_CtrInternalOutput(1))] = I(19), + [B(PXI_Star)] = I(20), + [B(NI_AO_SampleClockTimebase)] = I(0), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AO_SampleClockTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(PXI_Clk10)] = U(29), + /* + * For routes (*->NI_AI_SampleClockTimebase) and + * (*->NI_AO_SampleClockTimebase), tMSeries.h of MHDDK + * shows 0 value as selecting ground (case ground?) and + * 28 value selecting TIMEBASE 1. + */ + [B(NI_20MHzTimebase)] = U(28), + [B(NI_100kHzTimebase)] = U(19), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + [B(NI_CaseGround)] = U(0), + }, + [B(NI_AO_StartTrigger)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(PXI_Star)] = I(20), + /* + * for the signal route + * (NI_AI_StartTrigger->NI_AO_StartTrigger), DAQ-STC & + * MHDDK disagreed for e-series. MHDDK for m-series + * agrees with DAQ-STC description and uses the value 18 + * for the route + * (NI_AI_ReferenceTrigger->NI_AO_StartTrigger). The + * m-series devices are supposed to have DAQ-STC2. + * There are no DAQ-STC2 docs to compare with. + */ + [B(NI_AI_StartTrigger)] = I(19), + [B(NI_AI_ReferenceTrigger)] = I(18), + [B(NI_AnalogComparisonEvent)] = I(30), + [B(NI_LogicLow)] = I(31), + }, + [B(NI_AO_PauseTrigger)] = { + /* These are not currently implemented in ni modules */ + [B(NI_PFI(0))] = U(1), + [B(NI_PFI(1))] = U(2), + [B(NI_PFI(2))] = U(3), + [B(NI_PFI(3))] = U(4), + [B(NI_PFI(4))] = U(5), + [B(NI_PFI(5))] = U(6), + [B(NI_PFI(6))] = U(7), + [B(NI_PFI(7))] = U(8), + [B(NI_PFI(8))] = U(9), + [B(NI_PFI(9))] = U(10), + [B(NI_PFI(10))] = U(21), + [B(NI_PFI(11))] = U(22), + [B(NI_PFI(12))] = U(23), + [B(NI_PFI(13))] = U(24), + [B(NI_PFI(14))] = U(25), + [B(NI_PFI(15))] = U(26), + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(NI_AnalogComparisonEvent)] = U(30), + [B(NI_LogicLow)] = U(31), + }, + [B(NI_DI_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(28), + [B(NI_CtrInternalOutput(1))] = I(29), + [B(PXI_Star)] = I(20), + [B(NI_AI_SampleClock)] = I(18), + [B(NI_AI_ConvertClock)] = I(19), + [B(NI_AO_SampleClock)] = I(31), + [B(NI_FrequencyOutput)] = I(32), + [B(NI_ChangeDetectionEvent)] = I(33), + [B(NI_CaseGround)] = I(0), + }, + [B(NI_DO_SampleClock)] = { + [B(NI_PFI(0))] = I(1), + [B(NI_PFI(1))] = I(2), + [B(NI_PFI(2))] = I(3), + [B(NI_PFI(3))] = I(4), + [B(NI_PFI(4))] = I(5), + [B(NI_PFI(5))] = I(6), + [B(NI_PFI(6))] = I(7), + [B(NI_PFI(7))] = I(8), + [B(NI_PFI(8))] = I(9), + [B(NI_PFI(9))] = I(10), + [B(NI_PFI(10))] = I(21), + [B(NI_PFI(11))] = I(22), + [B(NI_PFI(12))] = I(23), + [B(NI_PFI(13))] = I(24), + [B(NI_PFI(14))] = I(25), + [B(NI_PFI(15))] = I(26), + [B(TRIGGER_LINE(0))] = I(11), + [B(TRIGGER_LINE(1))] = I(12), + [B(TRIGGER_LINE(2))] = I(13), + [B(TRIGGER_LINE(3))] = I(14), + [B(TRIGGER_LINE(4))] = I(15), + [B(TRIGGER_LINE(5))] = I(16), + [B(TRIGGER_LINE(6))] = I(17), + [B(TRIGGER_LINE(7))] = I(27), + [B(NI_CtrInternalOutput(0))] = I(28), + [B(NI_CtrInternalOutput(1))] = I(29), + [B(PXI_Star)] = I(20), + [B(NI_AI_SampleClock)] = I(18), + [B(NI_AI_ConvertClock)] = I(19), + [B(NI_AO_SampleClock)] = I(31), + [B(NI_FrequencyOutput)] = I(32), + [B(NI_ChangeDetectionEvent)] = I(33), + [B(NI_CaseGround)] = I(0), + }, + [B(NI_MasterTimebase)] = { + /* These are not currently implemented in ni modules */ + [B(TRIGGER_LINE(0))] = U(11), + [B(TRIGGER_LINE(1))] = U(12), + [B(TRIGGER_LINE(2))] = U(13), + [B(TRIGGER_LINE(3))] = U(14), + [B(TRIGGER_LINE(4))] = U(15), + [B(TRIGGER_LINE(5))] = U(16), + [B(TRIGGER_LINE(6))] = U(17), + [B(TRIGGER_LINE(7))] = U(27), + [B(PXI_Star)] = U(20), + [B(PXI_Clk10)] = U(29), + [B(NI_10MHzRefClock)] = U(0), + }, + /* + * This symbol is not defined and nothing for this is + * implemented--just including this because data was found in + * the NI-STC for it--can't remember where. + * [B(NI_FrequencyOutTimebase)] = { + * ** These are not currently implemented in ni modules ** + * [B(NI_20MHzTimebase)] = U(0), + * [B(NI_100kHzTimebase)] = U(1), + * }, + */ + [B(NI_RGOUT0)] = { + [B(NI_CtrInternalOutput(0))] = I(0), + [B(NI_CtrOut(0))] = I(1), + }, + }, +}; diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/.gitignore b/drivers/staging/comedi/drivers/ni_routing/tools/.gitignore new file mode 100644 index 000000000000..ef38008280a9 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/.gitignore @@ -0,0 +1,7 @@ +comedi_h.py +*.pyc +ni_values.py +convert_c_to_py +c/ +csv/ +all_cfiles.c diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/Makefile b/drivers/staging/comedi/drivers/ni_routing/tools/Makefile new file mode 100644 index 000000000000..1966850584d2 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/Makefile @@ -0,0 +1,79 @@ +# this make file is simply to help autogenerate these files: +# ni_route_values.h +# ni_device_routes.h +# in order to do this, we are also generating a python representation (using +# ctypesgen) of ../../comedi.h. +# This allows us to sort NI signal/terminal names numerically to use a binary +# search through the device_routes tables to find valid routes. + +ALL: + @echo Typical targets: + @echo "\`make csv-files\`" + @echo " Creates new csv-files using content of c-files of existing" + @echo " ni_routing/* content. New csv files are placed in csv" + @echo " sub-directory." + @echo "\`make c-files\`" + @echo " Creates new c-files using content of csv sub-directory. These" + @echo " new c-files can be compared to the active content in the" + @echo " ni_routing directory." + @echo "\`make csv-blank\`" + @echo " Create a new blank csv file. This is useful for establishing a" + @echo " new data table for either a device family \(less likely\) or a" + @echo " specific board of an existing device family \(more likely\)." + @echo "\`make clean-partial\`" + @echo " Remove all generated files/directories EXCEPT for csv/c files." + @echo "\`make clean\`" + @echo " Remove all generated files/directories." + @echo "\`make everything\`" + @echo " Build all csv-files, then all new c-files." + +everything : csv-files c-files csv-blank + +CPPFLAGS=-D"BIT(x)=(1UL<<(x))" -D__user= + +comedi_h.py : ../../../comedi.h + ctypesgen $< --include "sys/ioctl.h" --cpp 'gcc -E $(CPPFLAGS)' -o $@ + +convert_c_to_py: all_cfiles.c + gcc -g convert_c_to_py.c -o convert_c_to_py -std=c99 + +ni_values.py: convert_c_to_py + ./convert_c_to_py + +csv-files : ni_values.py comedi_h.py + ./convert_py_to_csv.py + +csv-blank : + ./make_blank_csv.py + @echo New blank csv signal table in csv/blank_route_table.csv + +c-files : comedi_h.py + ./convert_csv_to_c.py --route_values --device_routes + +ROUTE_VALUES_SRC=$(wildcard ../ni_route_values/*.c) +DEVICE_ROUTES_SRC=$(wildcard ../ni_device_routes/*.c) +all_cfiles.c : $(DEVICE_ROUTES_SRC) $(ROUTE_VALUES_SRC) + @for i in $(DEVICE_ROUTES_SRC) $(ROUTE_VALUES_SRC); do \ + echo "#include \"$$i\"" >> all_cfiles.c; \ + done + +clean-partial : + $(RM) -rf comedi_h.py ni_values.py convert_c_to_py all_cfiles.c *.pyc \ + __pycache__/ + +clean : partial_clean + $(RM) -rf c/ csv/ + +# Note: One could also use ctypeslib in order to generate these files. The +# caveat is that ctypeslib does not do a great job at handling macro functions. +# The make rules are as follows: +# comedi.h.xml : ../../comedi.h +# # note that we have to use PWD here to avoid h2xml finding a system +# # installed version of the comedilib/comedi.h file +# h2xml ${PWD}/../../comedi.h -c -D__user="" -D"BIT(x)=(1<<(x))" \ +# -o comedi.h.xml +# +# comedi_h.py : comedi.h.xml +# xml2py ./comedi.h.xml -o comedi_h.py +# clean : +# rm -f comedi.h.xml comedi_h.py comedi_h.pyc diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c b/drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c new file mode 100644 index 000000000000..dedb6f2fc678 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/convert_c_to_py.c @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ + +#include <stdint.h> +#include <stdbool.h> +#include <stddef.h> +#include <errno.h> +#include <stdlib.h> + +typedef uint8_t u8; +typedef uint16_t u16; +typedef int8_t s8; +#define __user +#define BIT(x) (1UL << (x)) + +#define NI_ROUTE_VALUE_EXTERNAL_CONVERSION 1 + +#include "../ni_route_values.c" +#include "../ni_device_routes.c" +#include "all_cfiles.c" + +#include <stdio.h> + +#define RVij(rv, src, dest) ((rv)->register_values[(dest)][(src)]) + +/* + * write out + * { + * "family" : "<family-name>", + * "register_values": { + * <destination0>:[src0, src1, ...], + * <destination0>:[src0, src1, ...], + * ... + * } + * } + */ +void family_write(const struct family_route_values *rv, FILE *fp) +{ + fprintf(fp, + " \"%s\" : {\n" + " # dest -> {src0:val0, src1:val1, ...}\n" + , rv->family); + for (unsigned int dest = NI_NAMES_BASE; + dest < (NI_NAMES_BASE + NI_NUM_NAMES); + ++dest) { + unsigned int src = NI_NAMES_BASE; + + for (; src < (NI_NAMES_BASE + NI_NUM_NAMES) && + RVij(rv, B(src), B(dest)) == 0; ++src) + ; + + if (src >= (NI_NAMES_BASE + NI_NUM_NAMES)) + continue; /* no data here */ + + fprintf(fp, " %u : {\n", dest); + for (src = NI_NAMES_BASE; src < (NI_NAMES_BASE + NI_NUM_NAMES); + ++src) { + register_type r = RVij(rv, B(src), B(dest)); + const char *M; + + if (r == 0) { + continue; + } else if (MARKED_V(r)) { + M = "V"; + } else if (MARKED_I(r)) { + M = "I"; + } else if (MARKED_U(r)) { + M = "U"; + } else { + fprintf(stderr, + "Invalid register marking %s[%u][%u] = %u\n", + rv->family, dest, src, r); + exit(1); + } + + fprintf(fp, " %u : \"%s(%u)\",\n", + src, M, UNMARK(r)); + } + fprintf(fp, " },\n"); + } + fprintf(fp, " },\n\n"); +} + +bool is_valid_ni_sig(unsigned int sig) +{ + return (sig >= NI_NAMES_BASE) && (sig < (NI_NAMES_BASE + NI_NUM_NAMES)); +} + +/* + * write out + * { + * "family" : "<family-name>", + * "register_values": { + * <destination0>:[src0, src1, ...], + * <destination0>:[src0, src1, ...], + * ... + * } + * } + */ +void device_write(const struct ni_device_routes *dR, FILE *fp) +{ + fprintf(fp, + " \"%s\" : {\n" + " # dest -> [src0, src1, ...]\n" + , dR->device); + + unsigned int i = 0; + + while (dR->routes[i].dest != 0) { + if (!is_valid_ni_sig(dR->routes[i].dest)) { + fprintf(stderr, + "Invalid NI signal value [%u] for destination %s.[%u]\n", + dR->routes[i].dest, dR->device, i); + exit(1); + } + + fprintf(fp, " %u : [", dR->routes[i].dest); + + unsigned int j = 0; + + while (dR->routes[i].src[j] != 0) { + if (!is_valid_ni_sig(dR->routes[i].src[j])) { + fprintf(stderr, + "Invalid NI signal value [%u] for source %s.[%u].[%u]\n", + dR->routes[i].src[j], dR->device, i, j); + exit(1); + } + + fprintf(fp, "%u,", dR->routes[i].src[j]); + + ++j; + } + fprintf(fp, "],\n"); + + ++i; + } + fprintf(fp, " },\n\n"); +} + +int main(void) +{ + FILE *fp = fopen("ni_values.py", "w"); + + /* write route register values */ + fprintf(fp, "ni_route_values = {\n"); + for (int i = 0; ni_all_route_values[i]; ++i) + family_write(ni_all_route_values[i], fp); + fprintf(fp, "}\n\n"); + + /* write valid device routes */ + fprintf(fp, "ni_device_routes = {\n"); + for (int i = 0; ni_device_routes_list[i]; ++i) + device_write(ni_device_routes_list[i], fp); + fprintf(fp, "}\n"); + + /* finish; close file */ + fclose(fp); + return 0; +} diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/convert_csv_to_c.py b/drivers/staging/comedi/drivers/ni_routing/tools/convert_csv_to_c.py new file mode 100755 index 000000000000..532eb6372a5a --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/convert_csv_to_c.py @@ -0,0 +1,503 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap + +# This is simply to aide in creating the entries in the order of the value of +# the device-global NI signal/terminal constants defined in comedi.h +import comedi_h +import os, sys, re +from csv_collection import CSVCollection + + +def c_to_o(filename, prefix='\t\t\t\t\t ni_routing/', suffix=' \\'): + if not filename.endswith('.c'): + return '' + return prefix + filename.rpartition('.c')[0] + '.o' + suffix + + +def routedict_to_structinit_single(name, D, return_name=False): + Locals = dict() + lines = [ + '\t.family = "{}",'.format(name), + '\t.register_values = {', + '\t\t/*', + '\t\t * destination = {', + '\t\t * source = register value,', + '\t\t * ...', + '\t\t * }', + '\t\t */', + ] + if (False): + # print table with index0:src, index1:dest + D0 = D # (src-> dest->reg_value) + #D1 : destD + else: + D0 = dict() + for src, destD in D.items(): + for dest, val in destD.items(): + D0.setdefault(dest, {})[src] = val + + + D0 = sorted(D0.items(), key=lambda i: eval(i[0], comedi_h.__dict__, Locals)) + + for D0_sig, D1_D in D0: + D1 = sorted(D1_D.items(), key=lambda i: eval(i[0], comedi_h.__dict__, Locals)) + + lines.append('\t\t[B({})] = {{'.format(D0_sig)) + for D1_sig, value in D1: + if not re.match('[VIU]\([^)]*\)', value): + sys.stderr.write('Invalid register format: {}\n'.format(repr(value))) + sys.stderr.write( + 'Register values should be formatted with V(),I(),or U()\n') + raise RuntimeError('Invalid register values format') + lines.append('\t\t\t[B({})]\t= {},'.format(D1_sig, value)) + lines.append('\t\t},') + lines.append('\t},') + + lines = '\n'.join(lines) + if return_name: + return N, lines + else: + return lines + + +def routedict_to_routelist_single(name, D, indent=1): + Locals = dict() + + indents = dict( + I0 = '\t'*(indent), + I1 = '\t'*(indent+1), + I2 = '\t'*(indent+2), + I3 = '\t'*(indent+3), + I4 = '\t'*(indent+4), + ) + + if (False): + # data is src -> dest-list + D0 = D + keyname = 'src' + valname = 'dest' + else: + # data is dest -> src-list + keyname = 'dest' + valname = 'src' + D0 = dict() + for src, destD in D.items(): + for dest, val in destD.items(): + D0.setdefault(dest, {})[src] = val + + # Sort by order of device-global names (numerically) + D0 = sorted(D0.items(), key=lambda i: eval(i[0], comedi_h.__dict__, Locals)) + + lines = [ '{I0}.device = "{name}",\n' + '{I0}.routes = (struct ni_route_set[]){{' + .format(name=name, **indents) ] + for D0_sig, D1_D in D0: + D1 = [ k for k,v in D1_D.items() if v ] + D1.sort(key=lambda i: eval(i, comedi_h.__dict__, Locals)) + + lines.append('{I1}{{\n{I2}.{keyname} = {D0_sig},\n' + '{I2}.{valname} = (int[]){{' + .format(keyname=keyname, valname=valname, D0_sig=D0_sig, **indents) + ) + for D1_sig in D1: + lines.append( '{I3}{D1_sig},'.format(D1_sig=D1_sig, **indents) ) + lines.append( '{I3}0, /* Termination */'.format(**indents) ) + + lines.append('{I2}}}\n{I1}}},'.format(**indents)) + + lines.append('{I1}{{ /* Termination of list */\n{I2}.{keyname} = 0,\n{I1}}},' + .format(keyname=keyname, **indents)) + + lines.append('{I0}}},'.format(**indents)) + + return '\n'.join(lines) + + +class DeviceRoutes(CSVCollection): + MKFILE_SEGMENTS = 'device-route.mk' + SET_C = 'ni_device_routes.c' + ITEMS_DIR = 'ni_device_routes' + EXTERN_H = 'all.h' + OUTPUT_DIR = 'c' + + output_file_top = """\ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "ni_device_routes.h" +#include "{extern_h}"\ +""".format(filename=SET_C, extern_h=os.path.join(ITEMS_DIR, EXTERN_H)) + + extern_header = """\ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H +#define _COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H + +#include "../ni_device_routes.h" + +{externs} + +#endif //_COMEDI_DRIVERS_NI_ROUTING_NI_DEVICE_ROUTES_EXTERN_H +""" + + single_output_file_top = """\ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "../ni_device_routes.h" +#include "{extern_h}" + +struct ni_device_routes {table_name} = {{\ +""" + + def __init__(self, pattern='csv/device_routes/*.csv'): + super(DeviceRoutes,self).__init__(pattern) + + def to_listinit(self): + chunks = [ self.output_file_top, + '', + 'struct ni_device_routes *const ni_device_routes_list[] = {' + ] + # put the sheets in lexical order of device numbers then bus + sheets = sorted(self.items(), key=lambda i : tuple(i[0].split('-')[::-1]) ) + + externs = [] + objs = [c_to_o(self.SET_C)] + + for sheet,D in sheets: + S = sheet.lower() + dev_table_name = 'ni_{}_device_routes'.format(S.replace('-','_')) + sheet_filename = os.path.join(self.ITEMS_DIR,'{}.c'.format(S)) + externs.append('extern struct ni_device_routes {};'.format(dev_table_name)) + + chunks.append('\t&{},'.format(dev_table_name)) + + s_chunks = [ + self.single_output_file_top.format( + filename = sheet_filename, + table_name = dev_table_name, + extern_h = self.EXTERN_H, + ), + routedict_to_routelist_single(S, D), + '};', + ] + + objs.append(c_to_o(sheet_filename)) + + with open(os.path.join(self.OUTPUT_DIR, sheet_filename), 'w') as f: + f.write('\n'.join(s_chunks)) + f.write('\n') + + with open(os.path.join(self.OUTPUT_DIR, self.MKFILE_SEGMENTS), 'w') as f: + f.write('# This is the segment that should be included in comedi/drivers/Makefile\n') + f.write('ni_routing-objs\t\t\t\t+= \\\n') + f.write('\n'.join(objs)) + f.write('\n') + + EXTERN_H = os.path.join(self.ITEMS_DIR, self.EXTERN_H) + with open(os.path.join(self.OUTPUT_DIR, EXTERN_H), 'w') as f: + f.write(self.extern_header.format( + filename=EXTERN_H, externs='\n'.join(externs))) + + chunks.append('\tNULL,') # terminate list + chunks.append('};') + return '\n'.join(chunks) + + def save(self): + filename=os.path.join(self.OUTPUT_DIR, self.SET_C) + + try: + os.makedirs(os.path.join(self.OUTPUT_DIR, self.ITEMS_DIR)) + except: + pass + with open(filename,'w') as f: + f.write( self.to_listinit() ) + f.write( '\n' ) + + +class RouteValues(CSVCollection): + MKFILE_SEGMENTS = 'route-values.mk' + SET_C = 'ni_route_values.c' + ITEMS_DIR = 'ni_route_values' + EXTERN_H = 'all.h' + OUTPUT_DIR = 'c' + + output_file_top = """\ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * Route information for NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes the tables that are a list of all the values of various + * signals routes available on NI hardware. In many cases, one does not + * explicitly make these routes, rather one might indicate that something is + * used as the source of one particular trigger or another (using + * *_src=TRIG_EXT). + * + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#include "ni_route_values.h" +#include "{extern_h}"\ +""".format(filename=SET_C, extern_h=os.path.join(ITEMS_DIR, EXTERN_H)) + + extern_header = """\ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * List of valid routes for specific NI boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * The contents of this file are generated using the tools in + * comedi/drivers/ni_routing/tools + * + * Please use those tools to help maintain the contents of this file. + */ + +#ifndef _COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H +#define _COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H + +#include "../ni_route_values.h" + +{externs} + +#endif //_COMEDI_DRIVERS_NI_ROUTING_NI_ROUTE_VALUES_EXTERN_H +""" + + single_output_file_top = """\ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/ni_routing/{filename} + * Route information for {sheet} boards. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file includes a list of all the values of various signals routes + * available on NI 660x hardware. In many cases, one does not explicitly make + * these routes, rather one might indicate that something is used as the source + * of one particular trigger or another (using *_src=TRIG_EXT). + * + * The contents of this file can be generated using the tools in + * comedi/drivers/ni_routing/tools. This file also contains specific notes to + * this family of devices. + * + * Please use those tools to help maintain the contents of this file, but be + * mindful to not lose the notes already made in this file, since these notes + * are critical to a complete undertsanding of the register values of this + * family. + */ + +#include "../ni_route_values.h" +#include "{extern_h}" + +const struct family_route_values {table_name} = {{\ +""" + + def __init__(self, pattern='csv/route_values/*.csv'): + super(RouteValues,self).__init__(pattern) + + def to_structinit(self): + chunks = [ self.output_file_top, + '', + 'const struct family_route_values *const ni_all_route_values[] = {' + ] + # put the sheets in lexical order for consistency + sheets = sorted(self.items(), key=lambda i : i[0] ) + + externs = [] + objs = [c_to_o(self.SET_C)] + + for sheet,D in sheets: + S = sheet.lower() + fam_table_name = '{}_route_values'.format(S.replace('-','_')) + sheet_filename = os.path.join(self.ITEMS_DIR,'{}.c'.format(S)) + externs.append('extern const struct family_route_values {};'.format(fam_table_name)) + + chunks.append('\t&{},'.format(fam_table_name)) + + s_chunks = [ + self.single_output_file_top.format( + filename = sheet_filename, + sheet = sheet.upper(), + table_name = fam_table_name, + extern_h = self.EXTERN_H, + ), + routedict_to_structinit_single(S, D), + '};', + ] + + objs.append(c_to_o(sheet_filename)) + + with open(os.path.join(self.OUTPUT_DIR, sheet_filename), 'w') as f: + f.write('\n'.join(s_chunks)) + f.write( '\n' ) + + with open(os.path.join(self.OUTPUT_DIR, self.MKFILE_SEGMENTS), 'w') as f: + f.write('# This is the segment that should be included in comedi/drivers/Makefile\n') + f.write('ni_routing-objs\t\t\t\t+= \\\n') + f.write('\n'.join(objs)) + f.write('\n') + + EXTERN_H = os.path.join(self.ITEMS_DIR, self.EXTERN_H) + with open(os.path.join(self.OUTPUT_DIR, EXTERN_H), 'w') as f: + f.write(self.extern_header.format( + filename=EXTERN_H, externs='\n'.join(externs))) + + chunks.append('\tNULL,') # terminate list + chunks.append('};') + return '\n'.join(chunks) + + def save(self): + filename=os.path.join(self.OUTPUT_DIR, self.SET_C) + + try: + os.makedirs(os.path.join(self.OUTPUT_DIR, self.ITEMS_DIR)) + except: + pass + with open(filename,'w') as f: + f.write( self.to_structinit() ) + f.write( '\n' ) + + + +if __name__ == '__main__': + import argparse + parser = argparse.ArgumentParser() + parser.add_argument( '--route_values', action='store_true', + help='Extract route values from csv/route_values/*.csv' ) + parser.add_argument( '--device_routes', action='store_true', + help='Extract route values from csv/device_routes/*.csv' ) + args = parser.parse_args() + KL = list() + if args.route_values: + KL.append( RouteValues ) + if args.device_routes: + KL.append( DeviceRoutes ) + if not KL: + parser.error('nothing to do...') + for K in KL: + doc = K() + doc.save() diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/convert_py_to_csv.py b/drivers/staging/comedi/drivers/ni_routing/tools/convert_py_to_csv.py new file mode 100755 index 000000000000..b3e6472bac22 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/convert_py_to_csv.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap + +from os import path +import os, csv +from itertools import chain + +from csv_collection import CSVCollection +from ni_names import value_to_name +import ni_values + +CSV_DIR = 'csv' + +def iter_src_values(D): + return D.items() + +def iter_src(D): + for dest in D: + yield dest, 1 + +def create_csv(name, D, src_iter): + # have to change dest->{src:val} to src->{dest:val} + fieldnames = [value_to_name[i] for i in sorted(D.keys())] + fieldnames.insert(0, CSVCollection.source_column_name) + + S = dict() + for dest, srcD in D.items(): + for src,val in src_iter(srcD): + S.setdefault(src,{})[dest] = val + + S = sorted(S.items(), key = lambda src_destD : src_destD[0]) + + + csv_fname = path.join(CSV_DIR, name + '.csv') + with open(csv_fname, 'w') as F_csv: + dR = csv.DictWriter(F_csv, fieldnames, delimiter=';', quotechar='"') + dR.writeheader() + + # now change the json back into the csv dictionaries + rows = [ + dict(chain( + ((CSVCollection.source_column_name,value_to_name[src]),), + *(((value_to_name[dest],v),) for dest,v in destD.items()) + )) + for src, destD in S + ] + + dR.writerows(rows) + + +def to_csv(): + for d in ['route_values', 'device_routes']: + try: + os.makedirs(path.join(CSV_DIR,d)) + except: + pass + + for family, dst_src_map in ni_values.ni_route_values.items(): + create_csv(path.join('route_values',family), dst_src_map, iter_src_values) + + for device, dst_src_map in ni_values.ni_device_routes.items(): + create_csv(path.join('device_routes',device), dst_src_map, iter_src) + + +if __name__ == '__main__': + to_csv() diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/csv_collection.py b/drivers/staging/comedi/drivers/ni_routing/tools/csv_collection.py new file mode 100644 index 000000000000..12617329a928 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/csv_collection.py @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap + +import os, csv, glob + +class CSVCollection(dict): + delimiter=';' + quotechar='"' + source_column_name = 'Sources / Destinations' + + """ + This class is a dictionary representation of the collection of sheets that + exist in a given .ODS file. + """ + def __init__(self, pattern, skip_commented_lines=True, strip_lines=True): + super(CSVCollection, self).__init__() + self.pattern = pattern + C = '#' if skip_commented_lines else 'blahblahblah' + + if strip_lines: + strip = lambda s:s.strip() + else: + strip = lambda s:s + + # load all CSV files + key = self.source_column_name + for fname in glob.glob(pattern): + with open(fname) as F: + dR = csv.DictReader(F, delimiter=self.delimiter, + quotechar=self.quotechar) + name = os.path.basename(fname).partition('.')[0] + D = { + r[key]:{f:strip(c) for f,c in r.items() + if f != key and f[:1] not in ['', C] and + strip(c)[:1] not in ['', C]} + for r in dR if r[key][:1] not in ['', C] + } + # now, go back through and eliminate all empty dictionaries + D = {k:v for k,v in D.items() if v} + self[name] = D diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/make_blank_csv.py b/drivers/staging/comedi/drivers/ni_routing/tools/make_blank_csv.py new file mode 100755 index 000000000000..89c90a0ba24d --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/make_blank_csv.py @@ -0,0 +1,32 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap + +from os import path +import os, csv + +from csv_collection import CSVCollection +from ni_names import value_to_name + +CSV_DIR = 'csv' + +def to_csv(): + try: + os.makedirs(CSV_DIR) + except: + pass + + csv_fname = path.join(CSV_DIR, 'blank_route_table.csv') + + fieldnames = [sig for sig_val, sig in sorted(value_to_name.items())] + fieldnames.insert(0, CSVCollection.source_column_name) + + with open(csv_fname, 'w') as F_csv: + dR = csv.DictWriter(F_csv, fieldnames, delimiter=';', quotechar='"') + dR.writeheader() + + for sig in fieldnames[1:]: + dR.writerow({CSVCollection.source_column_name: sig}) + +if __name__ == '__main__': + to_csv() diff --git a/drivers/staging/comedi/drivers/ni_routing/tools/ni_names.py b/drivers/staging/comedi/drivers/ni_routing/tools/ni_names.py new file mode 100644 index 000000000000..5f9b825968b1 --- /dev/null +++ b/drivers/staging/comedi/drivers/ni_routing/tools/ni_names.py @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0+ +# vim: ts=2:sw=2:et:tw=80:nowrap +""" +This file helps to extract string names of NI signals as included in comedi.h +between NI_NAMES_BASE and NI_NAMES_BASE+NI_NUM_NAMES. +""" + +# This is simply to aide in creating the entries in the order of the value of +# the device-global NI signal/terminal constants defined in comedi.h +import comedi_h + + +ni_macros = ( + 'NI_PFI', + 'TRIGGER_LINE', + 'NI_RTSI_BRD', + 'NI_CtrSource', + 'NI_CtrGate', + 'NI_CtrAux', + 'NI_CtrA', + 'NI_CtrB', + 'NI_CtrZ', + 'NI_CtrArmStartTrigger', + 'NI_CtrInternalOutput', + 'NI_CtrOut', + 'NI_CtrSampleClock', +) + +def get_ni_names(): + name_dict = dict() + + # load all the static names; start with those that do not begin with NI_ + name_dict['PXI_Star'] = comedi_h.PXI_Star + name_dict['PXI_Clk10'] = comedi_h.PXI_Clk10 + + #load all macro values + for fun in ni_macros: + f = getattr(comedi_h, fun) + name_dict.update({ + '{}({})'.format(fun,i):f(i) for i in range(1 + f(-1) - f(0)) + }) + + #load everything else in ni_common_signal_names enum + name_dict.update({ + k:v for k,v in comedi_h.__dict__.items() + if k.startswith('NI_') and (not callable(v)) and + comedi_h.NI_COUNTER_NAMES_MAX < v < (comedi_h.NI_NAMES_BASE + comedi_h.NI_NUM_NAMES) + }) + + # now create reverse lookup (value -> name) + + val_dict = {v:k for k,v in name_dict.items()} + + return name_dict, val_dict + +name_to_value, value_to_name = get_ni_names() diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h index 831088c5cabb..6c023b40fb53 100644 --- a/drivers/staging/comedi/drivers/ni_stc.h +++ b/drivers/staging/comedi/drivers/ni_stc.h @@ -15,6 +15,7 @@ #define _COMEDI_NI_STC_H #include "ni_tio.h" +#include "ni_routes.h" /* * Registers in the National Instruments DAQ-STC chip @@ -253,6 +254,8 @@ #define NISTC_RTSI_TRIG_OLD_CLK_CHAN 7 #define NISTC_RTSI_TRIG_NUM_CHAN(_m) ((_m) ? 8 : 7) #define NISTC_RTSI_TRIG_DIR(_c, _m) ((_m) ? BIT(8 + (_c)) : BIT(7 + (_c))) +#define NISTC_RTSI_TRIG_DIR_SUB_SEL1 BIT(2) /* only for M-Series */ +#define NISTC_RTSI_TRIG_DIR_SUB_SEL1_SHIFT 2 /* only for M-Series */ #define NISTC_RTSI_TRIG_USE_CLK BIT(1) #define NISTC_RTSI_TRIG_DRV_CLK BIT(0) @@ -281,11 +284,15 @@ #define NISTC_ATRIG_ETC_REG 61 #define NISTC_ATRIG_ETC_GPFO_1_ENA BIT(15) #define NISTC_ATRIG_ETC_GPFO_0_ENA BIT(14) -#define NISTC_ATRIG_ETC_GPFO_0_SEL(x) (((x) & 0x3) << 11) +#define NISTC_ATRIG_ETC_GPFO_0_SEL(x) (((x) & 0x7) << 11) +#define NISTC_ATRIG_ETC_GPFO_0_SEL_TO_SRC(x) (((x) >> 11) & 0x7) #define NISTC_ATRIG_ETC_GPFO_1_SEL BIT(7) +#define NISTC_ATRIG_ETC_GPFO_1_SEL_TO_SRC(x) (((x) >> 7) & 0x1) #define NISTC_ATRIG_ETC_DRV BIT(4) #define NISTC_ATRIG_ETC_ENA BIT(3) #define NISTC_ATRIG_ETC_MODE(x) (((x) & 0x7) << 0) +#define NISTC_GPFO_0_G_OUT 0 /* input to GPFO_0_SEL for Ctr0Out */ +#define NISTC_GPFO_1_G_OUT 0 /* input to GPFO_1_SEL for Ctr1Out */ #define NISTC_AI_START_STOP_REG 62 #define NISTC_AI_START_POLARITY BIT(15) @@ -422,6 +429,7 @@ #define NISTC_RTSI_TRIGA_OUT_REG 79 #define NISTC_RTSI_TRIGB_OUT_REG 80 #define NISTC_RTSI_TRIGB_SUB_SEL1 BIT(15) /* not for M-Series */ +#define NISTC_RTSI_TRIGB_SUB_SEL1_SHIFT 15 /* not for M-Series */ #define NISTC_RTSI_TRIG(_c, _s) (((_s) & 0xf) << (((_c) % 4) * 4)) #define NISTC_RTSI_TRIG_MASK(_c) NISTC_RTSI_TRIG((_c), 0xf) #define NISTC_RTSI_TRIG_TO_SRC(_c, _b) (((_b) >> (((_c) % 4) * 4)) & 0xf) @@ -953,6 +961,7 @@ struct ni_board_struct { int reg_type; unsigned int has_8255:1; unsigned int has_32dio_chan:1; + unsigned int dio_speed; /* not for e-series */ enum caldac_enum caldac[3]; }; @@ -962,6 +971,7 @@ struct ni_board_struct { #define NUM_GPCT 2 #define NUM_PFI_OUTPUT_SELECT_REGS 6 +#define NUM_RTSI_SHARED_MUXS (NI_RTSI_BRD(-1) - NI_RTSI_BRD(0) + 1) #define M_SERIES_EEPROM_SIZE 1024 @@ -1057,6 +1067,73 @@ struct ni_private { * possible. */ unsigned int ao_needs_arming:1; + + /* device signal route tables */ + struct ni_route_tables routing_tables; + + /* + * Number of clients (RTSI lines) for current RTSI MUX source. + * + * This allows resource management of RTSI board/shared mux lines by + * marking the RTSI line that is using a particular MUX. Currently, + * these lines are only automatically allocated based on source of the + * route requested. Furthermore, the only way that this auto-allocation + * and configuration works is via the globally-named ni signal/terminal + * names. + */ + u8 rtsi_shared_mux_usage[NUM_RTSI_SHARED_MUXS]; + + /* + * softcopy register for rtsi shared mux/board lines. + * For e-series, the bit layout of this register is + * (docs: mhddk/nieseries/ChipObjects/tSTC.{h,ipp}, + * DAQ-STC, Jan 1999, 340934B-01): + * bits 0:2 -- NI_RTSI_BRD(0) source selection + * bits 3:5 -- NI_RTSI_BRD(1) source selection + * bits 6:8 -- NI_RTSI_BRD(2) source selection + * bits 9:11 -- NI_RTSI_BRD(3) source selection + * bit 12 -- NI_RTSI_BRD(0) direction, 0:input, 1:output + * bit 13 -- NI_RTSI_BRD(1) direction, 0:input, 1:output + * bit 14 -- NI_RTSI_BRD(2) direction, 0:input, 1:output + * bit 15 -- NI_RTSI_BRD(3) direction, 0:input, 1:output + * According to DAQ-STC: + * RTSI Board Interface--Configured as an input, each bidirectional + * RTSI_BRD pin can drive any of the seven RTSI_TRIGGER pins. + * RTSI_BRD<0..1> can also be driven by AI STOP and RTSI_BRD<2..3> + * can also be driven by the AI START and SCAN_IN_PROG signals. + * These pins provide a mechanism for additional board-level signals + * to be sent on or received from the RTSI bus. + * Couple of comments: + * - Neither the DAQ-STC nor the MHDDK is clear on what the direction + * of the RTSI_BRD pins actually means. There does not appear to be + * any clear indication on what "output" would mean, since the point + * of the RTSI_BRD lines is to always drive one of the + * RTSI_TRIGGER<0..6> lines. + * - The DAQ-STC also indicates that the NI_RTSI_BRD lines can be + * driven by any of the RTSI_TRIGGER<0..6> lines. + * But, looking at valid device routes, as visually imported from + * NI-MAX, there appears to be only one family (so far) that has the + * ability to route a signal from one TRIGGER_LINE to another + * TRIGGER_LINE: the 653x family of DIO devices. + * + * For m-series, the bit layout of this register is + * (docs: mhddk/nimseries/ChipObjects/tMSeries.{h,ipp}): + * bits 0:3 -- NI_RTSI_BRD(0) source selection + * bits 4:7 -- NI_RTSI_BRD(1) source selection + * bits 8:11 -- NI_RTSI_BRD(2) source selection + * bits 12:15 -- NI_RTSI_BRD(3) source selection + * Note: The m-series does not have any option to change direction of + * NI_RTSI_BRD muxes. Furthermore, there are no register values that + * indicate the ability to have TRIGGER_LINES driving the output of + * the NI_RTSI_BRD muxes. + */ + u16 rtsi_shared_mux_reg; + + /* + * Number of clients (RTSI lines) for current RGOUT0 path. + * Stored in part of in RTSI_TRIG_DIR or RTSI_TRIGB registers + */ + u8 rgout0_usage; }; static const struct comedi_lrange range_ni_E_ao_ext; diff --git a/drivers/staging/comedi/drivers/ni_tio.c b/drivers/staging/comedi/drivers/ni_tio.c index ef919b21b7d9..0eb388c0e1f0 100644 --- a/drivers/staging/comedi/drivers/ni_tio.c +++ b/drivers/staging/comedi/drivers/ni_tio.c @@ -818,10 +818,79 @@ static int ni_tio_get_clock_src(struct ni_gpct *counter, return 0; } +static inline void ni_tio_set_gate_raw(struct ni_gpct *counter, + unsigned int gate_source) +{ + ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(counter->counter_index), + GI_GATE_SEL_MASK, GI_GATE_SEL(gate_source)); +} + +static inline void ni_tio_set_gate2_raw(struct ni_gpct *counter, + unsigned int gate_source) +{ + ni_tio_set_bits(counter, NITIO_GATE2_REG(counter->counter_index), + GI_GATE2_SEL_MASK, GI_GATE2_SEL(gate_source)); +} + +/* Set the mode bits for gate. */ +static inline void ni_tio_set_gate_mode(struct ni_gpct *counter, + unsigned int src) +{ + unsigned int mode_bits = 0; + + if (CR_CHAN(src) & NI_GPCT_DISABLED_GATE_SELECT) { + /* + * Allowing bitwise comparison here to allow non-zero raw + * register value to be used for channel when disabling. + */ + mode_bits = GI_GATING_DISABLED; + } else { + if (src & CR_INVERT) + mode_bits |= GI_GATE_POL_INVERT; + if (src & CR_EDGE) + mode_bits |= GI_RISING_EDGE_GATING; + else + mode_bits |= GI_LEVEL_GATING; + } + ni_tio_set_bits(counter, NITIO_MODE_REG(counter->counter_index), + GI_GATE_POL_INVERT | GI_GATING_MODE_MASK, + mode_bits); +} + +/* + * Set the mode bits for gate2. + * + * Previously, the code this function represents did not actually write anything + * to the register. Rather, writing to this register was reserved for the code + * ni ni_tio_set_gate2_raw. + */ +static inline void ni_tio_set_gate2_mode(struct ni_gpct *counter, + unsigned int src) +{ + /* + * The GI_GATE2_MODE bit was previously set in the code that also sets + * the gate2 source. + * We'll set mode bits _after_ source bits now, and thus, this function + * will effectively enable the second gate after all bits are set. + */ + unsigned int mode_bits = GI_GATE2_MODE; + + if (CR_CHAN(src) & NI_GPCT_DISABLED_GATE_SELECT) + /* + * Allowing bitwise comparison here to allow non-zero raw + * register value to be used for channel when disabling. + */ + mode_bits = GI_GATING_DISABLED; + if (src & CR_INVERT) + mode_bits |= GI_GATE2_POL_INVERT; + + ni_tio_set_bits(counter, NITIO_GATE2_REG(counter->counter_index), + GI_GATE2_POL_INVERT | GI_GATE2_MODE, mode_bits); +} + static int ni_660x_set_gate(struct ni_gpct *counter, unsigned int gate_source) { unsigned int chan = CR_CHAN(gate_source); - unsigned int cidx = counter->counter_index; unsigned int gate_sel; unsigned int i; @@ -854,15 +923,13 @@ static int ni_660x_set_gate(struct ni_gpct *counter, unsigned int gate_source) break; return -EINVAL; } - ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), - GI_GATE_SEL_MASK, GI_GATE_SEL(gate_sel)); + ni_tio_set_gate_raw(counter, gate_sel); return 0; } static int ni_m_set_gate(struct ni_gpct *counter, unsigned int gate_source) { unsigned int chan = CR_CHAN(gate_source); - unsigned int cidx = counter->counter_index; unsigned int gate_sel; unsigned int i; @@ -896,17 +963,13 @@ static int ni_m_set_gate(struct ni_gpct *counter, unsigned int gate_source) break; return -EINVAL; } - ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), - GI_GATE_SEL_MASK, GI_GATE_SEL(gate_sel)); + ni_tio_set_gate_raw(counter, gate_sel); return 0; } static int ni_660x_set_gate2(struct ni_gpct *counter, unsigned int gate_source) { - struct ni_gpct_device *counter_dev = counter->counter_dev; - unsigned int cidx = counter->counter_index; unsigned int chan = CR_CHAN(gate_source); - unsigned int gate2_reg = NITIO_GATE2_REG(cidx); unsigned int gate2_sel; unsigned int i; @@ -940,94 +1003,106 @@ static int ni_660x_set_gate2(struct ni_gpct *counter, unsigned int gate_source) break; return -EINVAL; } - counter_dev->regs[gate2_reg] |= GI_GATE2_MODE; - counter_dev->regs[gate2_reg] &= ~GI_GATE2_SEL_MASK; - counter_dev->regs[gate2_reg] |= GI_GATE2_SEL(gate2_sel); - ni_tio_write(counter, counter_dev->regs[gate2_reg], gate2_reg); + ni_tio_set_gate2_raw(counter, gate2_sel); return 0; } static int ni_m_set_gate2(struct ni_gpct *counter, unsigned int gate_source) { - struct ni_gpct_device *counter_dev = counter->counter_dev; - unsigned int cidx = counter->counter_index; - unsigned int chan = CR_CHAN(gate_source); - unsigned int gate2_reg = NITIO_GATE2_REG(cidx); - unsigned int gate2_sel; - /* * FIXME: We don't know what the m-series second gate codes are, * so we'll just pass the bits through for now. */ - switch (chan) { - default: - gate2_sel = chan & 0x1f; + ni_tio_set_gate2_raw(counter, gate_source); + return 0; +} + +int ni_tio_set_gate_src_raw(struct ni_gpct *counter, + unsigned int gate, unsigned int src) +{ + struct ni_gpct_device *counter_dev = counter->counter_dev; + + switch (gate) { + case 0: + /* 1. start by disabling gate */ + ni_tio_set_gate_mode(counter, NI_GPCT_DISABLED_GATE_SELECT); + /* 2. set the requested gate source */ + ni_tio_set_gate_raw(counter, src); + /* 3. reenable & set mode to starts things back up */ + ni_tio_set_gate_mode(counter, src); + break; + case 1: + if (!ni_tio_has_gate2_registers(counter_dev)) + return -EINVAL; + + /* 1. start by disabling gate */ + ni_tio_set_gate2_mode(counter, NI_GPCT_DISABLED_GATE_SELECT); + /* 2. set the requested gate source */ + ni_tio_set_gate2_raw(counter, src); + /* 3. reenable & set mode to starts things back up */ + ni_tio_set_gate2_mode(counter, src); break; + default: + return -EINVAL; } - counter_dev->regs[gate2_reg] |= GI_GATE2_MODE; - counter_dev->regs[gate2_reg] &= ~GI_GATE2_SEL_MASK; - counter_dev->regs[gate2_reg] |= GI_GATE2_SEL(gate2_sel); - ni_tio_write(counter, counter_dev->regs[gate2_reg], gate2_reg); return 0; } +EXPORT_SYMBOL_GPL(ni_tio_set_gate_src_raw); int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned int gate, unsigned int src) { struct ni_gpct_device *counter_dev = counter->counter_dev; - unsigned int cidx = counter->counter_index; - unsigned int chan = CR_CHAN(src); - unsigned int gate2_reg = NITIO_GATE2_REG(cidx); - unsigned int mode = 0; + /* + * mask off disable flag. This high bit still passes CR_CHAN. + * Doing this allows one to both set the gate as disabled, but also + * change the route value of the gate. + */ + int chan = CR_CHAN(src) & (~NI_GPCT_DISABLED_GATE_SELECT); + int ret; switch (gate) { case 0: - if (chan == NI_GPCT_DISABLED_GATE_SELECT) { - ni_tio_set_bits(counter, NITIO_MODE_REG(cidx), - GI_GATING_MODE_MASK, - GI_GATING_DISABLED); - return 0; - } - if (src & CR_INVERT) - mode |= GI_GATE_POL_INVERT; - if (src & CR_EDGE) - mode |= GI_RISING_EDGE_GATING; - else - mode |= GI_LEVEL_GATING; - ni_tio_set_bits(counter, NITIO_MODE_REG(cidx), - GI_GATE_POL_INVERT | GI_GATING_MODE_MASK, - mode); + /* 1. start by disabling gate */ + ni_tio_set_gate_mode(counter, NI_GPCT_DISABLED_GATE_SELECT); + /* 2. set the requested gate source */ switch (counter_dev->variant) { case ni_gpct_variant_e_series: case ni_gpct_variant_m_series: - default: - return ni_m_set_gate(counter, src); + ret = ni_m_set_gate(counter, chan); + break; case ni_gpct_variant_660x: - return ni_660x_set_gate(counter, src); + ret = ni_660x_set_gate(counter, chan); + break; + default: + return -EINVAL; } + if (ret) + return ret; + /* 3. reenable & set mode to starts things back up */ + ni_tio_set_gate_mode(counter, src); break; case 1: if (!ni_tio_has_gate2_registers(counter_dev)) return -EINVAL; - if (chan == NI_GPCT_DISABLED_GATE_SELECT) { - counter_dev->regs[gate2_reg] &= ~GI_GATE2_MODE; - ni_tio_write(counter, counter_dev->regs[gate2_reg], - gate2_reg); - return 0; - } - if (src & CR_INVERT) - counter_dev->regs[gate2_reg] |= GI_GATE2_POL_INVERT; - else - counter_dev->regs[gate2_reg] &= ~GI_GATE2_POL_INVERT; + /* 1. start by disabling gate */ + ni_tio_set_gate2_mode(counter, NI_GPCT_DISABLED_GATE_SELECT); + /* 2. set the requested gate source */ switch (counter_dev->variant) { case ni_gpct_variant_m_series: - return ni_m_set_gate2(counter, src); + ret = ni_m_set_gate2(counter, chan); + break; case ni_gpct_variant_660x: - return ni_660x_set_gate2(counter, src); + ret = ni_660x_set_gate2(counter, chan); + break; default: return -EINVAL; } + if (ret) + return ret; + /* 3. reenable & set mode to starts things back up */ + ni_tio_set_gate2_mode(counter, src); break; default: return -EINVAL; @@ -1047,19 +1122,21 @@ static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned int index, return -EINVAL; abz_reg = NITIO_ABZ_REG(cidx); - switch (index) { - case NI_GPCT_SOURCE_ENCODER_A: + + /* allow for new device-global names */ + if (index == NI_GPCT_SOURCE_ENCODER_A || + (index >= NI_CtrA(0) && index <= NI_CtrA(-1))) { shift = 10; - break; - case NI_GPCT_SOURCE_ENCODER_B: + } else if (index == NI_GPCT_SOURCE_ENCODER_B || + (index >= NI_CtrB(0) && index <= NI_CtrB(-1))) { shift = 5; - break; - case NI_GPCT_SOURCE_ENCODER_Z: + } else if (index == NI_GPCT_SOURCE_ENCODER_Z || + (index >= NI_CtrZ(0) && index <= NI_CtrZ(-1))) { shift = 0; - break; - default: + } else { return -EINVAL; } + mask = 0x1f << shift; if (source > 0x1f) source = 0x1f; /* Disable gate */ @@ -1070,6 +1147,39 @@ static int ni_tio_set_other_src(struct ni_gpct *counter, unsigned int index, return 0; } +static int ni_tio_get_other_src(struct ni_gpct *counter, unsigned int index, + unsigned int *source) +{ + struct ni_gpct_device *counter_dev = counter->counter_dev; + unsigned int cidx = counter->counter_index; + unsigned int abz_reg, shift, mask; + + if (counter_dev->variant != ni_gpct_variant_m_series) + /* A,B,Z only valid for m-series */ + return -EINVAL; + + abz_reg = NITIO_ABZ_REG(cidx); + + /* allow for new device-global names */ + if (index == NI_GPCT_SOURCE_ENCODER_A || + (index >= NI_CtrA(0) && index <= NI_CtrA(-1))) { + shift = 10; + } else if (index == NI_GPCT_SOURCE_ENCODER_B || + (index >= NI_CtrB(0) && index <= NI_CtrB(-1))) { + shift = 5; + } else if (index == NI_GPCT_SOURCE_ENCODER_Z || + (index >= NI_CtrZ(0) && index <= NI_CtrZ(-1))) { + shift = 0; + } else { + return -EINVAL; + } + + mask = 0x1f; + + *source = (ni_tio_get_soft_copy(counter, abz_reg) >> shift) & mask; + return 0; +} + static int ni_660x_gate_to_generic_gate(unsigned int gate, unsigned int *src) { unsigned int source; @@ -1112,7 +1222,7 @@ static int ni_660x_gate_to_generic_gate(unsigned int gate, unsigned int *src) } *src = source; return 0; -}; +} static int ni_m_gate_to_generic_gate(unsigned int gate, unsigned int *src) { @@ -1165,7 +1275,7 @@ static int ni_m_gate_to_generic_gate(unsigned int gate, unsigned int *src) } *src = source; return 0; -}; +} static int ni_660x_gate2_to_generic_gate(unsigned int gate, unsigned int *src) { @@ -1212,7 +1322,7 @@ static int ni_660x_gate2_to_generic_gate(unsigned int gate, unsigned int *src) } *src = source; return 0; -}; +} static int ni_m_gate2_to_generic_gate(unsigned int gate, unsigned int *src) { @@ -1222,32 +1332,60 @@ static int ni_m_gate2_to_generic_gate(unsigned int gate, unsigned int *src) */ *src = gate; return 0; -}; +} + +static inline unsigned int ni_tio_get_gate_mode(struct ni_gpct *counter) +{ + unsigned int mode = ni_tio_get_soft_copy( + counter, NITIO_MODE_REG(counter->counter_index)); + unsigned int ret = 0; + + if ((mode & GI_GATING_MODE_MASK) == GI_GATING_DISABLED) + ret |= NI_GPCT_DISABLED_GATE_SELECT; + if (mode & GI_GATE_POL_INVERT) + ret |= CR_INVERT; + if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING) + ret |= CR_EDGE; + + return ret; +} + +static inline unsigned int ni_tio_get_gate2_mode(struct ni_gpct *counter) +{ + unsigned int mode = ni_tio_get_soft_copy( + counter, NITIO_GATE2_REG(counter->counter_index)); + unsigned int ret = 0; + + if (!(mode & GI_GATE2_MODE)) + ret |= NI_GPCT_DISABLED_GATE_SELECT; + if (mode & GI_GATE2_POL_INVERT) + ret |= CR_INVERT; + + return ret; +} + +static inline unsigned int ni_tio_get_gate_val(struct ni_gpct *counter) +{ + return GI_BITS_TO_GATE(ni_tio_get_soft_copy(counter, + NITIO_INPUT_SEL_REG(counter->counter_index))); +} + +static inline unsigned int ni_tio_get_gate2_val(struct ni_gpct *counter) +{ + return GI_BITS_TO_GATE2(ni_tio_get_soft_copy(counter, + NITIO_GATE2_REG(counter->counter_index))); +} static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned int gate_index, unsigned int *gate_source) { - struct ni_gpct_device *counter_dev = counter->counter_dev; - unsigned int cidx = counter->counter_index; - unsigned int mode; - unsigned int reg; unsigned int gate; int ret; - mode = ni_tio_get_soft_copy(counter, NITIO_MODE_REG(cidx)); - if (((mode & GI_GATING_MODE_MASK) == GI_GATING_DISABLED) || - (gate_index == 1 && - !(counter_dev->regs[NITIO_GATE2_REG(cidx)] & GI_GATE2_MODE))) { - *gate_source = NI_GPCT_DISABLED_GATE_SELECT; - return 0; - } - switch (gate_index) { case 0: - reg = NITIO_INPUT_SEL_REG(cidx); - gate = GI_BITS_TO_GATE(ni_tio_get_soft_copy(counter, reg)); - - switch (counter_dev->variant) { + gate = ni_tio_get_gate_val(counter); + switch (counter->counter_dev->variant) { case ni_gpct_variant_e_series: case ni_gpct_variant_m_series: default: @@ -1259,16 +1397,11 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned int gate_index, } if (ret) return ret; - if (mode & GI_GATE_POL_INVERT) - *gate_source |= CR_INVERT; - if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING) - *gate_source |= CR_EDGE; + *gate_source |= ni_tio_get_gate_mode(counter); break; case 1: - reg = NITIO_GATE2_REG(cidx); - gate = GI_BITS_TO_GATE2(counter_dev->regs[reg]); - - switch (counter_dev->variant) { + gate = ni_tio_get_gate2_val(counter); + switch (counter->counter_dev->variant) { case ni_gpct_variant_e_series: case ni_gpct_variant_m_series: default: @@ -1280,11 +1413,26 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned int gate_index, } if (ret) return ret; - if (counter_dev->regs[reg] & GI_GATE2_POL_INVERT) - *gate_source |= CR_INVERT; - /* second gate can't have edge/level mode set independently */ - if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING) - *gate_source |= CR_EDGE; + *gate_source |= ni_tio_get_gate2_mode(counter); + break; + default: + return -EINVAL; + } + return 0; +} + +static int ni_tio_get_gate_src_raw(struct ni_gpct *counter, + unsigned int gate_index, + unsigned int *gate_source) +{ + switch (gate_index) { + case 0: + *gate_source = ni_tio_get_gate_mode(counter) + | ni_tio_get_gate_val(counter); + break; + case 1: + *gate_source = ni_tio_get_gate2_mode(counter) + | ni_tio_get_gate2_val(counter); break; default: return -EINVAL; @@ -1347,6 +1495,107 @@ int ni_tio_insn_config(struct comedi_device *dev, } EXPORT_SYMBOL_GPL(ni_tio_insn_config); +/** + * Retrieves the register value of the current source of the output selector for + * the given destination. + * + * If the terminal for the destination is not already configured as an output, + * this function returns -EINVAL as error. + * + * Return: the register value of the destination output selector; + * -EINVAL if terminal is not configured for output. + */ +int ni_tio_get_routing(struct ni_gpct_device *counter_dev, unsigned int dest) +{ + /* we need to know the actual counter below... */ + int ctr_index = (dest - NI_COUNTER_NAMES_BASE) % NI_MAX_COUNTERS; + struct ni_gpct *counter = &counter_dev->counters[ctr_index]; + int ret = 1; + unsigned int reg; + + if (dest >= NI_CtrA(0) && dest <= NI_CtrZ(-1)) { + ret = ni_tio_get_other_src(counter, dest, ®); + } else if (dest >= NI_CtrGate(0) && dest <= NI_CtrGate(-1)) { + ret = ni_tio_get_gate_src_raw(counter, 0, ®); + } else if (dest >= NI_CtrAux(0) && dest <= NI_CtrAux(-1)) { + ret = ni_tio_get_gate_src_raw(counter, 1, ®); + /* + * This case is not possible through this interface. A user must use + * INSN_CONFIG_SET_CLOCK_SRC instead. + * } else if (dest >= NI_CtrSource(0) && dest <= NI_CtrSource(-1)) { + * ret = ni_tio_set_clock_src(counter, ®, &period_ns); + */ + } + + if (ret) + return -EINVAL; + + return reg; +} +EXPORT_SYMBOL_GPL(ni_tio_get_routing); + +/** + * Sets the register value of the selector MUX for the given destination. + * @counter_dev:Pointer to general counter device. + * @destination:Device-global identifier of route destination. + * @register_value: + * The first several bits of this value should store the desired + * value to write to the register. All other bits are for + * transmitting information that modify the mode of the particular + * destination/gate. These mode bits might include a bitwise or of + * CR_INVERT and CR_EDGE. Note that the calling function should + * have already validated the correctness of this value. + */ +int ni_tio_set_routing(struct ni_gpct_device *counter_dev, unsigned int dest, + unsigned int reg) +{ + /* we need to know the actual counter below... */ + int ctr_index = (dest - NI_COUNTER_NAMES_BASE) % NI_MAX_COUNTERS; + struct ni_gpct *counter = &counter_dev->counters[ctr_index]; + int ret; + + if (dest >= NI_CtrA(0) && dest <= NI_CtrZ(-1)) { + ret = ni_tio_set_other_src(counter, dest, reg); + } else if (dest >= NI_CtrGate(0) && dest <= NI_CtrGate(-1)) { + ret = ni_tio_set_gate_src_raw(counter, 0, reg); + } else if (dest >= NI_CtrAux(0) && dest <= NI_CtrAux(-1)) { + ret = ni_tio_set_gate_src_raw(counter, 1, reg); + /* + * This case is not possible through this interface. A user must use + * INSN_CONFIG_SET_CLOCK_SRC instead. + * } else if (dest >= NI_CtrSource(0) && dest <= NI_CtrSource(-1)) { + * ret = ni_tio_set_clock_src(counter, reg, period_ns); + */ + } else { + return -EINVAL; + } + + return ret; +} +EXPORT_SYMBOL_GPL(ni_tio_set_routing); + +/** + * Sets the given destination MUX to its default value or disable it. + * + * Return: 0 if successful; -EINVAL if terminal is unknown. + */ +int ni_tio_unset_routing(struct ni_gpct_device *counter_dev, unsigned int dest) +{ + if (dest >= NI_GATES_NAMES_BASE && dest <= NI_GATES_NAMES_MAX) + /* Disable gate (via mode bits) and set to default 0-value */ + return ni_tio_set_routing(counter_dev, dest, + NI_GPCT_DISABLED_GATE_SELECT); + /* + * This case is not possible through this interface. A user must use + * INSN_CONFIG_SET_CLOCK_SRC instead. + * if (dest >= NI_CtrSource(0) && dest <= NI_CtrSource(-1)) + * return ni_tio_set_clock_src(counter, reg, period_ns); + */ + + return -EINVAL; +} +EXPORT_SYMBOL_GPL(ni_tio_unset_routing); + static unsigned int ni_tio_read_sw_save_reg(struct comedi_device *dev, struct comedi_subdevice *s) { @@ -1504,13 +1753,15 @@ ni_gpct_device_construct(struct comedi_device *dev, unsigned int (*read)(struct ni_gpct *counter, enum ni_gpct_register reg), enum ni_gpct_variant variant, - unsigned int num_counters) + unsigned int num_counters, + unsigned int counters_per_chip, + const struct ni_route_tables *routing_tables) { struct ni_gpct_device *counter_dev; struct ni_gpct *counter; unsigned int i; - if (num_counters == 0) + if (num_counters == 0 || counters_per_chip == 0) return NULL; counter_dev = kzalloc(sizeof(*counter_dev), GFP_KERNEL); @@ -1521,6 +1772,7 @@ ni_gpct_device_construct(struct comedi_device *dev, counter_dev->write = write; counter_dev->read = read; counter_dev->variant = variant; + counter_dev->routing_tables = routing_tables; spin_lock_init(&counter_dev->regs_lock); @@ -1534,9 +1786,12 @@ ni_gpct_device_construct(struct comedi_device *dev, for (i = 0; i < num_counters; ++i) { counter = &counter_dev->counters[i]; counter->counter_dev = counter_dev; + counter->chip_index = i / counters_per_chip; + counter->counter_index = i % counters_per_chip; spin_lock_init(&counter->lock); } counter_dev->num_counters = num_counters; + counter_dev->counters_per_chip = counters_per_chip; return counter_dev; } diff --git a/drivers/staging/comedi/drivers/ni_tio.h b/drivers/staging/comedi/drivers/ni_tio.h index 23221cead8ca..340d63c74467 100644 --- a/drivers/staging/comedi/drivers/ni_tio.h +++ b/drivers/staging/comedi/drivers/ni_tio.h @@ -107,8 +107,10 @@ struct ni_gpct_device { enum ni_gpct_variant variant; struct ni_gpct *counters; unsigned int num_counters; + unsigned int counters_per_chip; unsigned int regs[NITIO_NUM_REGS]; spinlock_t regs_lock; /* protects 'regs' */ + const struct ni_route_tables *routing_tables; /* link to routes */ }; struct ni_gpct_device * @@ -119,7 +121,9 @@ ni_gpct_device_construct(struct comedi_device *dev, unsigned int (*read)(struct ni_gpct *counter, enum ni_gpct_register), enum ni_gpct_variant, - unsigned int num_counters); + unsigned int num_counters, + unsigned int counters_per_chip, + const struct ni_route_tables *routing_tables); void ni_gpct_device_destroy(struct ni_gpct_device *counter_dev); void ni_tio_init_counter(struct ni_gpct *counter); int ni_tio_insn_read(struct comedi_device *dev, struct comedi_subdevice *s, @@ -138,4 +142,40 @@ void ni_tio_set_mite_channel(struct ni_gpct *counter, struct mite_channel *mite_chan); void ni_tio_acknowledge(struct ni_gpct *counter); +/* + * Retrieves the register value of the current source of the output selector for + * the given destination. + * + * If the terminal for the destination is not already configured as an output, + * this function returns -EINVAL as error. + * + * Return: the register value of the destination output selector; + * -EINVAL if terminal is not configured for output. + */ +int ni_tio_get_routing(struct ni_gpct_device *counter_dev, + unsigned int destination); + +/* + * Sets the register value of the selector MUX for the given destination. + * @counter_dev:Pointer to general counter device. + * @destination:Device-global identifier of route destination. + * @register_value: + * The first several bits of this value should store the desired + * value to write to the register. All other bits are for + * transmitting information that modify the mode of the particular + * destination/gate. These mode bits might include a bitwise or of + * CR_INVERT and CR_EDGE. Note that the calling function should + * have already validated the correctness of this value. + */ +int ni_tio_set_routing(struct ni_gpct_device *counter_dev, + unsigned int destination, unsigned int register_value); + +/* + * Sets the given destination MUX to its default value or disable it. + * + * Return: 0 if successful; -EINVAL if terminal is unknown. + */ +int ni_tio_unset_routing(struct ni_gpct_device *counter_dev, + unsigned int destination); + #endif /* _COMEDI_NI_TIO_H */ diff --git a/drivers/staging/comedi/drivers/ni_tio_internal.h b/drivers/staging/comedi/drivers/ni_tio_internal.h index f4d99d78208a..652a28990132 100644 --- a/drivers/staging/comedi/drivers/ni_tio_internal.h +++ b/drivers/staging/comedi/drivers/ni_tio_internal.h @@ -170,5 +170,7 @@ unsigned int ni_tio_get_soft_copy(const struct ni_gpct *counter, int ni_tio_arm(struct ni_gpct *counter, bool arm, unsigned int start_trigger); int ni_tio_set_gate_src(struct ni_gpct *counter, unsigned int gate, unsigned int src); +int ni_tio_set_gate_src_raw(struct ni_gpct *counter, unsigned int gate, + unsigned int src); #endif /* _COMEDI_NI_TIO_INTERNAL_H */ diff --git a/drivers/staging/comedi/drivers/ni_tiocmd.c b/drivers/staging/comedi/drivers/ni_tiocmd.c index 050bee0b9515..2a9f7e9821a7 100644 --- a/drivers/staging/comedi/drivers/ni_tiocmd.c +++ b/drivers/staging/comedi/drivers/ni_tiocmd.c @@ -33,6 +33,7 @@ #include <linux/module.h> #include "ni_tio_internal.h" #include "mite.h" +#include "ni_routes.h" static void ni_tio_configure_dma(struct ni_gpct *counter, bool enable, bool read) @@ -100,6 +101,8 @@ static int ni_tio_input_cmd(struct comedi_subdevice *s) { struct ni_gpct *counter = s->private; struct ni_gpct_device *counter_dev = counter->counter_dev; + const struct ni_route_tables *routing_tables = + counter_dev->routing_tables; unsigned int cidx = counter->counter_index; struct comedi_async *async = s->async; struct comedi_cmd *cmd = &async->cmd; @@ -128,8 +131,19 @@ static int ni_tio_input_cmd(struct comedi_subdevice *s) if (cmd->start_src == TRIG_NOW) ret = ni_tio_arm(counter, true, NI_GPCT_ARM_IMMEDIATE); - else if (cmd->start_src == TRIG_EXT) - ret = ni_tio_arm(counter, true, cmd->start_arg); + else if (cmd->start_src == TRIG_EXT) { + int reg = CR_CHAN(cmd->start_arg); + + if (reg >= NI_NAMES_BASE) { + /* using a device-global name. lookup reg */ + reg = ni_get_reg_value(reg, + NI_CtrArmStartTrigger(cidx), + routing_tables); + /* mark this as a raw register value */ + reg |= NI_GPCT_HW_ARM; + } + ret = ni_tio_arm(counter, true, reg); + } } return ret; } @@ -148,6 +162,8 @@ static int ni_tio_cmd_setup(struct comedi_subdevice *s) struct comedi_cmd *cmd = &s->async->cmd; struct ni_gpct *counter = s->private; unsigned int cidx = counter->counter_index; + const struct ni_route_tables *routing_tables = + counter->counter_dev->routing_tables; int set_gate_source = 0; unsigned int gate_source; int retval = 0; @@ -159,8 +175,24 @@ static int ni_tio_cmd_setup(struct comedi_subdevice *s) set_gate_source = 1; gate_source = cmd->convert_arg; } - if (set_gate_source) - retval = ni_tio_set_gate_src(counter, 0, gate_source); + if (set_gate_source) { + if (CR_CHAN(gate_source) >= NI_NAMES_BASE) { + /* Lookup and use the real register values */ + int reg = ni_get_reg_value(CR_CHAN(gate_source), + NI_CtrGate(cidx), + routing_tables); + if (reg < 0) + return -EINVAL; + retval = ni_tio_set_gate_src_raw(counter, 0, reg); + } else { + /* + * This function must be used separately since it does + * not expect real register values and attempts to + * convert these to real register values. + */ + retval = ni_tio_set_gate_src(counter, 0, gate_source); + } + } if (cmd->flags & CMDF_WAKE_EOS) { ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx), GI_GATE_INTERRUPT_ENABLE(cidx), @@ -203,6 +235,9 @@ int ni_tio_cmdtest(struct comedi_device *dev, struct comedi_cmd *cmd) { struct ni_gpct *counter = s->private; + unsigned int cidx = counter->counter_index; + const struct ni_route_tables *routing_tables = + counter->counter_dev->routing_tables; int err = 0; unsigned int sources; @@ -247,14 +282,37 @@ int ni_tio_cmdtest(struct comedi_device *dev, break; case TRIG_EXT: /* start_arg is the start_trigger passed to ni_tio_arm() */ + /* + * This should be done, but we don't yet know the actual + * register values. These should be tested and then documented + * in the ni_route_values/ni_*.csv files, with indication of + * who/when/which/how these these were tested. + * When at least a e/m/660x series have been tested, this code + * should be uncommented: + * + * err |= ni_check_trigger_arg(CR_CHAN(cmd->start_arg), + * NI_CtrArmStartTrigger(cidx), + * routing_tables); + */ break; } + /* + * It seems that convention is to allow either scan_begin_arg or + * convert_arg to specify the Gate source, with scan_begin_arg taking + * precedence. + */ if (cmd->scan_begin_src != TRIG_EXT) err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0); + else + err |= ni_check_trigger_arg(CR_CHAN(cmd->scan_begin_arg), + NI_CtrGate(cidx), routing_tables); if (cmd->convert_src != TRIG_EXT) err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); + else + err |= ni_check_trigger_arg(CR_CHAN(cmd->convert_arg), + NI_CtrGate(cidx), routing_tables); err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len); diff --git a/drivers/staging/comedi/drivers/tests/Makefile b/drivers/staging/comedi/drivers/tests/Makefile new file mode 100644 index 000000000000..b5d8e13d4162 --- /dev/null +++ b/drivers/staging/comedi/drivers/tests/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +# Makefile for comedi drivers unit tests +# +ccflags-$(CONFIG_COMEDI_DEBUG) := -DDEBUG + +obj-$(CONFIG_COMEDI_TESTS) += example_test.o ni_routes_test.o +CFLAGS_ni_routes_test.o := -DDEBUG diff --git a/drivers/staging/comedi/drivers/tests/example_test.c b/drivers/staging/comedi/drivers/tests/example_test.c new file mode 100644 index 000000000000..fc65158b8e8e --- /dev/null +++ b/drivers/staging/comedi/drivers/tests/example_test.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/tests/example_test.c + * Example set of unit tests. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/module.h> + +#include "unittest.h" + +/* *** BEGIN fake board data *** */ +struct comedi_device { + const char *board_name; + int item; +}; + +static struct comedi_device dev = { + .board_name = "fake_device", +}; + +/* *** END fake board data *** */ + +/* *** BEGIN fake data init *** */ +void init_fake(void) +{ + dev.item = 10; +} + +/* *** END fake data init *** */ + +void test0(void) +{ + init_fake(); + unittest(dev.item != 11, "negative result\n"); + unittest(dev.item == 10, "positive result\n"); +} + +/* **** BEGIN simple module entry/exit functions **** */ +static int __init unittest_enter(void) +{ + const unittest_fptr unit_tests[] = { + (unittest_fptr)test0, + NULL, + }; + + exec_unittests("example", unit_tests); + return 0; +} + +static void __exit unittest_exit(void) { } + +module_init(unittest_enter); +module_exit(unittest_exit); + +MODULE_AUTHOR("Spencer Olson <olsonse@umich.edu>"); +MODULE_DESCRIPTION("Comedi unit-tests example"); +MODULE_LICENSE("GPL"); +/* **** END simple module entry/exit functions **** */ diff --git a/drivers/staging/comedi/drivers/tests/ni_routes_test.c b/drivers/staging/comedi/drivers/tests/ni_routes_test.c new file mode 100644 index 000000000000..a1eda035f270 --- /dev/null +++ b/drivers/staging/comedi/drivers/tests/ni_routes_test.c @@ -0,0 +1,613 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/tests/ni_routes_test.c + * Unit tests for NI routes (ni_routes.c module). + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/module.h> + +#include "../ni_stc.h" +#include "../ni_routes.h" +#include "unittest.h" + +#define RVi(table, src, dest) ((table)[(dest) * NI_NUM_NAMES + (src)]) +#define O(x) ((x) + NI_NAMES_BASE) +#define B(x) ((x) - NI_NAMES_BASE) +#define V(x) ((x) | 0x80) + +/* *** BEGIN fake board data *** */ +static const char *pci_6070e = "pci-6070e"; +static const char *pci_6220 = "pci-6220"; +static const char *pci_fake = "pci-fake"; + +static const char *ni_eseries = "ni_eseries"; +static const char *ni_mseries = "ni_mseries"; + +static struct ni_board_struct board = { + .name = NULL, +}; + +static struct ni_private private = { + .is_m_series = 0, +}; + +static const int bad_dest = O(8), dest0 = O(0), desti = O(5); +static const int ith_dest_index = 2; +static const int no_val_dest = O(7), no_val_index = 4; + +/* These have to be defs to be used in init code below */ +#define rgout0_src0 (O(100)) +#define rgout0_src1 (O(101)) +#define brd0_src0 (O(110)) +#define brd0_src1 (O(111)) +#define brd1_src0 (O(120)) +#define brd1_src1 (O(121)) +#define brd2_src0 (O(130)) +#define brd2_src1 (O(131)) +#define brd3_src0 (O(140)) +#define brd3_src1 (O(141)) + +/* I1 and I2 should not call O(...). Mostly here to shut checkpatch.pl up */ +#define I1(x1) \ + (int[]){ \ + x1, 0 \ + } +#define I2(x1, x2) \ + (int[]){ \ + (x1), (x2), 0 \ + } +#define I3(x1, x2, x3) \ + (int[]){ \ + (x1), (x2), (x3), 0 \ + } + +/* O9 is build to call O(...) for each arg */ +#define O9(x1, x2, x3, x4, x5, x6, x7, x8, x9) \ + (int[]){ \ + O(x1), O(x2), O(x3), O(x4), O(x5), O(x6), O(x7), O(x8), O(x9), \ + 0 \ + } + +static struct ni_device_routes DR = { + .device = "testdev", + .routes = (struct ni_route_set[]){ + {.dest = O(0), .src = O9(/**/1, 2, 3, 4, 5, 6, 7, 8, 9)}, + {.dest = O(1), .src = O9(0, /**/2, 3, 4, 5, 6, 7, 8, 9)}, + /* ith route_set */ + {.dest = O(5), .src = O9(0, 1, 2, 3, 4,/**/ 6, 7, 8, 9)}, + {.dest = O(6), .src = O9(0, 1, 2, 3, 4, 5,/**/ 7, 8, 9)}, + /* next one will not have valid reg values */ + {.dest = O(7), .src = O9(0, 1, 2, 3, 4, 5, 6,/**/ 8, 9)}, + {.dest = O(9), .src = O9(0, 1, 2, 3, 4, 5, 6, 7, 8/**/)}, + + /* indirect routes done through muxes */ + {.dest = TRIGGER_LINE(0), .src = I1(rgout0_src0)}, + {.dest = TRIGGER_LINE(1), .src = I3(rgout0_src0, + brd3_src0, + brd3_src1)}, + {.dest = TRIGGER_LINE(2), .src = I3(rgout0_src1, + brd2_src0, + brd2_src1)}, + {.dest = TRIGGER_LINE(3), .src = I3(rgout0_src1, + brd1_src0, + brd1_src1)}, + {.dest = TRIGGER_LINE(4), .src = I2(brd0_src0, + brd0_src1)}, + {.dest = 0}, + }, +}; + +#undef I1 +#undef I2 +#undef O9 + +#define RV9(x1, x2, x3, x4, x5, x6, x7, x8, x9) \ + [x1] = V(x1), [x2] = V(x2), [x3] = V(x3), [x4] = V(x4), \ + [x5] = V(x5), [x6] = V(x6), [x7] = V(x7), [x8] = V(x8), \ + [x9] = V(x9), + +/* This table is indexed as RV[destination][source] */ +static const u8 RV[NI_NUM_NAMES][NI_NUM_NAMES] = { + [0] = {RV9(/**/1, 2, 3, 4, 5, 6, 7, 8, 9)}, + [1] = {RV9(0,/**/ 2, 3, 4, 5, 6, 7, 8, 9)}, + [2] = {RV9(0, 1,/**/3, 4, 5, 6, 7, 8, 9)}, + [3] = {RV9(0, 1, 2,/**/4, 5, 6, 7, 8, 9)}, + [4] = {RV9(0, 1, 2, 3,/**/5, 6, 7, 8, 9)}, + [5] = {RV9(0, 1, 2, 3, 4,/**/6, 7, 8, 9)}, + [6] = {RV9(0, 1, 2, 3, 4, 5,/**/7, 8, 9)}, + /* [7] is intentionaly left absent to test invalid routes */ + [8] = {RV9(0, 1, 2, 3, 4, 5, 6, 7,/**/9)}, + [9] = {RV9(0, 1, 2, 3, 4, 5, 6, 7, 8/**/)}, + /* some tests for needing extra muxes */ + [B(NI_RGOUT0)] = {[B(rgout0_src0)] = V(0), + [B(rgout0_src1)] = V(1)}, + [B(NI_RTSI_BRD(0))] = {[B(brd0_src0)] = V(0), + [B(brd0_src1)] = V(1)}, + [B(NI_RTSI_BRD(1))] = {[B(brd1_src0)] = V(0), + [B(brd1_src1)] = V(1)}, + [B(NI_RTSI_BRD(2))] = {[B(brd2_src0)] = V(0), + [B(brd2_src1)] = V(1)}, + [B(NI_RTSI_BRD(3))] = {[B(brd3_src0)] = V(0), + [B(brd3_src1)] = V(1)}, +}; + +#undef RV9 + +/* *** END fake board data *** */ + +/* *** BEGIN board data initializers *** */ +static void init_private(void) +{ + memset(&private, 0, sizeof(struct ni_private)); +} + +static void init_pci_6070e(void) +{ + board.name = pci_6070e; + init_private(); + private.is_m_series = 0; +} + +static void init_pci_6220(void) +{ + board.name = pci_6220; + init_private(); + private.is_m_series = 1; +} + +static void init_pci_fake(void) +{ + board.name = pci_fake; + init_private(); + private.routing_tables.route_values = &RV[0][0]; + private.routing_tables.valid_routes = &DR; +} + +/* *** END board data initializers *** */ + +/* Tests that route_sets are in order of the signal destination. */ +static bool route_set_dests_in_order(const struct ni_device_routes *devroutes) +{ + int i; + int last = NI_NAMES_BASE - 1; + + for (i = 0; i < devroutes->n_route_sets; ++i) { + if (last >= devroutes->routes[i].dest) + return false; + last = devroutes->routes[i].dest; + } + return true; +} + +/* Tests that all route_set->src are in order of the signal source. */ +bool route_set_sources_in_order(const struct ni_device_routes *devroutes) +{ + int i; + + for (i = 0; i < devroutes->n_route_sets; ++i) { + int j; + int last = NI_NAMES_BASE - 1; + + for (j = 0; j < devroutes->routes[i].n_src; ++j) { + if (last >= devroutes->routes[i].src[j]) + return false; + last = devroutes->routes[i].src[j]; + } + } + return true; +} + +void test_ni_assign_device_routes(void) +{ + const struct ni_device_routes *devroutes, *olddevroutes; + const u8 *table, *oldtable; + + init_pci_6070e(); + ni_assign_device_routes(ni_eseries, pci_6070e, &private.routing_tables); + devroutes = private.routing_tables.valid_routes; + table = private.routing_tables.route_values; + + unittest(strncmp(devroutes->device, pci_6070e, 10) == 0, + "find device pci-6070e\n"); + unittest(devroutes->n_route_sets == 37, + "number of pci-6070e route_sets == 37\n"); + unittest(devroutes->routes->dest == NI_PFI(0), + "first pci-6070e route_set is for NI_PFI(0)\n"); + unittest(devroutes->routes->n_src == 1, + "first pci-6070e route_set length == 1\n"); + unittest(devroutes->routes->src[0] == NI_AI_StartTrigger, + "first pci-6070e route_set src. == NI_AI_StartTrigger\n"); + unittest(devroutes->routes[10].dest == TRIGGER_LINE(0), + "10th pci-6070e route_set is for TRIGGER_LINE(0)\n"); + unittest(devroutes->routes[10].n_src == 10, + "10th pci-6070e route_set length == 10\n"); + unittest(devroutes->routes[10].src[0] == NI_CtrSource(0), + "10th pci-6070e route_set src. == NI_CtrSource(0)\n"); + unittest(route_set_dests_in_order(devroutes), + "all pci-6070e route_sets in order of signal destination\n"); + unittest(route_set_sources_in_order(devroutes), + "all pci-6070e route_set->src's in order of signal source\n"); + + unittest( + RVi(table, B(PXI_Star), B(NI_AI_SampleClock)) == V(17) && + RVi(table, B(NI_10MHzRefClock), B(TRIGGER_LINE(0))) == 0 && + RVi(table, B(NI_AI_ConvertClock), B(NI_PFI(0))) == 0 && + RVi(table, B(NI_AI_ConvertClock), B(NI_PFI(2))) == + V(NI_PFI_OUTPUT_AI_CONVERT), + "pci-6070e finds e-series route_values table\n"); + + olddevroutes = devroutes; + oldtable = table; + init_pci_6220(); + ni_assign_device_routes(ni_mseries, pci_6220, &private.routing_tables); + devroutes = private.routing_tables.valid_routes; + table = private.routing_tables.route_values; + + unittest(strncmp(devroutes->device, pci_6220, 10) == 0, + "find device pci-6220\n"); + unittest(oldtable != table, "pci-6220 find other route_values table\n"); + + unittest( + RVi(table, B(PXI_Star), B(NI_AI_SampleClock)) == V(20) && + RVi(table, B(NI_10MHzRefClock), B(TRIGGER_LINE(0))) == V(12) && + RVi(table, B(NI_AI_ConvertClock), B(NI_PFI(0))) == V(3) && + RVi(table, B(NI_AI_ConvertClock), B(NI_PFI(2))) == V(3), + "pci-6220 finds m-series route_values table\n"); +} + +void test_ni_sort_device_routes(void) +{ + /* We begin by sorting the device routes for use in later tests */ + ni_sort_device_routes(&DR); + /* now we test that sorting. */ + unittest(route_set_dests_in_order(&DR), + "all route_sets of fake data in order of sig. destination\n"); + unittest(route_set_sources_in_order(&DR), + "all route_set->src's of fake data in order of sig. source\n"); +} + +void test_ni_find_route_set(void) +{ + unittest(ni_find_route_set(bad_dest, &DR) == NULL, + "check for nonexistent route_set\n"); + unittest(ni_find_route_set(dest0, &DR) == &DR.routes[0], + "find first route_set\n"); + unittest(ni_find_route_set(desti, &DR) == &DR.routes[ith_dest_index], + "find ith route_set\n"); + unittest(ni_find_route_set(no_val_dest, &DR) == + &DR.routes[no_val_index], + "find no_val route_set in spite of missing values\n"); + unittest(ni_find_route_set(DR.routes[DR.n_route_sets - 1].dest, &DR) == + &DR.routes[DR.n_route_sets - 1], + "find last route_set\n"); +} + +void test_ni_route_set_has_source(void) +{ + unittest(!ni_route_set_has_source(&DR.routes[0], O(0)), + "check for bad source\n"); + unittest(ni_route_set_has_source(&DR.routes[0], O(1)), + "find first source\n"); + unittest(ni_route_set_has_source(&DR.routes[0], O(5)), + "find fifth source\n"); + unittest(ni_route_set_has_source(&DR.routes[0], O(9)), + "find last source\n"); +} + +void test_ni_route_to_register(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_route_to_register(O(0), O(0), T) < 0, + "check for bad route 0-->0\n"); + unittest(ni_route_to_register(O(1), O(0), T) == 1, + "validate first destination\n"); + unittest(ni_route_to_register(O(6), O(5), T) == 6, + "validate middle destination\n"); + unittest(ni_route_to_register(O(8), O(9), T) == 8, + "validate last destination\n"); + + /* choice of trigger line in the following is somewhat random */ + unittest(ni_route_to_register(rgout0_src0, TRIGGER_LINE(0), T) == 0, + "validate indirect route through rgout0 to TRIGGER_LINE(0)\n"); + unittest(ni_route_to_register(rgout0_src0, TRIGGER_LINE(1), T) == 0, + "validate indirect route through rgout0 to TRIGGER_LINE(1)\n"); + unittest(ni_route_to_register(rgout0_src1, TRIGGER_LINE(2), T) == 1, + "validate indirect route through rgout0 to TRIGGER_LINE(2)\n"); + unittest(ni_route_to_register(rgout0_src1, TRIGGER_LINE(3), T) == 1, + "validate indirect route through rgout0 to TRIGGER_LINE(3)\n"); + + unittest(ni_route_to_register(brd0_src0, TRIGGER_LINE(4), T) == + BIT(6), + "validate indirect route through brd0 to TRIGGER_LINE(4)\n"); + unittest(ni_route_to_register(brd0_src1, TRIGGER_LINE(4), T) == + BIT(6), + "validate indirect route through brd0 to TRIGGER_LINE(4)\n"); + unittest(ni_route_to_register(brd1_src0, TRIGGER_LINE(3), T) == + BIT(6), + "validate indirect route through brd1 to TRIGGER_LINE(3)\n"); + unittest(ni_route_to_register(brd1_src1, TRIGGER_LINE(3), T) == + BIT(6), + "validate indirect route through brd1 to TRIGGER_LINE(3)\n"); + unittest(ni_route_to_register(brd2_src0, TRIGGER_LINE(2), T) == + BIT(6), + "validate indirect route through brd2 to TRIGGER_LINE(2)\n"); + unittest(ni_route_to_register(brd2_src1, TRIGGER_LINE(2), T) == + BIT(6), + "validate indirect route through brd2 to TRIGGER_LINE(2)\n"); + unittest(ni_route_to_register(brd3_src0, TRIGGER_LINE(1), T) == + BIT(6), + "validate indirect route through brd3 to TRIGGER_LINE(1)\n"); + unittest(ni_route_to_register(brd3_src1, TRIGGER_LINE(1), T) == + BIT(6), + "validate indirect route through brd3 to TRIGGER_LINE(1)\n"); +} + +void test_ni_lookup_route_register(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_lookup_route_register(O(0), O(0), T) == -EINVAL, + "check for bad route 0-->0\n"); + unittest(ni_lookup_route_register(O(1), O(0), T) == 1, + "validate first destination\n"); + unittest(ni_lookup_route_register(O(6), O(5), T) == 6, + "validate middle destination\n"); + unittest(ni_lookup_route_register(O(8), O(9), T) == 8, + "validate last destination\n"); + unittest(ni_lookup_route_register(O(10), O(9), T) == -EINVAL, + "lookup invalid desination\n"); + + unittest(ni_lookup_route_register(rgout0_src0, TRIGGER_LINE(0), T) == + -EINVAL, + "rgout0_src0: no direct lookup of indirect route\n"); + unittest(ni_lookup_route_register(rgout0_src0, NI_RGOUT0, T) == 0, + "rgout0_src0: lookup indirect route register\n"); + unittest(ni_lookup_route_register(rgout0_src1, TRIGGER_LINE(2), T) == + -EINVAL, + "rgout0_src1: no direct lookup of indirect route\n"); + unittest(ni_lookup_route_register(rgout0_src1, NI_RGOUT0, T) == 1, + "rgout0_src1: lookup indirect route register\n"); + + unittest(ni_lookup_route_register(brd0_src0, TRIGGER_LINE(4), T) == + -EINVAL, + "brd0_src0: no direct lookup of indirect route\n"); + unittest(ni_lookup_route_register(brd0_src0, NI_RTSI_BRD(0), T) == 0, + "brd0_src0: lookup indirect route register\n"); + unittest(ni_lookup_route_register(brd0_src1, TRIGGER_LINE(4), T) == + -EINVAL, + "brd0_src1: no direct lookup of indirect route\n"); + unittest(ni_lookup_route_register(brd0_src1, NI_RTSI_BRD(0), T) == 1, + "brd0_src1: lookup indirect route register\n"); +} + +void test_route_is_valid(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(!route_is_valid(O(0), O(0), T), + "check for bad route 0-->0\n"); + unittest(route_is_valid(O(0), O(1), T), + "validate first destination\n"); + unittest(route_is_valid(O(5), O(6), T), + "validate middle destination\n"); + unittest(route_is_valid(O(8), O(9), T), + "validate last destination\n"); +} + +void test_ni_is_cmd_dest(void) +{ + init_pci_fake(); + unittest(ni_is_cmd_dest(NI_AI_SampleClock), + "check that AI/SampleClock is cmd destination\n"); + unittest(ni_is_cmd_dest(NI_AI_StartTrigger), + "check that AI/StartTrigger is cmd destination\n"); + unittest(ni_is_cmd_dest(NI_AI_ConvertClock), + "check that AI/ConvertClock is cmd destination\n"); + unittest(ni_is_cmd_dest(NI_AO_SampleClock), + "check that AO/SampleClock is cmd destination\n"); + unittest(ni_is_cmd_dest(NI_DO_SampleClock), + "check that DO/SampleClock is cmd destination\n"); + unittest(!ni_is_cmd_dest(NI_AO_SampleClockTimebase), + "check that AO/SampleClockTimebase _not_ cmd destination\n"); +} + +void test_channel_is_pfi(void) +{ + init_pci_fake(); + unittest(channel_is_pfi(NI_PFI(0)), "check First pfi channel\n"); + unittest(channel_is_pfi(NI_PFI(10)), "check 10th pfi channel\n"); + unittest(channel_is_pfi(NI_PFI(-1)), "check last pfi channel\n"); + unittest(!channel_is_pfi(NI_PFI(-1) + 1), + "check first non pfi channel\n"); +} + +void test_channel_is_rtsi(void) +{ + init_pci_fake(); + unittest(channel_is_rtsi(TRIGGER_LINE(0)), + "check First rtsi channel\n"); + unittest(channel_is_rtsi(TRIGGER_LINE(3)), + "check 3rd rtsi channel\n"); + unittest(channel_is_rtsi(TRIGGER_LINE(-1)), + "check last rtsi channel\n"); + unittest(!channel_is_rtsi(TRIGGER_LINE(-1) + 1), + "check first non rtsi channel\n"); +} + +void test_ni_count_valid_routes(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_count_valid_routes(T) == 57, "count all valid routes\n"); +} + +void test_ni_get_valid_routes(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + unsigned int pair_data[2]; + + init_pci_fake(); + unittest(ni_get_valid_routes(T, 0, NULL) == 57, + "count all valid routes through ni_get_valid_routes\n"); + + unittest(ni_get_valid_routes(T, 1, pair_data) == 1, + "copied first valid route from ni_get_valid_routes\n"); + unittest(pair_data[0] == O(1), + "source of first valid pair from ni_get_valid_routes\n"); + unittest(pair_data[1] == O(0), + "destination of first valid pair from ni_get_valid_routes\n"); +} + +void test_ni_find_route_source(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_find_route_source(4, O(4), T) == -EINVAL, + "check for bad source 4-->4\n"); + unittest(ni_find_route_source(0, O(1), T) == O(0), + "find first source\n"); + unittest(ni_find_route_source(4, O(6), T) == O(4), + "find middle source\n"); + unittest(ni_find_route_source(9, O(8), T) == O(9), + "find last source"); + unittest(ni_find_route_source(8, O(9), T) == O(8), + "find invalid source (without checking device routes)\n"); +} + +void test_route_register_is_valid(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(route_register_is_valid(4, O(4), T) == false, + "check for bad source 4-->4\n"); + unittest(route_register_is_valid(0, O(1), T) == true, + "find first source\n"); + unittest(route_register_is_valid(4, O(6), T) == true, + "find middle source\n"); + unittest(route_register_is_valid(9, O(8), T) == true, + "find last source"); +} + +void test_ni_check_trigger_arg(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_check_trigger_arg(0, O(0), T) == -EINVAL, + "check bad direct trigger arg for first reg->dest\n"); + unittest(ni_check_trigger_arg(0, O(1), T) == 0, + "check direct trigger arg for first reg->dest\n"); + unittest(ni_check_trigger_arg(4, O(6), T) == 0, + "check direct trigger arg for middle reg->dest\n"); + unittest(ni_check_trigger_arg(9, O(8), T) == 0, + "check direct trigger arg for last reg->dest\n"); + + unittest(ni_check_trigger_arg_roffs(-1, O(0), T, 1) == -EINVAL, + "check bad direct trigger arg for first reg->dest w/offs\n"); + unittest(ni_check_trigger_arg_roffs(0, O(1), T, 0) == 0, + "check direct trigger arg for first reg->dest w/offs\n"); + unittest(ni_check_trigger_arg_roffs(3, O(6), T, 1) == 0, + "check direct trigger arg for middle reg->dest w/offs\n"); + unittest(ni_check_trigger_arg_roffs(7, O(8), T, 2) == 0, + "check direct trigger arg for last reg->dest w/offs\n"); + + unittest(ni_check_trigger_arg(O(0), O(0), T) == -EINVAL, + "check bad trigger arg for first src->dest\n"); + unittest(ni_check_trigger_arg(O(0), O(1), T) == 0, + "check trigger arg for first src->dest\n"); + unittest(ni_check_trigger_arg(O(5), O(6), T) == 0, + "check trigger arg for middle src->dest\n"); + unittest(ni_check_trigger_arg(O(8), O(9), T) == 0, + "check trigger arg for last src->dest\n"); +} + +void test_ni_get_reg_value(void) +{ + const struct ni_route_tables *T = &private.routing_tables; + + init_pci_fake(); + unittest(ni_get_reg_value(0, O(0), T) == -1, + "check bad direct trigger arg for first reg->dest\n"); + unittest(ni_get_reg_value(0, O(1), T) == 0, + "check direct trigger arg for first reg->dest\n"); + unittest(ni_get_reg_value(4, O(6), T) == 4, + "check direct trigger arg for middle reg->dest\n"); + unittest(ni_get_reg_value(9, O(8), T) == 9, + "check direct trigger arg for last reg->dest\n"); + + unittest(ni_get_reg_value_roffs(-1, O(0), T, 1) == -1, + "check bad direct trigger arg for first reg->dest w/offs\n"); + unittest(ni_get_reg_value_roffs(0, O(1), T, 0) == 0, + "check direct trigger arg for first reg->dest w/offs\n"); + unittest(ni_get_reg_value_roffs(3, O(6), T, 1) == 4, + "check direct trigger arg for middle reg->dest w/offs\n"); + unittest(ni_get_reg_value_roffs(7, O(8), T, 2) == 9, + "check direct trigger arg for last reg->dest w/offs\n"); + + unittest(ni_get_reg_value(O(0), O(0), T) == -1, + "check bad trigger arg for first src->dest\n"); + unittest(ni_get_reg_value(O(0), O(1), T) == 0, + "check trigger arg for first src->dest\n"); + unittest(ni_get_reg_value(O(5), O(6), T) == 5, + "check trigger arg for middle src->dest\n"); + unittest(ni_get_reg_value(O(8), O(9), T) == 8, + "check trigger arg for last src->dest\n"); +} + +/* **** BEGIN simple module entry/exit functions **** */ +static int __init ni_routes_unittest(void) +{ + const unittest_fptr unit_tests[] = { + (unittest_fptr)test_ni_assign_device_routes, + (unittest_fptr)test_ni_sort_device_routes, + (unittest_fptr)test_ni_find_route_set, + (unittest_fptr)test_ni_route_set_has_source, + (unittest_fptr)test_ni_route_to_register, + (unittest_fptr)test_ni_lookup_route_register, + (unittest_fptr)test_route_is_valid, + (unittest_fptr)test_ni_is_cmd_dest, + (unittest_fptr)test_channel_is_pfi, + (unittest_fptr)test_channel_is_rtsi, + (unittest_fptr)test_ni_count_valid_routes, + (unittest_fptr)test_ni_get_valid_routes, + (unittest_fptr)test_ni_find_route_source, + (unittest_fptr)test_route_register_is_valid, + (unittest_fptr)test_ni_check_trigger_arg, + (unittest_fptr)test_ni_get_reg_value, + NULL, + }; + + exec_unittests("ni_routes", unit_tests); + return 0; +} + +static void __exit ni_routes_unittest_exit(void) { } + +module_init(ni_routes_unittest); +module_exit(ni_routes_unittest_exit); + +MODULE_AUTHOR("Comedi http://www.comedi.org"); +MODULE_DESCRIPTION("Comedi unit-tests for ni_routes module"); +MODULE_LICENSE("GPL"); +/* **** END simple module entry/exit functions **** */ diff --git a/drivers/staging/comedi/drivers/tests/unittest.h b/drivers/staging/comedi/drivers/tests/unittest.h new file mode 100644 index 000000000000..b8e622ea1de1 --- /dev/null +++ b/drivers/staging/comedi/drivers/tests/unittest.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* vim: set ts=8 sw=8 noet tw=80 nowrap: */ +/* + * comedi/drivers/tests/unittest.h + * Simple framework for unittests for comedi drivers. + * + * COMEDI - Linux Control and Measurement Device Interface + * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> + * based of parts of drivers/of/unittest.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _COMEDI_DRIVERS_TESTS_UNITTEST_H +#define _COMEDI_DRIVERS_TESTS_UNITTEST_H + +static struct unittest_results { + int passed; + int failed; +} unittest_results; + +typedef void *(*unittest_fptr)(void); + +#define unittest(result, fmt, ...) ({ \ + bool failed = !(result); \ + if (failed) { \ + ++unittest_results.failed; \ + pr_err("FAIL %s():%i " fmt, __func__, __LINE__, \ + ##__VA_ARGS__); \ + } else { \ + ++unittest_results.passed; \ + pr_debug("pass %s():%i " fmt, __func__, __LINE__, \ + ##__VA_ARGS__); \ + } \ + failed; \ +}) + +/** + * Execute an array of unit tests. + * @name: Name of set of unit tests--will be shown at INFO log level. + * @unit_tests: A null-terminated list of unit tests to execute. + */ +static inline void exec_unittests(const char *name, + const unittest_fptr *unit_tests) +{ + pr_info("begin comedi:\"%s\" unittests\n", name); + + for (; (*unit_tests) != NULL; ++unit_tests) + (*unit_tests)(); + + pr_info("end of comedi:\"%s\" unittests - %i passed, %i failed\n", name, + unittest_results.passed, unittest_results.failed); +} + +#endif /* _COMEDI_DRIVERS_TESTS_UNITTEST_H */ diff --git a/drivers/staging/dgnc/Kconfig b/drivers/staging/dgnc/Kconfig deleted file mode 100644 index 032c2a795238..000000000000 --- a/drivers/staging/dgnc/Kconfig +++ /dev/null @@ -1,6 +0,0 @@ -config DGNC - tristate "Digi Neo and Classic PCI Products" - default n - depends on TTY && PCI - ---help--- - Driver for the Digi International Neo and Classic PCI based product line. diff --git a/drivers/staging/dgnc/Makefile b/drivers/staging/dgnc/Makefile deleted file mode 100644 index 49633042fcc9..000000000000 --- a/drivers/staging/dgnc/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -obj-$(CONFIG_DGNC) += dgnc.o - -dgnc-objs := dgnc_cls.o dgnc_driver.o\ - dgnc_tty.o diff --git a/drivers/staging/dgnc/TODO b/drivers/staging/dgnc/TODO deleted file mode 100644 index d4cc65770513..000000000000 --- a/drivers/staging/dgnc/TODO +++ /dev/null @@ -1,6 +0,0 @@ -* remove unnecessary comments -* there is a lot of unnecessary code in the driver. It was - originally a standalone driver. Remove unneeded code. - -Please send patches to Greg Kroah-Hartman <greg@kroah.com> and -Cc: Lidza Louina <lidza.louina@gmail.com> diff --git a/drivers/staging/dgnc/dgnc_cls.c b/drivers/staging/dgnc/dgnc_cls.c deleted file mode 100644 index 7e6cbfe4e4ee..000000000000 --- a/drivers/staging/dgnc/dgnc_cls.c +++ /dev/null @@ -1,1135 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2003 Digi International (www.digi.com) - * Scott H Kilau <Scott_Kilau at digi dot com> - */ - -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/interrupt.h> -#include <linux/delay.h> -#include <linux/io.h> -#include <linux/serial.h> -#include <linux/serial_reg.h> -#include <linux/pci.h> - -#include "dgnc_driver.h" -#include "dgnc_cls.h" -#include "dgnc_tty.h" - -static inline void cls_set_cts_flow_control(struct channel_t *ch) -{ - unsigned char lcrb = readb(&ch->ch_cls_uart->lcr); - unsigned char ier = readb(&ch->ch_cls_uart->ier); - unsigned char isr_fcr = 0; - - /* - * The Enhanced Register Set may only be accessed when - * the Line Control Register is set to 0xBFh. - */ - writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); - - isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); - - /* Turn on CTS flow control, turn off IXON flow control */ - isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_CTSDSR); - isr_fcr &= ~(UART_EXAR654_EFR_IXON); - - writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); - - /* Write old LCR value back out, which turns enhanced access off */ - writeb(lcrb, &ch->ch_cls_uart->lcr); - - /* - * Enable interrupts for CTS flow, turn off interrupts for - * received XOFF chars - */ - ier |= (UART_EXAR654_IER_CTSDSR); - ier &= ~(UART_EXAR654_IER_XOFF); - writeb(ier, &ch->ch_cls_uart->ier); - - /* Set the usual FIFO values */ - writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); - - writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_56 | - UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), - &ch->ch_cls_uart->isr_fcr); - - ch->ch_t_tlevel = 16; -} - -static inline void cls_set_ixon_flow_control(struct channel_t *ch) -{ - unsigned char lcrb = readb(&ch->ch_cls_uart->lcr); - unsigned char ier = readb(&ch->ch_cls_uart->ier); - unsigned char isr_fcr = 0; - - /* - * The Enhanced Register Set may only be accessed when - * the Line Control Register is set to 0xBFh. - */ - writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); - - isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); - - /* Turn on IXON flow control, turn off CTS flow control */ - isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_IXON); - isr_fcr &= ~(UART_EXAR654_EFR_CTSDSR); - - writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); - - /* Now set our current start/stop chars while in enhanced mode */ - writeb(ch->ch_startc, &ch->ch_cls_uart->mcr); - writeb(0, &ch->ch_cls_uart->lsr); - writeb(ch->ch_stopc, &ch->ch_cls_uart->msr); - writeb(0, &ch->ch_cls_uart->spr); - - /* Write old LCR value back out, which turns enhanced access off */ - writeb(lcrb, &ch->ch_cls_uart->lcr); - - /* - * Disable interrupts for CTS flow, turn on interrupts for - * received XOFF chars - */ - ier &= ~(UART_EXAR654_IER_CTSDSR); - ier |= (UART_EXAR654_IER_XOFF); - writeb(ier, &ch->ch_cls_uart->ier); - - /* Set the usual FIFO values */ - writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); - - writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 | - UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), - &ch->ch_cls_uart->isr_fcr); -} - -static inline void cls_set_no_output_flow_control(struct channel_t *ch) -{ - unsigned char lcrb = readb(&ch->ch_cls_uart->lcr); - unsigned char ier = readb(&ch->ch_cls_uart->ier); - unsigned char isr_fcr = 0; - - /* - * The Enhanced Register Set may only be accessed when - * the Line Control Register is set to 0xBFh. - */ - writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); - - isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); - - /* Turn off IXON flow control, turn off CTS flow control */ - isr_fcr |= (UART_EXAR654_EFR_ECB); - isr_fcr &= ~(UART_EXAR654_EFR_CTSDSR | UART_EXAR654_EFR_IXON); - - writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); - - /* Write old LCR value back out, which turns enhanced access off */ - writeb(lcrb, &ch->ch_cls_uart->lcr); - - /* - * Disable interrupts for CTS flow, turn off interrupts for - * received XOFF chars - */ - ier &= ~(UART_EXAR654_IER_CTSDSR); - ier &= ~(UART_EXAR654_IER_XOFF); - writeb(ier, &ch->ch_cls_uart->ier); - - /* Set the usual FIFO values */ - writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); - - writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 | - UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), - &ch->ch_cls_uart->isr_fcr); - - ch->ch_r_watermark = 0; - ch->ch_t_tlevel = 16; - ch->ch_r_tlevel = 16; -} - -static inline void cls_set_rts_flow_control(struct channel_t *ch) -{ - unsigned char lcrb = readb(&ch->ch_cls_uart->lcr); - unsigned char ier = readb(&ch->ch_cls_uart->ier); - unsigned char isr_fcr = 0; - - /* - * The Enhanced Register Set may only be accessed when - * the Line Control Register is set to 0xBFh. - */ - writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); - - isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); - - /* Turn on RTS flow control, turn off IXOFF flow control */ - isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_RTSDTR); - isr_fcr &= ~(UART_EXAR654_EFR_IXOFF); - - writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); - - /* Write old LCR value back out, which turns enhanced access off */ - writeb(lcrb, &ch->ch_cls_uart->lcr); - - /* Enable interrupts for RTS flow */ - ier |= (UART_EXAR654_IER_RTSDTR); - writeb(ier, &ch->ch_cls_uart->ier); - - /* Set the usual FIFO values */ - writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); - - writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_56 | - UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), - &ch->ch_cls_uart->isr_fcr); - - ch->ch_r_watermark = 4; - ch->ch_r_tlevel = 8; -} - -static inline void cls_set_ixoff_flow_control(struct channel_t *ch) -{ - unsigned char lcrb = readb(&ch->ch_cls_uart->lcr); - unsigned char ier = readb(&ch->ch_cls_uart->ier); - unsigned char isr_fcr = 0; - - /* - * The Enhanced Register Set may only be accessed when - * the Line Control Register is set to 0xBFh. - */ - writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); - - isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); - - /* Turn on IXOFF flow control, turn off RTS flow control */ - isr_fcr |= (UART_EXAR654_EFR_ECB | UART_EXAR654_EFR_IXOFF); - isr_fcr &= ~(UART_EXAR654_EFR_RTSDTR); - - writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); - - /* Now set our current start/stop chars while in enhanced mode */ - writeb(ch->ch_startc, &ch->ch_cls_uart->mcr); - writeb(0, &ch->ch_cls_uart->lsr); - writeb(ch->ch_stopc, &ch->ch_cls_uart->msr); - writeb(0, &ch->ch_cls_uart->spr); - - /* Write old LCR value back out, which turns enhanced access off */ - writeb(lcrb, &ch->ch_cls_uart->lcr); - - /* Disable interrupts for RTS flow */ - ier &= ~(UART_EXAR654_IER_RTSDTR); - writeb(ier, &ch->ch_cls_uart->ier); - - /* Set the usual FIFO values */ - writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); - - writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 | - UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), - &ch->ch_cls_uart->isr_fcr); -} - -static inline void cls_set_no_input_flow_control(struct channel_t *ch) -{ - unsigned char lcrb = readb(&ch->ch_cls_uart->lcr); - unsigned char ier = readb(&ch->ch_cls_uart->ier); - unsigned char isr_fcr = 0; - - /* - * The Enhanced Register Set may only be accessed when - * the Line Control Register is set to 0xBFh. - */ - writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); - - isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); - - /* Turn off IXOFF flow control, turn off RTS flow control */ - isr_fcr |= (UART_EXAR654_EFR_ECB); - isr_fcr &= ~(UART_EXAR654_EFR_RTSDTR | UART_EXAR654_EFR_IXOFF); - - writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); - - /* Write old LCR value back out, which turns enhanced access off */ - writeb(lcrb, &ch->ch_cls_uart->lcr); - - /* Disable interrupts for RTS flow */ - ier &= ~(UART_EXAR654_IER_RTSDTR); - writeb(ier, &ch->ch_cls_uart->ier); - - /* Set the usual FIFO values */ - writeb((UART_FCR_ENABLE_FIFO), &ch->ch_cls_uart->isr_fcr); - - writeb((UART_FCR_ENABLE_FIFO | UART_16654_FCR_RXTRIGGER_16 | - UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR), - &ch->ch_cls_uart->isr_fcr); - - ch->ch_t_tlevel = 16; - ch->ch_r_tlevel = 16; -} - -/* - * Determines whether its time to shut off break condition. - * - * No locks are assumed to be held when calling this function. - * channel lock is held and released in this function. - */ -static inline void cls_clear_break(struct channel_t *ch, int force) -{ - unsigned long flags; - - if (!ch) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - if (!ch->ch_stop_sending_break) { - spin_unlock_irqrestore(&ch->ch_lock, flags); - return; - } - - /* Turn break off, and unset some variables */ - if (ch->ch_flags & CH_BREAK_SENDING) { - if (time_after(jiffies, ch->ch_stop_sending_break) || force) { - unsigned char temp = readb(&ch->ch_cls_uart->lcr); - - writeb((temp & ~UART_LCR_SBC), &ch->ch_cls_uart->lcr); - ch->ch_flags &= ~(CH_BREAK_SENDING); - ch->ch_stop_sending_break = 0; - } - } - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -static void cls_copy_data_from_uart_to_queue(struct channel_t *ch) -{ - int qleft = 0; - unsigned char linestatus = 0; - unsigned char error_mask = 0; - ushort head; - ushort tail; - unsigned long flags; - - if (!ch) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - head = ch->ch_r_head; - tail = ch->ch_r_tail; - - qleft = tail - head - 1; - if (qleft < 0) - qleft += RQUEUEMASK + 1; - - /* - * Create a mask to determine whether we should - * insert the character (if any) into our queue. - */ - if (ch->ch_c_iflag & IGNBRK) - error_mask |= UART_LSR_BI; - - while (1) { - linestatus = readb(&ch->ch_cls_uart->lsr); - - if (!(linestatus & (UART_LSR_DR))) - break; - - /* Discard character if we are ignoring the error mask. */ - if (linestatus & error_mask) { - linestatus = 0; - readb(&ch->ch_cls_uart->txrx); - continue; - } - - /* - * If our queue is full, we have no choice but to drop some - * data. The assumption is that HWFLOW or SWFLOW should have - * stopped things way way before we got to this point. - */ - while (qleft < 1) { - tail = (tail + 1) & RQUEUEMASK; - ch->ch_r_tail = tail; - ch->ch_err_overrun++; - qleft++; - } - - ch->ch_equeue[head] = linestatus & (UART_LSR_BI | UART_LSR_PE - | UART_LSR_FE); - ch->ch_rqueue[head] = readb(&ch->ch_cls_uart->txrx); - - qleft--; - - if (ch->ch_equeue[head] & UART_LSR_PE) - ch->ch_err_parity++; - if (ch->ch_equeue[head] & UART_LSR_BI) - ch->ch_err_break++; - if (ch->ch_equeue[head] & UART_LSR_FE) - ch->ch_err_frame++; - - head = (head + 1) & RQUEUEMASK; - ch->ch_rxcount++; - } - - ch->ch_r_head = head & RQUEUEMASK; - ch->ch_e_head = head & EQUEUEMASK; - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -/* Make the UART raise any of the output signals we want up */ -static void cls_assert_modem_signals(struct channel_t *ch) -{ - unsigned char out; - - if (!ch) - return; - - out = ch->ch_mostat; - - if (ch->ch_flags & CH_LOOPBACK) - out |= UART_MCR_LOOP; - - writeb(out, &ch->ch_cls_uart->mcr); - - /* Give time for the UART to actually drop the signals */ - usleep_range(10, 20); -} - -static void cls_copy_data_from_queue_to_uart(struct channel_t *ch) -{ - ushort head; - ushort tail; - int n; - int qlen; - uint len_written = 0; - unsigned long flags; - - if (!ch) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - if (ch->ch_w_tail == ch->ch_w_head) - goto exit_unlock; - - /* If port is "stopped", don't send any data to the UART */ - if ((ch->ch_flags & CH_FORCED_STOP) || - (ch->ch_flags & CH_BREAK_SENDING)) - goto exit_unlock; - - if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM))) - goto exit_unlock; - - n = 32; - - head = ch->ch_w_head & WQUEUEMASK; - tail = ch->ch_w_tail & WQUEUEMASK; - qlen = (head - tail) & WQUEUEMASK; - - n = min(n, qlen); - - while (n > 0) { - /* - * If RTS Toggle mode is on, turn on RTS now if not already set, - * and make sure we get an event when the data transfer has - * completed. - */ - if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) { - if (!(ch->ch_mostat & UART_MCR_RTS)) { - ch->ch_mostat |= (UART_MCR_RTS); - cls_assert_modem_signals(ch); - } - ch->ch_tun.un_flags |= (UN_EMPTY); - } - - /* - * If DTR Toggle mode is on, turn on DTR now if not already set, - * and make sure we get an event when the data transfer has - * completed. - */ - if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) { - if (!(ch->ch_mostat & UART_MCR_DTR)) { - ch->ch_mostat |= (UART_MCR_DTR); - cls_assert_modem_signals(ch); - } - ch->ch_tun.un_flags |= (UN_EMPTY); - } - writeb(ch->ch_wqueue[ch->ch_w_tail], &ch->ch_cls_uart->txrx); - ch->ch_w_tail++; - ch->ch_w_tail &= WQUEUEMASK; - ch->ch_txcount++; - len_written++; - n--; - } - - if (len_written > 0) - ch->ch_flags &= ~(CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); - -exit_unlock: - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -static void cls_parse_modem(struct channel_t *ch, unsigned char signals) -{ - unsigned char msignals = signals; - unsigned long flags; - - if (!ch) - return; - - /* - * Do altpin switching. Altpin switches DCD and DSR. - * This prolly breaks DSRPACE, so we should be more clever here. - */ - spin_lock_irqsave(&ch->ch_lock, flags); - if (ch->ch_digi.digi_flags & DIGI_ALTPIN) { - unsigned char mswap = signals; - - if (mswap & UART_MSR_DDCD) { - msignals &= ~UART_MSR_DDCD; - msignals |= UART_MSR_DDSR; - } - if (mswap & UART_MSR_DDSR) { - msignals &= ~UART_MSR_DDSR; - msignals |= UART_MSR_DDCD; - } - if (mswap & UART_MSR_DCD) { - msignals &= ~UART_MSR_DCD; - msignals |= UART_MSR_DSR; - } - if (mswap & UART_MSR_DSR) { - msignals &= ~UART_MSR_DSR; - msignals |= UART_MSR_DCD; - } - } - spin_unlock_irqrestore(&ch->ch_lock, flags); - - /* Scrub off lower bits. They signify delta's */ - signals &= 0xf0; - - spin_lock_irqsave(&ch->ch_lock, flags); - if (msignals & UART_MSR_DCD) - ch->ch_mistat |= UART_MSR_DCD; - else - ch->ch_mistat &= ~UART_MSR_DCD; - - if (msignals & UART_MSR_DSR) - ch->ch_mistat |= UART_MSR_DSR; - else - ch->ch_mistat &= ~UART_MSR_DSR; - - if (msignals & UART_MSR_RI) - ch->ch_mistat |= UART_MSR_RI; - else - ch->ch_mistat &= ~UART_MSR_RI; - - if (msignals & UART_MSR_CTS) - ch->ch_mistat |= UART_MSR_CTS; - else - ch->ch_mistat &= ~UART_MSR_CTS; - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -/* Parse the ISR register for the specific port */ -static inline void cls_parse_isr(struct dgnc_board *brd, uint port) -{ - struct channel_t *ch; - unsigned char isr = 0; - unsigned long flags; - - /* - * No need to verify board pointer, it was already - * verified in the interrupt routine. - */ - - if (port >= brd->nasync) - return; - - ch = brd->channels[port]; - - /* Here we try to figure out what caused the interrupt to happen */ - while (1) { - isr = readb(&ch->ch_cls_uart->isr_fcr); - - if (isr & UART_IIR_NO_INT) - break; - - /* Receive Interrupt pending */ - if (isr & (UART_IIR_RDI | UART_IIR_RDI_TIMEOUT)) { - cls_copy_data_from_uart_to_queue(ch); - dgnc_check_queue_flow_control(ch); - } - - /* Transmit Hold register empty pending */ - if (isr & UART_IIR_THRI) { - spin_lock_irqsave(&ch->ch_lock, flags); - ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); - spin_unlock_irqrestore(&ch->ch_lock, flags); - cls_copy_data_from_queue_to_uart(ch); - } - - cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr)); - } -} - -/* Channel lock MUST be held before calling this function! */ -static void cls_flush_uart_write(struct channel_t *ch) -{ - if (!ch) - return; - - writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_XMIT), - &ch->ch_cls_uart->isr_fcr); - - /* Must use *delay family functions in atomic context */ - udelay(10); - - ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); -} - -/* Channel lock MUST be held before calling this function! */ -static void cls_flush_uart_read(struct channel_t *ch) -{ - if (!ch) - return; - - /* - * For complete POSIX compatibility, we should be purging the - * read FIFO in the UART here. - * - * However, clearing the read FIFO (UART_FCR_CLEAR_RCVR) also - * incorrectly flushes write data as well as just basically trashing the - * FIFO. - * - * Presumably, this is a bug in this UART. - */ - - udelay(10); -} - -/* Send any/all changes to the line to the UART. */ -static void cls_param(struct tty_struct *tty) -{ - unsigned char lcr = 0; - unsigned char uart_lcr = 0; - unsigned char ier = 0; - unsigned char uart_ier = 0; - uint baud = 9600; - int quot = 0; - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - - if (!tty) - return; - - un = (struct un_t *)tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - bd = ch->ch_bd; - if (!bd) - return; - - /* If baud rate is zero, flush queues, and set mval to drop DTR. */ - if ((ch->ch_c_cflag & (CBAUD)) == 0) { - ch->ch_r_head = 0; - ch->ch_r_tail = 0; - ch->ch_e_head = 0; - ch->ch_e_tail = 0; - ch->ch_w_head = 0; - ch->ch_w_tail = 0; - - cls_flush_uart_write(ch); - cls_flush_uart_read(ch); - - /* The baudrate is B0 so all modem lines are to be dropped. */ - ch->ch_flags |= (CH_BAUD0); - ch->ch_mostat &= ~(UART_MCR_RTS | UART_MCR_DTR); - cls_assert_modem_signals(ch); - ch->ch_old_baud = 0; - return; - } else if (ch->ch_custom_speed) { - baud = ch->ch_custom_speed; - /* Handle transition from B0 */ - if (ch->ch_flags & CH_BAUD0) { - ch->ch_flags &= ~(CH_BAUD0); - - /* - * Bring back up RTS and DTR... - * Also handle RTS or DTR toggle if set. - */ - if (!(ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE)) - ch->ch_mostat |= (UART_MCR_RTS); - if (!(ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE)) - ch->ch_mostat |= (UART_MCR_DTR); - } - - } else { - int iindex = 0; - int jindex = 0; - - ulong bauds[4][16] = { - { /* slowbaud */ - 0, 50, 75, 110, - 134, 150, 200, 300, - 600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 }, - { /* slowbaud & CBAUDEX */ - 0, 57600, 115200, 230400, - 460800, 150, 200, 921600, - 600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 }, - { /* fastbaud */ - 0, 57600, 76800, 115200, - 131657, 153600, 230400, 460800, - 921600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 }, - { /* fastbaud & CBAUDEX */ - 0, 57600, 115200, 230400, - 460800, 150, 200, 921600, - 600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 } - }; - - /* - * Only use the TXPrint baud rate if the terminal - * unit is NOT open - */ - if (!(ch->ch_tun.un_flags & UN_ISOPEN) && - (un->un_type == DGNC_PRINT)) - baud = C_BAUD(ch->ch_pun.un_tty) & 0xff; - else - baud = C_BAUD(ch->ch_tun.un_tty) & 0xff; - - if (ch->ch_c_cflag & CBAUDEX) - iindex = 1; - - if (ch->ch_digi.digi_flags & DIGI_FAST) - iindex += 2; - - jindex = baud; - - if ((iindex >= 0) && (iindex < 4) && (jindex >= 0) && - (jindex < 16)) { - baud = bauds[iindex][jindex]; - } else { - baud = 0; - } - - if (baud == 0) - baud = 9600; - - /* Handle transition from B0 */ - if (ch->ch_flags & CH_BAUD0) { - ch->ch_flags &= ~(CH_BAUD0); - - /* - * Bring back up RTS and DTR... - * Also handle RTS or DTR toggle if set. - */ - if (!(ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE)) - ch->ch_mostat |= (UART_MCR_RTS); - if (!(ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE)) - ch->ch_mostat |= (UART_MCR_DTR); - } - } - - if (ch->ch_c_cflag & PARENB) - lcr |= UART_LCR_PARITY; - - if (!(ch->ch_c_cflag & PARODD)) - lcr |= UART_LCR_EPAR; - -#ifdef CMSPAR - if (ch->ch_c_cflag & CMSPAR) - lcr |= UART_LCR_SPAR; -#endif - - if (ch->ch_c_cflag & CSTOPB) - lcr |= UART_LCR_STOP; - - switch (ch->ch_c_cflag & CSIZE) { - case CS5: - lcr |= UART_LCR_WLEN5; - break; - case CS6: - lcr |= UART_LCR_WLEN6; - break; - case CS7: - lcr |= UART_LCR_WLEN7; - break; - case CS8: - default: - lcr |= UART_LCR_WLEN8; - break; - } - - uart_ier = readb(&ch->ch_cls_uart->ier); - ier = uart_ier; - uart_lcr = readb(&ch->ch_cls_uart->lcr); - - if (baud == 0) - baud = 9600; - - quot = ch->ch_bd->bd_dividend / baud; - - if (quot != 0 && ch->ch_old_baud != baud) { - ch->ch_old_baud = baud; - writeb(UART_LCR_DLAB, &ch->ch_cls_uart->lcr); - writeb((quot & 0xff), &ch->ch_cls_uart->txrx); - writeb((quot >> 8), &ch->ch_cls_uart->ier); - writeb(lcr, &ch->ch_cls_uart->lcr); - } - - if (uart_lcr != lcr) - writeb(lcr, &ch->ch_cls_uart->lcr); - - if (ch->ch_c_cflag & CREAD) - ier |= (UART_IER_RDI | UART_IER_RLSI); - else - ier &= ~(UART_IER_RDI | UART_IER_RLSI); - - /* - * Have the UART interrupt on modem signal changes ONLY when - * we are in hardware flow control mode, or CLOCAL/FORCEDCD is not set. - */ - if ((ch->ch_digi.digi_flags & CTSPACE) || - (ch->ch_digi.digi_flags & RTSPACE) || - (ch->ch_c_cflag & CRTSCTS) || - !(ch->ch_digi.digi_flags & DIGI_FORCEDCD) || - !(ch->ch_c_cflag & CLOCAL)) - ier |= UART_IER_MSI; - else - ier &= ~UART_IER_MSI; - - ier |= UART_IER_THRI; - - if (ier != uart_ier) - writeb(ier, &ch->ch_cls_uart->ier); - - if (ch->ch_digi.digi_flags & CTSPACE || ch->ch_c_cflag & CRTSCTS) { - cls_set_cts_flow_control(ch); - } else if (ch->ch_c_iflag & IXON) { - if ((ch->ch_startc == _POSIX_VDISABLE) || - (ch->ch_stopc == _POSIX_VDISABLE)) - cls_set_no_output_flow_control(ch); - else - cls_set_ixon_flow_control(ch); - } else { - cls_set_no_output_flow_control(ch); - } - - if (ch->ch_digi.digi_flags & RTSPACE || ch->ch_c_cflag & CRTSCTS) { - cls_set_rts_flow_control(ch); - } else if (ch->ch_c_iflag & IXOFF) { - if ((ch->ch_startc == _POSIX_VDISABLE) || - (ch->ch_stopc == _POSIX_VDISABLE)) - cls_set_no_input_flow_control(ch); - else - cls_set_ixoff_flow_control(ch); - } else { - cls_set_no_input_flow_control(ch); - } - - cls_assert_modem_signals(ch); - - cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr)); -} - -/* Board poller function. */ -static void cls_tasklet(unsigned long data) -{ - struct dgnc_board *bd = (struct dgnc_board *)data; - struct channel_t *ch; - unsigned long flags; - int i; - int state = 0; - int ports = 0; - - if (!bd) - return; - - spin_lock_irqsave(&bd->bd_lock, flags); - state = bd->state; - ports = bd->nasync; - spin_unlock_irqrestore(&bd->bd_lock, flags); - - /* - * Do NOT allow the interrupt routine to read the intr registers - * Until we release this lock. - */ - spin_lock_irqsave(&bd->bd_intr_lock, flags); - - if ((state == BOARD_READY) && (ports > 0)) { - for (i = 0; i < ports; i++) { - ch = bd->channels[i]; - - /* - * NOTE: Remember you CANNOT hold any channel - * locks when calling input. - * During input processing, its possible we - * will call ld, which might do callbacks back - * into us. - */ - dgnc_input(ch); - - /* - * Channel lock is grabbed and then released - * inside this routine. - */ - cls_copy_data_from_queue_to_uart(ch); - dgnc_wakeup_writes(ch); - - dgnc_carrier(ch); - - /* - * The timing check of turning off the break is done - * inside clear_break() - */ - if (ch->ch_stop_sending_break) - cls_clear_break(ch, 0); - } - } - - spin_unlock_irqrestore(&bd->bd_intr_lock, flags); -} - -/* Classic specific interrupt handler. */ -static irqreturn_t cls_intr(int irq, void *voidbrd) -{ - struct dgnc_board *brd = voidbrd; - uint i = 0; - unsigned char poll_reg; - unsigned long flags; - - if (!brd) - return IRQ_NONE; - - spin_lock_irqsave(&brd->bd_intr_lock, flags); - - poll_reg = readb(brd->re_map_membase + UART_CLASSIC_POLL_ADDR_OFFSET); - if (!poll_reg) { - spin_unlock_irqrestore(&brd->bd_intr_lock, flags); - return IRQ_NONE; - } - - for (i = 0; i < brd->nasync; i++) - cls_parse_isr(brd, i); - - tasklet_schedule(&brd->helper_tasklet); - - spin_unlock_irqrestore(&brd->bd_intr_lock, flags); - - return IRQ_HANDLED; -} - -static void cls_disable_receiver(struct channel_t *ch) -{ - unsigned char tmp = readb(&ch->ch_cls_uart->ier); - - tmp &= ~(UART_IER_RDI); - writeb(tmp, &ch->ch_cls_uart->ier); -} - -static void cls_enable_receiver(struct channel_t *ch) -{ - unsigned char tmp = readb(&ch->ch_cls_uart->ier); - - tmp |= (UART_IER_RDI); - writeb(tmp, &ch->ch_cls_uart->ier); -} - -/* - * This function basically goes to sleep for seconds, or until - * it gets signalled that the port has fully drained. - */ -static int cls_drain(struct tty_struct *tty, uint seconds) -{ - unsigned long flags; - struct channel_t *ch; - struct un_t *un; - - if (!tty) - return -ENXIO; - - un = (struct un_t *)tty->driver_data; - if (!un) - return -ENXIO; - - ch = un->un_ch; - if (!ch) - return -ENXIO; - - spin_lock_irqsave(&ch->ch_lock, flags); - un->un_flags |= UN_EMPTY; - spin_unlock_irqrestore(&ch->ch_lock, flags); - - /* NOTE: Do something with time passed in. */ - - /* If ret is non-zero, user ctrl-c'ed us */ - - return wait_event_interruptible(un->un_flags_wait, - ((un->un_flags & UN_EMPTY) == 0)); -} - -static void cls_send_start_character(struct channel_t *ch) -{ - if (!ch) - return; - - if (ch->ch_startc != _POSIX_VDISABLE) { - ch->ch_xon_sends++; - writeb(ch->ch_startc, &ch->ch_cls_uart->txrx); - } -} - -static void cls_send_stop_character(struct channel_t *ch) -{ - if (!ch) - return; - - if (ch->ch_stopc != _POSIX_VDISABLE) { - ch->ch_xoff_sends++; - writeb(ch->ch_stopc, &ch->ch_cls_uart->txrx); - } -} - -static void cls_uart_init(struct channel_t *ch) -{ - unsigned char lcrb = readb(&ch->ch_cls_uart->lcr); - unsigned char isr_fcr = 0; - - writeb(0, &ch->ch_cls_uart->ier); - - /* - * The Enhanced Register Set may only be accessed when - * the Line Control Register is set to 0xBFh. - */ - writeb(UART_EXAR654_ENHANCED_REGISTER_SET, &ch->ch_cls_uart->lcr); - - isr_fcr = readb(&ch->ch_cls_uart->isr_fcr); - - /* Turn on Enhanced/Extended controls */ - isr_fcr |= (UART_EXAR654_EFR_ECB); - - writeb(isr_fcr, &ch->ch_cls_uart->isr_fcr); - - /* Write old LCR value back out, which turns enhanced access off */ - writeb(lcrb, &ch->ch_cls_uart->lcr); - - /* Clear out UART and FIFO */ - readb(&ch->ch_cls_uart->txrx); - - writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, - &ch->ch_cls_uart->isr_fcr); - usleep_range(10, 20); - - ch->ch_flags |= (CH_FIFO_ENABLED | CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); - - readb(&ch->ch_cls_uart->lsr); - readb(&ch->ch_cls_uart->msr); -} - -static void cls_uart_off(struct channel_t *ch) -{ - writeb(0, &ch->ch_cls_uart->ier); -} - -/* - * The channel lock MUST be held by the calling function. - * Returns 0 is nothing left in the FIFO, returns 1 otherwise. - */ -static uint cls_get_uart_bytes_left(struct channel_t *ch) -{ - unsigned char left = 0; - unsigned char lsr = 0; - - if (!ch) - return 0; - - lsr = readb(&ch->ch_cls_uart->lsr); - - /* Determine whether the Transmitter is empty or not */ - if (!(lsr & UART_LSR_TEMT)) { - if (ch->ch_flags & CH_TX_FIFO_EMPTY) - tasklet_schedule(&ch->ch_bd->helper_tasklet); - left = 1; - } else { - ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); - left = 0; - } - - return left; -} - -/* - * Starts sending a break thru the UART. - * The channel lock MUST be held by the calling function. - */ -static void cls_send_break(struct channel_t *ch, int msecs) -{ - if (!ch) - return; - - /* If we receive a time of 0, this means turn off the break. */ - if (msecs == 0) { - if (ch->ch_flags & CH_BREAK_SENDING) { - unsigned char temp = readb(&ch->ch_cls_uart->lcr); - - writeb((temp & ~UART_LCR_SBC), &ch->ch_cls_uart->lcr); - ch->ch_flags &= ~(CH_BREAK_SENDING); - ch->ch_stop_sending_break = 0; - } - return; - } - - /* - * Set the time we should stop sending the break. - * If we are already sending a break, toss away the existing - * time to stop, and use this new value instead. - */ - ch->ch_stop_sending_break = jiffies + dgnc_jiffies_from_ms(msecs); - - /* Tell the UART to start sending the break */ - if (!(ch->ch_flags & CH_BREAK_SENDING)) { - unsigned char temp = readb(&ch->ch_cls_uart->lcr); - - writeb((temp | UART_LCR_SBC), &ch->ch_cls_uart->lcr); - ch->ch_flags |= (CH_BREAK_SENDING); - } -} - -/* - * Sends a specific character as soon as possible to the UART, - * jumping over any bytes that might be in the write queue. - * - * The channel lock MUST be held by the calling function. - */ -static void cls_send_immediate_char(struct channel_t *ch, unsigned char c) -{ - if (!ch) - return; - - writeb(c, &ch->ch_cls_uart->txrx); -} - -struct board_ops dgnc_cls_ops = { - .tasklet = cls_tasklet, - .intr = cls_intr, - .uart_init = cls_uart_init, - .uart_off = cls_uart_off, - .drain = cls_drain, - .param = cls_param, - .assert_modem_signals = cls_assert_modem_signals, - .flush_uart_write = cls_flush_uart_write, - .flush_uart_read = cls_flush_uart_read, - .disable_receiver = cls_disable_receiver, - .enable_receiver = cls_enable_receiver, - .send_break = cls_send_break, - .send_start_character = cls_send_start_character, - .send_stop_character = cls_send_stop_character, - .copy_data_from_queue_to_uart = cls_copy_data_from_queue_to_uart, - .get_uart_bytes_left = cls_get_uart_bytes_left, - .send_immediate_char = cls_send_immediate_char -}; diff --git a/drivers/staging/dgnc/dgnc_cls.h b/drivers/staging/dgnc/dgnc_cls.h deleted file mode 100644 index d31508542261..000000000000 --- a/drivers/staging/dgnc/dgnc_cls.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2003 Digi International (www.digi.com) - * Scott H Kilau <Scott_Kilau at digi dot com> - */ - -#ifndef _DGNC_CLS_H -#define _DGNC_CLS_H - -/** - * struct cls_uart_struct - Per channel/port Classic UART. - * - * key - W = read write - * - R = read only - * - U = unused - * - * @txrx: (WR) Holding Register. - * @ier: (WR) Interrupt Enable Register. - * @isr_fcr: (WR) Interrupt Status Register/Fifo Control Register. - * @lcr: (WR) Line Control Register. - * @mcr: (WR) Modem Control Register. - * @lsr: (WR) Line Status Register. - * @msr: (WR) Modem Status Register. - * @spr: (WR) Scratch Pad Register. - */ -struct cls_uart_struct { - u8 txrx; - u8 ier; - u8 isr_fcr; - u8 lcr; - u8 mcr; - u8 lsr; - u8 msr; - u8 spr; -}; - -/* Where to read the interrupt register (8bits) */ -#define UART_CLASSIC_POLL_ADDR_OFFSET 0x40 - -#define UART_EXAR654_ENHANCED_REGISTER_SET 0xBF - -#define UART_16654_FCR_TXTRIGGER_16 0x10 -#define UART_16654_FCR_RXTRIGGER_16 0x40 -#define UART_16654_FCR_RXTRIGGER_56 0x80 - -/* Received CTS/RTS change of state */ -#define UART_IIR_CTSRTS 0x20 - -/* Receiver data TIMEOUT */ -#define UART_IIR_RDI_TIMEOUT 0x0C - -/* - * These are the EXTENDED definitions for the Exar 654's Interrupt - * Enable Register. - */ -#define UART_EXAR654_EFR_ECB 0x10 /* Enhanced control bit */ -#define UART_EXAR654_EFR_IXON 0x2 /* Receiver compares Xon1/Xoff1 */ -#define UART_EXAR654_EFR_IXOFF 0x8 /* Transmit Xon1/Xoff1 */ -#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */ -#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow Control Enable */ -#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */ -#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */ -#define UART_EXAR654_IER_CTSDSR 0x80 /* Input Interrupt Enable */ - -extern struct board_ops dgnc_cls_ops; - -#endif /* _DGNC_CLS_H */ diff --git a/drivers/staging/dgnc/dgnc_driver.c b/drivers/staging/dgnc/dgnc_driver.c deleted file mode 100644 index 5d8c2d995dcc..000000000000 --- a/drivers/staging/dgnc/dgnc_driver.c +++ /dev/null @@ -1,404 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2003 Digi International (www.digi.com) - * Scott H Kilau <Scott_Kilau at digi dot com> - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/pci.h> -#include <linux/slab.h> -#include <linux/sched.h> -#include "dgnc_driver.h" -#include "dgnc_tty.h" -#include "dgnc_cls.h" - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Digi International, http://www.digi.com"); -MODULE_DESCRIPTION("Driver for the Digi International Neo and Classic PCI based product line"); -MODULE_SUPPORTED_DEVICE("dgnc"); - -static unsigned int dgnc_num_boards; -struct dgnc_board *dgnc_board[MAXBOARDS]; -static DEFINE_SPINLOCK(dgnc_poll_lock); /* Poll scheduling lock */ - -static int dgnc_poll_tick = 20; /* Poll interval - 20 ms */ -static ulong dgnc_poll_time; /* Time of next poll */ -static uint dgnc_poll_stop; /* Used to tell poller to stop */ -static struct timer_list dgnc_poll_timer; - -#define DIGI_VID 0x114F -#define PCI_DEVICE_CLASSIC_4_DID 0x0028 -#define PCI_DEVICE_CLASSIC_8_DID 0x0029 -#define PCI_DEVICE_CLASSIC_4_422_DID 0x00D0 -#define PCI_DEVICE_CLASSIC_8_422_DID 0x00D1 - -#define PCI_DEVICE_CLASSIC_4_PCI_NAME "ClassicBoard 4 PCI" -#define PCI_DEVICE_CLASSIC_8_PCI_NAME "ClassicBoard 8 PCI" -#define PCI_DEVICE_CLASSIC_4_422_PCI_NAME "ClassicBoard 4 422 PCI" -#define PCI_DEVICE_CLASSIC_8_422_PCI_NAME "ClassicBoard 8 422 PCI" - -static const struct pci_device_id dgnc_pci_tbl[] = { - {PCI_DEVICE(DIGI_VID, PCI_DEVICE_CLASSIC_4_DID), .driver_data = 0}, - {PCI_DEVICE(DIGI_VID, PCI_DEVICE_CLASSIC_4_422_DID), .driver_data = 1}, - {PCI_DEVICE(DIGI_VID, PCI_DEVICE_CLASSIC_8_DID), .driver_data = 2}, - {PCI_DEVICE(DIGI_VID, PCI_DEVICE_CLASSIC_8_422_DID), .driver_data = 3}, - {0,} -}; -MODULE_DEVICE_TABLE(pci, dgnc_pci_tbl); - -struct board_id { - unsigned char *name; - uint maxports; - unsigned int is_pci_express; -}; - -static const struct board_id dgnc_ids[] = { - { PCI_DEVICE_CLASSIC_4_PCI_NAME, 4, 0 }, - { PCI_DEVICE_CLASSIC_4_422_PCI_NAME, 4, 0 }, - { PCI_DEVICE_CLASSIC_8_PCI_NAME, 8, 0 }, - { PCI_DEVICE_CLASSIC_8_422_PCI_NAME, 8, 0 }, - { NULL, 0, 0 } -}; - -/* Remap PCI memory. */ -static int dgnc_do_remap(struct dgnc_board *brd) -{ - brd->re_map_membase = ioremap(brd->membase, 0x1000); - if (!brd->re_map_membase) - return -ENOMEM; - - return 0; -} - -/* A board has been found, initialize it. */ -static struct dgnc_board *dgnc_found_board(struct pci_dev *pdev, int id) -{ - struct dgnc_board *brd; - unsigned int pci_irq; - int rc = 0; - - brd = kzalloc(sizeof(*brd), GFP_KERNEL); - if (!brd) - return ERR_PTR(-ENOMEM); - - /* store the info for the board we've found */ - brd->boardnum = dgnc_num_boards; - brd->device = dgnc_pci_tbl[id].device; - brd->pdev = pdev; - brd->name = dgnc_ids[id].name; - brd->maxports = dgnc_ids[id].maxports; - init_waitqueue_head(&brd->state_wait); - - spin_lock_init(&brd->bd_lock); - spin_lock_init(&brd->bd_intr_lock); - - brd->state = BOARD_FOUND; - - pci_irq = pdev->irq; - brd->irq = pci_irq; - - switch (brd->device) { - case PCI_DEVICE_CLASSIC_4_DID: - case PCI_DEVICE_CLASSIC_8_DID: - case PCI_DEVICE_CLASSIC_4_422_DID: - case PCI_DEVICE_CLASSIC_8_422_DID: - /* - * For PCI ClassicBoards - * PCI Local Address (i.e. "resource" number) space - * 0 PLX Memory Mapped Config - * 1 PLX I/O Mapped Config - * 2 I/O Mapped UARTs and Status - * 3 Memory Mapped VPD - * 4 Memory Mapped UARTs and Status - */ - - brd->membase = pci_resource_start(pdev, 4); - - if (!brd->membase) { - dev_err(&brd->pdev->dev, - "Card has no PCI IO resources, failing.\n"); - rc = -ENODEV; - goto failed; - } - - brd->membase_end = pci_resource_end(pdev, 4); - - if (brd->membase & 1) - brd->membase &= ~3; - else - brd->membase &= ~15; - - brd->iobase = pci_resource_start(pdev, 1); - brd->iobase_end = pci_resource_end(pdev, 1); - brd->iobase = ((unsigned int)(brd->iobase)) & 0xFFFE; - - brd->bd_ops = &dgnc_cls_ops; - - brd->bd_uart_offset = 0x8; - brd->bd_dividend = 921600; - - rc = dgnc_do_remap(brd); - if (rc < 0) - goto failed; - - /* - * Enable Local Interrupt 1 (0x1), - * Local Interrupt 1 Polarity Active high (0x2), - * Enable PCI interrupt (0x40) - */ - outb(0x43, brd->iobase + 0x4c); - - break; - - default: - dev_err(&brd->pdev->dev, - "Didn't find any compatible Neo/Classic PCI boards.\n"); - rc = -ENXIO; - goto failed; - } - - tasklet_init(&brd->helper_tasklet, - brd->bd_ops->tasklet, - (unsigned long)brd); - - wake_up_interruptible(&brd->state_wait); - - return brd; - -failed: - kfree(brd); - - return ERR_PTR(rc); -} - -static int dgnc_request_irq(struct dgnc_board *brd) -{ - if (brd->irq) { - int rc = request_irq(brd->irq, brd->bd_ops->intr, - IRQF_SHARED, "DGNC", brd); - if (rc) { - dev_err(&brd->pdev->dev, - "Failed to hook IRQ %d\n", brd->irq); - brd->state = BOARD_FAILED; - return -ENODEV; - } - } - return 0; -} - -static void dgnc_free_irq(struct dgnc_board *brd) -{ - if (brd->irq) - free_irq(brd->irq, brd); -} - - /* - * As each timer expires, it determines (a) whether the "transmit" - * waiter needs to be woken up, and (b) whether the poller needs to - * be rescheduled. - */ -static void dgnc_poll_handler(struct timer_list *unused) -{ - struct dgnc_board *brd; - unsigned long flags; - int i; - unsigned long new_time; - - for (i = 0; i < dgnc_num_boards; i++) { - brd = dgnc_board[i]; - - spin_lock_irqsave(&brd->bd_lock, flags); - - if (brd->state == BOARD_FAILED) { - spin_unlock_irqrestore(&brd->bd_lock, flags); - continue; - } - - tasklet_schedule(&brd->helper_tasklet); - - spin_unlock_irqrestore(&brd->bd_lock, flags); - } - - /* Schedule ourself back at the nominal wakeup interval. */ - - spin_lock_irqsave(&dgnc_poll_lock, flags); - dgnc_poll_time += dgnc_jiffies_from_ms(dgnc_poll_tick); - - new_time = dgnc_poll_time - jiffies; - - if ((ulong)new_time >= 2 * dgnc_poll_tick) - dgnc_poll_time = jiffies + dgnc_jiffies_from_ms(dgnc_poll_tick); - - timer_setup(&dgnc_poll_timer, dgnc_poll_handler, 0); - dgnc_poll_timer.expires = dgnc_poll_time; - spin_unlock_irqrestore(&dgnc_poll_lock, flags); - - if (!dgnc_poll_stop) - add_timer(&dgnc_poll_timer); -} - -/* returns count (>= 0), or negative on error */ -static int dgnc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) -{ - int rc; - struct dgnc_board *brd; - - rc = pci_enable_device(pdev); - if (rc) - return -EIO; - - brd = dgnc_found_board(pdev, ent->driver_data); - if (IS_ERR(brd)) - return PTR_ERR(brd); - - rc = dgnc_tty_register(brd); - if (rc < 0) { - pr_err(DRVSTR ": Can't register tty devices (%d)\n", rc); - goto failed; - } - - rc = dgnc_request_irq(brd); - if (rc < 0) { - pr_err(DRVSTR ": Can't finalize board init (%d)\n", rc); - goto unregister_tty; - } - - rc = dgnc_tty_init(brd); - if (rc < 0) { - pr_err(DRVSTR ": Can't init tty devices (%d)\n", rc); - goto free_irq; - } - - brd->state = BOARD_READY; - - dgnc_board[dgnc_num_boards++] = brd; - - return 0; - -free_irq: - dgnc_free_irq(brd); -unregister_tty: - dgnc_tty_unregister(brd); -failed: - kfree(brd); - - return rc; -} - -static struct pci_driver dgnc_driver = { - .name = "dgnc", - .probe = dgnc_init_one, - .id_table = dgnc_pci_tbl, -}; - -static int dgnc_start(void) -{ - unsigned long flags; - - /* Start the poller */ - spin_lock_irqsave(&dgnc_poll_lock, flags); - timer_setup(&dgnc_poll_timer, dgnc_poll_handler, 0); - dgnc_poll_time = jiffies + dgnc_jiffies_from_ms(dgnc_poll_tick); - dgnc_poll_timer.expires = dgnc_poll_time; - spin_unlock_irqrestore(&dgnc_poll_lock, flags); - - add_timer(&dgnc_poll_timer); - - return 0; -} - -/* Free all the memory associated with a board */ -static void dgnc_cleanup_board(struct dgnc_board *brd) -{ - int i = 0; - - if (!brd) - return; - - switch (brd->device) { - case PCI_DEVICE_CLASSIC_4_DID: - case PCI_DEVICE_CLASSIC_8_DID: - case PCI_DEVICE_CLASSIC_4_422_DID: - case PCI_DEVICE_CLASSIC_8_422_DID: - - /* Tell card not to interrupt anymore. */ - outb(0, brd->iobase + 0x4c); - break; - - default: - break; - } - - if (brd->irq) - free_irq(brd->irq, brd); - - tasklet_kill(&brd->helper_tasklet); - - if (brd->re_map_membase) { - iounmap(brd->re_map_membase); - brd->re_map_membase = NULL; - } - - for (i = 0; i < MAXPORTS ; i++) { - if (brd->channels[i]) { - kfree(brd->channels[i]->ch_rqueue); - kfree(brd->channels[i]->ch_equeue); - kfree(brd->channels[i]->ch_wqueue); - kfree(brd->channels[i]); - brd->channels[i] = NULL; - } - } - - dgnc_board[brd->boardnum] = NULL; - - kfree(brd); -} - -/* Driver load/unload functions */ - -static void cleanup(void) -{ - int i; - unsigned long flags; - - spin_lock_irqsave(&dgnc_poll_lock, flags); - dgnc_poll_stop = 1; - spin_unlock_irqrestore(&dgnc_poll_lock, flags); - - /* Turn off poller right away. */ - del_timer_sync(&dgnc_poll_timer); - - for (i = 0; i < dgnc_num_boards; ++i) { - dgnc_cleanup_tty(dgnc_board[i]); - dgnc_cleanup_board(dgnc_board[i]); - } -} - -static void __exit dgnc_cleanup_module(void) -{ - cleanup(); - pci_unregister_driver(&dgnc_driver); -} - -static int __init dgnc_init_module(void) -{ - int rc; - - /* Initialize global stuff */ - rc = dgnc_start(); - if (rc < 0) - return rc; - - /* Find and configure all the cards */ - rc = pci_register_driver(&dgnc_driver); - if (rc) { - pr_warn("WARNING: dgnc driver load failed. No Digi Neo or Classic boards found.\n"); - cleanup(); - return rc; - } - return 0; -} - -module_init(dgnc_init_module); -module_exit(dgnc_cleanup_module); diff --git a/drivers/staging/dgnc/dgnc_driver.h b/drivers/staging/dgnc/dgnc_driver.h deleted file mode 100644 index b4d9f714c60a..000000000000 --- a/drivers/staging/dgnc/dgnc_driver.h +++ /dev/null @@ -1,345 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2003 Digi International (www.digi.com) - * Scott H Kilau <Scott_Kilau at digi dot com> - */ - -#ifndef _DGNC_DRIVER_H -#define _DGNC_DRIVER_H - -#include <linux/types.h> -#include <linux/tty.h> -#include <linux/interrupt.h> - -#include "digi.h" /* Digi specific ioctl header */ - -/* Driver identification and error statements */ -#define PROCSTR "dgnc" /* /proc entries */ -#define DEVSTR "/dev/dg/dgnc" /* /dev entries */ -#define DRVSTR "dgnc" /* Driver name string */ -#define DG_PART "40002369_F" /* RPM part number */ - -#define TRC_TO_CONSOLE 1 - -/* Number of boards we support at once. */ -#define MAXBOARDS 20 -#define MAXPORTS 8 -#define MAXTTYNAMELEN 200 - -/* Serial port types */ -#define DGNC_SERIAL 0 -#define DGNC_PRINT 1 - -#define SERIAL_TYPE_NORMAL 1 - -#define PORT_NUM(dev) ((dev) & 0x7f) -#define IS_PRINT(dev) (((dev) & 0xff) >= 0x80) - -/* MAX number of stop characters sent when our read queue is getting full */ -#define MAX_STOPS_SENT 5 - -/* 4 extra for alignment play space */ -#define WRITEBUFLEN ((4096) + 4) - -#define dgnc_jiffies_from_ms(a) (((a) * HZ) / 1000) - -#ifndef _POSIX_VDISABLE -#define _POSIX_VDISABLE '\0' -#endif - -/* All the possible states the driver can be while being loaded. */ -enum { - DRIVER_INITIALIZED = 0, - DRIVER_READY -}; - -/* All the possible states the board can be while booting up. */ -enum { - BOARD_FAILED = 0, - BOARD_FOUND, - BOARD_READY -}; - -struct dgnc_board; -struct channel_t; - -/** - * struct board_ops - Per board operations. - */ -struct board_ops { - void (*tasklet)(unsigned long data); - irqreturn_t (*intr)(int irq, void *voidbrd); - void (*uart_init)(struct channel_t *ch); - void (*uart_off)(struct channel_t *ch); - int (*drain)(struct tty_struct *tty, uint seconds); - void (*param)(struct tty_struct *tty); - void (*assert_modem_signals)(struct channel_t *ch); - void (*flush_uart_write)(struct channel_t *ch); - void (*flush_uart_read)(struct channel_t *ch); - void (*disable_receiver)(struct channel_t *ch); - void (*enable_receiver)(struct channel_t *ch); - void (*send_break)(struct channel_t *ch, int msec); - void (*send_start_character)(struct channel_t *ch); - void (*send_stop_character)(struct channel_t *ch); - void (*copy_data_from_queue_to_uart)(struct channel_t *ch); - uint (*get_uart_bytes_left)(struct channel_t *ch); - void (*send_immediate_char)(struct channel_t *ch, unsigned char c); -}; - -/** - * struct dgnc_board - Per board information. - * @boardnum: Board number (0 - 32). - * - * @name: Product name. - * @pdev: Pointer to the pci_dev structure. - * @device: PCI device ID. - * @maxports: Maximum ports this board can handle. - * @bd_lock: Used to protect board. - * @bd_intr_lock: Protect poller tasklet and interrupt routine from each other. - * @state: State of the card. - * @state_wait: Queue to sleep on for state change. - * @helper_tasklet: Poll helper tasklet. - * @nasync: Number of ports on card. - * @irq: Interrupt request number. - * @membase: Start of base memory of the card. - * @membase_end: End of base memory of the card. - * @iobase: Start of IO base of the card. - * @iobase_end: End of IO base of the card. - * @bd_uart_offset: Space between each UART. - * @channels: array of pointers to our channels. - * @serial_driver: Pointer to the serial driver. - * @serial_name: Serial driver name. - * @print_dirver: Pointer to the print driver. - * @print_name: Print driver name. - * @bd_dividend: Board/UART's specific dividend. - * @bd_ops: Pointer to board operations structure. - */ -struct dgnc_board { - int boardnum; - char *name; - struct pci_dev *pdev; - u16 device; - uint maxports; - - /* used to protect the board */ - spinlock_t bd_lock; - - /* Protect poller tasklet and interrupt routine from each other. */ - spinlock_t bd_intr_lock; - - uint state; - wait_queue_head_t state_wait; - - struct tasklet_struct helper_tasklet; - - uint nasync; - - uint irq; - - ulong membase; - ulong membase_end; - - u8 __iomem *re_map_membase; - - ulong iobase; - ulong iobase_end; - - uint bd_uart_offset; - - struct channel_t *channels[MAXPORTS]; - - struct tty_driver *serial_driver; - char serial_name[200]; - struct tty_driver *print_driver; - char print_name[200]; - - uint bd_dividend; - - struct board_ops *bd_ops; -}; - -/* Unit flag definitions for un_flags. */ -#define UN_ISOPEN 0x0001 /* Device is open */ -#define UN_CLOSING 0x0002 /* Line is being closed */ -#define UN_IMM 0x0004 /* Service immediately */ -#define UN_BUSY 0x0008 /* Some work this channel */ -#define UN_BREAKI 0x0010 /* Input break received */ -#define UN_PWAIT 0x0020 /* Printer waiting for terminal */ -#define UN_TIME 0x0040 /* Waiting on time */ -#define UN_EMPTY 0x0080 /* Waiting output queue empty */ -#define UN_LOW 0x0100 /* Waiting output low water mark*/ -#define UN_EXCL_OPEN 0x0200 /* Open for exclusive use */ -#define UN_WOPEN 0x0400 /* Device waiting for open */ -#define UN_WIOCTL 0x0800 /* Device waiting for open */ -#define UN_HANGUP 0x8000 /* Carrier lost */ - -struct device; - -/** - * struct un_t - terminal or printer unit - * @un_open_count: Counter of opens to port. - * @un_tty: Pointer to unit tty structure. - * @un_flags: Unit flags. - * @un_flags_wait: Place to sleep to wait on unit. - * @un_dev: Minor device number. - */ -struct un_t { - struct channel_t *un_ch; - uint un_type; - uint un_open_count; - struct tty_struct *un_tty; - uint un_flags; - wait_queue_head_t un_flags_wait; - uint un_dev; - struct device *un_sysfs; -}; - -/* Device flag definitions for ch_flags. */ -#define CH_PRON 0x0001 /* Printer on string */ -#define CH_STOP 0x0002 /* Output is stopped */ -#define CH_STOPI 0x0004 /* Input is stopped */ -#define CH_CD 0x0008 /* Carrier is present */ -#define CH_FCAR 0x0010 /* Carrier forced on */ -#define CH_HANGUP 0x0020 /* Hangup received */ - -#define CH_RECEIVER_OFF 0x0040 /* Receiver is off */ -#define CH_OPENING 0x0080 /* Port in fragile open state */ -#define CH_CLOSING 0x0100 /* Port in fragile close state */ -#define CH_FIFO_ENABLED 0x0200 /* Port has FIFOs enabled */ -#define CH_TX_FIFO_EMPTY 0x0400 /* TX Fifo is completely empty */ -#define CH_TX_FIFO_LWM 0x0800 /* TX Fifo is below Low Water */ -#define CH_BREAK_SENDING 0x1000 /* Break is being sent */ -#define CH_LOOPBACK 0x2000 /* Channel is in lookback mode */ -#define CH_BAUD0 0x08000 /* Used for checking B0 transitions */ -#define CH_FORCED_STOP 0x20000 /* Output is forcibly stopped */ -#define CH_FORCED_STOPI 0x40000 /* Input is forcibly stopped */ - -/* Our Read/Error/Write queue sizes */ -#define RQUEUEMASK 0x1FFF /* 8 K - 1 */ -#define EQUEUEMASK 0x1FFF /* 8 K - 1 */ -#define WQUEUEMASK 0x0FFF /* 4 K - 1 */ -#define RQUEUESIZE (RQUEUEMASK + 1) -#define EQUEUESIZE RQUEUESIZE -#define WQUEUESIZE (WQUEUEMASK + 1) - -/** - * struct channel_t - Channel information. - * @dgnc_board: Pointer to board structure. - * @ch_bd: Transparent print structure. - * @ch_tun: Terminal unit information. - * @ch_pun: Printer unit information. - * @ch_lock: Provide for serialization. - * @ch_flags_wait: Channel flags wait queue. - * @ch_portnum: Port number, 0 offset. - * @ch_open_count: Open count. - * @ch_flags: Channel flags. - * @ch_close_delay: How long we should drop RTS/DTR for. - * @ch_cpstime: Time for CPS calculations. - * @ch_c_iflag: Channel iflags. - * @ch_c_cflag: Channel cflags. - * @ch_c_oflag: Channel oflags. - * @ch_c_lflag: Channel lflags. - * @ch_stopc: Stop character. - * @ch_startc: Start character. - * @ch_old_baud: Cache of the current baud rate. - * @ch_custom_speed: Custom baud rate, if set. - * @ch_wopen: Waiting for open process count. - * @ch_mostat: FEP output modem status. - * @ch_mistat: FEP input modem status. - * @ch_cls_uart: Pointer to the mapped cls UART struct - * @ch_cached_lsr: Cached value of the LSR register. - * @ch_rqueue: Read queue buffer, malloc'ed. - * @ch_r_head: Head location of the read queue. - * @ch_r_tail: Tail location of the read queue. - * @ch_equeue: Error queue buffer, malloc'ed. - * @ch_e_head: Head location of the error queue. - * @ch_e_tail: Tail location of the error queue. - * @ch_wqueue: Write queue buffer, malloc'ed. - * @ch_w_head: Head location of the write queue. - * @ch_w_tail: Tail location of the write queue. - * @ch_rxcount: Total of data received so far. - * @ch_txcount: Total of data transmitted so far. - * @ch_r_tlevel: Receive trigger level. - * @ch_t_tlevel: Transmit trigger level. - * @ch_r_watermark: Receive water mark. - * @ch_stop_sending_break: Time we should STOP sending a break. - * @ch_stops_sent: How many times I have send a stop character to try - * to stop the other guy sending. - * @ch_err_parity: Count of parity - * @ch_err_frame: Count of framing errors on channel. - * @ch_err_break: Count of breaks on channel. - * @ch_err_overrun: Count of overruns on channel. - * @ch_xon_sends: Count of xons transmitted. - * @ch_xoff_sends: Count of xoffs transmitted. - */ -struct channel_t { - struct dgnc_board *ch_bd; - struct digi_t ch_digi; - struct un_t ch_tun; - struct un_t ch_pun; - - spinlock_t ch_lock; /* provide for serialization */ - wait_queue_head_t ch_flags_wait; - - uint ch_portnum; - uint ch_open_count; - uint ch_flags; - - ulong ch_close_delay; - - ulong ch_cpstime; - - tcflag_t ch_c_iflag; - tcflag_t ch_c_cflag; - tcflag_t ch_c_oflag; - tcflag_t ch_c_lflag; - unsigned char ch_stopc; - unsigned char ch_startc; - - uint ch_old_baud; - uint ch_custom_speed; - - uint ch_wopen; - - unsigned char ch_mostat; - unsigned char ch_mistat; - - struct cls_uart_struct __iomem *ch_cls_uart; - - unsigned char ch_cached_lsr; - - unsigned char *ch_rqueue; - ushort ch_r_head; - ushort ch_r_tail; - - unsigned char *ch_equeue; - ushort ch_e_head; - ushort ch_e_tail; - - unsigned char *ch_wqueue; - ushort ch_w_head; - ushort ch_w_tail; - - ulong ch_rxcount; - ulong ch_txcount; - - unsigned char ch_r_tlevel; - unsigned char ch_t_tlevel; - - unsigned char ch_r_watermark; - - ulong ch_stop_sending_break; - uint ch_stops_sent; - - ulong ch_err_parity; - ulong ch_err_frame; - ulong ch_err_break; - ulong ch_err_overrun; - - ulong ch_xon_sends; - ulong ch_xoff_sends; -}; - -extern struct dgnc_board *dgnc_board[MAXBOARDS];/* Array of boards */ - -#endif /* _DGNC_DRIVER_H */ diff --git a/drivers/staging/dgnc/dgnc_tty.c b/drivers/staging/dgnc/dgnc_tty.c deleted file mode 100644 index b8f865018950..000000000000 --- a/drivers/staging/dgnc/dgnc_tty.c +++ /dev/null @@ -1,2372 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2003 Digi International (www.digi.com) - * Scott H Kilau <Scott_Kilau at digi dot com> - */ - -/* - * This file implements the tty driver functionality for the - * Neo and ClassicBoard PCI based product lines. - */ - -#include <linux/kernel.h> -#include <linux/sched/signal.h> /* For jiffies, task states, etc. */ -#include <linux/interrupt.h> /* For tasklet and interrupt structs/defines */ -#include <linux/module.h> -#include <linux/ctype.h> -#include <linux/tty.h> -#include <linux/tty_flip.h> -#include <linux/types.h> -#include <linux/serial_reg.h> -#include <linux/slab.h> -#include <linux/delay.h> /* For udelay */ -#include <linux/uaccess.h> /* For copy_from_user/copy_to_user */ -#include <linux/pci.h> -#include "dgnc_driver.h" -#include "dgnc_tty.h" -#include "dgnc_cls.h" - -/* Default transparent print information. */ - -static const struct digi_t dgnc_digi_init = { - .digi_flags = DIGI_COOK, /* Flags */ - .digi_maxcps = 100, /* Max CPS */ - .digi_maxchar = 50, /* Max chars in print queue */ - .digi_bufsize = 100, /* Printer buffer size */ - .digi_onlen = 4, /* size of printer on string */ - .digi_offlen = 4, /* size of printer off string */ - .digi_onstr = "\033[5i", /* ANSI printer on string ] */ - .digi_offstr = "\033[4i", /* ANSI printer off string ] */ - .digi_term = "ansi" /* default terminal type */ -}; - -static int dgnc_tty_open(struct tty_struct *tty, struct file *file); -static void dgnc_tty_close(struct tty_struct *tty, struct file *file); -static int dgnc_block_til_ready(struct tty_struct *tty, struct file *file, - struct channel_t *ch); -static int dgnc_tty_ioctl(struct tty_struct *tty, unsigned int cmd, - unsigned long arg); -static int dgnc_tty_digigeta(struct tty_struct *tty, - struct digi_t __user *retinfo); -static int dgnc_tty_digiseta(struct tty_struct *tty, - struct digi_t __user *new_info); -static int dgnc_tty_write_room(struct tty_struct *tty); -static int dgnc_tty_put_char(struct tty_struct *tty, unsigned char c); -static int dgnc_tty_chars_in_buffer(struct tty_struct *tty); -static void dgnc_tty_start(struct tty_struct *tty); -static void dgnc_tty_stop(struct tty_struct *tty); -static void dgnc_tty_throttle(struct tty_struct *tty); -static void dgnc_tty_unthrottle(struct tty_struct *tty); -static void dgnc_tty_flush_chars(struct tty_struct *tty); -static void dgnc_tty_flush_buffer(struct tty_struct *tty); -static void dgnc_tty_hangup(struct tty_struct *tty); -static int dgnc_tty_tiocmget(struct tty_struct *tty); -static int dgnc_tty_tiocmset(struct tty_struct *tty, unsigned int set, - unsigned int clear); -static int dgnc_tty_send_break(struct tty_struct *tty, int msec); -static void dgnc_tty_wait_until_sent(struct tty_struct *tty, int timeout); -static int dgnc_tty_write(struct tty_struct *tty, const unsigned char *buf, - int count); -static void dgnc_tty_set_termios(struct tty_struct *tty, - struct ktermios *old_termios); -static void dgnc_tty_send_xchar(struct tty_struct *tty, char ch); -static void dgnc_set_signal_low(struct channel_t *ch, const unsigned char line); -static void dgnc_wake_up_unit(struct un_t *unit); - -static const struct tty_operations dgnc_tty_ops = { - .open = dgnc_tty_open, - .close = dgnc_tty_close, - .write = dgnc_tty_write, - .write_room = dgnc_tty_write_room, - .flush_buffer = dgnc_tty_flush_buffer, - .chars_in_buffer = dgnc_tty_chars_in_buffer, - .flush_chars = dgnc_tty_flush_chars, - .ioctl = dgnc_tty_ioctl, - .set_termios = dgnc_tty_set_termios, - .stop = dgnc_tty_stop, - .start = dgnc_tty_start, - .throttle = dgnc_tty_throttle, - .unthrottle = dgnc_tty_unthrottle, - .hangup = dgnc_tty_hangup, - .put_char = dgnc_tty_put_char, - .tiocmget = dgnc_tty_tiocmget, - .tiocmset = dgnc_tty_tiocmset, - .break_ctl = dgnc_tty_send_break, - .wait_until_sent = dgnc_tty_wait_until_sent, - .send_xchar = dgnc_tty_send_xchar -}; - -/* TTY Initialization/Cleanup Functions */ - -static struct tty_driver *dgnc_tty_create(char *serial_name, uint maxports, - int major, int minor) -{ - int rc; - struct tty_driver *drv; - - drv = tty_alloc_driver(maxports, - TTY_DRIVER_REAL_RAW | - TTY_DRIVER_DYNAMIC_DEV | - TTY_DRIVER_HARDWARE_BREAK); - if (IS_ERR(drv)) - return drv; - - drv->name = serial_name; - drv->name_base = 0; - drv->major = major; - drv->minor_start = minor; - drv->type = TTY_DRIVER_TYPE_SERIAL; - drv->subtype = SERIAL_TYPE_NORMAL; - drv->init_termios = tty_std_termios; - drv->init_termios.c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL); - drv->init_termios.c_ispeed = 9600; - drv->init_termios.c_ospeed = 9600; - drv->driver_name = DRVSTR; - /* - * Entry points for driver. Called by the kernel from - * tty_io.c and n_tty.c. - */ - tty_set_operations(drv, &dgnc_tty_ops); - rc = tty_register_driver(drv); - if (rc < 0) { - put_tty_driver(drv); - return ERR_PTR(rc); - } - return drv; -} - -static void dgnc_tty_free(struct tty_driver *drv) -{ - tty_unregister_driver(drv); - put_tty_driver(drv); -} - -/** - * dgnc_tty_register() - Init the tty subsystem for this board. - */ -int dgnc_tty_register(struct dgnc_board *brd) -{ - int rc; - - snprintf(brd->serial_name, MAXTTYNAMELEN, "tty_dgnc_%d_", - brd->boardnum); - - brd->serial_driver = dgnc_tty_create(brd->serial_name, - brd->maxports, 0, 0); - if (IS_ERR(brd->serial_driver)) { - rc = PTR_ERR(brd->serial_driver); - dev_dbg(&brd->pdev->dev, "Can't register tty device (%d)\n", - rc); - return rc; - } - - snprintf(brd->print_name, MAXTTYNAMELEN, "pr_dgnc_%d_", brd->boardnum); - brd->print_driver = dgnc_tty_create(brd->print_name, brd->maxports, - 0x80, - brd->serial_driver->major); - if (IS_ERR(brd->print_driver)) { - rc = PTR_ERR(brd->print_driver); - dev_dbg(&brd->pdev->dev, - "Can't register Transparent Print device(%d)\n", rc); - dgnc_tty_free(brd->serial_driver); - return rc; - } - return 0; -} - -void dgnc_tty_unregister(struct dgnc_board *brd) -{ - dgnc_tty_free(brd->print_driver); - dgnc_tty_free(brd->serial_driver); -} - -/** - * dgnc_tty_init() - Initialize the tty subsystem. - * - * Called once per board after board has been downloaded and initialized. - */ -int dgnc_tty_init(struct dgnc_board *brd) -{ - int i; - int rc; - void __iomem *vaddr; - struct channel_t *ch; - - if (!brd) - return -ENXIO; - - /* Initialize board structure elements. */ - - vaddr = brd->re_map_membase; - - brd->nasync = brd->maxports; - - for (i = 0; i < brd->nasync; i++) { - brd->channels[i] = kzalloc(sizeof(*brd->channels[i]), - GFP_KERNEL); - if (!brd->channels[i]) { - rc = -ENOMEM; - goto err_free_channels; - } - } - - ch = brd->channels[0]; - vaddr = brd->re_map_membase; - - /* Set up channel variables */ - for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) { - spin_lock_init(&ch->ch_lock); - - ch->ch_tun.un_ch = ch; - ch->ch_tun.un_type = DGNC_SERIAL; - ch->ch_tun.un_dev = i; - - ch->ch_pun.un_ch = ch; - ch->ch_pun.un_type = DGNC_PRINT; - ch->ch_pun.un_dev = i + 128; - - ch->ch_cls_uart = vaddr + (brd->bd_uart_offset * i); - - ch->ch_bd = brd; - ch->ch_portnum = i; - ch->ch_digi = dgnc_digi_init; - - /* .25 second delay */ - ch->ch_close_delay = 250; - - init_waitqueue_head(&ch->ch_flags_wait); - init_waitqueue_head(&ch->ch_tun.un_flags_wait); - init_waitqueue_head(&ch->ch_pun.un_flags_wait); - - { - struct device *classp; - - classp = tty_register_device(brd->serial_driver, i, - &ch->ch_bd->pdev->dev); - ch->ch_tun.un_sysfs = classp; - - classp = tty_register_device(brd->print_driver, i, - &ch->ch_bd->pdev->dev); - ch->ch_pun.un_sysfs = classp; - } - } - - return 0; - -err_free_channels: - for (i = i - 1; i >= 0; --i) { - kfree(brd->channels[i]); - brd->channels[i] = NULL; - } - - return rc; -} - -/** - * dgnc_cleanup_tty() - Cleanup driver. - * - * Uninitialize the TTY portion of this driver. Free all memory and - * resources. - */ -void dgnc_cleanup_tty(struct dgnc_board *brd) -{ - int i = 0; - - for (i = 0; i < brd->nasync; i++) - tty_unregister_device(brd->serial_driver, i); - - tty_unregister_driver(brd->serial_driver); - - for (i = 0; i < brd->nasync; i++) - tty_unregister_device(brd->print_driver, i); - - tty_unregister_driver(brd->print_driver); - - put_tty_driver(brd->serial_driver); - put_tty_driver(brd->print_driver); -} - -/** - * dgnc_wmove() - Write data to transmit queue. - * @ch: Pointer to channel structure. - * @buf: Pointer to characters to be moved. - * @n: Number of characters to move. - */ -static void dgnc_wmove(struct channel_t *ch, char *buf, uint n) -{ - int remain; - uint head; - - if (!ch) - return; - - head = ch->ch_w_head & WQUEUEMASK; - - /* - * If the write wraps over the top of the circular buffer, - * move the portion up to the wrap point, and reset the - * pointers to the bottom. - */ - remain = WQUEUESIZE - head; - - if (n >= remain) { - n -= remain; - memcpy(ch->ch_wqueue + head, buf, remain); - head = 0; - buf += remain; - } - - if (n > 0) { - /* Move rest of data. */ - remain = n; - memcpy(ch->ch_wqueue + head, buf, remain); - head += remain; - } - - head &= WQUEUEMASK; - ch->ch_w_head = head; -} - -/** - * dgnc_input() - Process received data. - * @ch: Pointer to channel structure. - */ -void dgnc_input(struct channel_t *ch) -{ - struct dgnc_board *bd; - struct tty_struct *tp; - struct tty_ldisc *ld = NULL; - uint rmask; - ushort head; - ushort tail; - int data_len; - unsigned long flags; - int flip_len; - int len = 0; - int n = 0; - int s = 0; - int i = 0; - - if (!ch) - return; - - tp = ch->ch_tun.un_tty; - - bd = ch->ch_bd; - if (!bd) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - rmask = RQUEUEMASK; - head = ch->ch_r_head & rmask; - tail = ch->ch_r_tail & rmask; - data_len = (head - tail) & rmask; - - if (data_len == 0) - goto exit_unlock; - - /* - * If the device is not open, or CREAD is off, - * flush input data and return immediately. - */ - if (!tp || - !(ch->ch_tun.un_flags & UN_ISOPEN) || - !C_CREAD(tp) || - (ch->ch_tun.un_flags & UN_CLOSING)) { - ch->ch_r_head = tail; - - /* Force queue flow control to be released, if needed */ - dgnc_check_queue_flow_control(ch); - - goto exit_unlock; - } - - if (ch->ch_flags & CH_FORCED_STOPI) - goto exit_unlock; - - flip_len = TTY_FLIPBUF_SIZE; - - len = min(data_len, flip_len); - len = min(len, (N_TTY_BUF_SIZE - 1)); - - ld = tty_ldisc_ref(tp); - if (!ld) { - len = 0; - } else { - if (!ld->ops->receive_buf) { - ch->ch_r_head = ch->ch_r_tail; - len = 0; - } - } - - if (len <= 0) - goto exit_unlock; - - /* - * The tty layer in the kernel has changed in 2.6.16+. - * - * The flip buffers in the tty structure are no longer exposed, - * and probably will be going away eventually. - * - * If we are completely raw, we don't need to go through a lot - * of the tty layers that exist. - * In this case, we take the shortest and fastest route we - * can to relay the data to the user. - * - * On the other hand, if we are not raw, we need to go through - * the new 2.6.16+ tty layer, which has its API more well defined. - */ - len = tty_buffer_request_room(tp->port, len); - n = len; - - /* - * n now contains the most amount of data we can copy, - * bounded either by how much the Linux tty layer can handle, - * or the amount of data the card actually has pending... - */ - while (n) { - unsigned char *ch_pos = ch->ch_equeue + tail; - - s = ((head >= tail) ? head : RQUEUESIZE) - tail; - s = min(s, n); - - if (s <= 0) - break; - - /* - * If conditions are such that ld needs to see all - * UART errors, we will have to walk each character - * and error byte and send them to the buffer one at - * a time. - */ - if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) { - for (i = 0; i < s; i++) { - unsigned char ch = *(ch_pos + i); - char flag = TTY_NORMAL; - - if (ch & UART_LSR_BI) - flag = TTY_BREAK; - else if (ch & UART_LSR_PE) - flag = TTY_PARITY; - else if (ch & UART_LSR_FE) - flag = TTY_FRAME; - - tty_insert_flip_char(tp->port, ch, flag); - } - } else { - tty_insert_flip_string(tp->port, ch_pos, s); - } - - tail += s; - n -= s; - /* Flip queue if needed */ - tail &= rmask; - } - - ch->ch_r_tail = tail & rmask; - ch->ch_e_tail = tail & rmask; - dgnc_check_queue_flow_control(ch); - spin_unlock_irqrestore(&ch->ch_lock, flags); - - /* Tell the tty layer its okay to "eat" the data now */ - tty_flip_buffer_push(tp->port); - - if (ld) - tty_ldisc_deref(ld); - return; - -exit_unlock: - spin_unlock_irqrestore(&ch->ch_lock, flags); - if (ld) - tty_ldisc_deref(ld); -} - -/** - * dgnc_carrier() - * - * Determines when CARRIER changes state and takes appropriate - * action. - */ -void dgnc_carrier(struct channel_t *ch) -{ - int virt_carrier = 0; - int phys_carrier = 0; - - if (!ch) - return; - - if (ch->ch_mistat & UART_MSR_DCD) - phys_carrier = 1; - - if (ch->ch_digi.digi_flags & DIGI_FORCEDCD) - virt_carrier = 1; - - if (ch->ch_c_cflag & CLOCAL) - virt_carrier = 1; - - /* Test for a VIRTUAL carrier transition to HIGH. */ - - if (((ch->ch_flags & CH_FCAR) == 0) && (virt_carrier == 1)) { - /* - * When carrier rises, wake any threads waiting - * for carrier in the open routine. - */ - if (waitqueue_active(&ch->ch_flags_wait)) - wake_up_interruptible(&ch->ch_flags_wait); - } - - /* Test for a PHYSICAL carrier transition to HIGH. */ - - if (((ch->ch_flags & CH_CD) == 0) && (phys_carrier == 1)) { - /* - * When carrier rises, wake any threads waiting - * for carrier in the open routine. - */ - if (waitqueue_active(&ch->ch_flags_wait)) - wake_up_interruptible(&ch->ch_flags_wait); - } - - /* - * Test for a PHYSICAL transition to low, so long as we aren't - * currently ignoring physical transitions (which is what "virtual - * carrier" indicates). - * - * The transition of the virtual carrier to low really doesn't - * matter... it really only means "ignore carrier state", not - * "make pretend that carrier is there". - */ - if ((virt_carrier == 0) && ((ch->ch_flags & CH_CD) != 0) && - (phys_carrier == 0)) { - /* - * When carrier drops: - * - * Drop carrier on all open units. - * - * Flush queues, waking up any task waiting in the - * line discipline. - * - * Send a hangup to the control terminal. - * - * Enable all select calls. - */ - if (waitqueue_active(&ch->ch_flags_wait)) - wake_up_interruptible(&ch->ch_flags_wait); - - if (ch->ch_tun.un_open_count > 0) - tty_hangup(ch->ch_tun.un_tty); - - if (ch->ch_pun.un_open_count > 0) - tty_hangup(ch->ch_pun.un_tty); - } - - /* Make sure that our cached values reflect the current reality. */ - - if (virt_carrier == 1) - ch->ch_flags |= CH_FCAR; - else - ch->ch_flags &= ~CH_FCAR; - - if (phys_carrier == 1) - ch->ch_flags |= CH_CD; - else - ch->ch_flags &= ~CH_CD; -} - -/* Assign the custom baud rate to the channel structure */ -static void dgnc_set_custom_speed(struct channel_t *ch, uint newrate) -{ - int testdiv; - int testrate_high; - int testrate_low; - int deltahigh; - int deltalow; - - if (newrate <= 0) { - ch->ch_custom_speed = 0; - return; - } - - /* - * Since the divisor is stored in a 16-bit integer, we make sure - * we don't allow any rates smaller than a 16-bit integer would allow. - * And of course, rates above the dividend won't fly. - */ - if (newrate && newrate < ((ch->ch_bd->bd_dividend / 0xFFFF) + 1)) - newrate = (ch->ch_bd->bd_dividend / 0xFFFF) + 1; - - if (newrate && newrate > ch->ch_bd->bd_dividend) - newrate = ch->ch_bd->bd_dividend; - - if (newrate > 0) { - testdiv = ch->ch_bd->bd_dividend / newrate; - - /* - * If we try to figure out what rate the board would use - * with the test divisor, it will be either equal or higher - * than the requested baud rate. If we then determine the - * rate with a divisor one higher, we will get the next lower - * supported rate below the requested. - */ - testrate_high = ch->ch_bd->bd_dividend / testdiv; - testrate_low = ch->ch_bd->bd_dividend / (testdiv + 1); - - /* - * If the rate for the requested divisor is correct, just - * use it and be done. - */ - if (testrate_high != newrate) { - /* - * Otherwise, pick the rate that is closer - * (i.e. whichever rate has a smaller delta). - */ - deltahigh = testrate_high - newrate; - deltalow = newrate - testrate_low; - - if (deltahigh < deltalow) - newrate = testrate_high; - else - newrate = testrate_low; - } - } - - ch->ch_custom_speed = newrate; -} - -void dgnc_check_queue_flow_control(struct channel_t *ch) -{ - int qleft; - - qleft = ch->ch_r_tail - ch->ch_r_head - 1; - if (qleft < 0) - qleft += RQUEUEMASK + 1; - - /* - * Check to see if we should enforce flow control on our queue because - * the ld (or user) isn't reading data out of our queue fast enuf. - * - * NOTE: This is done based on what the current flow control of the - * port is set for. - * - * 1) HWFLOW (RTS) - Turn off the UART's Receive interrupt. - * This will cause the UART's FIFO to back up, and force - * the RTS signal to be dropped. - * 2) SWFLOW (IXOFF) - Keep trying to send a stop character to - * the other side, in hopes it will stop sending data to us. - * 3) NONE - Nothing we can do. We will simply drop any extra data - * that gets sent into us when the queue fills up. - */ - if (qleft < 256) { - /* HWFLOW */ - if (ch->ch_digi.digi_flags & CTSPACE || - ch->ch_c_cflag & CRTSCTS) { - if (!(ch->ch_flags & CH_RECEIVER_OFF)) { - ch->ch_bd->bd_ops->disable_receiver(ch); - ch->ch_flags |= (CH_RECEIVER_OFF); - } - } - /* SWFLOW */ - else if (ch->ch_c_iflag & IXOFF) { - if (ch->ch_stops_sent <= MAX_STOPS_SENT) { - ch->ch_bd->bd_ops->send_stop_character(ch); - ch->ch_stops_sent++; - } - } - } - - /* - * Check to see if we should unenforce flow control because - * ld (or user) finally read enuf data out of our queue. - * - * NOTE: This is done based on what the current flow control of the - * port is set for. - * - * 1) HWFLOW (RTS) - Turn back on the UART's Receive interrupt. - * This will cause the UART's FIFO to raise RTS back up, - * which will allow the other side to start sending data again. - * 2) SWFLOW (IXOFF) - Send a start character to - * the other side, so it will start sending data to us again. - * 3) NONE - Do nothing. Since we didn't do anything to turn off the - * other side, we don't need to do anything now. - */ - if (qleft > (RQUEUESIZE / 2)) { - /* HWFLOW */ - if (ch->ch_digi.digi_flags & RTSPACE || - ch->ch_c_cflag & CRTSCTS) { - if (ch->ch_flags & CH_RECEIVER_OFF) { - ch->ch_bd->bd_ops->enable_receiver(ch); - ch->ch_flags &= ~(CH_RECEIVER_OFF); - } - } - /* SWFLOW */ - else if (ch->ch_c_iflag & IXOFF && ch->ch_stops_sent) { - ch->ch_stops_sent = 0; - ch->ch_bd->bd_ops->send_start_character(ch); - } - } -} - -static void dgnc_set_signal_low(struct channel_t *ch, const unsigned char sig) -{ - ch->ch_mostat &= ~(sig); - ch->ch_bd->bd_ops->assert_modem_signals(ch); -} - -void dgnc_wakeup_writes(struct channel_t *ch) -{ - int qlen = 0; - unsigned long flags; - - if (!ch) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - /* If channel now has space, wake up anyone waiting on the condition. */ - - qlen = ch->ch_w_head - ch->ch_w_tail; - if (qlen < 0) - qlen += WQUEUESIZE; - - if (qlen >= (WQUEUESIZE - 256)) { - spin_unlock_irqrestore(&ch->ch_lock, flags); - return; - } - - if (ch->ch_tun.un_flags & UN_ISOPEN) { - tty_wakeup(ch->ch_tun.un_tty); - - /* - * If unit is set to wait until empty, check to make sure - * the queue AND FIFO are both empty. - */ - if (ch->ch_tun.un_flags & UN_EMPTY) { - if ((qlen == 0) && - (ch->ch_bd->bd_ops->get_uart_bytes_left(ch) == 0)) { - ch->ch_tun.un_flags &= ~(UN_EMPTY); - - /* - * If RTS Toggle mode is on, whenever - * the queue and UART is empty, keep RTS low. - */ - if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) - dgnc_set_signal_low(ch, UART_MCR_RTS); - - /* - * If DTR Toggle mode is on, whenever - * the queue and UART is empty, keep DTR low. - */ - if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) - dgnc_set_signal_low(ch, UART_MCR_DTR); - } - } - - wake_up_interruptible(&ch->ch_tun.un_flags_wait); - } - - if (ch->ch_pun.un_flags & UN_ISOPEN) { - tty_wakeup(ch->ch_pun.un_tty); - - /* - * If unit is set to wait until empty, check to make sure - * the queue AND FIFO are both empty. - */ - if (ch->ch_pun.un_flags & UN_EMPTY) { - if ((qlen == 0) && - (ch->ch_bd->bd_ops->get_uart_bytes_left(ch) == 0)) - ch->ch_pun.un_flags &= ~(UN_EMPTY); - } - - wake_up_interruptible(&ch->ch_pun.un_flags_wait); - } - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -static struct dgnc_board *find_board_by_major(unsigned int major) -{ - int i; - - for (i = 0; i < MAXBOARDS; i++) { - struct dgnc_board *brd = dgnc_board[i]; - - if (!brd) - return NULL; - - if (major == brd->serial_driver->major || - major == brd->print_driver->major) - return brd; - } - - return NULL; -} - -/* TTY Entry points and helper functions */ - -static int dgnc_tty_open(struct tty_struct *tty, struct file *file) -{ - struct dgnc_board *brd; - struct channel_t *ch; - struct un_t *un; - uint major = 0; - uint minor = 0; - int rc = 0; - unsigned long flags; - - rc = 0; - - major = MAJOR(tty_devnum(tty)); - minor = MINOR(tty_devnum(tty)); - - if (major > 255) - return -ENXIO; - - brd = find_board_by_major(major); - if (!brd) - return -ENXIO; - - rc = wait_event_interruptible(brd->state_wait, - (brd->state & BOARD_READY)); - if (rc) - return rc; - - spin_lock_irqsave(&brd->bd_lock, flags); - - if (PORT_NUM(minor) >= brd->nasync) { - rc = -ENXIO; - goto err_brd_unlock; - } - - ch = brd->channels[PORT_NUM(minor)]; - if (!ch) { - rc = -ENXIO; - goto err_brd_unlock; - } - - spin_unlock_irqrestore(&brd->bd_lock, flags); - - spin_lock_irqsave(&ch->ch_lock, flags); - - /* Figure out our type */ - if (!IS_PRINT(minor)) { - un = &brd->channels[PORT_NUM(minor)]->ch_tun; - un->un_type = DGNC_SERIAL; - } else if (IS_PRINT(minor)) { - un = &brd->channels[PORT_NUM(minor)]->ch_pun; - un->un_type = DGNC_PRINT; - } else { - rc = -ENXIO; - goto err_ch_unlock; - } - - /* - * If the port is still in a previous open, and in a state - * where we simply cannot safely keep going, wait until the - * state clears. - */ - spin_unlock_irqrestore(&ch->ch_lock, flags); - - rc = wait_event_interruptible(ch->ch_flags_wait, - ((ch->ch_flags & CH_OPENING) == 0)); - /* If ret is non-zero, user ctrl-c'ed us */ - if (rc) - return -EINTR; - - /* - * If either unit is in the middle of the fragile part of close, - * we just cannot touch the channel safely. - * Go to sleep, knowing that when the channel can be - * touched safely, the close routine will signal the - * ch_flags_wait to wake us back up. - */ - rc = wait_event_interruptible(ch->ch_flags_wait, - !((ch->ch_tun.un_flags | - ch->ch_pun.un_flags) & UN_CLOSING)); - /* If ret is non-zero, user ctrl-c'ed us */ - if (rc) - return -EINTR; - - spin_lock_irqsave(&ch->ch_lock, flags); - - tty->driver_data = un; - - /* Initialize tty's */ - - if (!(un->un_flags & UN_ISOPEN)) { - un->un_tty = tty; - - /* Maybe do something here to the TTY struct as well? */ - } - - /* - * Allocate channel buffers for read/write/error. - * Set flag, so we don't get trounced on. - */ - ch->ch_flags |= (CH_OPENING); - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - if (!ch->ch_rqueue) - ch->ch_rqueue = kzalloc(RQUEUESIZE, GFP_KERNEL); - if (!ch->ch_equeue) - ch->ch_equeue = kzalloc(EQUEUESIZE, GFP_KERNEL); - if (!ch->ch_wqueue) - ch->ch_wqueue = kzalloc(WQUEUESIZE, GFP_KERNEL); - - if (!ch->ch_rqueue || !ch->ch_equeue || !ch->ch_wqueue) { - kfree(ch->ch_rqueue); - kfree(ch->ch_equeue); - kfree(ch->ch_wqueue); - return -ENOMEM; - } - - spin_lock_irqsave(&ch->ch_lock, flags); - - ch->ch_flags &= ~(CH_OPENING); - wake_up_interruptible(&ch->ch_flags_wait); - - /* Initialize if neither terminal or printer is open. */ - - if (!((ch->ch_tun.un_flags | ch->ch_pun.un_flags) & UN_ISOPEN)) { - /* Flush input queues. */ - ch->ch_r_head = 0; - ch->ch_r_tail = 0; - ch->ch_e_head = 0; - ch->ch_e_tail = 0; - ch->ch_w_head = 0; - ch->ch_w_tail = 0; - - brd->bd_ops->flush_uart_write(ch); - brd->bd_ops->flush_uart_read(ch); - - ch->ch_flags = 0; - ch->ch_cached_lsr = 0; - ch->ch_stop_sending_break = 0; - ch->ch_stops_sent = 0; - - ch->ch_c_cflag = tty->termios.c_cflag; - ch->ch_c_iflag = tty->termios.c_iflag; - ch->ch_c_oflag = tty->termios.c_oflag; - ch->ch_c_lflag = tty->termios.c_lflag; - ch->ch_startc = tty->termios.c_cc[VSTART]; - ch->ch_stopc = tty->termios.c_cc[VSTOP]; - - /* - * Bring up RTS and DTR... - * Also handle RTS or DTR toggle if set. - */ - if (!(ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE)) - ch->ch_mostat |= (UART_MCR_RTS); - if (!(ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE)) - ch->ch_mostat |= (UART_MCR_DTR); - - /* Tell UART to init itself */ - brd->bd_ops->uart_init(ch); - } - - brd->bd_ops->param(tty); - - dgnc_carrier(ch); - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - rc = dgnc_block_til_ready(tty, file, ch); - - spin_lock_irqsave(&ch->ch_lock, flags); - ch->ch_open_count++; - un->un_open_count++; - un->un_flags |= (UN_ISOPEN); - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return rc; - -err_brd_unlock: - spin_unlock_irqrestore(&brd->bd_lock, flags); - - return rc; -err_ch_unlock: - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return rc; -} - -/* Wait for DCD, if needed. */ -static int dgnc_block_til_ready(struct tty_struct *tty, - struct file *file, - struct channel_t *ch) -{ - int rc = 0; - struct un_t *un = tty->driver_data; - unsigned long flags; - uint old_flags = 0; - int sleep_on_un_flags = 0; - - if (!file) - return -ENXIO; - - spin_lock_irqsave(&ch->ch_lock, flags); - - ch->ch_wopen++; - - while (1) { - sleep_on_un_flags = 0; - - if (ch->ch_bd->state == BOARD_FAILED) { - rc = -ENXIO; - break; - } - - if (tty_hung_up_p(file)) { - rc = -EAGAIN; - break; - } - - /* - * If either unit is in the middle of the fragile part of close, - * we just cannot touch the channel safely. - * Go back to sleep, knowing that when the channel can be - * touched safely, the close routine will signal the - * ch_wait_flags to wake us back up. - */ - if (!((ch->ch_tun.un_flags | - ch->ch_pun.un_flags) & - UN_CLOSING)) { - /* - * Our conditions to leave cleanly and happily: - * 1) NONBLOCKING on the tty is set. - * 2) CLOCAL is set. - * 3) DCD (fake or real) is active. - */ - - if (file->f_flags & O_NONBLOCK) - break; - - if (tty_io_error(tty)) { - rc = -EIO; - break; - } - - if (ch->ch_flags & CH_CD) - break; - - if (ch->ch_flags & CH_FCAR) - break; - } else { - sleep_on_un_flags = 1; - } - - /* - * If there is a signal pending, the user probably - * interrupted (ctrl-c) us. - */ - if (signal_pending(current)) { - rc = -ERESTARTSYS; - break; - } - - if (sleep_on_un_flags) - old_flags = ch->ch_tun.un_flags | ch->ch_pun.un_flags; - else - old_flags = ch->ch_flags; - - /* - * Let go of channel lock before calling schedule. - * Our poller will get any FEP events and wake us up when DCD - * eventually goes active. - */ - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - /* - * Wait for something in the flags to change - * from the current value. - */ - if (sleep_on_un_flags) - rc = wait_event_interruptible - (un->un_flags_wait, - (old_flags != (ch->ch_tun.un_flags | - ch->ch_pun.un_flags))); - else - rc = wait_event_interruptible( - ch->ch_flags_wait, - (old_flags != ch->ch_flags)); - - /* - * We got woken up for some reason. - * Before looping around, grab our channel lock. - */ - spin_lock_irqsave(&ch->ch_lock, flags); - } - - ch->ch_wopen--; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return rc; -} - -/* Hangup the port. Like a close, but don't wait for output to drain. */ -static void dgnc_tty_hangup(struct tty_struct *tty) -{ - if (!tty) - return; - - /* flush the transmit queues */ - dgnc_tty_flush_buffer(tty); -} - -static void dgnc_tty_close(struct tty_struct *tty, struct file *file) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - bd = ch->ch_bd; - if (!bd) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - /* - * Determine if this is the last close or not - and if we agree about - * which type of close it is with the Line Discipline - */ - if ((tty->count == 1) && (un->un_open_count != 1)) { - /* - * Uh, oh. tty->count is 1, which means that the tty - * structure will be freed. un_open_count should always - * be one in these conditions. If it's greater than - * one, we've got real problems, since it means the - * serial port won't be shutdown. - */ - dev_dbg(tty->dev, - "tty->count is 1, un open count is %d\n", - un->un_open_count); - un->un_open_count = 1; - } - - if (un->un_open_count) - un->un_open_count--; - else - dev_dbg(tty->dev, - "bad serial port open count of %d\n", - un->un_open_count); - - ch->ch_open_count--; - - if (ch->ch_open_count && un->un_open_count) { - spin_unlock_irqrestore(&ch->ch_lock, flags); - return; - } - - /* OK, its the last close on the unit */ - un->un_flags |= UN_CLOSING; - - tty->closing = 1; - - /* - * Only officially close channel if count is 0 and - * DIGI_PRINTER bit is not set. - */ - if ((ch->ch_open_count == 0) && - !(ch->ch_digi.digi_flags & DIGI_PRINTER)) { - ch->ch_flags &= ~(CH_STOPI | CH_FORCED_STOPI); - - /* turn off print device when closing print device. */ - - if ((un->un_type == DGNC_PRINT) && (ch->ch_flags & CH_PRON)) { - dgnc_wmove(ch, ch->ch_digi.digi_offstr, - (int)ch->ch_digi.digi_offlen); - ch->ch_flags &= ~CH_PRON; - } - - spin_unlock_irqrestore(&ch->ch_lock, flags); - /* wait for output to drain */ - /* This will also return if we take an interrupt */ - - bd->bd_ops->drain(tty, 0); - - dgnc_tty_flush_buffer(tty); - tty_ldisc_flush(tty); - - spin_lock_irqsave(&ch->ch_lock, flags); - - tty->closing = 0; - - /* If we have HUPCL set, lower DTR and RTS */ - - if (ch->ch_c_cflag & HUPCL) { - /* Drop RTS/DTR */ - ch->ch_mostat &= ~(UART_MCR_DTR | UART_MCR_RTS); - bd->bd_ops->assert_modem_signals(ch); - - /* - * Go to sleep to ensure RTS/DTR - * have been dropped for modems to see it. - */ - if (ch->ch_close_delay) { - spin_unlock_irqrestore(&ch->ch_lock, - flags); - msleep_interruptible(ch->ch_close_delay); - spin_lock_irqsave(&ch->ch_lock, flags); - } - } - - ch->ch_old_baud = 0; - - /* Turn off UART interrupts for this port */ - ch->ch_bd->bd_ops->uart_off(ch); - } else { - /* turn off print device when closing print device. */ - - if ((un->un_type == DGNC_PRINT) && (ch->ch_flags & CH_PRON)) { - dgnc_wmove(ch, ch->ch_digi.digi_offstr, - (int)ch->ch_digi.digi_offlen); - ch->ch_flags &= ~CH_PRON; - } - } - - un->un_tty = NULL; - un->un_flags &= ~(UN_ISOPEN | UN_CLOSING); - - wake_up_interruptible(&ch->ch_flags_wait); - wake_up_interruptible(&un->un_flags_wait); - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -/* - * Return number of characters that have not been transmitted yet. - * - * This routine is used by the line discipline to determine if there - * is data waiting to be transmitted/drained/flushed or not. - */ -static int dgnc_tty_chars_in_buffer(struct tty_struct *tty) -{ - struct channel_t *ch = NULL; - struct un_t *un = NULL; - ushort thead; - ushort ttail; - uint tmask; - uint chars; - unsigned long flags; - - if (!tty) - return 0; - - un = tty->driver_data; - if (!un) - return 0; - - ch = un->un_ch; - if (!ch) - return 0; - - spin_lock_irqsave(&ch->ch_lock, flags); - - tmask = WQUEUEMASK; - thead = ch->ch_w_head & tmask; - ttail = ch->ch_w_tail & tmask; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - if (ttail == thead) - chars = 0; - else if (thead > ttail) - chars = thead - ttail; - else - chars = thead - ttail + WQUEUESIZE; - - return chars; -} - -/* - * Reduces bytes_available to the max number of characters - * that can be sent currently given the maxcps value, and - * returns the new bytes_available. This only affects printer - * output. - */ -static int dgnc_maxcps_room(struct channel_t *ch, int bytes_available) -{ - int rc = bytes_available; - - if (ch->ch_digi.digi_maxcps > 0 && ch->ch_digi.digi_bufsize > 0) { - int cps_limit = 0; - unsigned long current_time = jiffies; - unsigned long buffer_time = current_time + - (HZ * ch->ch_digi.digi_bufsize) / - ch->ch_digi.digi_maxcps; - - if (ch->ch_cpstime < current_time) { - /* buffer is empty */ - ch->ch_cpstime = current_time; /* reset ch_cpstime */ - cps_limit = ch->ch_digi.digi_bufsize; - } else if (ch->ch_cpstime < buffer_time) { - /* still room in the buffer */ - cps_limit = ((buffer_time - ch->ch_cpstime) * - ch->ch_digi.digi_maxcps) / HZ; - } else { - /* no room in the buffer */ - cps_limit = 0; - } - - rc = min(cps_limit, bytes_available); - } - - return rc; -} - -/* Return room available in Tx buffer */ -static int dgnc_tty_write_room(struct tty_struct *tty) -{ - struct channel_t *ch = NULL; - struct un_t *un = NULL; - ushort head; - ushort tail; - ushort tmask; - int room = 0; - unsigned long flags; - - if (!tty) - return 0; - - un = tty->driver_data; - if (!un) - return 0; - - ch = un->un_ch; - if (!ch) - return 0; - - spin_lock_irqsave(&ch->ch_lock, flags); - - tmask = WQUEUEMASK; - head = (ch->ch_w_head) & tmask; - tail = (ch->ch_w_tail) & tmask; - - room = tail - head - 1; - if (room < 0) - room += WQUEUESIZE; - - /* Limit printer to maxcps */ - if (un->un_type != DGNC_PRINT) - room = dgnc_maxcps_room(ch, room); - - /* - * If we are printer device, leave room for - * possibly both the on and off strings. - */ - if (un->un_type == DGNC_PRINT) { - if (!(ch->ch_flags & CH_PRON)) - room -= ch->ch_digi.digi_onlen; - room -= ch->ch_digi.digi_offlen; - } else { - if (ch->ch_flags & CH_PRON) - room -= ch->ch_digi.digi_offlen; - } - - if (room < 0) - room = 0; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - return room; -} - -/* - * Put a character into ch->ch_buf - * Used by the line discipline for OPOST processing - */ -static int dgnc_tty_put_char(struct tty_struct *tty, unsigned char c) -{ - dgnc_tty_write(tty, &c, 1); - return 1; -} - -/* - * Take data from the user or kernel and send it out to the FEP. - * In here exists all the Transparent Print magic as well. - */ -static int dgnc_tty_write(struct tty_struct *tty, - const unsigned char *buf, int count) -{ - struct channel_t *ch = NULL; - struct un_t *un = NULL; - int bufcount = 0, n = 0; - unsigned long flags; - ushort head; - ushort tail; - ushort tmask; - uint remain; - - if (!tty) - return 0; - - un = tty->driver_data; - if (!un) - return 0; - - ch = un->un_ch; - if (!ch) - return 0; - - if (!count) - return 0; - - /* - * Store original amount of characters passed in. - * This helps to figure out if we should ask the FEP - * to send us an event when it has more space available. - */ - - spin_lock_irqsave(&ch->ch_lock, flags); - - tmask = WQUEUEMASK; - head = (ch->ch_w_head) & tmask; - tail = (ch->ch_w_tail) & tmask; - - bufcount = tail - head - 1; - if (bufcount < 0) - bufcount += WQUEUESIZE; - - /* - * Limit printer output to maxcps overall, with bursts allowed - * up to bufsize characters. - */ - if (un->un_type != DGNC_PRINT) - bufcount = dgnc_maxcps_room(ch, bufcount); - - count = min(count, bufcount); - if (count <= 0) - goto exit_retry; - - /* - * Output the printer ON string, if we are in terminal mode, but - * need to be in printer mode. - */ - if ((un->un_type == DGNC_PRINT) && !(ch->ch_flags & CH_PRON)) { - dgnc_wmove(ch, ch->ch_digi.digi_onstr, - (int)ch->ch_digi.digi_onlen); - head = (ch->ch_w_head) & tmask; - ch->ch_flags |= CH_PRON; - } - - /* - * On the other hand, output the printer OFF string, if we are - * currently in printer mode, but need to output to the terminal. - */ - if ((un->un_type != DGNC_PRINT) && (ch->ch_flags & CH_PRON)) { - dgnc_wmove(ch, ch->ch_digi.digi_offstr, - (int)ch->ch_digi.digi_offlen); - head = (ch->ch_w_head) & tmask; - ch->ch_flags &= ~CH_PRON; - } - - n = count; - - /* - * If the write wraps over the top of the circular buffer, - * move the portion up to the wrap point, and reset the - * pointers to the bottom. - */ - remain = WQUEUESIZE - head; - - if (n >= remain) { - n -= remain; - memcpy(ch->ch_wqueue + head, buf, remain); - head = 0; - buf += remain; - } - - if (n > 0) { - /* Move rest of data. */ - remain = n; - memcpy(ch->ch_wqueue + head, buf, remain); - head += remain; - } - - if (count) { - head &= tmask; - ch->ch_w_head = head; - } - - /* Update printer buffer empty time. */ - if ((un->un_type == DGNC_PRINT) && (ch->ch_digi.digi_maxcps > 0) && - (ch->ch_digi.digi_bufsize > 0)) { - ch->ch_cpstime += (HZ * count) / ch->ch_digi.digi_maxcps; - } - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - if (count) - ch->ch_bd->bd_ops->copy_data_from_queue_to_uart(ch); - - return count; - -exit_retry: - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return 0; -} - -/* Return modem signals to ld. */ -static int dgnc_tty_tiocmget(struct tty_struct *tty) -{ - struct channel_t *ch; - struct un_t *un; - int rc; - unsigned char mstat = 0; - unsigned long flags; - - if (!tty) - return -EIO; - - un = tty->driver_data; - if (!un) - return -EIO; - - ch = un->un_ch; - if (!ch) - return -EIO; - - spin_lock_irqsave(&ch->ch_lock, flags); - - mstat = ch->ch_mostat | ch->ch_mistat; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - rc = 0; - - if (mstat & UART_MCR_DTR) - rc |= TIOCM_DTR; - if (mstat & UART_MCR_RTS) - rc |= TIOCM_RTS; - if (mstat & UART_MSR_CTS) - rc |= TIOCM_CTS; - if (mstat & UART_MSR_DSR) - rc |= TIOCM_DSR; - if (mstat & UART_MSR_RI) - rc |= TIOCM_RI; - if (mstat & UART_MSR_DCD) - rc |= TIOCM_CD; - - return rc; -} - -/* Set modem signals, called by ld. */ -static int dgnc_tty_tiocmset(struct tty_struct *tty, - unsigned int set, unsigned int clear) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return -EIO; - - un = tty->driver_data; - if (!un) - return -EIO; - - ch = un->un_ch; - if (!ch) - return -EIO; - - bd = ch->ch_bd; - if (!bd) - return -EIO; - - spin_lock_irqsave(&ch->ch_lock, flags); - - if (set & TIOCM_RTS) - ch->ch_mostat |= UART_MCR_RTS; - - if (set & TIOCM_DTR) - ch->ch_mostat |= UART_MCR_DTR; - - if (clear & TIOCM_RTS) - ch->ch_mostat &= ~(UART_MCR_RTS); - - if (clear & TIOCM_DTR) - ch->ch_mostat &= ~(UART_MCR_DTR); - - bd->bd_ops->assert_modem_signals(ch); - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return 0; -} - -/* Send a Break, called by ld. */ -static int dgnc_tty_send_break(struct tty_struct *tty, int msec) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return -EIO; - - un = tty->driver_data; - if (!un) - return -EIO; - - ch = un->un_ch; - if (!ch) - return -EIO; - - bd = ch->ch_bd; - if (!bd) - return -EIO; - - if (msec < 0) - msec = 0xFFFF; - - spin_lock_irqsave(&ch->ch_lock, flags); - - bd->bd_ops->send_break(ch, msec); - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return 0; -} - -/* wait until data has been transmitted, called by ld. */ -static void dgnc_tty_wait_until_sent(struct tty_struct *tty, int timeout) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - bd = ch->ch_bd; - if (!bd) - return; - - bd->bd_ops->drain(tty, 0); -} - -/* send a high priority character, called by ld. */ -static void dgnc_tty_send_xchar(struct tty_struct *tty, char c) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - bd = ch->ch_bd; - if (!bd) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - bd->bd_ops->send_immediate_char(ch, c); - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -/* Ioctl to get the information for ditty. */ -static int dgnc_tty_digigeta(struct tty_struct *tty, - struct digi_t __user *retinfo) -{ - struct channel_t *ch; - struct un_t *un; - struct digi_t tmp; - unsigned long flags; - - if (!retinfo) - return -EFAULT; - - if (!tty) - return -EFAULT; - - un = tty->driver_data; - if (!un) - return -EFAULT; - - ch = un->un_ch; - if (!ch) - return -EFAULT; - - memset(&tmp, 0, sizeof(tmp)); - - spin_lock_irqsave(&ch->ch_lock, flags); - memcpy(&tmp, &ch->ch_digi, sizeof(tmp)); - spin_unlock_irqrestore(&ch->ch_lock, flags); - - if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) - return -EFAULT; - - return 0; -} - -/* Ioctl to set the information for ditty. */ -static int dgnc_tty_digiseta(struct tty_struct *tty, - struct digi_t __user *new_info) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - struct digi_t new_digi; - unsigned long flags; - - if (!tty) - return -EFAULT; - - un = tty->driver_data; - if (!un) - return -EFAULT; - - ch = un->un_ch; - if (!ch) - return -EFAULT; - - bd = ch->ch_bd; - if (!bd) - return -EFAULT; - - if (copy_from_user(&new_digi, new_info, sizeof(new_digi))) - return -EFAULT; - - spin_lock_irqsave(&ch->ch_lock, flags); - - /* Handle transitions to and from RTS Toggle. */ - - if (!(ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) && - (new_digi.digi_flags & DIGI_RTS_TOGGLE)) - ch->ch_mostat &= ~(UART_MCR_RTS); - if ((ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) && - !(new_digi.digi_flags & DIGI_RTS_TOGGLE)) - ch->ch_mostat |= (UART_MCR_RTS); - - /* Handle transitions to and from DTR Toggle. */ - - if (!(ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) && - (new_digi.digi_flags & DIGI_DTR_TOGGLE)) - ch->ch_mostat &= ~(UART_MCR_DTR); - if ((ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) && - !(new_digi.digi_flags & DIGI_DTR_TOGGLE)) - ch->ch_mostat |= (UART_MCR_DTR); - - memcpy(&ch->ch_digi, &new_digi, sizeof(new_digi)); - - if (ch->ch_digi.digi_maxcps < 1) - ch->ch_digi.digi_maxcps = 1; - - if (ch->ch_digi.digi_maxcps > 10000) - ch->ch_digi.digi_maxcps = 10000; - - if (ch->ch_digi.digi_bufsize < 10) - ch->ch_digi.digi_bufsize = 10; - - if (ch->ch_digi.digi_maxchar < 1) - ch->ch_digi.digi_maxchar = 1; - - if (ch->ch_digi.digi_maxchar > ch->ch_digi.digi_bufsize) - ch->ch_digi.digi_maxchar = ch->ch_digi.digi_bufsize; - - if (ch->ch_digi.digi_onlen > DIGI_PLEN) - ch->ch_digi.digi_onlen = DIGI_PLEN; - - if (ch->ch_digi.digi_offlen > DIGI_PLEN) - ch->ch_digi.digi_offlen = DIGI_PLEN; - - bd->bd_ops->param(tty); - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return 0; -} - -static void dgnc_tty_set_termios(struct tty_struct *tty, - struct ktermios *old_termios) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - bd = ch->ch_bd; - if (!bd) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - ch->ch_c_cflag = tty->termios.c_cflag; - ch->ch_c_iflag = tty->termios.c_iflag; - ch->ch_c_oflag = tty->termios.c_oflag; - ch->ch_c_lflag = tty->termios.c_lflag; - ch->ch_startc = tty->termios.c_cc[VSTART]; - ch->ch_stopc = tty->termios.c_cc[VSTOP]; - - bd->bd_ops->param(tty); - dgnc_carrier(ch); - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -static void dgnc_tty_throttle(struct tty_struct *tty) -{ - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - ch->ch_flags |= (CH_FORCED_STOPI); - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -static void dgnc_tty_unthrottle(struct tty_struct *tty) -{ - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - ch->ch_flags &= ~(CH_FORCED_STOPI); - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -static void dgnc_tty_start(struct tty_struct *tty) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - bd = ch->ch_bd; - if (!bd) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - ch->ch_flags &= ~(CH_FORCED_STOP); - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -static void dgnc_tty_stop(struct tty_struct *tty) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - bd = ch->ch_bd; - if (!bd) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - ch->ch_flags |= (CH_FORCED_STOP); - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -/* - * Flush the cook buffer - * - * Note to self, and any other poor souls who venture here: - * - * flush in this case DOES NOT mean dispose of the data. - * instead, it means "stop buffering and send it if you - * haven't already." Just guess how I figured that out... SRW 2-Jun-98 - * - * It is also always called in interrupt context - JAR 8-Sept-99 - */ -static void dgnc_tty_flush_chars(struct tty_struct *tty) -{ - struct dgnc_board *bd; - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - bd = ch->ch_bd; - if (!bd) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - /* Do something maybe here */ - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -/* Flush Tx buffer (make in == out) */ -static void dgnc_tty_flush_buffer(struct tty_struct *tty) -{ - struct channel_t *ch; - struct un_t *un; - unsigned long flags; - - if (!tty) - return; - - un = tty->driver_data; - if (!un) - return; - - ch = un->un_ch; - if (!ch) - return; - - spin_lock_irqsave(&ch->ch_lock, flags); - - ch->ch_flags &= ~CH_STOP; - - /* Flush our write queue */ - ch->ch_w_head = ch->ch_w_tail; - - /* Flush UARTs transmit FIFO */ - ch->ch_bd->bd_ops->flush_uart_write(ch); - - if (ch->ch_tun.un_flags & (UN_LOW | UN_EMPTY)) { - ch->ch_tun.un_flags &= ~(UN_LOW | UN_EMPTY); - wake_up_interruptible(&ch->ch_tun.un_flags_wait); - } - if (ch->ch_pun.un_flags & (UN_LOW | UN_EMPTY)) { - ch->ch_pun.un_flags &= ~(UN_LOW | UN_EMPTY); - wake_up_interruptible(&ch->ch_pun.un_flags_wait); - } - - spin_unlock_irqrestore(&ch->ch_lock, flags); -} - -/* Wakes up processes waiting in the unit's (teminal/printer) wait queue */ -static void dgnc_wake_up_unit(struct un_t *unit) -{ - unit->un_flags &= ~(UN_LOW | UN_EMPTY); - wake_up_interruptible(&unit->un_flags_wait); -} - -/* The IOCTL function and all of its helpers */ - -/* The usual assortment of ioctl's */ -static int dgnc_tty_ioctl(struct tty_struct *tty, unsigned int cmd, - unsigned long arg) -{ - struct dgnc_board *bd; - struct board_ops *ch_bd_ops; - struct channel_t *ch; - struct un_t *un; - int rc; - unsigned long flags; - void __user *uarg = (void __user *)arg; - - if (!tty) - return -ENODEV; - - un = tty->driver_data; - if (!un) - return -ENODEV; - - ch = un->un_ch; - if (!ch) - return -ENODEV; - - bd = ch->ch_bd; - if (!bd) - return -ENODEV; - - ch_bd_ops = bd->bd_ops; - - spin_lock_irqsave(&ch->ch_lock, flags); - - if (un->un_open_count <= 0) { - rc = -EIO; - goto err_unlock; - } - - switch (cmd) { - /* Here are any additional ioctl's that we want to implement */ - case TCFLSH: - /* - * The linux tty driver doesn't have a flush - * input routine for the driver, assuming all backed - * up data is in the line disc. buffers. However, - * we all know that's not the case. Here, we - * act on the ioctl, but then lie and say we didn't - * so the line discipline will process the flush - * also. - */ - rc = tty_check_change(tty); - if (rc) - goto err_unlock; - - if ((arg == TCIFLUSH) || (arg == TCIOFLUSH)) { - ch->ch_r_head = ch->ch_r_tail; - ch_bd_ops->flush_uart_read(ch); - /* Force queue flow control to be released, if needed */ - dgnc_check_queue_flow_control(ch); - } - - if ((arg == TCOFLUSH) || (arg == TCIOFLUSH)) { - if (!(un->un_type == DGNC_PRINT)) { - ch->ch_w_head = ch->ch_w_tail; - ch_bd_ops->flush_uart_write(ch); - - if (ch->ch_tun.un_flags & (UN_LOW | UN_EMPTY)) - dgnc_wake_up_unit(&ch->ch_tun); - - if (ch->ch_pun.un_flags & (UN_LOW | UN_EMPTY)) - dgnc_wake_up_unit(&ch->ch_pun); - } - } - - /* pretend we didn't recognize this IOCTL */ - spin_unlock_irqrestore(&ch->ch_lock, flags); - return -ENOIOCTLCMD; - case TCSETSF: - case TCSETSW: - /* - * The linux tty driver doesn't have a flush - * input routine for the driver, assuming all backed - * up data is in the line disc. buffers. However, - * we all know that's not the case. Here, we - * act on the ioctl, but then lie and say we didn't - * so the line discipline will process the flush - * also. - */ - if (cmd == TCSETSF) { - /* flush rx */ - ch->ch_flags &= ~CH_STOP; - ch->ch_r_head = ch->ch_r_tail; - ch_bd_ops->flush_uart_read(ch); - /* Force queue flow control to be released, if needed */ - dgnc_check_queue_flow_control(ch); - } - - /* now wait for all the output to drain */ - spin_unlock_irqrestore(&ch->ch_lock, flags); - rc = ch_bd_ops->drain(tty, 0); - if (rc) - return -EINTR; - - /* pretend we didn't recognize this */ - return -ENOIOCTLCMD; - - case TCSETAW: - - spin_unlock_irqrestore(&ch->ch_lock, flags); - rc = ch_bd_ops->drain(tty, 0); - if (rc) - return -EINTR; - - /* pretend we didn't recognize this */ - return -ENOIOCTLCMD; - - case DIGI_GETA: - /* get information for ditty */ - spin_unlock_irqrestore(&ch->ch_lock, flags); - return dgnc_tty_digigeta(tty, uarg); - - case DIGI_SETAW: - case DIGI_SETAF: - - /* set information for ditty */ - if (cmd == (DIGI_SETAW)) { - spin_unlock_irqrestore(&ch->ch_lock, flags); - rc = ch_bd_ops->drain(tty, 0); - if (rc) - return -EINTR; - - spin_lock_irqsave(&ch->ch_lock, flags); - } else { - tty_ldisc_flush(tty); - } - /* fall thru */ - - case DIGI_SETA: - spin_unlock_irqrestore(&ch->ch_lock, flags); - return dgnc_tty_digiseta(tty, uarg); - - case DIGI_LOOPBACK: - { - uint loopback = 0; - /* - * Let go of locks when accessing user space, - * could sleep - */ - spin_unlock_irqrestore(&ch->ch_lock, flags); - rc = get_user(loopback, (unsigned int __user *)arg); - if (rc) - return rc; - spin_lock_irqsave(&ch->ch_lock, flags); - - /* Enable/disable internal loopback for this port */ - if (loopback) - ch->ch_flags |= CH_LOOPBACK; - else - ch->ch_flags &= ~(CH_LOOPBACK); - - ch_bd_ops->param(tty); - spin_unlock_irqrestore(&ch->ch_lock, flags); - return 0; - } - - case DIGI_GETCUSTOMBAUD: - spin_unlock_irqrestore(&ch->ch_lock, flags); - return put_user(ch->ch_custom_speed, - (unsigned int __user *)arg); - - case DIGI_SETCUSTOMBAUD: - { - int new_rate; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - rc = get_user(new_rate, (int __user *)arg); - if (rc) - return rc; - spin_lock_irqsave(&ch->ch_lock, flags); - dgnc_set_custom_speed(ch, new_rate); - ch_bd_ops->param(tty); - spin_unlock_irqrestore(&ch->ch_lock, flags); - return 0; - } - - /* - * This ioctl allows insertion of a character into the front - * of any pending data to be transmitted. - * - * This ioctl is to satisfy the "Send Character Immediate" - * call that the RealPort protocol spec requires. - */ - case DIGI_REALPORT_SENDIMMEDIATE: - { - unsigned char c; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - rc = get_user(c, (unsigned char __user *)arg); - if (rc) - return rc; - spin_lock_irqsave(&ch->ch_lock, flags); - ch_bd_ops->send_immediate_char(ch, c); - spin_unlock_irqrestore(&ch->ch_lock, flags); - return 0; - } - - /* - * This ioctl returns all the current counts for the port. - * - * This ioctl is to satisfy the "Line Error Counters" - * call that the RealPort protocol spec requires. - */ - case DIGI_REALPORT_GETCOUNTERS: - { - struct digi_getcounter buf; - - buf.norun = ch->ch_err_overrun; - buf.noflow = 0; /* The driver doesn't keep this stat */ - buf.nframe = ch->ch_err_frame; - buf.nparity = ch->ch_err_parity; - buf.nbreak = ch->ch_err_break; - buf.rbytes = ch->ch_rxcount; - buf.tbytes = ch->ch_txcount; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - if (copy_to_user(uarg, &buf, sizeof(buf))) - return -EFAULT; - - return 0; - } - - /* - * This ioctl returns all current events. - * - * This ioctl is to satisfy the "Event Reporting" - * call that the RealPort protocol spec requires. - */ - case DIGI_REALPORT_GETEVENTS: - { - unsigned int events = 0; - - /* NOTE: MORE EVENTS NEEDS TO BE ADDED HERE */ - if (ch->ch_flags & CH_BREAK_SENDING) - events |= EV_TXB; - if ((ch->ch_flags & CH_STOP) || - (ch->ch_flags & CH_FORCED_STOP)) - events |= (EV_OPU | EV_OPS); - - if ((ch->ch_flags & CH_STOPI) || - (ch->ch_flags & CH_FORCED_STOPI)) - events |= (EV_IPU | EV_IPS); - - spin_unlock_irqrestore(&ch->ch_lock, flags); - return put_user(events, (unsigned int __user *)arg); - } - - /* - * This ioctl returns TOUT and TIN counters based - * upon the values passed in by the RealPort Server. - * It also passes back whether the UART Transmitter is - * empty as well. - */ - case DIGI_REALPORT_GETBUFFERS: - { - struct digi_getbuffer buf; - int tdist; - int count; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - if (copy_from_user(&buf, uarg, sizeof(buf))) - return -EFAULT; - - spin_lock_irqsave(&ch->ch_lock, flags); - - /* Figure out how much data is in our RX and TX queues. */ - - buf.rxbuf = (ch->ch_r_head - ch->ch_r_tail) & RQUEUEMASK; - buf.txbuf = (ch->ch_w_head - ch->ch_w_tail) & WQUEUEMASK; - - /* - * Is the UART empty? - * Add that value to whats in our TX queue. - */ - - count = buf.txbuf + ch_bd_ops->get_uart_bytes_left(ch); - - /* - * Figure out how much data the RealPort Server believes should - * be in our TX queue. - */ - tdist = (buf.tx_in - buf.tx_out) & 0xffff; - - /* - * If we have more data than the RealPort Server believes we - * should have, reduce our count to its amount. - * - * This count difference CAN happen because the Linux LD can - * insert more characters into our queue for OPOST processing - * that the RealPort Server doesn't know about. - */ - if (buf.txbuf > tdist) - buf.txbuf = tdist; - - /* Report whether our queue and UART TX are completely empty. */ - - if (count) - buf.txdone = 0; - else - buf.txdone = 1; - - spin_unlock_irqrestore(&ch->ch_lock, flags); - - if (copy_to_user(uarg, &buf, sizeof(buf))) - return -EFAULT; - - return 0; - } - default: - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return -ENOIOCTLCMD; - } -err_unlock: - spin_unlock_irqrestore(&ch->ch_lock, flags); - - return rc; -} diff --git a/drivers/staging/dgnc/dgnc_tty.h b/drivers/staging/dgnc/dgnc_tty.h deleted file mode 100644 index 00e31035b83d..000000000000 --- a/drivers/staging/dgnc/dgnc_tty.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2003 Digi International (www.digi.com) - * Scott H Kilau <Scott_Kilau at digi dot com> - */ - -#ifndef _DGNC_TTY_H -#define _DGNC_TTY_H - -#include "dgnc_driver.h" - -int dgnc_tty_register(struct dgnc_board *brd); -void dgnc_tty_unregister(struct dgnc_board *brd); - -int dgnc_tty_init(struct dgnc_board *brd); - -void dgnc_cleanup_tty(struct dgnc_board *brd); - -void dgnc_input(struct channel_t *ch); -void dgnc_carrier(struct channel_t *ch); -void dgnc_wakeup_writes(struct channel_t *ch); -void dgnc_check_queue_flow_control(struct channel_t *ch); - -#endif /* _DGNC_TTY_H */ diff --git a/drivers/staging/dgnc/digi.h b/drivers/staging/dgnc/digi.h deleted file mode 100644 index b414ee80db88..000000000000 --- a/drivers/staging/dgnc/digi.h +++ /dev/null @@ -1,128 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2003 Digi International (www.digi.com) - * Scott H Kilau <Scott_Kilau at digi dot com> - */ - -#ifndef _DIGI_H -#define _DIGI_H - -#define DIGI_GETA (('e' << 8) | 94) /* Read params */ -#define DIGI_SETA (('e' << 8) | 95) /* Set params */ -#define DIGI_SETAW (('e' << 8) | 96) /* Drain & set params */ -#define DIGI_SETAF (('e' << 8) | 97) /* Drain, flush & set params */ -#define DIGI_LOOPBACK (('d' << 8) | 252) /* Enable/disable UART - * internal loopback - */ -#define DIGI_FAST 0x0002 /* Fast baud rates */ -#define RTSPACE 0x0004 /* RTS input flow control */ -#define CTSPACE 0x0008 /* CTS output flow control */ -#define DIGI_COOK 0x0080 /* Cooked processing done in FEP */ -#define DIGI_FORCEDCD 0x0100 /* Force carrier */ -#define DIGI_ALTPIN 0x0200 /* Alternate RJ-45 pin config */ -#define DIGI_PRINTER 0x0800 /* Hold port open for flow cntrl*/ -#define DIGI_DTR_TOGGLE 0x2000 /* Support DTR Toggle */ -#define DIGI_RTS_TOGGLE 0x8000 /* Support RTS Toggle */ -#define DIGI_PLEN 28 /* String length */ -#define DIGI_TSIZ 10 /* Terminal string len */ - -/* - * Structure used with ioctl commands for DIGI parameters. - */ -/** - * struct digi_t - Ioctl commands for DIGI parameters. - * @digi_flags: Flags. - * @digi_maxcps: Maximum printer CPS. - * @digi_maxchar: Maximum characters in the print queue. - * @digi_bufsize: Buffer size. - * @digi_onlen: Length of ON string. - * @digi_offlen: Length of OFF string. - * @digi_onstr: Printer ON string. - * @digi_offstr: Printer OFF string. - * @digi_term: Terminal string. - */ -struct digi_t { - unsigned short digi_flags; - unsigned short digi_maxcps; - unsigned short digi_maxchar; - unsigned short digi_bufsize; - unsigned char digi_onlen; - unsigned char digi_offlen; - char digi_onstr[DIGI_PLEN]; - char digi_offstr[DIGI_PLEN]; - char digi_term[DIGI_TSIZ]; -}; - -/** - * struct digi_getbuffer - Holds buffer use counts. - */ -struct digi_getbuffer { - unsigned long tx_in; - unsigned long tx_out; - unsigned long rxbuf; - unsigned long txbuf; - unsigned long txdone; -}; - -/** - * struct digi_getcounter - * @norun: Number of UART overrun errors. - * @noflow: Number of buffer overflow errors. - * @nframe: Number of framing errors. - * @nparity: Number of parity errors. - * @nbreak: Number of breaks received. - * @rbytes: Number of received bytes. - * @tbytes: Number of transmitted bytes. - */ -struct digi_getcounter { - unsigned long norun; - unsigned long noflow; - unsigned long nframe; - unsigned long nparity; - unsigned long nbreak; - unsigned long rbytes; - unsigned long tbytes; -}; - -#define DIGI_SETCUSTOMBAUD _IOW('e', 106, int) /* Set integer baud rate */ -#define DIGI_GETCUSTOMBAUD _IOR('e', 107, int) /* Get integer baud rate */ - -#define DIGI_REALPORT_GETBUFFERS (('e' << 8) | 108) -#define DIGI_REALPORT_SENDIMMEDIATE (('e' << 8) | 109) -#define DIGI_REALPORT_GETCOUNTERS (('e' << 8) | 110) -#define DIGI_REALPORT_GETEVENTS (('e' << 8) | 111) - -#define EV_OPU 0x0001 /* Output paused by client */ -#define EV_OPS 0x0002 /* Output paused by regular sw flowctrl */ -#define EV_IPU 0x0010 /* Input paused unconditionally by user */ -#define EV_IPS 0x0020 /* Input paused by high/low water marks */ -#define EV_TXB 0x0040 /* Transmit break pending */ - -/** - * struct ni_info - intelligent <--> non-intelligent DPA translation. - */ -struct ni_info { - int board; - int channel; - int dtr; - int rts; - int cts; - int dsr; - int ri; - int dcd; - int curtx; - int currx; - unsigned short iflag; - unsigned short oflag; - unsigned short cflag; - unsigned short lflag; - unsigned int mstat; - unsigned char hflow; - unsigned char xmit_stopped; - unsigned char recv_stopped; - unsigned int baud; -}; - -#define TTY_FLIPBUF_SIZE 512 - -#endif /* _DIGI_H */ diff --git a/drivers/staging/emxx_udc/emxx_udc.c b/drivers/staging/emxx_udc/emxx_udc.c index 3e51476a7045..65cc3d9af972 100644 --- a/drivers/staging/emxx_udc/emxx_udc.c +++ b/drivers/staging/emxx_udc/emxx_udc.c @@ -1369,25 +1369,6 @@ static void _nbu2ss_set_endpoint_stall( } /*-------------------------------------------------------------------------*/ -/* Device Descriptor */ -static struct usb_device_descriptor device_desc = { - .bLength = sizeof(device_desc), - .bDescriptorType = USB_DT_DEVICE, - .bcdUSB = cpu_to_le16(0x0200), - .bDeviceClass = USB_CLASS_VENDOR_SPEC, - .bDeviceSubClass = 0x00, - .bDeviceProtocol = 0x00, - .bMaxPacketSize0 = 64, - .idVendor = cpu_to_le16(0x0409), - .idProduct = cpu_to_le16(0xfff0), - .bcdDevice = 0xffff, - .iManufacturer = 0x00, - .iProduct = 0x00, - .iSerialNumber = 0x00, - .bNumConfigurations = 0x01, -}; - -/*-------------------------------------------------------------------------*/ static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode) { u32 data; @@ -2513,7 +2494,7 @@ static int nbu2ss_ep_enable( } ep = container_of(_ep, struct nbu2ss_ep, ep); - if ((!ep) || (!ep->udc)) { + if ((!ep->udc)) { pr_err(" *** %s, ep == NULL !!\n", __func__); return -EINVAL; } @@ -2570,7 +2551,7 @@ static int nbu2ss_ep_disable(struct usb_ep *_ep) } ep = container_of(_ep, struct nbu2ss_ep, ep); - if ((!ep) || (!ep->udc)) { + if (!ep->udc) { pr_err("udc: *** %s, ep == NULL !!\n", __func__); return -EINVAL; } @@ -2743,10 +2724,6 @@ static int nbu2ss_ep_dequeue( } ep = container_of(_ep, struct nbu2ss_ep, ep); - if (!ep) { - pr_err("%s, ep == NULL !!\n", __func__); - return -EINVAL; - } udc = ep->udc; if (!udc) @@ -2787,10 +2764,6 @@ static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value) } ep = container_of(_ep, struct nbu2ss_ep, ep); - if (!ep) { - pr_err("%s, bad ep\n", __func__); - return -EINVAL; - } udc = ep->udc; if (!udc) { @@ -2839,10 +2812,6 @@ static int nbu2ss_ep_fifo_status(struct usb_ep *_ep) } ep = container_of(_ep, struct nbu2ss_ep, ep); - if (!ep) { - pr_err("%s, bad ep\n", __func__); - return -EINVAL; - } udc = ep->udc; if (!udc) { @@ -2885,10 +2854,6 @@ static void nbu2ss_ep_fifo_flush(struct usb_ep *_ep) } ep = container_of(_ep, struct nbu2ss_ep, ep); - if (!ep) { - pr_err("udc: %s, bad ep\n", __func__); - return; - } udc = ep->udc; if (!udc) { @@ -2959,10 +2924,6 @@ static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget) } udc = container_of(pgadget, struct nbu2ss_udc, gadget); - if (!udc) { - dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__); - return -EINVAL; - } data = gpio_get_value(VBUS_VALUE); if (data == 0) { diff --git a/drivers/staging/erofs/Kconfig b/drivers/staging/erofs/Kconfig index 663b755bf2fb..c8521d71039b 100644 --- a/drivers/staging/erofs/Kconfig +++ b/drivers/staging/erofs/Kconfig @@ -78,6 +78,15 @@ config EROFS_FAULT_INJECTION Test EROFS to inject faults such as ENOMEM, EIO, and so on. If unsure, say N. +config EROFS_FS_IO_MAX_RETRIES + int "EROFS IO Maximum Retries" + depends on EROFS_FS + default "5" + help + Maximum retry count of IO Errors. + + If unsure, leave the default value (5 retries, 6 IOs at most). + config EROFS_FS_ZIP bool "EROFS Data Compresssion Support" depends on EROFS_FS diff --git a/drivers/staging/erofs/data.c b/drivers/staging/erofs/data.c index ac263a180253..6384f73e5418 100644 --- a/drivers/staging/erofs/data.c +++ b/drivers/staging/erofs/data.c @@ -25,7 +25,7 @@ static inline void read_endio(struct bio *bio) struct page *page = bvec->bv_page; /* page is already locked */ - BUG_ON(PageUptodate(page)); + DBG_BUGON(PageUptodate(page)); if (unlikely(err)) SetPageError(page); @@ -39,38 +39,50 @@ static inline void read_endio(struct bio *bio) } /* prio -- true is used for dir */ -struct page *erofs_get_meta_page(struct super_block *sb, - erofs_blk_t blkaddr, bool prio) +struct page *__erofs_get_meta_page(struct super_block *sb, + erofs_blk_t blkaddr, bool prio, bool nofail) { - struct inode *bd_inode = sb->s_bdev->bd_inode; - struct address_space *mapping = bd_inode->i_mapping; + struct inode *const bd_inode = sb->s_bdev->bd_inode; + struct address_space *const mapping = bd_inode->i_mapping; + /* prefer retrying in the allocator to blindly looping below */ + const gfp_t gfp = mapping_gfp_constraint(mapping, ~__GFP_FS) | + (nofail ? __GFP_NOFAIL : 0); + unsigned int io_retries = nofail ? EROFS_IO_MAX_RETRIES_NOFAIL : 0; struct page *page; + int err; repeat: - page = find_or_create_page(mapping, blkaddr, - /* - * Prefer looping in the allocator rather than here, - * at least that code knows what it's doing. - */ - mapping_gfp_constraint(mapping, ~__GFP_FS) | __GFP_NOFAIL); - - BUG_ON(!page || !PageLocked(page)); + page = find_or_create_page(mapping, blkaddr, gfp); + if (unlikely(page == NULL)) { + DBG_BUGON(nofail); + return ERR_PTR(-ENOMEM); + } + DBG_BUGON(!PageLocked(page)); if (!PageUptodate(page)) { struct bio *bio; - int err; - bio = prepare_bio(sb, blkaddr, 1, read_endio); + bio = erofs_grab_bio(sb, blkaddr, 1, read_endio, nofail); + if (IS_ERR(bio)) { + DBG_BUGON(nofail); + err = PTR_ERR(bio); + goto err_out; + } + err = bio_add_page(bio, page, PAGE_SIZE, 0); - BUG_ON(err != PAGE_SIZE); + if (unlikely(err != PAGE_SIZE)) { + err = -EFAULT; + goto err_out; + } __submit_bio(bio, REQ_OP_READ, REQ_META | (prio ? REQ_PRIO : 0)); lock_page(page); - /* the page has been truncated by others? */ + /* this page has been truncated by others */ if (unlikely(page->mapping != mapping)) { +unlock_repeat: unlock_page(page); put_page(page); goto repeat; @@ -78,25 +90,32 @@ repeat: /* more likely a read error */ if (unlikely(!PageUptodate(page))) { - unlock_page(page); - put_page(page); - - page = ERR_PTR(-EIO); + if (io_retries) { + --io_retries; + goto unlock_repeat; + } + err = -EIO; + goto err_out; } } return page; + +err_out: + unlock_page(page); + put_page(page); + return ERR_PTR(err); } static int erofs_map_blocks_flatmode(struct inode *inode, struct erofs_map_blocks *map, int flags) { + int err = 0; erofs_blk_t nblocks, lastblk; u64 offset = map->m_la; struct erofs_vnode *vi = EROFS_V(inode); trace_erofs_map_blocks_flatmode_enter(inode, map, flags); - BUG_ON(is_inode_layout_compression(inode)); nblocks = DIV_ROUND_UP(inode->i_size, PAGE_SIZE); lastblk = nblocks - is_inode_layout_inline(inode); @@ -123,18 +142,27 @@ static int erofs_map_blocks_flatmode(struct inode *inode, map->m_plen = inode->i_size - offset; /* inline data should locate in one meta block */ - BUG_ON(erofs_blkoff(map->m_pa) + map->m_plen > PAGE_SIZE); + if (erofs_blkoff(map->m_pa) + map->m_plen > PAGE_SIZE) { + DBG_BUGON(1); + err = -EIO; + goto err_out; + } + map->m_flags |= EROFS_MAP_META; } else { errln("internal error @ nid: %llu (size %llu), m_la 0x%llx", vi->nid, inode->i_size, map->m_la); - BUG(); + DBG_BUGON(1); + err = -EIO; + goto err_out; } out: map->m_llen = map->m_plen; + +err_out: trace_erofs_map_blocks_flatmode_exit(inode, map, flags, 0); - return 0; + return err; } #ifdef CONFIG_EROFS_FS_ZIP @@ -183,14 +211,14 @@ static inline struct bio *erofs_read_raw_page( struct address_space *mapping, struct page *page, erofs_off_t *last_block, - unsigned nblocks, + unsigned int nblocks, bool ra) { struct inode *inode = mapping->host; erofs_off_t current_block = (erofs_off_t)page->index; int err; - BUG_ON(!nblocks); + DBG_BUGON(!nblocks); if (PageUptodate(page)) { err = 0; @@ -217,7 +245,7 @@ submit_bio_retry: .m_la = blknr_to_addr(current_block), }; erofs_blk_t blknr; - unsigned blkoff; + unsigned int blkoff; err = erofs_map_blocks(inode, &map, EROFS_GET_BLOCKS_RAW); if (unlikely(err)) @@ -233,7 +261,7 @@ submit_bio_retry: } /* for RAW access mode, m_plen must be equal to m_llen */ - BUG_ON(map.m_plen != map.m_llen); + DBG_BUGON(map.m_plen != map.m_llen); blknr = erofs_blknr(map.m_pa); blkoff = erofs_blkoff(map.m_pa); @@ -243,7 +271,7 @@ submit_bio_retry: void *vsrc, *vto; struct page *ipage; - BUG_ON(map.m_plen > PAGE_SIZE); + DBG_BUGON(map.m_plen > PAGE_SIZE); ipage = erofs_get_meta_page(inode->i_sb, blknr, 0); @@ -270,7 +298,7 @@ submit_bio_retry: } /* pa must be block-aligned for raw reading */ - BUG_ON(erofs_blkoff(map.m_pa) != 0); + DBG_BUGON(erofs_blkoff(map.m_pa)); /* max # of continuous pages */ if (nblocks > DIV_ROUND_UP(map.m_plen, PAGE_SIZE)) @@ -278,7 +306,14 @@ submit_bio_retry: if (nblocks > BIO_MAX_PAGES) nblocks = BIO_MAX_PAGES; - bio = prepare_bio(inode->i_sb, blknr, nblocks, read_endio); + bio = erofs_grab_bio(inode->i_sb, + blknr, nblocks, read_endio, false); + + if (IS_ERR(bio)) { + err = PTR_ERR(bio); + bio = NULL; + goto err_out; + } } err = bio_add_page(bio, page, PAGE_SIZE, 0); @@ -331,13 +366,13 @@ static int erofs_raw_access_readpage(struct file *file, struct page *page) if (IS_ERR(bio)) return PTR_ERR(bio); - BUG_ON(bio != NULL); /* since we have only one bio -- must be NULL */ + DBG_BUGON(bio); /* since we have only one bio -- must be NULL */ return 0; } static int erofs_raw_access_readpages(struct file *filp, struct address_space *mapping, - struct list_head *pages, unsigned nr_pages) + struct list_head *pages, unsigned int nr_pages) { erofs_off_t last_block; struct bio *bio = NULL; @@ -369,7 +404,7 @@ static int erofs_raw_access_readpages(struct file *filp, /* pages could still be locked */ put_page(page); } - BUG_ON(!list_empty(pages)); + DBG_BUGON(!list_empty(pages)); /* the rare case (end in gaps) */ if (unlikely(bio != NULL)) diff --git a/drivers/staging/erofs/dir.c b/drivers/staging/erofs/dir.c index be6ae3b1bdbe..d1cb0d78ab84 100644 --- a/drivers/staging/erofs/dir.c +++ b/drivers/staging/erofs/dir.c @@ -24,8 +24,8 @@ static const unsigned char erofs_filetype_table[EROFS_FT_MAX] = { }; static int erofs_fill_dentries(struct dir_context *ctx, - void *dentry_blk, unsigned *ofs, - unsigned nameoff, unsigned maxsize) + void *dentry_blk, unsigned int *ofs, + unsigned int nameoff, unsigned int maxsize) { struct erofs_dirent *de = dentry_blk; const struct erofs_dirent *end = dentry_blk + nameoff; @@ -36,7 +36,7 @@ static int erofs_fill_dentries(struct dir_context *ctx, int de_namelen; unsigned char d_type; #ifdef CONFIG_EROFS_FS_DEBUG - unsigned dbg_namelen; + unsigned int dbg_namelen; unsigned char dbg_namebuf[EROFS_NAME_LEN]; #endif @@ -81,15 +81,15 @@ static int erofs_readdir(struct file *f, struct dir_context *ctx) struct inode *dir = file_inode(f); struct address_space *mapping = dir->i_mapping; const size_t dirsize = i_size_read(dir); - unsigned i = ctx->pos / EROFS_BLKSIZ; - unsigned ofs = ctx->pos % EROFS_BLKSIZ; + unsigned int i = ctx->pos / EROFS_BLKSIZ; + unsigned int ofs = ctx->pos % EROFS_BLKSIZ; int err = 0; bool initial = true; while (ctx->pos < dirsize) { struct page *dentry_page; struct erofs_dirent *de; - unsigned nameoff, maxsize; + unsigned int nameoff, maxsize; dentry_page = read_mapping_page(mapping, i, NULL); if (IS_ERR(dentry_page)) @@ -109,7 +109,8 @@ static int erofs_readdir(struct file *f, struct dir_context *ctx) goto skip_this; } - maxsize = min_t(unsigned, dirsize - ctx->pos + ofs, PAGE_SIZE); + maxsize = min_t(unsigned int, + dirsize - ctx->pos + ofs, PAGE_SIZE); /* search dirents at the arbitrary position */ if (unlikely(initial)) { diff --git a/drivers/staging/erofs/erofs_fs.h b/drivers/staging/erofs/erofs_fs.h index 2f8e2bf70941..d4bffa2852b3 100644 --- a/drivers/staging/erofs/erofs_fs.h +++ b/drivers/staging/erofs/erofs_fs.h @@ -202,6 +202,14 @@ struct erofs_extent_header { * di_u.delta[1] = distance to its corresponding tail cluster * (di_advise could be 0, 1 or 2) */ +enum { + Z_EROFS_VLE_CLUSTER_TYPE_PLAIN, + Z_EROFS_VLE_CLUSTER_TYPE_HEAD, + Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD, + Z_EROFS_VLE_CLUSTER_TYPE_RESERVED, + Z_EROFS_VLE_CLUSTER_TYPE_MAX +}; + #define Z_EROFS_VLE_DI_CLUSTER_TYPE_BITS 2 #define Z_EROFS_VLE_DI_CLUSTER_TYPE_BIT 0 @@ -260,6 +268,9 @@ static inline void erofs_check_ondisk_layout_definitions(void) BUILD_BUG_ON(sizeof(struct erofs_extent_header) != 16); BUILD_BUG_ON(sizeof(struct z_erofs_vle_decompressed_index) != 8); BUILD_BUG_ON(sizeof(struct erofs_dirent) != 12); + + BUILD_BUG_ON(BIT(Z_EROFS_VLE_DI_CLUSTER_TYPE_BITS) < + Z_EROFS_VLE_CLUSTER_TYPE_MAX - 1); } #endif diff --git a/drivers/staging/erofs/include/trace/events/erofs.h b/drivers/staging/erofs/include/trace/events/erofs.h index 5aead93a762f..660c92fc1803 100644 --- a/drivers/staging/erofs/include/trace/events/erofs.h +++ b/drivers/staging/erofs/include/trace/events/erofs.h @@ -162,7 +162,8 @@ DECLARE_EVENT_CLASS(erofs__map_blocks_enter, TP_printk("dev = (%d,%d), nid = %llu, la %llu llen %llu flags %s", show_dev_nid(__entry), - __entry->la, __entry->llen, show_map_flags(__entry->flags)) + __entry->la, __entry->llen, + __entry->flags ? show_map_flags(__entry->flags) : "NULL") ); DEFINE_EVENT(erofs__map_blocks_enter, erofs_map_blocks_flatmode_enter, @@ -172,6 +173,13 @@ DEFINE_EVENT(erofs__map_blocks_enter, erofs_map_blocks_flatmode_enter, TP_ARGS(inode, map, flags) ); +DEFINE_EVENT(erofs__map_blocks_enter, z_erofs_map_blocks_iter_enter, + TP_PROTO(struct inode *inode, struct erofs_map_blocks *map, + unsigned int flags), + + TP_ARGS(inode, map, flags) +); + DECLARE_EVENT_CLASS(erofs__map_blocks_exit, TP_PROTO(struct inode *inode, struct erofs_map_blocks *map, unsigned int flags, int ret), @@ -204,7 +212,8 @@ DECLARE_EVENT_CLASS(erofs__map_blocks_exit, TP_printk("dev = (%d,%d), nid = %llu, flags %s " "la %llu pa %llu llen %llu plen %llu mflags %s ret %d", - show_dev_nid(__entry), show_map_flags(__entry->flags), + show_dev_nid(__entry), + __entry->flags ? show_map_flags(__entry->flags) : "NULL", __entry->la, __entry->pa, __entry->llen, __entry->plen, show_mflags(__entry->mflags), __entry->ret) ); @@ -216,6 +225,13 @@ DEFINE_EVENT(erofs__map_blocks_exit, erofs_map_blocks_flatmode_exit, TP_ARGS(inode, map, flags, ret) ); +DEFINE_EVENT(erofs__map_blocks_exit, z_erofs_map_blocks_iter_exit, + TP_PROTO(struct inode *inode, struct erofs_map_blocks *map, + unsigned int flags, int ret), + + TP_ARGS(inode, map, flags, ret) +); + TRACE_EVENT(erofs_destroy_inode, TP_PROTO(struct inode *inode), diff --git a/drivers/staging/erofs/inode.c b/drivers/staging/erofs/inode.c index fbf6ff25cd1b..04c61a9d7b76 100644 --- a/drivers/staging/erofs/inode.c +++ b/drivers/staging/erofs/inode.c @@ -19,7 +19,7 @@ static int read_inode(struct inode *inode, void *data) { struct erofs_vnode *vi = EROFS_V(inode); struct erofs_inode_v1 *v1 = data; - const unsigned advise = le16_to_cpu(v1->i_advise); + const unsigned int advise = le16_to_cpu(v1->i_advise); vi->data_mapping_mode = __inode_data_mapping(advise); @@ -112,7 +112,8 @@ static int read_inode(struct inode *inode, void *data) * try_lock since it takes no much overhead and * will success immediately. */ -static int fill_inline_data(struct inode *inode, void *data, unsigned m_pofs) +static int fill_inline_data(struct inode *inode, void *data, + unsigned int m_pofs) { struct erofs_vnode *vi = EROFS_V(inode); struct erofs_sb_info *sbi = EROFS_I_SB(inode); @@ -152,7 +153,7 @@ static int fill_inode(struct inode *inode, int isdir) void *data; int err; erofs_blk_t blkaddr; - unsigned ofs; + unsigned int ofs; trace_erofs_fill_inode(inode, isdir); @@ -231,10 +232,45 @@ out_unlock: return err; } +/* + * erofs nid is 64bits, but i_ino is 'unsigned long', therefore + * we should do more for 32-bit platform to find the right inode. + */ +#if BITS_PER_LONG == 32 +static int erofs_ilookup_test_actor(struct inode *inode, void *opaque) +{ + const erofs_nid_t nid = *(erofs_nid_t *)opaque; + + return EROFS_V(inode)->nid == nid; +} + +static int erofs_iget_set_actor(struct inode *inode, void *opaque) +{ + const erofs_nid_t nid = *(erofs_nid_t *)opaque; + + inode->i_ino = erofs_inode_hash(nid); + return 0; +} +#endif + +static inline struct inode *erofs_iget_locked(struct super_block *sb, + erofs_nid_t nid) +{ + const unsigned long hashval = erofs_inode_hash(nid); + +#if BITS_PER_LONG >= 64 + /* it is safe to use iget_locked for >= 64-bit platform */ + return iget_locked(sb, hashval); +#else + return iget5_locked(sb, hashval, erofs_ilookup_test_actor, + erofs_iget_set_actor, &nid); +#endif +} + struct inode *erofs_iget(struct super_block *sb, erofs_nid_t nid, bool isdir) { - struct inode *inode = iget_locked(sb, nid); + struct inode *inode = erofs_iget_locked(sb, nid); if (unlikely(inode == NULL)) return ERR_PTR(-ENOMEM); @@ -259,22 +295,16 @@ struct inode *erofs_iget(struct super_block *sb, const struct inode_operations erofs_generic_xattr_iops = { .listxattr = erofs_listxattr, }; -#endif -#ifdef CONFIG_EROFS_FS_XATTR const struct inode_operations erofs_symlink_xattr_iops = { .get_link = page_get_link, .listxattr = erofs_listxattr, }; -#endif const struct inode_operations erofs_special_inode_operations = { -#ifdef CONFIG_EROFS_FS_XATTR .listxattr = erofs_listxattr, -#endif }; -#ifdef CONFIG_EROFS_FS_XATTR const struct inode_operations erofs_fast_symlink_xattr_iops = { .get_link = simple_get_link, .listxattr = erofs_listxattr, diff --git a/drivers/staging/erofs/internal.h b/drivers/staging/erofs/internal.h index 367b39fe46e5..57575c7f5635 100644 --- a/drivers/staging/erofs/internal.h +++ b/drivers/staging/erofs/internal.h @@ -42,12 +42,12 @@ #define DBG_BUGON(...) ((void)0) #endif -#ifdef CONFIG_EROFS_FAULT_INJECTION enum { FAULT_KMALLOC, FAULT_MAX, }; +#ifdef CONFIG_EROFS_FAULT_INJECTION extern char *erofs_fault_name[FAULT_MAX]; #define IS_FAULT_SET(fi, type) ((fi)->inject_type & (1 << (type))) @@ -95,6 +95,9 @@ struct erofs_sb_info { /* the dedicated workstation for compression */ struct radix_tree_root workstn_tree; + /* threshold for decompression synchronously */ + unsigned int max_sync_decompress_pages; + #ifdef EROFS_FS_HAS_MANAGED_CACHE struct inode *managed_cache; #endif @@ -143,17 +146,24 @@ static inline bool time_to_inject(struct erofs_sb_info *sbi, int type) } return false; } +#else +static inline bool time_to_inject(struct erofs_sb_info *sbi, int type) +{ + return false; +} + +static inline void erofs_show_injection_info(int type) +{ +} #endif static inline void *erofs_kmalloc(struct erofs_sb_info *sbi, size_t size, gfp_t flags) { -#ifdef CONFIG_EROFS_FAULT_INJECTION if (time_to_inject(sbi, FAULT_KMALLOC)) { erofs_show_injection_info(FAULT_KMALLOC); return NULL; } -#endif return kmalloc(size, flags); } @@ -266,6 +276,20 @@ extern int erofs_try_to_free_cached_page(struct address_space *mapping, struct page *page); #endif +#define DEFAULT_MAX_SYNC_DECOMPRESS_PAGES 3 + +static inline bool __should_decompress_synchronously(struct erofs_sb_info *sbi, + unsigned int nr) +{ + return nr <= sbi->max_sync_decompress_pages; +} + +int __init z_erofs_init_zip_subsystem(void); +void z_erofs_exit_zip_subsystem(void); +#else +/* dummy initializer/finalizer for the decompression subsystem */ +static inline int z_erofs_init_zip_subsystem(void) { return 0; } +static inline void z_erofs_exit_zip_subsystem(void) {} #endif /* we strictly follow PAGE_SIZE and no buffer head yet */ @@ -420,30 +444,30 @@ struct erofs_map_blocks { #define EROFS_GET_BLOCKS_RAW 0x0001 /* data.c */ -static inline struct bio *prepare_bio( - struct super_block *sb, - erofs_blk_t blkaddr, unsigned nr_pages, - bio_end_io_t endio) +static inline struct bio * +erofs_grab_bio(struct super_block *sb, + erofs_blk_t blkaddr, unsigned int nr_pages, + bio_end_io_t endio, bool nofail) { - gfp_t gfp = GFP_NOIO; - struct bio *bio = bio_alloc(gfp, nr_pages); - - if (unlikely(bio == NULL) && - (current->flags & PF_MEMALLOC)) { - do { - nr_pages /= 2; - if (unlikely(!nr_pages)) { - bio = bio_alloc(gfp | __GFP_NOFAIL, 1); - BUG_ON(bio == NULL); - break; + const gfp_t gfp = GFP_NOIO; + struct bio *bio; + + do { + if (nr_pages == 1) { + bio = bio_alloc(gfp | (nofail ? __GFP_NOFAIL : 0), 1); + if (unlikely(bio == NULL)) { + DBG_BUGON(nofail); + return ERR_PTR(-ENOMEM); } - bio = bio_alloc(gfp, nr_pages); - } while (bio == NULL); - } + break; + } + bio = bio_alloc(gfp, nr_pages); + nr_pages /= 2; + } while (unlikely(bio == NULL)); bio->bi_end_io = endio; bio_set_dev(bio, sb->s_bdev); - bio->bi_iter.bi_sector = blkaddr << LOG_SECTORS_PER_BLOCK; + bio->bi_iter.bi_sector = (sector_t)blkaddr << LOG_SECTORS_PER_BLOCK; return bio; } @@ -453,8 +477,27 @@ static inline void __submit_bio(struct bio *bio, unsigned op, unsigned op_flags) submit_bio(bio); } -extern struct page *erofs_get_meta_page(struct super_block *sb, - erofs_blk_t blkaddr, bool prio); +#ifndef CONFIG_EROFS_FS_IO_MAX_RETRIES +#define EROFS_IO_MAX_RETRIES_NOFAIL 0 +#else +#define EROFS_IO_MAX_RETRIES_NOFAIL CONFIG_EROFS_FS_IO_MAX_RETRIES +#endif + +extern struct page *__erofs_get_meta_page(struct super_block *sb, + erofs_blk_t blkaddr, bool prio, bool nofail); + +static inline struct page *erofs_get_meta_page(struct super_block *sb, + erofs_blk_t blkaddr, bool prio) +{ + return __erofs_get_meta_page(sb, blkaddr, prio, false); +} + +static inline struct page *erofs_get_meta_page_nofail(struct super_block *sb, + erofs_blk_t blkaddr, bool prio) +{ + return __erofs_get_meta_page(sb, blkaddr, prio, true); +} + extern int erofs_map_blocks(struct inode *, struct erofs_map_blocks *, int); extern int erofs_map_blocks_iter(struct inode *, struct erofs_map_blocks *, struct page **, int); @@ -465,14 +508,24 @@ struct erofs_map_blocks_iter { }; -static inline struct page *erofs_get_inline_page(struct inode *inode, - erofs_blk_t blkaddr) +static inline struct page * +erofs_get_inline_page(struct inode *inode, + erofs_blk_t blkaddr) { return erofs_get_meta_page(inode->i_sb, blkaddr, S_ISDIR(inode->i_mode)); } /* inode.c */ +static inline unsigned long erofs_inode_hash(erofs_nid_t nid) +{ +#if BITS_PER_LONG == 32 + return (nid >> 32) ^ (nid & 0xffffffff); +#else + return nid; +#endif +} + extern struct inode *erofs_iget(struct super_block *sb, erofs_nid_t nid, bool dir); @@ -480,13 +533,11 @@ extern struct inode *erofs_iget(struct super_block *sb, int erofs_namei(struct inode *dir, struct qstr *name, erofs_nid_t *nid, unsigned *d_type); -/* xattr.c */ #ifdef CONFIG_EROFS_FS_XATTR +/* xattr.c */ extern const struct xattr_handler *erofs_xattr_handlers[]; -#endif -/* symlink */ -#ifdef CONFIG_EROFS_FS_XATTR +/* symlink and special inode */ extern const struct inode_operations erofs_symlink_xattr_iops; extern const struct inode_operations erofs_fast_symlink_xattr_iops; extern const struct inode_operations erofs_special_inode_operations; diff --git a/drivers/staging/erofs/namei.c b/drivers/staging/erofs/namei.c index 8cf0617d4ea0..5596c52e246d 100644 --- a/drivers/staging/erofs/namei.c +++ b/drivers/staging/erofs/namei.c @@ -17,9 +17,9 @@ /* based on the value of qn->len is accurate */ static inline int dirnamecmp(struct qstr *qn, - struct qstr *qd, unsigned *matched) + struct qstr *qd, unsigned int *matched) { - unsigned i = *matched, len = min(qn->len, qd->len); + unsigned int i = *matched, len = min(qn->len, qd->len); loop: if (unlikely(i >= len)) { *matched = i; @@ -46,8 +46,8 @@ static struct erofs_dirent *find_target_dirent( struct qstr *name, u8 *data, int maxsize) { - unsigned ndirents, head, back; - unsigned startprfx, endprfx; + unsigned int ndirents, head, back; + unsigned int startprfx, endprfx; struct erofs_dirent *const de = (struct erofs_dirent *)data; /* make sure that maxsize is valid */ @@ -63,9 +63,9 @@ static struct erofs_dirent *find_target_dirent( startprfx = endprfx = 0; while (head <= back) { - unsigned mid = head + (back - head) / 2; - unsigned nameoff = le16_to_cpu(de[mid].nameoff); - unsigned matched = min(startprfx, endprfx); + unsigned int mid = head + (back - head) / 2; + unsigned int nameoff = le16_to_cpu(de[mid].nameoff); + unsigned int matched = min(startprfx, endprfx); struct qstr dname = QSTR_INIT(data + nameoff, unlikely(mid >= ndirents - 1) ? @@ -95,8 +95,8 @@ static struct page *find_target_block_classic( struct inode *dir, struct qstr *name, int *_diff) { - unsigned startprfx, endprfx; - unsigned head, back; + unsigned int startprfx, endprfx; + unsigned int head, back; struct address_space *const mapping = dir->i_mapping; struct page *candidate = ERR_PTR(-ENOENT); @@ -105,7 +105,7 @@ static struct page *find_target_block_classic( back = inode_datablocks(dir) - 1; while (head <= back) { - unsigned mid = head + (back - head) / 2; + unsigned int mid = head + (back - head) / 2; struct page *page = read_mapping_page(mapping, mid, NULL); if (IS_ERR(page)) { @@ -115,10 +115,10 @@ exact_out: return page; } else { int diff; - unsigned ndirents, matched; + unsigned int ndirents, matched; struct qstr dname; struct erofs_dirent *de = kmap_atomic(page); - unsigned nameoff = le16_to_cpu(de->nameoff); + unsigned int nameoff = le16_to_cpu(de->nameoff); ndirents = nameoff / sizeof(*de); @@ -164,7 +164,7 @@ exact_out: int erofs_namei(struct inode *dir, struct qstr *name, - erofs_nid_t *nid, unsigned *d_type) + erofs_nid_t *nid, unsigned int *d_type) { int diff; struct page *page; @@ -204,7 +204,7 @@ static struct dentry *erofs_lookup(struct inode *dir, { int err; erofs_nid_t nid; - unsigned d_type; + unsigned int d_type; struct inode *inode; DBG_BUGON(!d_really_is_negative(dentry)); diff --git a/drivers/staging/erofs/super.c b/drivers/staging/erofs/super.c index 2df9768edac9..f69e619807a1 100644 --- a/drivers/staging/erofs/super.c +++ b/drivers/staging/erofs/super.c @@ -29,7 +29,7 @@ static void init_once(void *ptr) inode_init_once(&vi->vfs_inode); } -static int erofs_init_inode_cache(void) +static int __init erofs_init_inode_cache(void) { erofs_inode_cachep = kmem_cache_create("erofs_inode", sizeof(struct erofs_vnode), 0, @@ -81,7 +81,7 @@ static int superblock_read(struct super_block *sb) struct erofs_sb_info *sbi; struct buffer_head *bh; struct erofs_super_block *layout; - unsigned blkszbits; + unsigned int blkszbits; int ret; bh = sb_bread(sb, 0); @@ -116,9 +116,10 @@ static int superblock_read(struct super_block *sb) #endif sbi->islotbits = ffs(sizeof(struct erofs_inode_v1)) - 1; #ifdef CONFIG_EROFS_FS_ZIP - sbi->clusterbits = 12; + /* TODO: clusterbits should be related to inode */ + sbi->clusterbits = blkszbits; - if (1 << (sbi->clusterbits - 12) > Z_EROFS_CLUSTER_MAX_PAGES) + if (1 << (sbi->clusterbits - PAGE_SHIFT) > Z_EROFS_CLUSTER_MAX_PAGES) errln("clusterbits %u is not supported on this kernel", sbi->clusterbits); #endif @@ -144,8 +145,8 @@ char *erofs_fault_name[FAULT_MAX] = { [FAULT_KMALLOC] = "kmalloc", }; -static void erofs_build_fault_attr(struct erofs_sb_info *sbi, - unsigned int rate) +static void __erofs_build_fault_attr(struct erofs_sb_info *sbi, + unsigned int rate) { struct erofs_fault_info *ffi = &sbi->fault_info; @@ -156,11 +157,52 @@ static void erofs_build_fault_attr(struct erofs_sb_info *sbi, } else { memset(ffi, 0, sizeof(struct erofs_fault_info)); } + + set_opt(sbi, FAULT_INJECTION); +} + +static int erofs_build_fault_attr(struct erofs_sb_info *sbi, + substring_t *args) +{ + int rate = 0; + + if (args->from && match_int(args, &rate)) + return -EINVAL; + + __erofs_build_fault_attr(sbi, rate); + return 0; +} + +static unsigned int erofs_get_fault_rate(struct erofs_sb_info *sbi) +{ + return sbi->fault_info.inject_rate; +} +#else +static void __erofs_build_fault_attr(struct erofs_sb_info *sbi, + unsigned int rate) +{ +} + +static int erofs_build_fault_attr(struct erofs_sb_info *sbi, + substring_t *args) +{ + infoln("fault_injection options not supported"); + return 0; +} + +static unsigned int erofs_get_fault_rate(struct erofs_sb_info *sbi) +{ + return 0; } #endif static void default_options(struct erofs_sb_info *sbi) { + /* set up some FS parameters */ +#ifdef CONFIG_EROFS_FS_ZIP + sbi->max_sync_decompress_pages = DEFAULT_MAX_SYNC_DECOMPRESS_PAGES; +#endif + #ifdef CONFIG_EROFS_FS_XATTR set_opt(sbi, XATTR_USER); #endif @@ -192,7 +234,7 @@ static int parse_options(struct super_block *sb, char *options) { substring_t args[MAX_OPT_ARGS]; char *p; - int arg = 0; + int err; if (!options) return 0; @@ -238,15 +280,11 @@ static int parse_options(struct super_block *sb, char *options) break; #endif case Opt_fault_injection: - if (args->from && match_int(args, &arg)) - return -EINVAL; -#ifdef CONFIG_EROFS_FAULT_INJECTION - erofs_build_fault_attr(EROFS_SB(sb), arg); - set_opt(EROFS_SB(sb), FAULT_INJECTION); -#else - infoln("FAULT_INJECTION was not selected"); -#endif + err = erofs_build_fault_attr(EROFS_SB(sb), args); + if (err) + return err; break; + default: errln("Unrecognized mount option \"%s\" " "or missing value", p); @@ -521,11 +559,6 @@ static struct file_system_type erofs_fs_type = { }; MODULE_ALIAS_FS("erofs"); -#ifdef CONFIG_EROFS_FS_ZIP -extern int z_erofs_init_zip_subsystem(void); -extern void z_erofs_exit_zip_subsystem(void); -#endif - static int __init erofs_module_init(void) { int err; @@ -541,11 +574,9 @@ static int __init erofs_module_init(void) if (err) goto shrinker_err; -#ifdef CONFIG_EROFS_FS_ZIP err = z_erofs_init_zip_subsystem(); if (err) goto zip_err; -#endif err = register_filesystem(&erofs_fs_type); if (err) @@ -555,10 +586,8 @@ static int __init erofs_module_init(void) return 0; fs_err: -#ifdef CONFIG_EROFS_FS_ZIP z_erofs_exit_zip_subsystem(); zip_err: -#endif unregister_shrinker(&erofs_shrinker_info); shrinker_err: erofs_exit_inode_cache(); @@ -569,9 +598,7 @@ icache_err: static void __exit erofs_module_exit(void) { unregister_filesystem(&erofs_fs_type); -#ifdef CONFIG_EROFS_FS_ZIP z_erofs_exit_zip_subsystem(); -#endif unregister_shrinker(&erofs_shrinker_info); erofs_exit_inode_cache(); infoln("successfully finalize erofs"); @@ -615,20 +642,31 @@ static int erofs_show_options(struct seq_file *seq, struct dentry *root) else seq_puts(seq, ",noacl"); #endif -#ifdef CONFIG_EROFS_FAULT_INJECTION if (test_opt(sbi, FAULT_INJECTION)) seq_printf(seq, ",fault_injection=%u", - sbi->fault_info.inject_rate); -#endif + erofs_get_fault_rate(sbi)); return 0; } static int erofs_remount(struct super_block *sb, int *flags, char *data) { + struct erofs_sb_info *sbi = EROFS_SB(sb); + unsigned int org_mnt_opt = sbi->mount_opt; + unsigned int org_inject_rate = erofs_get_fault_rate(sbi); + int err; + BUG_ON(!sb_rdonly(sb)); + err = parse_options(sb, data); + if (err) + goto out; *flags |= SB_RDONLY; return 0; +out: + __erofs_build_fault_attr(sbi, org_inject_rate); + sbi->mount_opt = org_mnt_opt; + + return err; } const struct super_operations erofs_sops = { diff --git a/drivers/staging/erofs/unzip_vle.c b/drivers/staging/erofs/unzip_vle.c index 8721f0a41d15..79d3ba62b298 100644 --- a/drivers/staging/erofs/unzip_vle.c +++ b/drivers/staging/erofs/unzip_vle.c @@ -13,6 +13,8 @@ #include "unzip_vle.h" #include <linux/prefetch.h> +#include <trace/events/erofs.h> + static struct workqueue_struct *z_erofs_workqueue __read_mostly; static struct kmem_cache *z_erofs_workgroup_cachep __read_mostly; @@ -27,7 +29,7 @@ void z_erofs_exit_zip_subsystem(void) static inline int init_unzip_workqueue(void) { - const unsigned onlinecpus = num_possible_cpus(); + const unsigned int onlinecpus = num_possible_cpus(); /* * we don't need too many threads, limiting threads @@ -40,7 +42,7 @@ static inline int init_unzip_workqueue(void) return z_erofs_workqueue != NULL ? 0 : -ENOMEM; } -int z_erofs_init_zip_subsystem(void) +int __init z_erofs_init_zip_subsystem(void) { z_erofs_workgroup_cachep = kmem_cache_create("erofs_compress", @@ -89,7 +91,7 @@ struct z_erofs_vle_work_builder { /* pages used for reading the compressed data */ struct page **compressed_pages; - unsigned compressed_deficit; + unsigned int compressed_deficit; }; #define VLE_WORK_BUILDER_INIT() \ @@ -232,7 +234,7 @@ static int z_erofs_vle_work_add_page( ret = z_erofs_pagevec_ctor_enqueue(&builder->vector, page, type, &occupied); - builder->work->vcnt += (unsigned)ret; + builder->work->vcnt += (unsigned int)ret; return ret ? 0 : -EAGAIN; } @@ -271,36 +273,39 @@ retry: return true; /* lucky, I am the followee :) */ } +struct z_erofs_vle_work_finder { + struct super_block *sb; + pgoff_t idx; + unsigned int pageofs; + + struct z_erofs_vle_workgroup **grp_ret; + enum z_erofs_vle_work_role *role; + z_erofs_vle_owned_workgrp_t *owned_head; + bool *hosted; +}; + static struct z_erofs_vle_work * -z_erofs_vle_work_lookup(struct super_block *sb, - pgoff_t idx, unsigned pageofs, - struct z_erofs_vle_workgroup **grp_ret, - enum z_erofs_vle_work_role *role, - z_erofs_vle_owned_workgrp_t *owned_head, - bool *hosted) +z_erofs_vle_work_lookup(const struct z_erofs_vle_work_finder *f) { bool tag, primary; struct erofs_workgroup *egrp; struct z_erofs_vle_workgroup *grp; struct z_erofs_vle_work *work; - egrp = erofs_find_workgroup(sb, idx, &tag); + egrp = erofs_find_workgroup(f->sb, f->idx, &tag); if (egrp == NULL) { - *grp_ret = NULL; + *f->grp_ret = NULL; return NULL; } - *grp_ret = grp = container_of(egrp, - struct z_erofs_vle_workgroup, obj); + grp = container_of(egrp, struct z_erofs_vle_workgroup, obj); + *f->grp_ret = grp; -#ifndef CONFIG_EROFS_FS_ZIP_MULTIREF - work = z_erofs_vle_grab_work(grp, pageofs); + work = z_erofs_vle_grab_work(grp, f->pageofs); + /* if multiref is disabled, `primary' is always true */ primary = true; -#else - BUG(); -#endif - DBG_BUGON(work->pageofs != pageofs); + DBG_BUGON(work->pageofs != f->pageofs); /* * lock must be taken first to avoid grp->next == NIL between @@ -340,43 +345,35 @@ z_erofs_vle_work_lookup(struct super_block *sb, */ mutex_lock(&work->lock); - *hosted = false; + *f->hosted = false; if (!primary) - *role = Z_EROFS_VLE_WORK_SECONDARY; + *f->role = Z_EROFS_VLE_WORK_SECONDARY; /* claim the workgroup if possible */ - else if (try_to_claim_workgroup(grp, owned_head, hosted)) - *role = Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED; + else if (try_to_claim_workgroup(grp, f->owned_head, f->hosted)) + *f->role = Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED; else - *role = Z_EROFS_VLE_WORK_PRIMARY; + *f->role = Z_EROFS_VLE_WORK_PRIMARY; return work; } static struct z_erofs_vle_work * -z_erofs_vle_work_register(struct super_block *sb, - struct z_erofs_vle_workgroup **grp_ret, - struct erofs_map_blocks *map, - pgoff_t index, unsigned pageofs, - enum z_erofs_vle_work_role *role, - z_erofs_vle_owned_workgrp_t *owned_head, - bool *hosted) +z_erofs_vle_work_register(const struct z_erofs_vle_work_finder *f, + struct erofs_map_blocks *map) { - bool newgrp = false; - struct z_erofs_vle_workgroup *grp = *grp_ret; + bool gnew = false; + struct z_erofs_vle_workgroup *grp = *f->grp_ret; struct z_erofs_vle_work *work; -#ifndef CONFIG_EROFS_FS_ZIP_MULTIREF + /* if multiref is disabled, grp should never be nullptr */ BUG_ON(grp != NULL); -#else - if (grp != NULL) - goto skip; -#endif + /* no available workgroup, let's allocate one */ grp = kmem_cache_zalloc(z_erofs_workgroup_cachep, GFP_NOFS); if (unlikely(grp == NULL)) return ERR_PTR(-ENOMEM); - grp->obj.index = index; + grp->obj.index = f->idx; grp->llen = map->m_llen; z_erofs_vle_set_workgrp_fmt(grp, @@ -386,26 +383,20 @@ z_erofs_vle_work_register(struct super_block *sb, atomic_set(&grp->obj.refcount, 1); /* new workgrps have been claimed as type 1 */ - WRITE_ONCE(grp->next, *owned_head); + WRITE_ONCE(grp->next, *f->owned_head); /* primary and followed work for all new workgrps */ - *role = Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED; + *f->role = Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED; /* it should be submitted by ourselves */ - *hosted = true; + *f->hosted = true; - newgrp = true; -#ifdef CONFIG_EROFS_FS_ZIP_MULTIREF -skip: - /* currently unimplemented */ - BUG(); -#else + gnew = true; work = z_erofs_vle_grab_primary_work(grp); -#endif - work->pageofs = pageofs; + work->pageofs = f->pageofs; mutex_init(&work->lock); - if (newgrp) { - int err = erofs_register_workgroup(sb, &grp->obj, 0); + if (gnew) { + int err = erofs_register_workgroup(f->sb, &grp->obj, 0); if (err) { kmem_cache_free(z_erofs_workgroup_cachep, grp); @@ -413,24 +404,12 @@ skip: } } - *owned_head = *grp_ret = grp; + *f->owned_head = *f->grp_ret = grp; mutex_lock(&work->lock); return work; } -static inline void __update_workgrp_llen(struct z_erofs_vle_workgroup *grp, - unsigned int llen) -{ - while (1) { - unsigned int orig_llen = grp->llen; - - if (orig_llen >= llen || orig_llen == - cmpxchg(&grp->llen, orig_llen, llen)) - break; - } -} - #define builder_is_followed(builder) \ ((builder)->role >= Z_EROFS_VLE_WORK_PRIMARY_FOLLOWED) @@ -439,10 +418,17 @@ static int z_erofs_vle_work_iter_begin(struct z_erofs_vle_work_builder *builder, struct erofs_map_blocks *map, z_erofs_vle_owned_workgrp_t *owned_head) { - const unsigned clusterpages = erofs_clusterpages(EROFS_SB(sb)); - const erofs_blk_t index = erofs_blknr(map->m_pa); - const unsigned pageofs = map->m_la & ~PAGE_MASK; + const unsigned int clusterpages = erofs_clusterpages(EROFS_SB(sb)); struct z_erofs_vle_workgroup *grp; + const struct z_erofs_vle_work_finder finder = { + .sb = sb, + .idx = erofs_blknr(map->m_pa), + .pageofs = map->m_la & ~PAGE_MASK, + .grp_ret = &grp, + .role = &builder->role, + .owned_head = owned_head, + .hosted = &builder->hosted + }; struct z_erofs_vle_work *work; DBG_BUGON(builder->work != NULL); @@ -454,16 +440,19 @@ static int z_erofs_vle_work_iter_begin(struct z_erofs_vle_work_builder *builder, DBG_BUGON(erofs_blkoff(map->m_pa)); repeat: - work = z_erofs_vle_work_lookup(sb, index, - pageofs, &grp, &builder->role, owned_head, &builder->hosted); + work = z_erofs_vle_work_lookup(&finder); if (work != NULL) { - __update_workgrp_llen(grp, map->m_llen); + unsigned int orig_llen; + + /* increase workgroup `llen' if needed */ + while ((orig_llen = READ_ONCE(grp->llen)) < map->m_llen && + orig_llen != cmpxchg_relaxed(&grp->llen, + orig_llen, map->m_llen)) + cpu_relax(); goto got_it; } - work = z_erofs_vle_work_register(sb, &grp, map, index, pageofs, - &builder->role, owned_head, &builder->hosted); - + work = z_erofs_vle_work_register(&finder, map); if (unlikely(work == ERR_PTR(-EAGAIN))) goto repeat; @@ -605,8 +594,10 @@ static int z_erofs_do_read_page(struct z_erofs_vle_frontend *fe, #endif enum z_erofs_page_type page_type; - unsigned cur, end, spiltted, index; - int err; + unsigned int cur, end, spiltted, index; + int err = 0; + + trace_erofs_readpage(page, false); /* register locked file pages as online pages in pack */ z_erofs_onlinepage_init(page); @@ -624,7 +615,7 @@ repeat: /* go ahead the next map_blocks */ debugln("%s: [out-of-range] pos %llu", __func__, offset + cur); - if (!z_erofs_vle_work_iter_end(builder)) + if (z_erofs_vle_work_iter_end(builder)) fe->initial = false; map->m_la = offset + cur; @@ -633,12 +624,11 @@ repeat: if (unlikely(err)) goto err_out; - /* deal with hole (FIXME! broken now) */ if (unlikely(!(map->m_flags & EROFS_MAP_MAPPED))) goto hitted; DBG_BUGON(map->m_plen != 1 << sbi->clusterbits); - BUG_ON(erofs_blkoff(map->m_pa)); + DBG_BUGON(erofs_blkoff(map->m_pa)); err = z_erofs_vle_work_iter_begin(builder, sb, map, &fe->owned_head); if (unlikely(err)) @@ -662,7 +652,7 @@ repeat: tight &= builder_is_followed(builder); work = builder->work; hitted: - cur = end - min_t(unsigned, offset + end - map->m_la, end); + cur = end - min_t(unsigned int, offset + end - map->m_la, end); if (unlikely(!(map->m_flags & EROFS_MAP_MAPPED))) { zero_user_segment(page, cur, end); goto next_part; @@ -683,7 +673,7 @@ retry: err = z_erofs_vle_work_add_page(builder, newpage, Z_EROFS_PAGE_TYPE_EXCLUSIVE); - if (!err) + if (likely(!err)) goto retry; } @@ -694,9 +684,10 @@ retry: /* FIXME! avoid the last relundant fixup & endio */ z_erofs_onlinepage_fixup(page, index, true); - ++spiltted; - /* also update nr_pages and increase queued_pages */ + /* bump up the number of spiltted parts of a page */ + ++spiltted; + /* also update nr_pages */ work->nr_pages = max_t(pgoff_t, work->nr_pages, index + 1); next_part: /* can be used for verification */ @@ -706,16 +697,18 @@ next_part: if (end > 0) goto repeat; +out: /* FIXME! avoid the last relundant fixup & endio */ z_erofs_onlinepage_endio(page); debugln("%s, finish page: %pK spiltted: %u map->m_llen %llu", __func__, page, spiltted, map->m_llen); - return 0; + return err; + /* if some error occurred while processing this page */ err_out: - /* TODO: the missing error handing cases */ - return err; + SetPageError(page); + goto out; } static void z_erofs_vle_unzip_kickoff(void *ptr, int bios) @@ -736,7 +729,7 @@ static void z_erofs_vle_unzip_kickoff(void *ptr, int bios) static inline void z_erofs_vle_read_endio(struct bio *bio) { const blk_status_t err = bio->bi_status; - unsigned i; + unsigned int i; struct bio_vec *bvec; #ifdef EROFS_FS_HAS_MANAGED_CACHE struct address_space *mngda = NULL; @@ -788,16 +781,14 @@ static int z_erofs_vle_unzip(struct super_block *sb, #ifdef EROFS_FS_HAS_MANAGED_CACHE struct address_space *const mngda = sbi->managed_cache->i_mapping; #endif - const unsigned clusterpages = erofs_clusterpages(sbi); + const unsigned int clusterpages = erofs_clusterpages(sbi); struct z_erofs_pagevec_ctor ctor; - unsigned nr_pages; -#ifndef CONFIG_EROFS_FS_ZIP_MULTIREF - unsigned sparsemem_pages = 0; -#endif + unsigned int nr_pages; + unsigned int sparsemem_pages = 0; struct page *pages_onstack[Z_EROFS_VLE_VMAP_ONSTACK_PAGES]; struct page **pages, **compressed_pages, *page; - unsigned i, llen; + unsigned int i, llen; enum z_erofs_page_type page_type; bool overlapped; @@ -806,11 +797,7 @@ static int z_erofs_vle_unzip(struct super_block *sb, int err; might_sleep(); -#ifndef CONFIG_EROFS_FS_ZIP_MULTIREF work = z_erofs_vle_grab_primary_work(grp); -#else - BUG(); -#endif BUG_ON(!READ_ONCE(work->nr_pages)); mutex_lock(&work->lock); @@ -844,7 +831,7 @@ repeat: Z_EROFS_VLE_INLINE_PAGEVECS, work->pagevec, 0); for (i = 0; i < work->vcnt; ++i) { - unsigned pagenr; + unsigned int pagenr; page = z_erofs_pagevec_ctor_dequeue(&ctor, &page_type); @@ -861,13 +848,11 @@ repeat: pagenr = z_erofs_onlinepage_index(page); BUG_ON(pagenr >= nr_pages); - -#ifndef CONFIG_EROFS_FS_ZIP_MULTIREF BUG_ON(pages[pagenr] != NULL); - ++sparsemem_pages; -#endif + pages[pagenr] = page; } + sparsemem_pages = i; z_erofs_pagevec_ctor_exit(&ctor, true); @@ -875,7 +860,7 @@ repeat: compressed_pages = grp->compressed_pages; for (i = 0; i < clusterpages; ++i) { - unsigned pagenr; + unsigned int pagenr; page = compressed_pages[i]; @@ -897,10 +882,8 @@ repeat: pagenr = z_erofs_onlinepage_index(page); BUG_ON(pagenr >= nr_pages); -#ifndef CONFIG_EROFS_FS_ZIP_MULTIREF BUG_ON(pages[pagenr] != NULL); ++sparsemem_pages; -#endif pages[pagenr] = page; overlapped = true; @@ -926,12 +909,10 @@ repeat: if (err != -ENOTSUPP) goto out_percpu; -#ifndef CONFIG_EROFS_FS_ZIP_MULTIREF if (sparsemem_pages >= nr_pages) { BUG_ON(sparsemem_pages > nr_pages); goto skip_allocpage; } -#endif for (i = 0; i < nr_pages; ++i) { if (pages[i] != NULL) @@ -940,9 +921,7 @@ repeat: pages[i] = __stagingpage_alloc(page_pool, GFP_NOFS); } -#ifndef CONFIG_EROFS_FS_ZIP_MULTIREF skip_allocpage: -#endif vout = erofs_vmap(pages, nr_pages); err = z_erofs_vle_unzip_vmap(compressed_pages, @@ -1100,7 +1079,7 @@ static bool z_erofs_vle_submit_all(struct super_block *sb, bool force_fg) { struct erofs_sb_info *const sbi = EROFS_SB(sb); - const unsigned clusterpages = erofs_clusterpages(sbi); + const unsigned int clusterpages = erofs_clusterpages(sbi); const gfp_t gfp = GFP_NOFS; #ifdef EROFS_FS_HAS_MANAGED_CACHE struct address_space *const mngda = sbi->managed_cache->i_mapping; @@ -1112,7 +1091,7 @@ static bool z_erofs_vle_submit_all(struct super_block *sb, /* since bio will be NULL, no need to initialize last_index */ pgoff_t uninitialized_var(last_index); bool force_submit = false; - unsigned nr_bios; + unsigned int nr_bios; if (unlikely(owned_head == Z_EROFS_VLE_WORKGRP_TAIL)) return false; @@ -1144,7 +1123,7 @@ static bool z_erofs_vle_submit_all(struct super_block *sb, struct z_erofs_vle_workgroup *grp; struct page **compressed_pages, *oldpage, *page; pgoff_t first_index; - unsigned i = 0; + unsigned int i = 0; #ifdef EROFS_FS_HAS_MANAGED_CACHE unsigned int noio = 0; bool cachemngd; @@ -1213,8 +1192,8 @@ submit_bio_retry: } if (bio == NULL) { - bio = prepare_bio(sb, first_index + i, - BIO_MAX_PAGES, z_erofs_vle_read_endio); + bio = erofs_grab_bio(sb, first_index + i, + BIO_MAX_PAGES, z_erofs_vle_read_endio, true); bio->bi_private = tagptr_cast_ptr(bi_private); ++nr_bios; @@ -1309,7 +1288,7 @@ static int z_erofs_vle_normalaccess_readpage(struct file *file, LIST_HEAD(pagepool); #if (EROFS_FS_ZIP_CACHE_LVL >= 2) - f.cachedzone_la = page->index << PAGE_SHIFT; + f.cachedzone_la = (erofs_off_t)page->index << PAGE_SHIFT; #endif err = z_erofs_do_read_page(&f, page, &pagepool); (void)z_erofs_vle_work_iter_end(&f.builder); @@ -1329,20 +1308,25 @@ out: return 0; } -static inline int __z_erofs_vle_normalaccess_readpages( - struct file *filp, - struct address_space *mapping, - struct list_head *pages, unsigned nr_pages, bool sync) +static int z_erofs_vle_normalaccess_readpages(struct file *filp, + struct address_space *mapping, + struct list_head *pages, + unsigned int nr_pages) { struct inode *const inode = mapping->host; + struct erofs_sb_info *const sbi = EROFS_I_SB(inode); + const bool sync = __should_decompress_synchronously(sbi, nr_pages); struct z_erofs_vle_frontend f = VLE_FRONTEND_INIT(inode); gfp_t gfp = mapping_gfp_constraint(mapping, GFP_KERNEL); struct page *head = NULL; LIST_HEAD(pagepool); + trace_erofs_readpages(mapping->host, lru_to_page(pages), + nr_pages, false); + #if (EROFS_FS_ZIP_CACHE_LVL >= 2) - f.cachedzone_la = lru_to_page(pages)->index << PAGE_SHIFT; + f.cachedzone_la = (erofs_off_t)lru_to_page(pages)->index << PAGE_SHIFT; #endif for (; nr_pages; --nr_pages) { struct page *page = lru_to_page(pages); @@ -1390,56 +1374,45 @@ static inline int __z_erofs_vle_normalaccess_readpages( return 0; } -static int z_erofs_vle_normalaccess_readpages( - struct file *filp, - struct address_space *mapping, - struct list_head *pages, unsigned nr_pages) -{ - return __z_erofs_vle_normalaccess_readpages(filp, - mapping, pages, nr_pages, - nr_pages < 4 /* sync */); -} - const struct address_space_operations z_erofs_vle_normalaccess_aops = { .readpage = z_erofs_vle_normalaccess_readpage, .readpages = z_erofs_vle_normalaccess_readpages, }; +/* + * Variable-sized Logical Extent (Fixed Physical Cluster) Compression Mode + * --- + * VLE compression mode attempts to compress a number of logical data into + * a physical cluster with a fixed size. + * VLE compression mode uses "struct z_erofs_vle_decompressed_index". + */ #define __vle_cluster_advise(x, bit, bits) \ ((le16_to_cpu(x) >> (bit)) & ((1 << (bits)) - 1)) #define __vle_cluster_type(advise) __vle_cluster_advise(advise, \ Z_EROFS_VLE_DI_CLUSTER_TYPE_BIT, Z_EROFS_VLE_DI_CLUSTER_TYPE_BITS) -enum { - Z_EROFS_VLE_CLUSTER_TYPE_PLAIN, - Z_EROFS_VLE_CLUSTER_TYPE_HEAD, - Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD, - Z_EROFS_VLE_CLUSTER_TYPE_RESERVED, - Z_EROFS_VLE_CLUSTER_TYPE_MAX -}; - #define vle_cluster_type(di) \ __vle_cluster_type((di)->di_advise) -static inline unsigned -vle_compressed_index_clusterofs(unsigned clustersize, - struct z_erofs_vle_decompressed_index *di) +static int +vle_decompressed_index_clusterofs(unsigned int *clusterofs, + unsigned int clustersize, + struct z_erofs_vle_decompressed_index *di) { - debugln("%s, vle=%pK, advise=%x (type %u), clusterofs=%x blkaddr=%x", - __func__, di, di->di_advise, vle_cluster_type(di), - di->di_clusterofs, di->di_u.blkaddr); - switch (vle_cluster_type(di)) { case Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD: + *clusterofs = clustersize; break; case Z_EROFS_VLE_CLUSTER_TYPE_PLAIN: case Z_EROFS_VLE_CLUSTER_TYPE_HEAD: - return di->di_clusterofs; + *clusterofs = le16_to_cpu(di->di_clusterofs); + break; default: - BUG_ON(1); + DBG_BUGON(1); + return -EIO; } - return clustersize; + return 0; } static inline erofs_blk_t @@ -1448,7 +1421,7 @@ vle_extent_blkaddr(struct inode *inode, pgoff_t index) struct erofs_sb_info *sbi = EROFS_I_SB(inode); struct erofs_vnode *vi = EROFS_V(inode); - unsigned ofs = Z_EROFS_VLE_EXTENT_ALIGN(vi->inode_isize + + unsigned int ofs = Z_EROFS_VLE_EXTENT_ALIGN(vi->inode_isize + vi->xattr_isize) + sizeof(struct erofs_extent_header) + index * sizeof(struct z_erofs_vle_decompressed_index); @@ -1461,95 +1434,117 @@ vle_extent_blkoff(struct inode *inode, pgoff_t index) struct erofs_sb_info *sbi = EROFS_I_SB(inode); struct erofs_vnode *vi = EROFS_V(inode); - unsigned ofs = Z_EROFS_VLE_EXTENT_ALIGN(vi->inode_isize + + unsigned int ofs = Z_EROFS_VLE_EXTENT_ALIGN(vi->inode_isize + vi->xattr_isize) + sizeof(struct erofs_extent_header) + index * sizeof(struct z_erofs_vle_decompressed_index); return erofs_blkoff(iloc(sbi, vi->nid) + ofs); } -/* - * Variable-sized Logical Extent (Fixed Physical Cluster) Compression Mode - * --- - * VLE compression mode attempts to compress a number of logical data into - * a physical cluster with a fixed size. - * VLE compression mode uses "struct z_erofs_vle_decompressed_index". - */ -static erofs_off_t vle_get_logical_extent_head( - struct inode *inode, - struct page **page_iter, - void **kaddr_iter, - unsigned lcn, /* logical cluster number */ - erofs_blk_t *pcn, - unsigned *flags) +struct vle_map_blocks_iter_ctx { + struct inode *inode; + struct super_block *sb; + unsigned int clusterbits; + + struct page **mpage_ret; + void **kaddr_ret; +}; + +static int +vle_get_logical_extent_head(const struct vle_map_blocks_iter_ctx *ctx, + unsigned int lcn, /* logical cluster number */ + unsigned long long *ofs, + erofs_blk_t *pblk, + unsigned int *flags) { - /* for extent meta */ - struct page *page = *page_iter; - erofs_blk_t blkaddr = vle_extent_blkaddr(inode, lcn); + const unsigned int clustersize = 1 << ctx->clusterbits; + const erofs_blk_t mblk = vle_extent_blkaddr(ctx->inode, lcn); + struct page *mpage = *ctx->mpage_ret; /* extent metapage */ + struct z_erofs_vle_decompressed_index *di; - unsigned long long ofs; - const unsigned int clusterbits = EROFS_SB(inode->i_sb)->clusterbits; - const unsigned int clustersize = 1 << clusterbits; + unsigned int cluster_type, delta0; - if (page->index != blkaddr) { - kunmap_atomic(*kaddr_iter); - unlock_page(page); - put_page(page); + if (mpage->index != mblk) { + kunmap_atomic(*ctx->kaddr_ret); + unlock_page(mpage); + put_page(mpage); - *page_iter = page = erofs_get_meta_page(inode->i_sb, - blkaddr, false); - *kaddr_iter = kmap_atomic(page); + mpage = erofs_get_meta_page(ctx->sb, mblk, false); + if (IS_ERR(mpage)) { + *ctx->mpage_ret = NULL; + return PTR_ERR(mpage); + } + *ctx->mpage_ret = mpage; + *ctx->kaddr_ret = kmap_atomic(mpage); } - di = *kaddr_iter + vle_extent_blkoff(inode, lcn); - switch (vle_cluster_type(di)) { - case Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD: - BUG_ON(!di->di_u.delta[0]); - BUG_ON(lcn < di->di_u.delta[0]); + di = *ctx->kaddr_ret + vle_extent_blkoff(ctx->inode, lcn); - ofs = vle_get_logical_extent_head(inode, - page_iter, kaddr_iter, - lcn - di->di_u.delta[0], pcn, flags); - break; + cluster_type = vle_cluster_type(di); + switch (cluster_type) { + case Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD: + delta0 = le16_to_cpu(di->di_u.delta[0]); + if (unlikely(!delta0 || delta0 > lcn)) { + errln("invalid NONHEAD dl0 %u at lcn %u of nid %llu", + delta0, lcn, EROFS_V(ctx->inode)->nid); + DBG_BUGON(1); + return -EIO; + } + return vle_get_logical_extent_head(ctx, + lcn - delta0, ofs, pblk, flags); case Z_EROFS_VLE_CLUSTER_TYPE_PLAIN: *flags ^= EROFS_MAP_ZIPPED; + /* fallthrough */ case Z_EROFS_VLE_CLUSTER_TYPE_HEAD: /* clustersize should be a power of two */ - ofs = ((unsigned long long)lcn << clusterbits) + + *ofs = ((u64)lcn << ctx->clusterbits) + (le16_to_cpu(di->di_clusterofs) & (clustersize - 1)); - *pcn = le32_to_cpu(di->di_u.blkaddr); + *pblk = le32_to_cpu(di->di_u.blkaddr); break; default: - BUG_ON(1); + errln("unknown cluster type %u at lcn %u of nid %llu", + cluster_type, lcn, EROFS_V(ctx->inode)->nid); + DBG_BUGON(1); + return -EIO; } - return ofs; + return 0; } int z_erofs_map_blocks_iter(struct inode *inode, struct erofs_map_blocks *map, struct page **mpage_ret, int flags) { + void *kaddr; + const struct vle_map_blocks_iter_ctx ctx = { + .inode = inode, + .sb = inode->i_sb, + .clusterbits = EROFS_I_SB(inode)->clusterbits, + .mpage_ret = mpage_ret, + .kaddr_ret = &kaddr + }; + const unsigned int clustersize = 1 << ctx.clusterbits; + /* if both m_(l,p)len are 0, regularize l_lblk, l_lofs, etc... */ + const bool initial = !map->m_llen; + /* logicial extent (start, end) offset */ unsigned long long ofs, end; - struct z_erofs_vle_decompressed_index *di; - erofs_blk_t e_blkaddr, pcn; - unsigned lcn, logical_cluster_ofs, cluster_type; + unsigned int lcn; u32 ofs_rem; + + /* initialize `pblk' to keep gcc from printing foolish warnings */ + erofs_blk_t mblk, pblk = 0; struct page *mpage = *mpage_ret; - void *kaddr; - bool initial; - const unsigned int clusterbits = EROFS_SB(inode->i_sb)->clusterbits; - const unsigned int clustersize = 1 << clusterbits; + struct z_erofs_vle_decompressed_index *di; + unsigned int cluster_type, logical_cluster_ofs; int err = 0; - /* if both m_(l,p)len are 0, regularize l_lblk, l_lofs, etc... */ - initial = !map->m_llen; + trace_z_erofs_map_blocks_iter_enter(inode, map, flags); /* when trying to read beyond EOF, leave it unmapped */ if (unlikely(map->m_la >= inode->i_size)) { - BUG_ON(!initial); + DBG_BUGON(!initial); map->m_llen = map->m_la + 1 - inode->i_size; - map->m_la = inode->i_size - 1; + map->m_la = inode->i_size; map->m_flags = 0; goto out; } @@ -1560,16 +1555,20 @@ int z_erofs_map_blocks_iter(struct inode *inode, ofs = map->m_la + map->m_llen; /* clustersize should be power of two */ - lcn = ofs >> clusterbits; + lcn = ofs >> ctx.clusterbits; ofs_rem = ofs & (clustersize - 1); - e_blkaddr = vle_extent_blkaddr(inode, lcn); + mblk = vle_extent_blkaddr(inode, lcn); - if (mpage == NULL || mpage->index != e_blkaddr) { + if (!mpage || mpage->index != mblk) { if (mpage != NULL) put_page(mpage); - mpage = erofs_get_meta_page(inode->i_sb, e_blkaddr, false); + mpage = erofs_get_meta_page(ctx.sb, mblk, false); + if (IS_ERR(mpage)) { + err = PTR_ERR(mpage); + goto out; + } *mpage_ret = mpage; } else { lock_page(mpage); @@ -1579,10 +1578,14 @@ int z_erofs_map_blocks_iter(struct inode *inode, kaddr = kmap_atomic(mpage); di = kaddr + vle_extent_blkoff(inode, lcn); - debugln("%s, lcn %u e_blkaddr %u e_blkoff %u", __func__, lcn, - e_blkaddr, vle_extent_blkoff(inode, lcn)); + debugln("%s, lcn %u mblk %u e_blkoff %u", __func__, lcn, + mblk, vle_extent_blkoff(inode, lcn)); + + err = vle_decompressed_index_clusterofs(&logical_cluster_ofs, + clustersize, di); + if (unlikely(err)) + goto unmap_out; - logical_cluster_ofs = vle_compressed_index_clusterofs(clustersize, di); if (!initial) { /* [walking mode] 'map' has been already initialized */ map->m_llen += logical_cluster_ofs; @@ -1592,7 +1595,7 @@ int z_erofs_map_blocks_iter(struct inode *inode, /* by default, compressed */ map->m_flags |= EROFS_MAP_ZIPPED; - end = (u64)(lcn + 1) * clustersize; + end = ((u64)lcn + 1) * clustersize; cluster_type = vle_cluster_type(di); @@ -1603,13 +1606,13 @@ int z_erofs_map_blocks_iter(struct inode *inode, /* fallthrough */ case Z_EROFS_VLE_CLUSTER_TYPE_HEAD: if (ofs_rem == logical_cluster_ofs) { - pcn = le32_to_cpu(di->di_u.blkaddr); + pblk = le32_to_cpu(di->di_u.blkaddr); goto exact_hitted; } if (ofs_rem > logical_cluster_ofs) { - ofs = lcn * clustersize | logical_cluster_ofs; - pcn = le32_to_cpu(di->di_u.blkaddr); + ofs = (u64)lcn * clustersize | logical_cluster_ofs; + pblk = le32_to_cpu(di->di_u.blkaddr); break; } @@ -1620,13 +1623,19 @@ int z_erofs_map_blocks_iter(struct inode *inode, err = -EIO; goto unmap_out; } - end = (lcn-- * clustersize) | logical_cluster_ofs; + end = ((u64)lcn-- * clustersize) | logical_cluster_ofs; /* fallthrough */ case Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD: /* get the correspoinding first chunk */ - ofs = vle_get_logical_extent_head(inode, mpage_ret, - &kaddr, lcn, &pcn, &map->m_flags); + err = vle_get_logical_extent_head(&ctx, lcn, &ofs, + &pblk, &map->m_flags); mpage = *mpage_ret; + + if (unlikely(err)) { + if (mpage) + goto unmap_out; + goto out; + } break; default: errln("unknown cluster type %u at offset %llu of nid %llu", @@ -1639,7 +1648,7 @@ int z_erofs_map_blocks_iter(struct inode *inode, exact_hitted: map->m_llen = end - ofs; map->m_plen = clustersize; - map->m_pa = blknr_to_addr(pcn); + map->m_pa = blknr_to_addr(pblk); map->m_flags |= EROFS_MAP_MAPPED; unmap_out: kunmap_atomic(kaddr); @@ -1649,8 +1658,10 @@ out: __func__, map->m_la, map->m_pa, map->m_llen, map->m_plen, map->m_flags); + trace_z_erofs_map_blocks_iter_exit(inode, map, flags, err); + /* aggressively BUG_ON iff CONFIG_EROFS_FS_DEBUG is on */ - DBG_BUGON(err < 0); + DBG_BUGON(err < 0 && err != -ENOMEM); return err; } diff --git a/drivers/staging/erofs/unzip_vle.h b/drivers/staging/erofs/unzip_vle.h index 393998500865..3316bc36965d 100644 --- a/drivers/staging/erofs/unzip_vle.h +++ b/drivers/staging/erofs/unzip_vle.h @@ -47,13 +47,6 @@ static inline bool z_erofs_gather_if_stagingpage(struct list_head *page_pool, #define Z_EROFS_VLE_INLINE_PAGEVECS 3 struct z_erofs_vle_work { - /* struct z_erofs_vle_work *left, *right; */ - -#ifdef CONFIG_EROFS_FS_ZIP_MULTIREF - struct list_head list; - - atomic_t refcount; -#endif struct mutex lock; /* I: decompression offset in page */ @@ -107,10 +100,8 @@ static inline void z_erofs_vle_set_workgrp_fmt( grp->flags = fmt | (grp->flags & ~Z_EROFS_VLE_WORKGRP_FMT_MASK); } -#ifdef CONFIG_EROFS_FS_ZIP_MULTIREF -#error multiref decompression is unimplemented yet -#else +/* definitions if multiref is disabled */ #define z_erofs_vle_grab_primary_work(grp) (&(grp)->work) #define z_erofs_vle_grab_work(grp, pageofs) (&(grp)->work) #define z_erofs_vle_work_workgroup(wrk, primary) \ @@ -118,7 +109,6 @@ static inline void z_erofs_vle_set_workgrp_fmt( struct z_erofs_vle_workgroup, work) : \ ({ BUG(); (void *)NULL; })) -#endif #define Z_EROFS_WORKGROUP_SIZE sizeof(struct z_erofs_vle_workgroup) diff --git a/drivers/staging/erofs/unzip_vle_lz4.c b/drivers/staging/erofs/unzip_vle_lz4.c index f5b665f15be5..1a428658cbea 100644 --- a/drivers/staging/erofs/unzip_vle_lz4.c +++ b/drivers/staging/erofs/unzip_vle_lz4.c @@ -23,14 +23,14 @@ static struct { } erofs_pcpubuf[NR_CPUS]; int z_erofs_vle_plain_copy(struct page **compressed_pages, - unsigned clusterpages, + unsigned int clusterpages, struct page **pages, - unsigned nr_pages, + unsigned int nr_pages, unsigned short pageofs) { - unsigned i, j; + unsigned int i, j; void *src = NULL; - const unsigned righthalf = PAGE_SIZE - pageofs; + const unsigned int righthalf = PAGE_SIZE - pageofs; char *percpu_data; bool mirrored[Z_EROFS_CLUSTER_MAX_PAGES] = { 0 }; @@ -42,8 +42,8 @@ int z_erofs_vle_plain_copy(struct page **compressed_pages, struct page *page = pages[i]; void *dst; - if (page == NULL) { - if (src != NULL) { + if (!page) { + if (src) { if (!mirrored[j]) kunmap_atomic(src); src = NULL; @@ -64,14 +64,14 @@ int z_erofs_vle_plain_copy(struct page **compressed_pages, } if (i) { - if (src == NULL) - src = mirrored[i-1] ? - percpu_data + (i-1) * PAGE_SIZE : - kmap_atomic(compressed_pages[i-1]); + if (!src) + src = mirrored[i - 1] ? + percpu_data + (i - 1) * PAGE_SIZE : + kmap_atomic(compressed_pages[i - 1]); memcpy(dst, src + righthalf, pageofs); - if (!mirrored[i-1]) + if (!mirrored[i - 1]) kunmap_atomic(src); if (unlikely(i >= clusterpages)) { @@ -80,9 +80,9 @@ int z_erofs_vle_plain_copy(struct page **compressed_pages, } } - if (!righthalf) + if (!righthalf) { src = NULL; - else { + } else { src = mirrored[i] ? percpu_data + i * PAGE_SIZE : kmap_atomic(compressed_pages[i]); @@ -92,7 +92,7 @@ int z_erofs_vle_plain_copy(struct page **compressed_pages, kunmap_atomic(dst); } - if (src != NULL && !mirrored[j]) + if (src && !mirrored[j]) kunmap_atomic(src); preempt_enable(); @@ -102,14 +102,14 @@ int z_erofs_vle_plain_copy(struct page **compressed_pages, extern int z_erofs_unzip_lz4(void *in, void *out, size_t inlen, size_t outlen); int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, - unsigned clusterpages, + unsigned int clusterpages, struct page **pages, - unsigned outlen, + unsigned int outlen, unsigned short pageofs, void (*endio)(struct page *)) { void *vin, *vout; - unsigned nr_pages, i, j; + unsigned int nr_pages, i, j; int ret; if (outlen + pageofs > EROFS_PERCPU_NR_PAGES * PAGE_SIZE) @@ -126,7 +126,7 @@ int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, vout = erofs_pcpubuf[smp_processor_id()].data; ret = z_erofs_unzip_lz4(vin, vout + pageofs, - clusterpages * PAGE_SIZE, outlen); + clusterpages * PAGE_SIZE, outlen); if (ret >= 0) { outlen = ret; @@ -134,14 +134,15 @@ int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, } for (i = 0; i < nr_pages; ++i) { - j = min((unsigned)PAGE_SIZE - pageofs, outlen); + j = min((unsigned int)PAGE_SIZE - pageofs, outlen); - if (pages[i] != NULL) { - if (ret < 0) + if (pages[i]) { + if (ret < 0) { SetPageError(pages[i]); - else if (clusterpages == 1 && pages[i] == compressed_pages[0]) + } else if (clusterpages == 1 && + pages[i] == compressed_pages[0]) { memcpy(vin + pageofs, vout + pageofs, j); - else { + } else { void *dst = kmap_atomic(pages[i]); memcpy(dst + pageofs, vout + pageofs, j); @@ -164,14 +165,14 @@ int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, } int z_erofs_vle_unzip_vmap(struct page **compressed_pages, - unsigned clusterpages, + unsigned int clusterpages, void *vout, - unsigned llen, + unsigned int llen, unsigned short pageofs, bool overlapped) { void *vin; - unsigned i; + unsigned int i; int ret; if (overlapped) { @@ -181,29 +182,27 @@ int z_erofs_vle_unzip_vmap(struct page **compressed_pages, for (i = 0; i < clusterpages; ++i) { void *t = kmap_atomic(compressed_pages[i]); - memcpy(vin + PAGE_SIZE *i, t, PAGE_SIZE); + memcpy(vin + PAGE_SIZE * i, t, PAGE_SIZE); kunmap_atomic(t); } - } else if (clusterpages == 1) + } else if (clusterpages == 1) { vin = kmap_atomic(compressed_pages[0]); - else { + } else { vin = erofs_vmap(compressed_pages, clusterpages); } ret = z_erofs_unzip_lz4(vin, vout + pageofs, - clusterpages * PAGE_SIZE, llen); + clusterpages * PAGE_SIZE, llen); if (ret > 0) ret = 0; if (!overlapped) { if (clusterpages == 1) kunmap_atomic(vin); - else { + else erofs_vunmap(vin, clusterpages); - } - } else + } else { preempt_enable(); - + } return ret; } - diff --git a/drivers/staging/erofs/utils.c b/drivers/staging/erofs/utils.c index bdee9bd09f11..ea8a962e5c95 100644 --- a/drivers/staging/erofs/utils.c +++ b/drivers/staging/erofs/utils.c @@ -116,7 +116,7 @@ unsigned long erofs_shrink_workstation(struct erofs_sb_info *sbi, { pgoff_t first_index = 0; void *batch[PAGEVEC_SIZE]; - unsigned freed = 0; + unsigned int freed = 0; int i, found; repeat: diff --git a/drivers/staging/erofs/xattr.c b/drivers/staging/erofs/xattr.c index 0e9cfeccdf99..80dca6a4adbe 100644 --- a/drivers/staging/erofs/xattr.c +++ b/drivers/staging/erofs/xattr.c @@ -19,41 +19,53 @@ struct xattr_iter { void *kaddr; erofs_blk_t blkaddr; - unsigned ofs; + unsigned int ofs; }; static inline void xattr_iter_end(struct xattr_iter *it, bool atomic) { - /* only init_inode_xattrs use non-atomic once */ + /* the only user of kunmap() is 'init_inode_xattrs' */ if (unlikely(!atomic)) kunmap(it->page); else kunmap_atomic(it->kaddr); + unlock_page(it->page); put_page(it->page); } -static void init_inode_xattrs(struct inode *inode) +static inline void xattr_iter_end_final(struct xattr_iter *it) +{ + if (it->page == NULL) + return; + + xattr_iter_end(it, true); +} + +static int init_inode_xattrs(struct inode *inode) { struct xattr_iter it; - unsigned i; + unsigned int i; struct erofs_xattr_ibody_header *ih; + struct super_block *sb; struct erofs_sb_info *sbi; struct erofs_vnode *vi; bool atomic_map; if (likely(inode_has_inited_xattr(inode))) - return; + return 0; vi = EROFS_V(inode); BUG_ON(!vi->xattr_isize); - sbi = EROFS_I_SB(inode); + sb = inode->i_sb; + sbi = EROFS_SB(sb); it.blkaddr = erofs_blknr(iloc(sbi, vi->nid) + vi->inode_isize); it.ofs = erofs_blkoff(iloc(sbi, vi->nid) + vi->inode_isize); it.page = erofs_get_inline_page(inode, it.blkaddr); - BUG_ON(IS_ERR(it.page)); + if (IS_ERR(it.page)) + return PTR_ERR(it.page); /* read in shared xattr array (non-atomic, see kmalloc below) */ it.kaddr = kmap(it.page); @@ -62,9 +74,12 @@ static void init_inode_xattrs(struct inode *inode) ih = (struct erofs_xattr_ibody_header *)(it.kaddr + it.ofs); vi->xattr_shared_count = ih->h_shared_count; - vi->xattr_shared_xattrs = (unsigned *)kmalloc_array( - vi->xattr_shared_count, sizeof(unsigned), - GFP_KERNEL | __GFP_NOFAIL); + vi->xattr_shared_xattrs = kmalloc_array(vi->xattr_shared_count, + sizeof(uint), GFP_KERNEL); + if (vi->xattr_shared_xattrs == NULL) { + xattr_iter_end(&it, atomic_map); + return -ENOMEM; + } /* let's skip ibody header */ it.ofs += sizeof(struct erofs_xattr_ibody_header); @@ -75,9 +90,10 @@ static void init_inode_xattrs(struct inode *inode) BUG_ON(it.ofs != EROFS_BLKSIZ); xattr_iter_end(&it, atomic_map); - it.page = erofs_get_meta_page(inode->i_sb, + it.page = erofs_get_meta_page(sb, ++it.blkaddr, S_ISDIR(inode->i_mode)); - BUG_ON(IS_ERR(it.page)); + if (IS_ERR(it.page)) + return PTR_ERR(it.page); it.kaddr = kmap_atomic(it.page); atomic_map = true; @@ -90,27 +106,43 @@ static void init_inode_xattrs(struct inode *inode) xattr_iter_end(&it, atomic_map); inode_set_inited_xattr(inode); + return 0; } +/* + * the general idea for these return values is + * if 0 is returned, go on processing the current xattr; + * 1 (> 0) is returned, skip this round to process the next xattr; + * -err (< 0) is returned, an error (maybe ENOXATTR) occurred + * and need to be handled + */ struct xattr_iter_handlers { int (*entry)(struct xattr_iter *, struct erofs_xattr_entry *); - int (*name)(struct xattr_iter *, unsigned, char *, unsigned); - int (*alloc_buffer)(struct xattr_iter *, unsigned); - void (*value)(struct xattr_iter *, unsigned, char *, unsigned); + int (*name)(struct xattr_iter *, unsigned int, char *, unsigned int); + int (*alloc_buffer)(struct xattr_iter *, unsigned int); + void (*value)(struct xattr_iter *, unsigned int, char *, unsigned int); }; -static void xattr_iter_fixup(struct xattr_iter *it) +static inline int xattr_iter_fixup(struct xattr_iter *it) { - if (unlikely(it->ofs >= EROFS_BLKSIZ)) { - xattr_iter_end(it, true); + if (it->ofs < EROFS_BLKSIZ) + return 0; + + xattr_iter_end(it, true); + + it->blkaddr += erofs_blknr(it->ofs); - it->blkaddr += erofs_blknr(it->ofs); - it->page = erofs_get_meta_page(it->sb, it->blkaddr, false); - BUG_ON(IS_ERR(it->page)); + it->page = erofs_get_meta_page(it->sb, it->blkaddr, false); + if (IS_ERR(it->page)) { + int err = PTR_ERR(it->page); - it->kaddr = kmap_atomic(it->page); - it->ofs = erofs_blkoff(it->ofs); + it->page = NULL; + return err; } + + it->kaddr = kmap_atomic(it->page); + it->ofs = erofs_blkoff(it->ofs); + return 0; } static int inline_xattr_iter_begin(struct xattr_iter *it, @@ -118,7 +150,7 @@ static int inline_xattr_iter_begin(struct xattr_iter *it, { struct erofs_vnode *const vi = EROFS_V(inode); struct erofs_sb_info *const sbi = EROFS_SB(inode->i_sb); - unsigned xattr_header_sz, inline_xattr_ofs; + unsigned int xattr_header_sz, inline_xattr_ofs; xattr_header_sz = inlinexattr_header_size(inode); if (unlikely(xattr_header_sz >= vi->xattr_isize)) { @@ -132,21 +164,28 @@ static int inline_xattr_iter_begin(struct xattr_iter *it, it->ofs = erofs_blkoff(iloc(sbi, vi->nid) + inline_xattr_ofs); it->page = erofs_get_inline_page(inode, it->blkaddr); - BUG_ON(IS_ERR(it->page)); - it->kaddr = kmap_atomic(it->page); + if (IS_ERR(it->page)) + return PTR_ERR(it->page); + it->kaddr = kmap_atomic(it->page); return vi->xattr_isize - xattr_header_sz; } +/* + * Regardless of success or failure, `xattr_foreach' will end up with + * `ofs' pointing to the next xattr item rather than an arbitrary position. + */ static int xattr_foreach(struct xattr_iter *it, - struct xattr_iter_handlers *op, unsigned *tlimit) + const struct xattr_iter_handlers *op, unsigned int *tlimit) { struct erofs_xattr_entry entry; - unsigned value_sz, processed, slice; + unsigned int value_sz, processed, slice; int err; /* 0. fixup blkaddr, ofs, ipage */ - xattr_iter_fixup(it); + err = xattr_iter_fixup(it); + if (err) + return err; /* * 1. read xattr entry to the memory, @@ -155,7 +194,7 @@ static int xattr_foreach(struct xattr_iter *it, */ entry = *(struct erofs_xattr_entry *)(it->kaddr + it->ofs); if (tlimit != NULL) { - unsigned entry_sz = EROFS_XATTR_ENTRY_SIZE(&entry); + unsigned int entry_sz = EROFS_XATTR_ENTRY_SIZE(&entry); BUG_ON(*tlimit < entry_sz); *tlimit -= entry_sz; @@ -178,12 +217,14 @@ static int xattr_foreach(struct xattr_iter *it, if (it->ofs >= EROFS_BLKSIZ) { BUG_ON(it->ofs > EROFS_BLKSIZ); - xattr_iter_fixup(it); + err = xattr_iter_fixup(it); + if (err) + goto out; it->ofs = 0; } - slice = min_t(unsigned, PAGE_SIZE - it->ofs, - entry.e_name_len - processed); + slice = min_t(unsigned int, PAGE_SIZE - it->ofs, + entry.e_name_len - processed); /* handle name */ err = op->name(it, processed, it->kaddr + it->ofs, slice); @@ -210,21 +251,24 @@ static int xattr_foreach(struct xattr_iter *it, while (processed < value_sz) { if (it->ofs >= EROFS_BLKSIZ) { BUG_ON(it->ofs > EROFS_BLKSIZ); - xattr_iter_fixup(it); + + err = xattr_iter_fixup(it); + if (err) + goto out; it->ofs = 0; } - slice = min_t(unsigned, PAGE_SIZE - it->ofs, - value_sz - processed); + slice = min_t(unsigned int, PAGE_SIZE - it->ofs, + value_sz - processed); op->value(it, processed, it->kaddr + it->ofs, slice); it->ofs += slice; processed += slice; } out: - /* we assume that ofs is aligned with 4 bytes */ + /* xattrs should be 4-byte aligned (on-disk constraint) */ it->ofs = EROFS_XATTR_ALIGN(it->ofs); - return err; + return err < 0 ? err : 0; } struct getxattr_iter { @@ -245,7 +289,7 @@ static int xattr_entrymatch(struct xattr_iter *_it, } static int xattr_namematch(struct xattr_iter *_it, - unsigned processed, char *buf, unsigned len) + unsigned int processed, char *buf, unsigned int len) { struct getxattr_iter *it = container_of(_it, struct getxattr_iter, it); @@ -253,7 +297,7 @@ static int xattr_namematch(struct xattr_iter *_it, } static int xattr_checkbuffer(struct xattr_iter *_it, - unsigned value_sz) + unsigned int value_sz) { struct getxattr_iter *it = container_of(_it, struct getxattr_iter, it); int err = it->buffer_size < value_sz ? -ERANGE : 0; @@ -263,14 +307,14 @@ static int xattr_checkbuffer(struct xattr_iter *_it, } static void xattr_copyvalue(struct xattr_iter *_it, - unsigned processed, char *buf, unsigned len) + unsigned int processed, char *buf, unsigned int len) { struct getxattr_iter *it = container_of(_it, struct getxattr_iter, it); memcpy(it->buffer + processed, buf, len); } -static struct xattr_iter_handlers find_xattr_handlers = { +static const struct xattr_iter_handlers find_xattr_handlers = { .entry = xattr_entrymatch, .name = xattr_namematch, .alloc_buffer = xattr_checkbuffer, @@ -280,7 +324,7 @@ static struct xattr_iter_handlers find_xattr_handlers = { static int inline_getxattr(struct inode *inode, struct getxattr_iter *it) { int ret; - unsigned remaining; + unsigned int remaining; ret = inline_xattr_iter_begin(&it->it, inode); if (ret < 0) @@ -289,19 +333,20 @@ static int inline_getxattr(struct inode *inode, struct getxattr_iter *it) remaining = ret; while (remaining) { ret = xattr_foreach(&it->it, &find_xattr_handlers, &remaining); - if (ret >= 0) + if (ret != -ENOATTR) break; } - xattr_iter_end(&it->it, true); + xattr_iter_end_final(&it->it); - return ret < 0 ? ret : it->buffer_size; + return ret ? ret : it->buffer_size; } static int shared_getxattr(struct inode *inode, struct getxattr_iter *it) { struct erofs_vnode *const vi = EROFS_V(inode); - struct erofs_sb_info *const sbi = EROFS_SB(inode->i_sb); - unsigned i; + struct super_block *const sb = inode->i_sb; + struct erofs_sb_info *const sbi = EROFS_SB(sb); + unsigned int i; int ret = -ENOATTR; for (i = 0; i < vi->xattr_shared_count; ++i) { @@ -314,21 +359,22 @@ static int shared_getxattr(struct inode *inode, struct getxattr_iter *it) if (i) xattr_iter_end(&it->it, true); - it->it.page = erofs_get_meta_page(inode->i_sb, - blkaddr, false); - BUG_ON(IS_ERR(it->it.page)); + it->it.page = erofs_get_meta_page(sb, blkaddr, false); + if (IS_ERR(it->it.page)) + return PTR_ERR(it->it.page); + it->it.kaddr = kmap_atomic(it->it.page); it->it.blkaddr = blkaddr; } ret = xattr_foreach(&it->it, &find_xattr_handlers, NULL); - if (ret >= 0) + if (ret != -ENOATTR) break; } if (vi->xattr_shared_count) - xattr_iter_end(&it->it, true); + xattr_iter_end_final(&it->it); - return ret < 0 ? ret : it->buffer_size; + return ret ? ret : it->buffer_size; } static bool erofs_xattr_user_list(struct dentry *dentry) @@ -351,7 +397,9 @@ int erofs_getxattr(struct inode *inode, int index, if (unlikely(name == NULL)) return -EINVAL; - init_inode_xattrs(inode); + ret = init_inode_xattrs(inode); + if (ret) + return ret; it.index = index; @@ -446,7 +494,7 @@ static int xattr_entrylist(struct xattr_iter *_it, { struct listxattr_iter *it = container_of(_it, struct listxattr_iter, it); - unsigned prefix_len; + unsigned int prefix_len; const char *prefix; const struct xattr_handler *h = @@ -474,7 +522,7 @@ static int xattr_entrylist(struct xattr_iter *_it, } static int xattr_namelist(struct xattr_iter *_it, - unsigned processed, char *buf, unsigned len) + unsigned int processed, char *buf, unsigned int len) { struct listxattr_iter *it = container_of(_it, struct listxattr_iter, it); @@ -485,7 +533,7 @@ static int xattr_namelist(struct xattr_iter *_it, } static int xattr_skipvalue(struct xattr_iter *_it, - unsigned value_sz) + unsigned int value_sz) { struct listxattr_iter *it = container_of(_it, struct listxattr_iter, it); @@ -494,7 +542,7 @@ static int xattr_skipvalue(struct xattr_iter *_it, return 1; } -static struct xattr_iter_handlers list_xattr_handlers = { +static const struct xattr_iter_handlers list_xattr_handlers = { .entry = xattr_entrylist, .name = xattr_namelist, .alloc_buffer = xattr_skipvalue, @@ -504,7 +552,7 @@ static struct xattr_iter_handlers list_xattr_handlers = { static int inline_listxattr(struct listxattr_iter *it) { int ret; - unsigned remaining; + unsigned int remaining; ret = inline_xattr_iter_begin(&it->it, d_inode(it->dentry)); if (ret < 0) @@ -513,19 +561,20 @@ static int inline_listxattr(struct listxattr_iter *it) remaining = ret; while (remaining) { ret = xattr_foreach(&it->it, &list_xattr_handlers, &remaining); - if (ret < 0) + if (ret) break; } - xattr_iter_end(&it->it, true); - return ret < 0 ? ret : it->buffer_ofs; + xattr_iter_end_final(&it->it); + return ret ? ret : it->buffer_ofs; } static int shared_listxattr(struct listxattr_iter *it) { struct inode *const inode = d_inode(it->dentry); struct erofs_vnode *const vi = EROFS_V(inode); - struct erofs_sb_info *const sbi = EROFS_I_SB(inode); - unsigned i; + struct super_block *const sb = inode->i_sb; + struct erofs_sb_info *const sbi = EROFS_SB(sb); + unsigned int i; int ret = 0; for (i = 0; i < vi->xattr_shared_count; ++i) { @@ -537,21 +586,22 @@ static int shared_listxattr(struct listxattr_iter *it) if (i) xattr_iter_end(&it->it, true); - it->it.page = erofs_get_meta_page(inode->i_sb, - blkaddr, false); - BUG_ON(IS_ERR(it->it.page)); + it->it.page = erofs_get_meta_page(sb, blkaddr, false); + if (IS_ERR(it->it.page)) + return PTR_ERR(it->it.page); + it->it.kaddr = kmap_atomic(it->it.page); it->it.blkaddr = blkaddr; } ret = xattr_foreach(&it->it, &list_xattr_handlers, NULL); - if (ret < 0) + if (ret) break; } if (vi->xattr_shared_count) - xattr_iter_end(&it->it, true); + xattr_iter_end_final(&it->it); - return ret < 0 ? ret : it->buffer_ofs; + return ret ? ret : it->buffer_ofs; } ssize_t erofs_listxattr(struct dentry *dentry, @@ -560,7 +610,9 @@ ssize_t erofs_listxattr(struct dentry *dentry, int ret; struct listxattr_iter it; - init_inode_xattrs(d_inode(dentry)); + ret = init_inode_xattrs(d_inode(dentry)); + if (ret) + return ret; it.dentry = dentry; it.buffer = buffer; diff --git a/drivers/staging/fbtft/fbtft.h b/drivers/staging/fbtft/fbtft.h index 798a8fe98e95..ac427baa464a 100644 --- a/drivers/staging/fbtft/fbtft.h +++ b/drivers/staging/fbtft/fbtft.h @@ -232,7 +232,7 @@ struct fbtft_par { bool polarity; }; -#define NUMARGS(...) (sizeof((int[]){__VA_ARGS__})/sizeof(int)) +#define NUMARGS(...) (sizeof((int[]){__VA_ARGS__}) / sizeof(int)) #define write_reg(par, ...) \ ((par)->fbtftops.write_register(par, NUMARGS(__VA_ARGS__), __VA_ARGS__)) @@ -355,39 +355,39 @@ module_exit(fbtft_driver_module_exit); #define DEBUG_LEVEL_6 (DEBUG_LEVEL_4 | DEBUG_LEVEL_5) #define DEBUG_LEVEL_7 0xFFFFFFFF -#define DEBUG_DRIVER_INIT_FUNCTIONS (1<<3) -#define DEBUG_TIME_FIRST_UPDATE (1<<4) -#define DEBUG_TIME_EACH_UPDATE (1<<5) -#define DEBUG_DEFERRED_IO (1<<6) -#define DEBUG_FBTFT_INIT_FUNCTIONS (1<<7) +#define DEBUG_DRIVER_INIT_FUNCTIONS BIT(3) +#define DEBUG_TIME_FIRST_UPDATE BIT(4) +#define DEBUG_TIME_EACH_UPDATE BIT(5) +#define DEBUG_DEFERRED_IO BIT(6) +#define DEBUG_FBTFT_INIT_FUNCTIONS BIT(7) /* fbops */ -#define DEBUG_FB_READ (1<<8) -#define DEBUG_FB_WRITE (1<<9) -#define DEBUG_FB_FILLRECT (1<<10) -#define DEBUG_FB_COPYAREA (1<<11) -#define DEBUG_FB_IMAGEBLIT (1<<12) -#define DEBUG_FB_SETCOLREG (1<<13) -#define DEBUG_FB_BLANK (1<<14) +#define DEBUG_FB_READ BIT(8) +#define DEBUG_FB_WRITE BIT(9) +#define DEBUG_FB_FILLRECT BIT(10) +#define DEBUG_FB_COPYAREA BIT(11) +#define DEBUG_FB_IMAGEBLIT BIT(12) +#define DEBUG_FB_SETCOLREG BIT(13) +#define DEBUG_FB_BLANK BIT(14) -#define DEBUG_SYSFS (1<<16) +#define DEBUG_SYSFS BIT(16) /* fbtftops */ -#define DEBUG_BACKLIGHT (1<<17) -#define DEBUG_READ (1<<18) -#define DEBUG_WRITE (1<<19) -#define DEBUG_WRITE_VMEM (1<<20) -#define DEBUG_WRITE_REGISTER (1<<21) -#define DEBUG_SET_ADDR_WIN (1<<22) -#define DEBUG_RESET (1<<23) -#define DEBUG_MKDIRTY (1<<24) -#define DEBUG_UPDATE_DISPLAY (1<<25) -#define DEBUG_INIT_DISPLAY (1<<26) -#define DEBUG_BLANK (1<<27) -#define DEBUG_REQUEST_GPIOS (1<<28) -#define DEBUG_FREE_GPIOS (1<<29) -#define DEBUG_REQUEST_GPIOS_MATCH (1<<30) -#define DEBUG_VERIFY_GPIOS (1<<31) +#define DEBUG_BACKLIGHT BIT(17) +#define DEBUG_READ BIT(18) +#define DEBUG_WRITE BIT(19) +#define DEBUG_WRITE_VMEM BIT(20) +#define DEBUG_WRITE_REGISTER BIT(21) +#define DEBUG_SET_ADDR_WIN BIT(22) +#define DEBUG_RESET BIT(23) +#define DEBUG_MKDIRTY BIT(24) +#define DEBUG_UPDATE_DISPLAY BIT(25) +#define DEBUG_INIT_DISPLAY BIT(26) +#define DEBUG_BLANK BIT(27) +#define DEBUG_REQUEST_GPIOS BIT(28) +#define DEBUG_FREE_GPIOS BIT(29) +#define DEBUG_REQUEST_GPIOS_MATCH BIT(30) +#define DEBUG_VERIFY_GPIOS BIT(31) #define fbtft_init_dbg(dev, format, arg...) \ do { \ diff --git a/drivers/staging/fsl-dpaa2/ethsw/ethsw.c b/drivers/staging/fsl-dpaa2/ethsw/ethsw.c index ecdd3d84f956..7a7ca67822c5 100644 --- a/drivers/staging/fsl-dpaa2/ethsw/ethsw.c +++ b/drivers/staging/fsl-dpaa2/ethsw/ethsw.c @@ -717,7 +717,7 @@ static int port_vlans_add(struct net_device *netdev, struct switchdev_trans *trans) { struct ethsw_port_priv *port_priv = netdev_priv(netdev); - int vid, err; + int vid, err = 0; if (netif_is_bridge_master(vlan->obj.orig_dev)) return -EOPNOTSUPP; @@ -872,7 +872,7 @@ static int port_vlans_del(struct net_device *netdev, const struct switchdev_obj_port_vlan *vlan) { struct ethsw_port_priv *port_priv = netdev_priv(netdev); - int vid, err; + int vid, err = 0; if (netif_is_bridge_master(vlan->obj.orig_dev)) return -EOPNOTSUPP; @@ -1014,10 +1014,8 @@ static void ethsw_switchdev_event_work(struct work_struct *work) container_of(work, struct ethsw_switchdev_event_work, work); struct net_device *dev = switchdev_work->dev; struct switchdev_notifier_fdb_info *fdb_info; - struct ethsw_port_priv *port_priv; rtnl_lock(); - port_priv = netdev_priv(dev); fdb_info = &switchdev_work->fdb_info; switch (switchdev_work->event) { diff --git a/drivers/staging/gasket/Kconfig b/drivers/staging/gasket/Kconfig index 970e299046c3..e82b85541f7e 100644 --- a/drivers/staging/gasket/Kconfig +++ b/drivers/staging/gasket/Kconfig @@ -14,8 +14,9 @@ config STAGING_APEX_DRIVER tristate "Apex Driver" depends on STAGING_GASKET_FRAMEWORK help - This driver supports the Apex device. Say Y if you want to - include this driver in the kernel. + This driver supports the Apex Edge TPU device. See + https://cloud.google.com/edge-tpu/ for more information. + Say Y if you want to include this driver in the kernel. To compile this driver as a module, choose M here. The module will be called "apex". diff --git a/drivers/staging/gasket/apex_driver.c b/drivers/staging/gasket/apex_driver.c index c747e9ca4518..0578bf1ba1e9 100644 --- a/drivers/staging/gasket/apex_driver.c +++ b/drivers/staging/gasket/apex_driver.c @@ -138,9 +138,6 @@ static const struct gasket_mappable_region mappable_regions[NUM_REGIONS] = { { 0x48000, 0x1000 }, }; -static const struct gasket_mappable_region cm_mappable_regions[1] = { { 0x0, - APEX_CH_MEM_BYTES } }; - /* Gasket device interrupts enums must be dense (i.e., no empty slots). */ enum apex_interrupt { APEX_INTERRUPT_INSTR_QUEUE = 0, @@ -228,7 +225,6 @@ static struct gasket_interrupt_desc apex_interrupts[] = { }, }; - /* Allows device to enter power save upon driver close(). */ static int allow_power_save = 1; @@ -529,7 +525,7 @@ static ssize_t sysfs_show(struct device *device, struct device_attribute *attr, return -ENODEV; } - type = (enum sysfs_attribute_type)gasket_sysfs_get_attr(device, attr); + type = (enum sysfs_attribute_type)gasket_attr->data.attr_type; switch (type) { case ATTR_KERNEL_HIB_PAGE_TABLE_SIZE: ret = scnprintf(buf, PAGE_SIZE, "%u\n", diff --git a/drivers/staging/gasket/gasket_core.c b/drivers/staging/gasket/gasket_core.c index d12ab560411f..a445d58fb399 100644 --- a/drivers/staging/gasket/gasket_core.c +++ b/drivers/staging/gasket/gasket_core.c @@ -109,8 +109,6 @@ check_and_invoke_callback(struct gasket_dev *gasket_dev, { int ret = 0; - dev_dbg(gasket_dev->dev, "check_and_invoke_callback %p\n", - cb_function); if (cb_function) { mutex_lock(&gasket_dev->mutex); ret = cb_function(gasket_dev); @@ -126,11 +124,8 @@ gasket_check_and_invoke_callback_nolock(struct gasket_dev *gasket_dev, { int ret = 0; - if (cb_function) { - dev_dbg(gasket_dev->dev, - "Invoking device-specific callback.\n"); + if (cb_function) ret = cb_function(gasket_dev); - } return ret; } @@ -189,26 +184,26 @@ static int gasket_find_dev_slot(struct gasket_internal_desc *internal_desc, * Returns 0 if successful, a negative error code otherwise. */ static int gasket_alloc_dev(struct gasket_internal_desc *internal_desc, - struct device *parent, struct gasket_dev **pdev, - const char *kobj_name) + struct device *parent, struct gasket_dev **pdev) { int dev_idx; const struct gasket_driver_desc *driver_desc = internal_desc->driver_desc; struct gasket_dev *gasket_dev; struct gasket_cdev_info *dev_info; + const char *parent_name = dev_name(parent); - pr_debug("Allocating a Gasket device %s.\n", kobj_name); + pr_debug("Allocating a Gasket device, parent %s.\n", parent_name); *pdev = NULL; - dev_idx = gasket_find_dev_slot(internal_desc, kobj_name); + dev_idx = gasket_find_dev_slot(internal_desc, parent_name); if (dev_idx < 0) return dev_idx; gasket_dev = *pdev = kzalloc(sizeof(*gasket_dev), GFP_KERNEL); if (!gasket_dev) { - pr_err("no memory for device %s\n", kobj_name); + pr_err("no memory for device, parent %s\n", parent_name); return -ENOMEM; } internal_desc->devs[dev_idx] = gasket_dev; @@ -217,7 +212,7 @@ static int gasket_alloc_dev(struct gasket_internal_desc *internal_desc, gasket_dev->internal_desc = internal_desc; gasket_dev->dev_idx = dev_idx; - snprintf(gasket_dev->kobj_name, GASKET_NAME_MAX, "%s", kobj_name); + snprintf(gasket_dev->kobj_name, GASKET_NAME_MAX, "%s", parent_name); gasket_dev->dev = get_device(parent); /* gasket_bar_data is uninitialized. */ gasket_dev->num_page_tables = driver_desc->num_page_tables; @@ -231,10 +226,9 @@ static int gasket_alloc_dev(struct gasket_internal_desc *internal_desc, dev_info->devt = MKDEV(driver_desc->major, driver_desc->minor + gasket_dev->dev_idx); - dev_info->device = device_create(internal_desc->class, parent, - dev_info->devt, gasket_dev, dev_info->name); - - dev_dbg(dev_info->device, "Gasket device allocated.\n"); + dev_info->device = + device_create(internal_desc->class, parent, dev_info->devt, + gasket_dev, dev_info->name); /* cdev has not yet been added; cdev_added is 0 */ dev_info->gasket_dev_ptr = gasket_dev; @@ -652,13 +646,13 @@ void gasket_disable_device(struct gasket_dev *gasket_dev) EXPORT_SYMBOL(gasket_disable_device); /* - * Registered descriptor lookup. + * Registered driver descriptor lookup for PCI devices. * * Precondition: Called with g_mutex held (to avoid a race on return). * Returns NULL if no matching device was found. */ static struct gasket_internal_desc * -lookup_internal_desc(struct pci_dev *pci_dev) +lookup_pci_internal_desc(struct pci_dev *pci_dev) { int i; @@ -1358,13 +1352,7 @@ int gasket_enable_device(struct gasket_dev *gasket_dev) const struct gasket_driver_desc *driver_desc = gasket_dev->internal_desc->driver_desc; - ret = gasket_interrupt_init(gasket_dev, driver_desc->name, - driver_desc->interrupt_type, - driver_desc->interrupts, - driver_desc->num_interrupts, - driver_desc->interrupt_pack_width, - driver_desc->interrupt_bar_index, - driver_desc->wire_interrupt_offsets); + ret = gasket_interrupt_init(gasket_dev); if (ret) { dev_err(gasket_dev->dev, "Critical failure to allocate interrupts: %d\n", ret); @@ -1420,6 +1408,56 @@ int gasket_enable_device(struct gasket_dev *gasket_dev) } EXPORT_SYMBOL(gasket_enable_device); +static int __gasket_add_device(struct device *parent_dev, + struct gasket_internal_desc *internal_desc, + struct gasket_dev **gasket_devp) +{ + int ret; + struct gasket_dev *gasket_dev; + const struct gasket_driver_desc *driver_desc = + internal_desc->driver_desc; + + ret = gasket_alloc_dev(internal_desc, parent_dev, &gasket_dev); + if (ret) + return ret; + if (IS_ERR(gasket_dev->dev_info.device)) { + dev_err(parent_dev, "Cannot create %s device %s [ret = %ld]\n", + driver_desc->name, gasket_dev->dev_info.name, + PTR_ERR(gasket_dev->dev_info.device)); + ret = -ENODEV; + goto free_gasket_dev; + } + + ret = gasket_sysfs_create_mapping(gasket_dev->dev_info.device, + gasket_dev); + if (ret) + goto remove_device; + + ret = gasket_sysfs_create_entries(gasket_dev->dev_info.device, + gasket_sysfs_generic_attrs); + if (ret) + goto remove_sysfs_mapping; + + *gasket_devp = gasket_dev; + return 0; + +remove_sysfs_mapping: + gasket_sysfs_remove_mapping(gasket_dev->dev_info.device); +remove_device: + device_destroy(internal_desc->class, gasket_dev->dev_info.devt); +free_gasket_dev: + gasket_free_dev(gasket_dev); + return ret; +} + +static void __gasket_remove_device(struct gasket_internal_desc *internal_desc, + struct gasket_dev *gasket_dev) +{ + gasket_sysfs_remove_mapping(gasket_dev->dev_info.device); + device_destroy(internal_desc->class, gasket_dev->dev_info.devt); + gasket_free_dev(gasket_dev); +} + /* * Add PCI gasket device. * @@ -1432,16 +1470,14 @@ int gasket_pci_add_device(struct pci_dev *pci_dev, struct gasket_dev **gasket_devp) { int ret; - const char *kobj_name = dev_name(&pci_dev->dev); struct gasket_internal_desc *internal_desc; struct gasket_dev *gasket_dev; - const struct gasket_driver_desc *driver_desc; struct device *parent; - pr_debug("add PCI device %s\n", kobj_name); + dev_dbg(&pci_dev->dev, "add PCI gasket device\n"); mutex_lock(&g_mutex); - internal_desc = lookup_internal_desc(pci_dev); + internal_desc = lookup_pci_internal_desc(pci_dev); mutex_unlock(&g_mutex); if (!internal_desc) { dev_err(&pci_dev->dev, @@ -1449,29 +1485,15 @@ int gasket_pci_add_device(struct pci_dev *pci_dev, return -ENODEV; } - driver_desc = internal_desc->driver_desc; - parent = &pci_dev->dev; - ret = gasket_alloc_dev(internal_desc, parent, &gasket_dev, kobj_name); + ret = __gasket_add_device(parent, internal_desc, &gasket_dev); if (ret) return ret; - gasket_dev->pci_dev = pci_dev; - if (IS_ERR_OR_NULL(gasket_dev->dev_info.device)) { - pr_err("Cannot create %s device %s [ret = %ld]\n", - driver_desc->name, gasket_dev->dev_info.name, - PTR_ERR(gasket_dev->dev_info.device)); - ret = -ENODEV; - goto fail1; - } + gasket_dev->pci_dev = pci_dev; ret = gasket_setup_pci(pci_dev, gasket_dev); if (ret) - goto fail2; - - ret = gasket_sysfs_create_mapping(gasket_dev->dev_info.device, - gasket_dev); - if (ret) - goto fail3; + goto cleanup_pci; /* * Once we've created the mapping structures successfully, attempt to @@ -1482,24 +1504,15 @@ int gasket_pci_add_device(struct pci_dev *pci_dev, if (ret) { dev_err(gasket_dev->dev, "Cannot create sysfs pci link: %d\n", ret); - goto fail3; + goto cleanup_pci; } - ret = gasket_sysfs_create_entries(gasket_dev->dev_info.device, - gasket_sysfs_generic_attrs); - if (ret) - goto fail4; *gasket_devp = gasket_dev; return 0; -fail4: -fail3: - gasket_sysfs_remove_mapping(gasket_dev->dev_info.device); -fail2: +cleanup_pci: gasket_cleanup_pci(gasket_dev); - device_destroy(internal_desc->class, gasket_dev->dev_info.devt); -fail1: - gasket_free_dev(gasket_dev); + __gasket_remove_device(internal_desc, gasket_dev); return ret; } EXPORT_SYMBOL(gasket_pci_add_device); @@ -1510,18 +1523,15 @@ void gasket_pci_remove_device(struct pci_dev *pci_dev) int i; struct gasket_internal_desc *internal_desc; struct gasket_dev *gasket_dev = NULL; - const struct gasket_driver_desc *driver_desc; /* Find the device desc. */ mutex_lock(&g_mutex); - internal_desc = lookup_internal_desc(pci_dev); + internal_desc = lookup_pci_internal_desc(pci_dev); if (!internal_desc) { mutex_unlock(&g_mutex); return; } mutex_unlock(&g_mutex); - driver_desc = internal_desc->driver_desc; - /* Now find the specific device */ mutex_lock(&internal_desc->mutex); for (i = 0; i < GASKET_DEV_MAX; i++) { @@ -1540,10 +1550,7 @@ void gasket_pci_remove_device(struct pci_dev *pci_dev) internal_desc->driver_desc->name); gasket_cleanup_pci(gasket_dev); - - gasket_sysfs_remove_mapping(gasket_dev->dev_info.device); - device_destroy(internal_desc->class, gasket_dev->dev_info.devt); - gasket_free_dev(gasket_dev); + __gasket_remove_device(internal_desc, gasket_dev); } EXPORT_SYMBOL(gasket_pci_remove_device); @@ -1791,7 +1798,6 @@ static int __init gasket_init(void) { int i; - pr_debug("%s\n", __func__); mutex_lock(&g_mutex); for (i = 0; i < GASKET_FRAMEWORK_DESC_MAX; i++) { g_descs[i].driver_desc = NULL; @@ -1804,13 +1810,8 @@ static int __init gasket_init(void) return 0; } -static void __exit gasket_exit(void) -{ - pr_debug("%s\n", __func__); -} MODULE_DESCRIPTION("Google Gasket driver framework"); MODULE_VERSION(GASKET_FRAMEWORK_VERSION); MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Rob Springer <rspringer@google.com>"); module_init(gasket_init); -module_exit(gasket_exit); diff --git a/drivers/staging/gasket/gasket_core.h b/drivers/staging/gasket/gasket_core.h index 275fd0b345b6..be44ac1e3118 100644 --- a/drivers/staging/gasket/gasket_core.h +++ b/drivers/staging/gasket/gasket_core.h @@ -50,8 +50,6 @@ enum gasket_interrupt_packing { /* Type of the interrupt supported by the device. */ enum gasket_interrupt_type { PCI_MSIX = 0, - PCI_MSI = 1, - PLATFORM_WIRE = 2, }; /* @@ -69,12 +67,6 @@ struct gasket_interrupt_desc { int packing; }; -/* Offsets to the wire interrupt handling registers */ -struct gasket_wire_interrupt_offsets { - u64 pending_bit_array; - u64 mask_array; -}; - /* * This enum is used to identify memory regions being part of the physical * memory that belongs to a device. @@ -231,7 +223,7 @@ struct gasket_coherent_buffer_desc { /* Coherent buffer structure. */ struct gasket_coherent_buffer { /* Virtual base address. */ - u8 __iomem *virt_base; + u8 *virt_base; /* Physical base address. */ ulong phys_base; @@ -384,9 +376,6 @@ struct gasket_driver_desc { */ struct gasket_coherent_buffer_desc coherent_buffer_description; - /* Offset of wire interrupt registers. */ - const struct gasket_wire_interrupt_offsets *wire_interrupt_offsets; - /* Interrupt type. (One of gasket_interrupt_type). */ int interrupt_type; @@ -590,25 +579,25 @@ const char *gasket_num_name_lookup(uint num, static inline ulong gasket_dev_read_64(struct gasket_dev *gasket_dev, int bar, ulong location) { - return readq(&gasket_dev->bar_data[bar].virt_base[location]); + return readq_relaxed(&gasket_dev->bar_data[bar].virt_base[location]); } static inline void gasket_dev_write_64(struct gasket_dev *dev, u64 value, int bar, ulong location) { - writeq(value, &dev->bar_data[bar].virt_base[location]); + writeq_relaxed(value, &dev->bar_data[bar].virt_base[location]); } static inline void gasket_dev_write_32(struct gasket_dev *dev, u32 value, int bar, ulong location) { - writel(value, &dev->bar_data[bar].virt_base[location]); + writel_relaxed(value, &dev->bar_data[bar].virt_base[location]); } static inline u32 gasket_dev_read_32(struct gasket_dev *dev, int bar, ulong location) { - return readl(&dev->bar_data[bar].virt_base[location]); + return readl_relaxed(&dev->bar_data[bar].virt_base[location]); } static inline void gasket_read_modify_write_64(struct gasket_dev *dev, int bar, diff --git a/drivers/staging/gasket/gasket_interrupt.c b/drivers/staging/gasket/gasket_interrupt.c index 1cfbc120f228..49d47afad64f 100644 --- a/drivers/staging/gasket/gasket_interrupt.c +++ b/drivers/staging/gasket/gasket_interrupt.c @@ -45,9 +45,6 @@ struct gasket_interrupt_data { /* The width of a single interrupt in a packed interrupt register. */ int pack_width; - /* offset of wire interrupt registers */ - const struct gasket_wire_interrupt_offsets *wire_interrupt_offsets; - /* * Design-wise, these elements should be bundled together, but * pci_enable_msix's interface requires that they be managed @@ -92,19 +89,6 @@ static void gasket_interrupt_setup(struct gasket_dev *gasket_dev) dev_dbg(gasket_dev->dev, "Running interrupt setup\n"); - if (interrupt_data->type == PLATFORM_WIRE || - interrupt_data->type == PCI_MSI) { - /* Nothing needs to be done for platform or PCI devices. */ - return; - } - - if (interrupt_data->type != PCI_MSIX) { - dev_dbg(gasket_dev->dev, - "Cannot handle unsupported interrupt type %d\n", - interrupt_data->type); - return; - } - /* Setup the MSIX table. */ for (i = 0; i < interrupt_data->num_interrupts; i++) { @@ -157,9 +141,22 @@ static void gasket_interrupt_setup(struct gasket_dev *gasket_dev) } } -static irqreturn_t gasket_msix_interrupt_handler(int irq, void *dev_id) +static void +gasket_handle_interrupt(struct gasket_interrupt_data *interrupt_data, + int interrupt_index) { struct eventfd_ctx *ctx; + + trace_gasket_interrupt_event(interrupt_data->name, interrupt_index); + ctx = interrupt_data->eventfd_ctxs[interrupt_index]; + if (ctx) + eventfd_signal(ctx, 1); + + ++(interrupt_data->interrupt_counts[interrupt_index]); +} + +static irqreturn_t gasket_msix_interrupt_handler(int irq, void *dev_id) +{ struct gasket_interrupt_data *interrupt_data = dev_id; int interrupt = -1; int i; @@ -175,14 +172,7 @@ static irqreturn_t gasket_msix_interrupt_handler(int irq, void *dev_id) pr_err("Received unknown irq %d\n", irq); return IRQ_HANDLED; } - trace_gasket_interrupt_event(interrupt_data->name, interrupt); - - ctx = interrupt_data->eventfd_ctxs[interrupt]; - if (ctx) - eventfd_signal(ctx, 1); - - ++(interrupt_data->interrupt_counts[interrupt]); - + gasket_handle_interrupt(interrupt_data, interrupt); return IRQ_HANDLED; } @@ -192,6 +182,12 @@ gasket_interrupt_msix_init(struct gasket_interrupt_data *interrupt_data) int ret = 1; int i; + interrupt_data->msix_entries = + kcalloc(interrupt_data->num_interrupts, + sizeof(struct msix_entry), GFP_KERNEL); + if (!interrupt_data->msix_entries) + return -ENOMEM; + for (i = 0; i < interrupt_data->num_interrupts; i++) { interrupt_data->msix_entries[i].entry = i; interrupt_data->msix_entries[i].vector = 0; @@ -319,54 +315,40 @@ static struct gasket_sysfs_attribute interrupt_sysfs_attrs[] = { GASKET_END_OF_ATTR_ARRAY, }; -int gasket_interrupt_init(struct gasket_dev *gasket_dev, const char *name, - int type, - const struct gasket_interrupt_desc *interrupts, - int num_interrupts, int pack_width, int bar_index, - const struct gasket_wire_interrupt_offsets *wire_int_offsets) +int gasket_interrupt_init(struct gasket_dev *gasket_dev) { int ret; struct gasket_interrupt_data *interrupt_data; + const struct gasket_driver_desc *driver_desc = + gasket_get_driver_desc(gasket_dev); interrupt_data = kzalloc(sizeof(struct gasket_interrupt_data), GFP_KERNEL); if (!interrupt_data) return -ENOMEM; gasket_dev->interrupt_data = interrupt_data; - interrupt_data->name = name; - interrupt_data->type = type; + interrupt_data->name = driver_desc->name; + interrupt_data->type = driver_desc->interrupt_type; interrupt_data->pci_dev = gasket_dev->pci_dev; - interrupt_data->num_interrupts = num_interrupts; - interrupt_data->interrupts = interrupts; - interrupt_data->interrupt_bar_index = bar_index; - interrupt_data->pack_width = pack_width; + interrupt_data->num_interrupts = driver_desc->num_interrupts; + interrupt_data->interrupts = driver_desc->interrupts; + interrupt_data->interrupt_bar_index = driver_desc->interrupt_bar_index; + interrupt_data->pack_width = driver_desc->interrupt_pack_width; interrupt_data->num_configured = 0; - interrupt_data->wire_interrupt_offsets = wire_int_offsets; - /* Allocate all dynamic structures. */ - interrupt_data->msix_entries = kcalloc(num_interrupts, - sizeof(struct msix_entry), - GFP_KERNEL); - if (!interrupt_data->msix_entries) { - kfree(interrupt_data); - return -ENOMEM; - } - - interrupt_data->eventfd_ctxs = kcalloc(num_interrupts, + interrupt_data->eventfd_ctxs = kcalloc(driver_desc->num_interrupts, sizeof(struct eventfd_ctx *), GFP_KERNEL); if (!interrupt_data->eventfd_ctxs) { - kfree(interrupt_data->msix_entries); kfree(interrupt_data); return -ENOMEM; } - interrupt_data->interrupt_counts = kcalloc(num_interrupts, + interrupt_data->interrupt_counts = kcalloc(driver_desc->num_interrupts, sizeof(ulong), GFP_KERNEL); if (!interrupt_data->interrupt_counts) { kfree(interrupt_data->eventfd_ctxs); - kfree(interrupt_data->msix_entries); kfree(interrupt_data); return -ENOMEM; } @@ -379,12 +361,7 @@ int gasket_interrupt_init(struct gasket_dev *gasket_dev, const char *name, force_msix_interrupt_unmasking(gasket_dev); break; - case PCI_MSI: - case PLATFORM_WIRE: default: - dev_err(gasket_dev->dev, - "Cannot handle unsupported interrupt type %d\n", - interrupt_data->type); ret = -EINVAL; } @@ -417,6 +394,7 @@ gasket_interrupt_msix_cleanup(struct gasket_interrupt_data *interrupt_data) if (interrupt_data->msix_configured) pci_disable_msix(interrupt_data->pci_dev); interrupt_data->msix_configured = 0; + kfree(interrupt_data->msix_entries); } int gasket_interrupt_reinit(struct gasket_dev *gasket_dev) @@ -438,20 +416,16 @@ int gasket_interrupt_reinit(struct gasket_dev *gasket_dev) force_msix_interrupt_unmasking(gasket_dev); break; - case PCI_MSI: - case PLATFORM_WIRE: default: - dev_dbg(gasket_dev->dev, - "Cannot handle unsupported interrupt type %d\n", - gasket_dev->interrupt_data->type); ret = -EINVAL; } if (ret) { - /* Failing to setup MSIx will cause the device + /* Failing to setup interrupts will cause the device * to report GASKET_STATUS_LAMED, but is not fatal. */ - dev_warn(gasket_dev->dev, "Couldn't init msix: %d\n", ret); + dev_warn(gasket_dev->dev, "Couldn't reinit interrupts: %d\n", + ret); return 0; } @@ -487,17 +461,12 @@ void gasket_interrupt_cleanup(struct gasket_dev *gasket_dev) gasket_interrupt_msix_cleanup(interrupt_data); break; - case PCI_MSI: - case PLATFORM_WIRE: default: - dev_dbg(gasket_dev->dev, - "Cannot handle unsupported interrupt type %d\n", - interrupt_data->type); + break; } kfree(interrupt_data->interrupt_counts); kfree(interrupt_data->eventfd_ctxs); - kfree(interrupt_data->msix_entries); kfree(interrupt_data); gasket_dev->interrupt_data = NULL; } @@ -509,11 +478,6 @@ int gasket_interrupt_system_status(struct gasket_dev *gasket_dev) return GASKET_STATUS_DEAD; } - if (!gasket_dev->interrupt_data->msix_configured) { - dev_dbg(gasket_dev->dev, "Interrupt not initialized\n"); - return GASKET_STATUS_LAMED; - } - if (gasket_dev->interrupt_data->num_configured != gasket_dev->interrupt_data->num_interrupts) { dev_dbg(gasket_dev->dev, diff --git a/drivers/staging/gasket/gasket_interrupt.h b/drivers/staging/gasket/gasket_interrupt.h index 835af439e96a..85526a1374a1 100644 --- a/drivers/staging/gasket/gasket_interrupt.h +++ b/drivers/staging/gasket/gasket_interrupt.h @@ -24,30 +24,8 @@ struct gasket_interrupt_data; /* * Initialize the interrupt module. * @gasket_dev: The Gasket device structure for the device to be initted. - * @type: Type of the interrupt. (See gasket_interrupt_type). - * @name: The name to associate with these interrupts. - * @interrupts: An array of all interrupt descriptions for this device. - * @num_interrupts: The length of the @interrupts array. - * @pack_width: The width, in bits, of a single field in a packed interrupt reg. - * @bar_index: The bar containing all interrupt registers. - * - * Allocates and initializes data to track interrupt state for a device. - * After this call, no interrupts will be configured/delivered; call - * gasket_interrupt_set_vector[_packed] to associate each interrupt with an - * __iomem location, then gasket_interrupt_set_eventfd to associate an eventfd - * with an interrupt. - * - * If num_interrupts interrupts are not available, this call will return a - * negative error code. In that case, gasket_interrupt_cleanup should still be - * called. Returns 0 on success (which can include a device where interrupts - * are not possible to set up, but is otherwise OK; that device will report - * status LAMED.) */ -int gasket_interrupt_init(struct gasket_dev *gasket_dev, const char *name, - int type, - const struct gasket_interrupt_desc *interrupts, - int num_interrupts, int pack_width, int bar_index, - const struct gasket_wire_interrupt_offsets *wire_int_offsets); +int gasket_interrupt_init(struct gasket_dev *gasket_dev); /* * Clean up a device's interrupt structure. diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index d4c5f8aa7dd3..b7d460cf15fb 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -10,10 +10,18 @@ * * This file assumes 4kB pages throughout; can be factored out when necessary. * - * Address format is as follows: + * There is a configurable number of page table entries, as well as a + * configurable bit index for the extended address flag. Both of these are + * specified in gasket_page_table_init through the page_table_config parameter. + * + * The following example assumes: + * page_table_config->total_entries = 8192 + * page_table_config->extended_bit = 63 + * + * Address format: * Simple addresses - those whose containing pages are directly placed in the * device's address translation registers - are laid out as: - * [ 63 - 40: Unused | 39 - 28: 0 | 27 - 12: page index | 11 - 0: page offset ] + * [ 63 - 25: 0 | 24 - 12: page index | 11 - 0: page offset ] * page index: The index of the containing page in the device's address * translation registers. * page offset: The index of the address into the containing page. @@ -21,7 +29,7 @@ * Extended address - those whose containing pages are contained in a second- * level page table whose address is present in the device's address translation * registers - are laid out as: - * [ 63 - 40: Unused | 39: flag | 38 - 37: 0 | 36 - 21: dev/level 0 index | + * [ 63: flag | 62 - 34: 0 | 33 - 21: dev/level 0 index | * 20 - 12: host/level 1 index | 11 - 0: page offset ] * flag: Marker indicating that this is an extended address. Always 1. * dev index: The index of the first-level page in the device's extended @@ -103,12 +111,6 @@ struct gasket_page_table_entry { /* The status of this entry/slot: free or in use. */ enum pte_status status; - /* Address of the page in DMA space. */ - dma_addr_t dma_addr; - - /* Linux page descriptor for the page described by this structure. */ - struct page *page; - /* * Index for alignment into host vaddrs. * When a user specifies a host address for a mapping, that address may @@ -119,6 +121,12 @@ struct gasket_page_table_entry { */ int offset; + /* Address of the page in DMA space. */ + dma_addr_t dma_addr; + + /* Linux page descriptor for the page described by this structure. */ + struct page *page; + /* * If this is an extended and first-level entry, sublevel points * to the second-level entries underneath this entry. @@ -317,12 +325,10 @@ static void gasket_free_extended_subtable(struct gasket_page_table *pg_tbl, /* Release the page table from the device */ writeq(0, slot); - /* Force sync around the address release. */ - mb(); if (pte->dma_addr) dma_unmap_page(pg_tbl->device, pte->dma_addr, PAGE_SIZE, - DMA_BIDIRECTIONAL); + DMA_TO_DEVICE); vfree(pte->sublevel); @@ -435,6 +441,19 @@ static int is_coherent(struct gasket_page_table *pg_tbl, ulong host_addr) return min <= host_addr && host_addr < max; } +/* Safely return a page to the OS. */ +static bool gasket_release_page(struct page *page) +{ + if (!page) + return false; + + if (!PageReserved(page)) + SetPageDirty(page); + put_page(page); + + return true; +} + /* * Get and map last level page table buffers. * @@ -458,7 +477,6 @@ static int gasket_perform_mapping(struct gasket_page_table *pg_tbl, for (i = 0; i < num_pages; i++) { page_addr = host_addr + i * PAGE_SIZE; offset = page_addr & (PAGE_SIZE - 1); - dev_dbg(pg_tbl->device, "%s i %d\n", __func__, i); if (is_coherent(pg_tbl, host_addr)) { u64 off = (u64)host_addr - @@ -487,24 +505,16 @@ static int gasket_perform_mapping(struct gasket_page_table *pg_tbl, ptes[i].dma_addr = dma_map_page(pg_tbl->device, page, 0, PAGE_SIZE, DMA_BIDIRECTIONAL); - dev_dbg(pg_tbl->device, - "%s i %d pte %p pfn %p -> mapped %llx\n", - __func__, i, &ptes[i], - (void *)page_to_pfn(page), - (unsigned long long)ptes[i].dma_addr); - - if (ptes[i].dma_addr == -1) { - dev_dbg(pg_tbl->device, - "%s i %d -> fail to map page %llx " - "[pfn %p ohys %p]\n", - __func__, i, - (unsigned long long)ptes[i].dma_addr, - (void *)page_to_pfn(page), - (void *)page_to_phys(page)); - return -1; + + if (dma_mapping_error(pg_tbl->device, + ptes[i].dma_addr)) { + if (gasket_release_page(ptes[i].page)) + --pg_tbl->num_active_pages; + + memset(&ptes[i], 0, + sizeof(struct gasket_page_table_entry)); + return -EINVAL; } - /* Wait until the page is mapped. */ - mb(); } /* Make the DMA-space address available to the device. */ @@ -545,7 +555,7 @@ static ulong gasket_extended_lvl0_page_idx(struct gasket_page_table *pg_tbl, ulong dev_addr) { return (dev_addr >> GASKET_EXTENDED_LVL0_SHIFT) & - ((1 << GASKET_EXTENDED_LVL0_WIDTH) - 1); + (pg_tbl->config.total_entries - 1); } /* @@ -574,19 +584,6 @@ static int gasket_alloc_simple_entries(struct gasket_page_table *pg_tbl, return 0; } -/* Safely return a page to the OS. */ -static bool gasket_release_page(struct page *page) -{ - if (!page) - return false; - - if (!PageReserved(page)) - SetPageDirty(page); - put_page(page); - - return true; -} - /* * Unmap and release mapped pages. * The page table mutex must be held by the caller. @@ -603,23 +600,23 @@ static void gasket_perform_unmapping(struct gasket_page_table *pg_tbl, */ for (i = 0; i < num_pages; i++) { /* release the address from the device, */ - if (is_simple_mapping || ptes[i].status == PTE_INUSE) + if (is_simple_mapping || ptes[i].status == PTE_INUSE) { writeq(0, &slots[i]); - else + } else { ((u64 __force *)slots)[i] = 0; - /* Force sync around the address release. */ - mb(); + /* sync above PTE update before updating mappings */ + wmb(); + } /* release the address from the driver, */ if (ptes[i].status == PTE_INUSE) { - if (ptes[i].dma_addr) { + if (ptes[i].page && ptes[i].dma_addr) { dma_unmap_page(pg_tbl->device, ptes[i].dma_addr, - PAGE_SIZE, DMA_FROM_DEVICE); + PAGE_SIZE, DMA_BIDIRECTIONAL); } if (gasket_release_page(ptes[i].page)) --pg_tbl->num_active_pages; } - ptes[i].status = PTE_FREE; /* and clear the PTE. */ memset(&ptes[i], 0, sizeof(struct gasket_page_table_entry)); @@ -684,38 +681,21 @@ static inline bool gasket_addr_is_simple(struct gasket_page_table *pg_tbl, * Convert (simple, page, offset) into a device address. * Examples: * Simple page 0, offset 32: - * Input (0, 0, 32), Output 0x20 + * Input (1, 0, 32), Output 0x20 * Simple page 1000, offset 511: - * Input (0, 1000, 512), Output 0x3E81FF + * Input (1, 1000, 511), Output 0x3E81FF * Extended page 0, offset 32: * Input (0, 0, 32), Output 0x8000000020 * Extended page 1000, offset 511: - * Input (1, 1000, 512), Output 0x8003E81FF + * Input (0, 1000, 511), Output 0x8003E81FF */ static ulong gasket_components_to_dev_address(struct gasket_page_table *pg_tbl, int is_simple, uint page_index, uint offset) { - ulong lvl0_index, lvl1_index; - - if (is_simple) { - /* Return simple addresses directly. */ - lvl0_index = page_index & (pg_tbl->config.total_entries - 1); - return (lvl0_index << GASKET_SIMPLE_PAGE_SHIFT) | offset; - } + ulong dev_addr = (page_index << GASKET_SIMPLE_PAGE_SHIFT) | offset; - /* - * This could be compressed into fewer statements, but - * A) the compiler should optimize it - * B) this is not slow - * C) this is an uncommon operation - * D) this is actually readable this way. - */ - lvl0_index = page_index / GASKET_PAGES_PER_SUBTABLE; - lvl1_index = page_index & (GASKET_PAGES_PER_SUBTABLE - 1); - return (pg_tbl)->extended_flag | - (lvl0_index << GASKET_EXTENDED_LVL0_SHIFT) | - (lvl1_index << GASKET_EXTENDED_LVL1_SHIFT) | offset; + return is_simple ? dev_addr : (pg_tbl->extended_flag | dev_addr); } /* @@ -896,9 +876,13 @@ static int gasket_alloc_extended_subtable(struct gasket_page_table *pg_tbl, /* Map the page into DMA space. */ pte->dma_addr = dma_map_page(pg_tbl->device, pte->page, 0, PAGE_SIZE, - DMA_BIDIRECTIONAL); - /* Wait until the page is mapped. */ - mb(); + DMA_TO_DEVICE); + if (dma_mapping_error(pg_tbl->device, pte->dma_addr)) { + free_page(page_addr); + vfree(pte->sublevel); + memset(pte, 0, sizeof(struct gasket_page_table_entry)); + return -ENOMEM; + } /* make the addresses available to the device */ dma_addr = (pte->dma_addr + pte->offset) | GASKET_VALID_SLOT_FLAG; @@ -1047,11 +1031,6 @@ int gasket_page_table_map(struct gasket_page_table *pg_tbl, ulong host_addr, } mutex_unlock(&pg_tbl->mutex); - - dev_dbg(pg_tbl->device, - "%s done: ha %llx daddr %llx num %d, ret %d\n", - __func__, (unsigned long long)host_addr, - (unsigned long long)dev_addr, num_pages, ret); return ret; } EXPORT_SYMBOL(gasket_page_table_map); @@ -1151,7 +1130,7 @@ fail: *ppage = NULL; *poffset = 0; mutex_unlock(&pg_tbl->mutex); - return -1; + return -EINVAL; } /* See gasket_page_table.h for description. */ @@ -1291,7 +1270,7 @@ int gasket_alloc_coherent_memory(struct gasket_dev *gasket_dev, u64 size, return -EINVAL; mem = dma_alloc_coherent(gasket_get_device(gasket_dev), - num_pages * PAGE_SIZE, &handle, 0); + num_pages * PAGE_SIZE, &handle, GFP_KERNEL); if (!mem) goto nomem; @@ -1303,7 +1282,6 @@ int gasket_alloc_coherent_memory(struct gasket_dev *gasket_dev, u64 size, GFP_KERNEL); if (!gasket_dev->page_table[index]->coherent_pages) goto nomem; - *dma_address = 0; gasket_dev->coherent_buffer.length_bytes = PAGE_SIZE * (num_pages); @@ -1318,20 +1296,19 @@ int gasket_alloc_coherent_memory(struct gasket_dev *gasket_dev, u64 size, (u64)mem + j * PAGE_SIZE; } - if (*dma_address == 0) - goto nomem; return 0; nomem: if (mem) { dma_free_coherent(gasket_get_device(gasket_dev), num_pages * PAGE_SIZE, mem, handle); + gasket_dev->coherent_buffer.length_bytes = 0; + gasket_dev->coherent_buffer.virt_base = NULL; + gasket_dev->coherent_buffer.phys_base = 0; } - if (gasket_dev->page_table[index]->coherent_pages) { - kfree(gasket_dev->page_table[index]->coherent_pages); - gasket_dev->page_table[index]->coherent_pages = NULL; - } + kfree(gasket_dev->page_table[index]->coherent_pages); + gasket_dev->page_table[index]->coherent_pages = NULL; gasket_dev->page_table[index]->num_coherent_pages = 0; return -ENOMEM; } @@ -1359,6 +1336,11 @@ int gasket_free_coherent_memory(struct gasket_dev *gasket_dev, u64 size, gasket_dev->coherent_buffer.virt_base = NULL; gasket_dev->coherent_buffer.phys_base = 0; } + + kfree(gasket_dev->page_table[index]->coherent_pages); + gasket_dev->page_table[index]->coherent_pages = NULL; + gasket_dev->page_table[index]->num_coherent_pages = 0; + return 0; } diff --git a/drivers/staging/gasket/gasket_sysfs.h b/drivers/staging/gasket/gasket_sysfs.h index f32eaf89e056..151e8edd28ea 100644 --- a/drivers/staging/gasket/gasket_sysfs.h +++ b/drivers/staging/gasket/gasket_sysfs.h @@ -152,8 +152,8 @@ void gasket_sysfs_put_device_data(struct device *device, * Returns the Gasket sysfs attribute associated with the kernel device * attribute and device structure itself. Upon success, this call will take a * reference to internal sysfs data that must be released with a call to - * gasket_sysfs_get_device_data. While this reference is held, the underlying - * device sysfs information/structure will remain valid/will not be deleted. + * gasket_sysfs_put_attr. While this reference is held, the underlying device + * sysfs information/structure will remain valid/will not be deleted. */ struct gasket_sysfs_attribute * gasket_sysfs_get_attr(struct device *device, struct device_attribute *attr); diff --git a/drivers/staging/greybus/audio_codec.c b/drivers/staging/greybus/audio_codec.c index 35acd55ca5ab..08746c85dea6 100644 --- a/drivers/staging/greybus/audio_codec.c +++ b/drivers/staging/greybus/audio_codec.c @@ -1087,7 +1087,6 @@ static const struct of_device_id greybus_asoc_machine_of_match[] = { static struct platform_driver gbaudio_codec_driver = { .driver = { .name = "apb-dummy-codec", - .owner = THIS_MODULE, #ifdef CONFIG_PM .pm = &gbaudio_codec_pm_ops, #endif diff --git a/drivers/staging/greybus/loopback.c b/drivers/staging/greybus/loopback.c index 42f6f3de967c..7080294f705c 100644 --- a/drivers/staging/greybus/loopback.c +++ b/drivers/staging/greybus/loopback.c @@ -97,7 +97,6 @@ struct gb_loopback { u32 timeout_min; u32 timeout_max; u32 outstanding_operations_max; - u32 lbid; u64 elapsed_nsecs; u32 apbridge_latency_ts; u32 gbphy_latency_ts; @@ -1014,16 +1013,9 @@ static int gb_loopback_bus_id_compare(void *priv, struct list_head *lha, static void gb_loopback_insert_id(struct gb_loopback *gb) { - struct gb_loopback *gb_list; - u32 new_lbid = 0; - /* perform an insertion sort */ list_add_tail(&gb->entry, &gb_dev.list); list_sort(NULL, &gb_dev.list, gb_loopback_bus_id_compare); - list_for_each_entry(gb_list, &gb_dev.list, entry) { - gb_list->lbid = 1 << new_lbid; - new_lbid++; - } } #define DEBUGFS_NAMELEN 32 diff --git a/drivers/staging/greybus/tools/README.loopback b/drivers/staging/greybus/tools/README.loopback index 845b08dc4696..070a510cbe7c 100644 --- a/drivers/staging/greybus/tools/README.loopback +++ b/drivers/staging/greybus/tools/README.loopback @@ -79,7 +79,7 @@ Here is the summary of the available options: -t must be one of the test names - sink, transfer or ping -i iteration count - the number of iterations to run the test over Optional arguments - -S sysfs location - location for greybus 'endo' entires default /sys/bus/greybus/devices/ + -S sysfs location - location for greybus 'endo' entries default /sys/bus/greybus/devices/ -D debugfs location - location for loopback debugfs entries default /sys/kernel/debug/gb_loopback/ -s size of data packet to send during test - defaults to zero -m mask - a bit mask of connections to include example: -m 8 = 4th connection -m 9 = 1st and 4th connection etc diff --git a/drivers/staging/greybus/tools/loopback_test.c b/drivers/staging/greybus/tools/loopback_test.c index b82e2befe935..2fa88092514d 100644 --- a/drivers/staging/greybus/tools/loopback_test.c +++ b/drivers/staging/greybus/tools/loopback_test.c @@ -192,7 +192,7 @@ void usage(void) " -t must be one of the test names - sink, transfer or ping\n" " -i iteration count - the number of iterations to run the test over\n" " Optional arguments\n" - " -S sysfs location - location for greybus 'endo' entires default /sys/bus/greybus/devices/\n" + " -S sysfs location - location for greybus 'endo' entries default /sys/bus/greybus/devices/\n" " -D debugfs location - location for loopback debugfs entries default /sys/kernel/debug/gb_loopback/\n" " -s size of data packet to send during test - defaults to zero\n" " -m mask - a bit mask of connections to include example: -m 8 = 4th connection -m 9 = 1st and 4th connection etc\n" diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig index e17efb03bac0..9d3062a07460 100644 --- a/drivers/staging/iio/adc/Kconfig +++ b/drivers/staging/iio/adc/Kconfig @@ -11,7 +11,7 @@ config AD7606 select IIO_TRIGGERED_BUFFER help Say yes here to build support for Analog Devices: - ad7606, ad7606-6, ad7606-4 analog to digital converters (ADC). + ad7605-4, ad7606, ad7606-6, ad7606-4 analog to digital converters (ADC). To compile this driver as a module, choose M here: the module will be called ad7606. diff --git a/drivers/staging/iio/adc/ad7192.c b/drivers/staging/iio/adc/ad7192.c index df0499fc4802..acdbc07fd259 100644 --- a/drivers/staging/iio/adc/ad7192.c +++ b/drivers/staging/iio/adc/ad7192.c @@ -761,6 +761,6 @@ static struct spi_driver ad7192_driver = { }; module_spi_driver(ad7192_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7190, AD7192, AD7193, AD7195 ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index b736275c10f5..58420dcb406d 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -987,6 +987,6 @@ static struct spi_driver ad7280_driver = { }; module_spi_driver(ad7280_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7280A"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/ad7606.c b/drivers/staging/iio/adc/ad7606.c index b7810b1aad07..048c205b979e 100644 --- a/drivers/staging/iio/adc/ad7606.c +++ b/drivers/staging/iio/adc/ad7606.c @@ -26,9 +26,12 @@ #include "ad7606.h" -/* Scales are computed as 2.5/2**16 and 5/2**16 respectively */ +/* + * Scales are computed as 5000/32768 and 10000/32768 respectively, + * so that when applied to the raw values they provide mV values + */ static const unsigned int scale_avail[2][2] = { - {0, 38147}, {0, 76294} + {0, 152588}, {0, 305176} }; static int ad7606_reset(struct ad7606_state *st) @@ -271,7 +274,7 @@ static const struct attribute_group ad7606_attribute_group_range = { .attrs = ad7606_attributes_range, }; -#define AD7606_CHANNEL(num) \ +#define AD760X_CHANNEL(num, mask) \ { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ @@ -279,8 +282,7 @@ static const struct attribute_group ad7606_attribute_group_range = { .address = num, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ - .info_mask_shared_by_all = \ - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all = mask, \ .scan_index = num, \ .scan_type = { \ .sign = 's', \ @@ -290,6 +292,20 @@ static const struct attribute_group ad7606_attribute_group_range = { }, \ } +#define AD7605_CHANNEL(num) \ + AD760X_CHANNEL(num, 0) + +#define AD7606_CHANNEL(num) \ + AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) + +static const struct iio_chan_spec ad7605_channels[] = { + IIO_CHAN_SOFT_TIMESTAMP(4), + AD7605_CHANNEL(0), + AD7605_CHANNEL(1), + AD7605_CHANNEL(2), + AD7605_CHANNEL(3), +}; + static const struct iio_chan_spec ad7606_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(8), AD7606_CHANNEL(0), @@ -306,17 +322,24 @@ static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { /* * More devices added in future */ + [ID_AD7605_4] = { + .channels = ad7605_channels, + .num_channels = 5, + }, [ID_AD7606_8] = { .channels = ad7606_channels, .num_channels = 9, + .has_oversampling = true, }, [ID_AD7606_6] = { .channels = ad7606_channels, .num_channels = 7, + .has_oversampling = true, }, [ID_AD7606_4] = { .channels = ad7606_channels, .num_channels = 5, + .has_oversampling = true, }, }; @@ -347,6 +370,9 @@ static int ad7606_request_gpios(struct ad7606_state *st) if (IS_ERR(st->gpio_frstdata)) return PTR_ERR(st->gpio_frstdata); + if (!st->chip_info->has_oversampling) + return 0; + st->gpio_os = devm_gpiod_get_array_optional(dev, "oversampling-ratio", GPIOD_OUT_LOW); return PTR_ERR_OR_ZERO(st->gpio_os); @@ -425,12 +451,12 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, return ret; } + st->chip_info = &ad7606_chip_info_tbl[id]; + ret = ad7606_request_gpios(st); if (ret) goto error_disable_reg; - st->chip_info = &ad7606_chip_info_tbl[id]; - indio_dev->dev.parent = dev; if (st->gpio_os) { if (st->gpio_range) @@ -532,6 +558,6 @@ EXPORT_SYMBOL_GPL(ad7606_pm_ops); #endif -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/ad7606.h b/drivers/staging/iio/adc/ad7606.h index 9716ee9d94a7..86188054b60b 100644 --- a/drivers/staging/iio/adc/ad7606.h +++ b/drivers/staging/iio/adc/ad7606.h @@ -11,20 +11,40 @@ /** * struct ad7606_chip_info - chip specific information - * @name: identification string for chip * @channels: channel specification * @num_channels: number of channels - * @lock protect sensor state + * @has_oversampling: whether the device has oversampling support */ struct ad7606_chip_info { const struct iio_chan_spec *channels; unsigned int num_channels; + bool has_oversampling; }; /** * struct ad7606_state - driver instance specific data - * @lock protect sensor state + * @dev pointer to kernel device + * @chip_info entry in the table of chips that describes this device + * @reg regulator info for the the power supply of the device + * @poll_work work struct for continuously reading data from the device + * into an IIO triggered buffer + * @wq_data_avail wait queue struct for buffer mode + * @bops bus operations (SPI or parallel) + * @range voltage range selection, selects which scale to apply + * @oversampling oversampling selection + * @done marks whether reading data is done + * @base_address address from where to read data in parallel operation + * @lock protect sensor state from concurrent accesses to GPIOs + * @gpio_convst GPIO descriptor for conversion start signal (CONVST) + * @gpio_reset GPIO descriptor for device hard-reset + * @gpio_range GPIO descriptor for range selection + * @gpio_standby GPIO descriptor for stand-by signal (STBY), + * controls power-down mode of device + * @gpio_frstdata GPIO descriptor for reading from device when data + * is being read on the first channel + * @gpio_os GPIO descriptors to control oversampling on the device + * @data buffer for reading data from the device */ struct ad7606_state { @@ -55,6 +75,10 @@ struct ad7606_state { unsigned short data[12] ____cacheline_aligned; }; +/** + * struct ad7606_bus_ops - driver bus operations + * @read_block function pointer for reading blocks of data + */ struct ad7606_bus_ops { /* more methods added in future? */ int (*read_block)(struct device *dev, int num, void *data); @@ -66,6 +90,7 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, int ad7606_remove(struct device *dev, int irq); enum ad7606_supported_device_ids { + ID_AD7605_4, ID_AD7606_8, ID_AD7606_6, ID_AD7606_4 diff --git a/drivers/staging/iio/adc/ad7606_par.c b/drivers/staging/iio/adc/ad7606_par.c index a34c2a1d5373..8bd86e727b02 100644 --- a/drivers/staging/iio/adc/ad7606_par.c +++ b/drivers/staging/iio/adc/ad7606_par.c @@ -79,6 +79,9 @@ static int ad7606_par_remove(struct platform_device *pdev) static const struct platform_device_id ad7606_driver_ids[] = { { + .name = "ad7605-4", + .driver_data = ID_AD7605_4, + }, { .name = "ad7606-8", .driver_data = ID_AD7606_8, }, { @@ -105,6 +108,6 @@ static struct platform_driver ad7606_driver = { module_platform_driver(ad7606_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/ad7606_spi.c b/drivers/staging/iio/adc/ad7606_spi.c index c9b1f26685f4..b76ca5a8c059 100644 --- a/drivers/staging/iio/adc/ad7606_spi.c +++ b/drivers/staging/iio/adc/ad7606_spi.c @@ -55,6 +55,7 @@ static int ad7606_spi_remove(struct spi_device *spi) } static const struct spi_device_id ad7606_id[] = { + {"ad7605-4", ID_AD7605_4}, {"ad7606-8", ID_AD7606_8}, {"ad7606-6", ID_AD7606_6}, {"ad7606-4", ID_AD7606_4}, @@ -73,6 +74,6 @@ static struct spi_driver ad7606_driver = { }; module_spi_driver(ad7606_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/ad7780.c b/drivers/staging/iio/adc/ad7780.c index 16d72072c076..b67412db0318 100644 --- a/drivers/staging/iio/adc/ad7780.c +++ b/drivers/staging/iio/adc/ad7780.c @@ -260,6 +260,6 @@ static struct spi_driver ad7780_driver = { }; module_spi_driver(ad7780_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7780 and similar ADCs"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/cdc/ad7746.c b/drivers/staging/iio/cdc/ad7746.c index f53612a6461d..0eb28fea876e 100644 --- a/drivers/staging/iio/cdc/ad7746.c +++ b/drivers/staging/iio/cdc/ad7746.c @@ -758,6 +758,6 @@ static struct i2c_driver ad7746_driver = { }; module_i2c_driver(ad7746_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD7746/5/7 capacitive sensor driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c index c73eff1f8d73..a3ce50427724 100644 --- a/drivers/staging/iio/frequency/ad9832.c +++ b/drivers/staging/iio/frequency/ad9832.c @@ -454,6 +454,6 @@ static struct spi_driver ad9832_driver = { }; module_spi_driver(ad9832_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD9832/AD9835 DDS"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/frequency/ad9834.c b/drivers/staging/iio/frequency/ad9834.c index 4c6d4043903e..1e977014fe5f 100644 --- a/drivers/staging/iio/frequency/ad9834.c +++ b/drivers/staging/iio/frequency/ad9834.c @@ -526,6 +526,6 @@ static struct spi_driver ad9834_driver = { }; module_spi_driver(ad9834_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD9833/AD9834/AD9837/AD9838 DDS"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c index 14df89510396..a2370dd1e1a8 100644 --- a/drivers/staging/iio/impedance-analyzer/ad5933.c +++ b/drivers/staging/iio/impedance-analyzer/ad5933.c @@ -797,6 +797,6 @@ static struct i2c_driver ad5933_driver = { }; module_i2c_driver(ad5933_driver); -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/ks7010/ks_hostif.c b/drivers/staging/ks7010/ks_hostif.c index 0e554e3359b5..065bce193fac 100644 --- a/drivers/staging/ks7010/ks_hostif.c +++ b/drivers/staging/ks7010/ks_hostif.c @@ -191,7 +191,6 @@ static u8 read_ie(unsigned char *bp, u8 max, u8 *body) return size; } - static int get_ap_information(struct ks_wlan_private *priv, struct ap_info *ap_info, struct local_ap *ap) @@ -1023,8 +1022,8 @@ int hostif_data_request(struct ks_wlan_private *priv, struct sk_buff *skb) priv->wpa.mic_failure.stop) { if (netif_queue_stopped(priv->net_dev)) netif_wake_queue(priv->net_dev); - if (skb) - dev_kfree_skb(skb); + + dev_kfree_skb(skb); return 0; } diff --git a/drivers/staging/media/davinci_vpfe/dm365_ipipe.c b/drivers/staging/media/davinci_vpfe/dm365_ipipe.c index 95942768639c..4d09e8141fed 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_ipipe.c +++ b/drivers/staging/media/davinci_vpfe/dm365_ipipe.c @@ -695,21 +695,21 @@ static int ipipe_get_gamma_params(struct vpfe_ipipe_device *ipipe, void *param) if (!gamma->bypass_r) { dev_err(dev, - "ipipe_get_gamma_params: table ptr empty for R\n"); + "%s: table ptr empty for R\n", __func__); return -EINVAL; } memcpy(gamma_param->table_r, gamma->table_r, (table_size * sizeof(struct vpfe_ipipe_gamma_entry))); if (!gamma->bypass_g) { - dev_err(dev, "ipipe_get_gamma_params: table ptr empty for G\n"); + dev_err(dev, "%s: table ptr empty for G\n", __func__); return -EINVAL; } memcpy(gamma_param->table_g, gamma->table_g, (table_size * sizeof(struct vpfe_ipipe_gamma_entry))); if (!gamma->bypass_b) { - dev_err(dev, "ipipe_get_gamma_params: table ptr empty for B\n"); + dev_err(dev, "%s: table ptr empty for B\n", __func__); return -EINVAL; } memcpy(gamma_param->table_b, gamma->table_b, diff --git a/drivers/staging/media/davinci_vpfe/dm365_resizer.c b/drivers/staging/media/davinci_vpfe/dm365_resizer.c index 2b797474a344..6c5fcd6c691a 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_resizer.c +++ b/drivers/staging/media/davinci_vpfe/dm365_resizer.c @@ -499,7 +499,7 @@ resizer_configure_in_continuous_mode(struct vpfe_resizer_device *resizer) configure_resizer_out_params(resizer, RSZ_A, &cont_config->output1, 1, 0); param->rsz_en[RSZ_B] = DISABLE; - param->oper_mode = RESIZER_MODE_CONTINIOUS; + param->oper_mode = RESIZER_MODE_CONTINUOUS; if (resizer->resizer_b.output == RESIZER_OUTPUT_MEMORY) { struct v4l2_mbus_framefmt *outformat2; diff --git a/drivers/staging/media/davinci_vpfe/dm365_resizer.h b/drivers/staging/media/davinci_vpfe/dm365_resizer.h index 00e64b0d0295..cf560a33d862 100644 --- a/drivers/staging/media/davinci_vpfe/dm365_resizer.h +++ b/drivers/staging/media/davinci_vpfe/dm365_resizer.h @@ -23,7 +23,7 @@ #define _DAVINCI_VPFE_DM365_RESIZER_H enum resizer_oper_mode { - RESIZER_MODE_CONTINIOUS = 0, + RESIZER_MODE_CONTINUOUS = 0, RESIZER_MODE_ONE_SHOT = 1, }; diff --git a/drivers/staging/media/imx/imx-media-dev.c b/drivers/staging/media/imx/imx-media-dev.c index b0be80f05767..3f48f5ceb6ea 100644 --- a/drivers/staging/media/imx/imx-media-dev.c +++ b/drivers/staging/media/imx/imx-media-dev.c @@ -89,8 +89,12 @@ int imx_media_add_async_subdev(struct imx_media_dev *imxmd, /* return -EEXIST if this asd already added */ if (find_async_subdev(imxmd, fwnode, devname)) { - dev_dbg(imxmd->md.dev, "%s: already added %s\n", - __func__, np ? np->name : devname); + if (np) + dev_dbg(imxmd->md.dev, "%s: already added %pOFn\n", + __func__, np); + else + dev_dbg(imxmd->md.dev, "%s: already added %s\n", + __func__, devname); ret = -EEXIST; goto out; } @@ -105,19 +109,20 @@ int imx_media_add_async_subdev(struct imx_media_dev *imxmd, if (fwnode) { asd->match_type = V4L2_ASYNC_MATCH_FWNODE; asd->match.fwnode = fwnode; + dev_dbg(imxmd->md.dev, "%s: added %pOFn, match type FWNODE\n", + __func__, np); } else { asd->match_type = V4L2_ASYNC_MATCH_DEVNAME; asd->match.device_name = devname; imxasd->pdev = pdev; + dev_dbg(imxmd->md.dev, "%s: added %s, match type DEVNAME\n", + __func__, devname); } list_add_tail(&imxasd->list, &imxmd->asd_list); imxmd->subdev_notifier.num_subdevs++; - dev_dbg(imxmd->md.dev, "%s: added %s, match type %s\n", - __func__, np ? np->name : devname, np ? "FWNODE" : "DEVNAME"); - out: mutex_unlock(&imxmd->mutex); return ret; diff --git a/drivers/staging/media/imx/imx-media-of.c b/drivers/staging/media/imx/imx-media-of.c index acde372c6795..163437e421c5 100644 --- a/drivers/staging/media/imx/imx-media-of.c +++ b/drivers/staging/media/imx/imx-media-of.c @@ -79,8 +79,8 @@ of_parse_subdev(struct imx_media_dev *imxmd, struct device_node *sd_np, int i, num_ports, ret; if (!of_device_is_available(sd_np)) { - dev_dbg(imxmd->md.dev, "%s: %s not enabled\n", __func__, - sd_np->name); + dev_dbg(imxmd->md.dev, "%s: %pOFn not enabled\n", __func__, + sd_np); /* unavailable is not an error */ return 0; } diff --git a/drivers/staging/most/cdev/cdev.c b/drivers/staging/most/cdev/cdev.c index 4569838f27a0..ea64aabda94e 100644 --- a/drivers/staging/most/cdev/cdev.c +++ b/drivers/staging/most/cdev/cdev.c @@ -447,7 +447,7 @@ static int comp_probe(struct most_interface *iface, int channel_id, c = kzalloc(sizeof(*c), GFP_KERNEL); if (!c) { retval = -ENOMEM; - goto error_alloc_channel; + goto err_remove_ida; } c->devno = MKDEV(comp.major, current_minor); @@ -463,7 +463,7 @@ static int comp_probe(struct most_interface *iface, int channel_id, retval = kfifo_alloc(&c->fifo, cfg->num_buffers, GFP_KERNEL); if (retval) { pr_info("failed to alloc channel kfifo"); - goto error_alloc_kfifo; + goto err_del_cdev_and_free_channel; } init_waitqueue_head(&c->wq); mutex_init(&c->io_mutex); @@ -475,18 +475,18 @@ static int comp_probe(struct most_interface *iface, int channel_id, if (IS_ERR(c->dev)) { retval = PTR_ERR(c->dev); pr_info("failed to create new device node %s\n", name); - goto error_create_device; + goto err_free_kfifo_and_del_list; } kobject_uevent(&c->dev->kobj, KOBJ_ADD); return 0; -error_create_device: +err_free_kfifo_and_del_list: kfifo_free(&c->fifo); list_del(&c->list); -error_alloc_kfifo: +err_del_cdev_and_free_channel: cdev_del(&c->cdev); kfree(c); -error_alloc_channel: +err_remove_ida: ida_simple_remove(&comp.minor_id, current_minor); return retval; } diff --git a/drivers/staging/most/core.c b/drivers/staging/most/core.c index f4c464625a67..6a18cf73c85e 100644 --- a/drivers/staging/most/core.c +++ b/drivers/staging/most/core.c @@ -442,6 +442,24 @@ static ssize_t set_dbr_size_store(struct device *dev, return count; } +#define to_dev_attr(a) container_of(a, struct device_attribute, attr) +static umode_t channel_attr_is_visible(struct kobject *kobj, + struct attribute *attr, int index) +{ + struct device_attribute *dev_attr = to_dev_attr(attr); + struct device *dev = kobj_to_dev(kobj); + struct most_channel *c = to_channel(dev); + + if (!strcmp(dev_attr->attr.name, "set_dbr_size") && + (c->iface->interface != ITYPE_MEDIALB_DIM2)) + return 0; + if (!strcmp(dev_attr->attr.name, "set_packets_per_xact") && + (c->iface->interface != ITYPE_USB)) + return 0; + + return attr->mode; +} + #define DEV_ATTR(_name) (&dev_attr_##_name.attr) static DEVICE_ATTR_RO(available_directions); @@ -479,6 +497,7 @@ static struct attribute *channel_attrs[] = { static struct attribute_group channel_attr_group = { .attrs = channel_attrs, + .is_visible = channel_attr_is_visible, }; static const struct attribute_group *channel_attr_groups[] = { @@ -1216,7 +1235,7 @@ int most_start_channel(struct most_interface *iface, int id, if (c->iface->configure(c->iface, c->channel_id, &c->cfg)) { pr_info("channel configuration failed. Go check settings...\n"); ret = -EINVAL; - goto error; + goto err_put_module; } init_waitqueue_head(&c->hdm_fifo_wq); @@ -1229,12 +1248,12 @@ int most_start_channel(struct most_interface *iface, int id, most_write_completion); if (unlikely(!num_buffer)) { ret = -ENOMEM; - goto error; + goto err_put_module; } ret = run_enqueue_thread(c, id); if (ret) - goto error; + goto err_put_module; c->is_starving = 0; c->pipe0.num_buffers = c->cfg.num_buffers / 2; @@ -1249,7 +1268,7 @@ out: mutex_unlock(&c->start_mutex); return 0; -error: +err_put_module: module_put(iface->mod); mutex_unlock(&c->start_mutex); return ret; @@ -1430,7 +1449,7 @@ int most_register_interface(struct most_interface *iface) c = kzalloc(sizeof(*c), GFP_KERNEL); if (!c) - goto free_instance; + goto err_free_resources; if (!name_suffix) snprintf(c->name, STRING_SIZE, "ch%d", i); else @@ -1439,10 +1458,6 @@ int most_register_interface(struct most_interface *iface) c->dev.parent = &iface->dev; c->dev.groups = channel_attr_groups; c->dev.release = release_channel; - if (device_register(&c->dev)) { - pr_err("registering c->dev failed\n"); - goto free_instance_nodev; - } iface->p->channel[i] = c; c->is_starving = 0; c->iface = iface; @@ -1465,15 +1480,19 @@ int most_register_interface(struct most_interface *iface) mutex_init(&c->start_mutex); mutex_init(&c->nq_mutex); list_add_tail(&c->list, &iface->p->channel_list); + if (device_register(&c->dev)) { + pr_err("registering c->dev failed\n"); + goto err_free_most_channel; + } } pr_info("registered new device mdev%d (%s)\n", id, iface->description); return 0; -free_instance_nodev: +err_free_most_channel: kfree(c); -free_instance: +err_free_resources: while (i > 0) { c = iface->p->channel[--i]; device_unregister(&c->dev); @@ -1594,20 +1613,20 @@ static int __init most_init(void) err = driver_register(&mc.drv); if (err) { pr_info("Cannot register core driver\n"); - goto exit_bus; + goto err_unregister_bus; } mc.dev.init_name = "most_bus"; mc.dev.release = release_most_sub; if (device_register(&mc.dev)) { err = -ENOMEM; - goto exit_driver; + goto err_unregister_driver; } return 0; -exit_driver: +err_unregister_driver: driver_unregister(&mc.drv); -exit_bus: +err_unregister_bus: bus_unregister(&mc.bus); return err; } diff --git a/drivers/staging/most/net/net.c b/drivers/staging/most/net/net.c index 30d816b7e165..e20584b1b112 100644 --- a/drivers/staging/most/net/net.c +++ b/drivers/staging/most/net/net.c @@ -75,7 +75,7 @@ static struct core_component comp; static int skb_to_mamac(const struct sk_buff *skb, struct mbo *mbo) { u8 *buff = mbo->virt_address; - const u8 broadcast[] = { 0x03, 0xFF }; + static const u8 broadcast[] = { 0x03, 0xFF }; const u8 *dest_addr = skb->data + 4; const u8 *eth_type = skb->data + 12; unsigned int payload_len = skb->len - ETH_HLEN; diff --git a/drivers/staging/most/usb/usb.c b/drivers/staging/most/usb/usb.c index bc820f90bcb1..c0293d8d5934 100644 --- a/drivers/staging/most/usb/usb.c +++ b/drivers/staging/most/usb/usb.c @@ -568,19 +568,19 @@ static int hdm_enqueue(struct most_interface *iface, int channel, mutex_lock(&mdev->io_mutex); if (!mdev->usb_device) { retval = -ENODEV; - goto _exit; + goto unlock_io_mutex; } urb = usb_alloc_urb(NO_ISOCHRONOUS_URB, GFP_ATOMIC); if (!urb) { retval = -ENOMEM; - goto _exit; + goto unlock_io_mutex; } if ((conf->direction & MOST_CH_TX) && mdev->padding_active[channel] && hdm_add_padding(mdev, channel, mbo)) { retval = -EIO; - goto _error; + goto err_free_urb; } urb->transfer_dma = mbo->bus_address; @@ -615,15 +615,15 @@ static int hdm_enqueue(struct most_interface *iface, int channel, if (retval) { dev_err(&mdev->usb_device->dev, "URB submit failed with error %d.\n", retval); - goto _error_1; + goto err_unanchor_urb; } - goto _exit; + goto unlock_io_mutex; -_error_1: +err_unanchor_urb: usb_unanchor_urb(urb); -_error: +err_free_urb: usb_free_urb(urb); -_exit: +unlock_io_mutex: mutex_unlock(&mdev->io_mutex); return retval; } @@ -1015,6 +1015,13 @@ static const struct attribute_group *dci_attr_groups[] = { NULL, }; +static void release_dci(struct device *dev) +{ + struct most_dci_obj *dci = to_dci_obj(dev); + + kfree(dci); +} + /** * hdm_probe - probe function of USB device driver * @interface: Interface of the attached USB device @@ -1041,7 +1048,7 @@ hdm_probe(struct usb_interface *interface, const struct usb_device_id *id) int ret = 0; if (!mdev) - goto exit_ENOMEM; + goto err_out_of_memory; usb_set_intfdata(interface, mdev); num_endpoints = usb_iface_desc->desc.bNumEndpoints; @@ -1073,22 +1080,22 @@ hdm_probe(struct usb_interface *interface, const struct usb_device_id *id) mdev->conf = kcalloc(num_endpoints, sizeof(*mdev->conf), GFP_KERNEL); if (!mdev->conf) - goto exit_free; + goto err_free_mdev; mdev->cap = kcalloc(num_endpoints, sizeof(*mdev->cap), GFP_KERNEL); if (!mdev->cap) - goto exit_free1; + goto err_free_conf; mdev->iface.channel_vector = mdev->cap; mdev->ep_address = kcalloc(num_endpoints, sizeof(*mdev->ep_address), GFP_KERNEL); if (!mdev->ep_address) - goto exit_free2; + goto err_free_cap; mdev->busy_urbs = kcalloc(num_endpoints, sizeof(*mdev->busy_urbs), GFP_KERNEL); if (!mdev->busy_urbs) - goto exit_free3; + goto err_free_ep_address; tmp_cap = mdev->cap; for (i = 0; i < num_endpoints; i++) { @@ -1129,7 +1136,7 @@ hdm_probe(struct usb_interface *interface, const struct usb_device_id *id) ret = most_register_interface(&mdev->iface); if (ret) - goto exit_free4; + goto err_free_busy_urbs; mutex_lock(&mdev->io_mutex); if (le16_to_cpu(usb_dev->descriptor.idProduct) == USB_DEV_ID_OS81118 || @@ -1140,35 +1147,36 @@ hdm_probe(struct usb_interface *interface, const struct usb_device_id *id) mutex_unlock(&mdev->io_mutex); most_deregister_interface(&mdev->iface); ret = -ENOMEM; - goto exit_free4; + goto err_free_busy_urbs; } mdev->dci->dev.init_name = "dci"; mdev->dci->dev.parent = &mdev->iface.dev; mdev->dci->dev.groups = dci_attr_groups; + mdev->dci->dev.release = release_dci; if (device_register(&mdev->dci->dev)) { mutex_unlock(&mdev->io_mutex); most_deregister_interface(&mdev->iface); ret = -ENOMEM; - goto exit_free5; + goto err_free_dci; } mdev->dci->usb_device = mdev->usb_device; } mutex_unlock(&mdev->io_mutex); return 0; -exit_free5: +err_free_dci: kfree(mdev->dci); -exit_free4: +err_free_busy_urbs: kfree(mdev->busy_urbs); -exit_free3: +err_free_ep_address: kfree(mdev->ep_address); -exit_free2: +err_free_cap: kfree(mdev->cap); -exit_free1: +err_free_conf: kfree(mdev->conf); -exit_free: +err_free_mdev: kfree(mdev); -exit_ENOMEM: +err_out_of_memory: if (ret == 0 || ret == -ENOMEM) { ret = -ENOMEM; dev_err(dev, "out of memory\n"); @@ -1198,7 +1206,6 @@ static void hdm_disconnect(struct usb_interface *interface) cancel_work_sync(&mdev->poll_work_obj); device_unregister(&mdev->dci->dev); - kfree(mdev->dci); most_deregister_interface(&mdev->iface); kfree(mdev->busy_urbs); diff --git a/drivers/staging/most/video/video.c b/drivers/staging/most/video/video.c index cf342eb58e10..ad7e28ab9a4f 100644 --- a/drivers/staging/most/video/video.c +++ b/drivers/staging/most/video/video.c @@ -530,7 +530,7 @@ static int comp_disconnect_channel(struct most_interface *iface, return 0; } -static struct core_component comp_info = { +static struct core_component comp = { .name = "video", .probe_channel = comp_probe_channel, .disconnect_channel = comp_disconnect_channel, @@ -565,7 +565,7 @@ static void __exit comp_exit(void) } spin_unlock_irq(&list_lock); - most_deregister_component(&comp_info); + most_deregister_component(&comp); BUG_ON(!list_empty(&video_devices)); } diff --git a/drivers/staging/mt7621-dma/ralink-gdma.c b/drivers/staging/mt7621-dma/ralink-gdma.c index 6d9fe175ea52..73dbc7fe38a2 100644 --- a/drivers/staging/mt7621-dma/ralink-gdma.c +++ b/drivers/staging/mt7621-dma/ralink-gdma.c @@ -47,7 +47,6 @@ #define GDMA_REG_CTRL1_REQ_MASK 0x3f #define GDMA_REG_CTRL1_SRC_REQ_SHIFT 16 #define GDMA_REG_CTRL1_DST_REQ_SHIFT 8 -#define GDMA_REG_CTRL1_CONTINOUS BIT(14) #define GDMA_REG_CTRL1_NEXT_MASK 0x1f #define GDMA_REG_CTRL1_NEXT_SHIFT 3 #define GDMA_REG_CTRL1_COHERENT BIT(2) diff --git a/drivers/staging/mt7621-eth/gsw_mt7621.c b/drivers/staging/mt7621-eth/gsw_mt7621.c index 2c07b559bed7..53767b17bad9 100644 --- a/drivers/staging/mt7621-eth/gsw_mt7621.c +++ b/drivers/staging/mt7621-eth/gsw_mt7621.c @@ -286,7 +286,6 @@ static struct platform_driver gsw_driver = { .remove = mt7621_gsw_remove, .driver = { .name = "mt7621-gsw", - .owner = THIS_MODULE, .of_match_table = mediatek_gsw_match, }, }; diff --git a/drivers/staging/mt7621-eth/mdio.c b/drivers/staging/mt7621-eth/mdio.c index 2c6e1800a3fd..ee851281b657 100644 --- a/drivers/staging/mt7621-eth/mdio.c +++ b/drivers/staging/mt7621-eth/mdio.c @@ -70,7 +70,7 @@ int mtk_connect_phy_node(struct mtk_eth *eth, struct mtk_mac *mac, _port = of_get_property(phy_node, "reg", NULL); if (!_port || (be32_to_cpu(*_port) >= 0x20)) { - pr_err("%s: invalid port id\n", phy_node->name); + pr_err("%pOFn: invalid port id\n", phy_node); return -EINVAL; } port = be32_to_cpu(*_port); @@ -249,7 +249,7 @@ int mtk_mdio_init(struct mtk_eth *eth) eth->mii_bus->priv = eth; eth->mii_bus->parent = eth->dev; - snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%s", mii_np->name); + snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np); err = of_mdiobus_register(eth->mii_bus, mii_np); if (err) goto err_free_bus; diff --git a/drivers/staging/mt7621-eth/mtk_eth_soc.c b/drivers/staging/mt7621-eth/mtk_eth_soc.c index 713507558568..363d3c978e02 100644 --- a/drivers/staging/mt7621-eth/mtk_eth_soc.c +++ b/drivers/staging/mt7621-eth/mtk_eth_soc.c @@ -2167,7 +2167,6 @@ static struct platform_driver mtk_driver = { .remove = mtk_remove, .driver = { .name = "mtk_soc_eth", - .owner = THIS_MODULE, .of_match_table = of_mtk_match, }, }; diff --git a/drivers/staging/mt7621-mmc/dbg.c b/drivers/staging/mt7621-mmc/dbg.c index 6e518dce9029..829d3d0e895e 100644 --- a/drivers/staging/mt7621-mmc/dbg.c +++ b/drivers/staging/mt7621-mmc/dbg.c @@ -5,7 +5,8 @@ * is confidential and proprietary to MediaTek Inc. and/or its licensors. * Without the prior written permission of MediaTek inc. and/or its licensors, * any reproduction, modification, use or disclosure of MediaTek Software, - * and information contained herein, in whole or in part, shall be strictly prohibited. + * and information contained herein, in whole or in part, shall be strictly + * prohibited. * * MediaTek Inc. (C) 2010. All rights reserved. * @@ -17,20 +18,22 @@ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR - * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH - * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES - * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES - * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK - * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR - * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND - * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, - * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, - * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO - * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. + * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO + * SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY + * ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY + * THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK + * SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO + * RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN + * FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND + * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED + * HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK + * SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE + * PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. * - * The following software/firmware and/or related documentation ("MediaTek Software") - * have been modified by MediaTek Inc. All revisions are subject to any receiver's - * applicable license agreements with MediaTek Inc. + * The following software/firmware and/or related documentation + * ("MediaTek Software") have been modified by MediaTek Inc. All revisions + * are subject to any receiver's applicable license agreements with MediaTek + * Inc. */ #include <linux/version.h> @@ -66,23 +69,6 @@ u32 sdio_pro_enable; /* make sure gpt is enabled */ u32 sdio_pro_time; /* no more than 30s */ struct sdio_profile sdio_perfomance = {0}; -#if 0 /* --- chhung */ -void msdc_init_gpt(void) -{ - GPT_CONFIG config; - - config.num = GPT6; - config.mode = GPT_FREE_RUN; - config.clkSrc = GPT_CLK_SRC_SYS; - config.clkDiv = GPT_CLK_DIV_1; /* 13MHz GPT6 */ - - if (GPT_Config(config) == FALSE) - return; - - GPT_Start(GPT6); -} -#endif /* end of --- */ - u32 msdc_time_calc(u32 old_L32, u32 old_H32, u32 new_L32, u32 new_H32) { u32 ret = 0; @@ -91,7 +77,8 @@ u32 msdc_time_calc(u32 old_L32, u32 old_H32, u32 new_L32, u32 new_H32) ret = new_L32 - old_L32; } else if (new_H32 == (old_H32 + 1)) { if (new_L32 > old_L32) - pr_debug("msdc old_L<0x%x> new_L<0x%x>\n", old_L32, new_L32); + pr_debug("msdc old_L<0x%x> new_L<0x%x>\n", + old_L32, new_L32); ret = (0xffffffff - old_L32); ret += new_L32; } else { @@ -113,27 +100,33 @@ void msdc_sdio_profile(struct sdio_profile *result) /* CMD52 Dump */ cmd = &result->cmd52_rx; - pr_debug("sdio === CMD52 Rx <%d>times tick<%d> Max<%d> Min<%d> Aver<%d>\n", cmd->count, cmd->tot_tc, - cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count); + pr_debug("sdio === CMD52 Rx <%d>times tick<%d> Max<%d> Min<%d> Aver<%d>\n", + cmd->count, cmd->tot_tc, cmd->max_tc, cmd->min_tc, + cmd->tot_tc / cmd->count); cmd = &result->cmd52_tx; - pr_debug("sdio === CMD52 Tx <%d>times tick<%d> Max<%d> Min<%d> Aver<%d>\n", cmd->count, cmd->tot_tc, - cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count); + pr_debug("sdio === CMD52 Tx <%d>times tick<%d> Max<%d> Min<%d> Aver<%d>\n", + cmd->count, cmd->tot_tc, cmd->max_tc, cmd->min_tc, + cmd->tot_tc / cmd->count); /* CMD53 Rx bytes + block mode */ for (i = 0; i < 512; i++) { cmd = &result->cmd53_rx_byte[i]; if (cmd->count) { - pr_debug("sdio<%6d><%3dB>_Rx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", cmd->count, i, cmd->tot_tc, - cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count, - cmd->tot_bytes, (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10)); + pr_debug("sdio<%6d><%3dB>_Rx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", + cmd->count, i, cmd->tot_tc, cmd->max_tc, + cmd->min_tc, cmd->tot_tc / cmd->count, + cmd->tot_bytes, + (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10)); } } for (i = 0; i < 100; i++) { cmd = &result->cmd53_rx_blk[i]; if (cmd->count) { - pr_debug("sdio<%6d><%3d>B_Rx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", cmd->count, i, cmd->tot_tc, - cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count, - cmd->tot_bytes, (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10)); + pr_debug("sdio<%6d><%3d>B_Rx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", + cmd->count, i, cmd->tot_tc, cmd->max_tc, + cmd->min_tc, cmd->tot_tc / cmd->count, + cmd->tot_bytes, + (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10)); } } @@ -141,17 +134,21 @@ void msdc_sdio_profile(struct sdio_profile *result) for (i = 0; i < 512; i++) { cmd = &result->cmd53_tx_byte[i]; if (cmd->count) { - pr_debug("sdio<%6d><%3dB>_Tx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", cmd->count, i, cmd->tot_tc, - cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count, - cmd->tot_bytes, (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10)); + pr_debug("sdio<%6d><%3dB>_Tx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", + cmd->count, i, cmd->tot_tc, cmd->max_tc, + cmd->min_tc, cmd->tot_tc / cmd->count, + cmd->tot_bytes, + (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10)); } } for (i = 0; i < 100; i++) { cmd = &result->cmd53_tx_blk[i]; if (cmd->count) { - pr_debug("sdio<%6d><%3d>B_Tx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", cmd->count, i, cmd->tot_tc, - cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count, - cmd->tot_bytes, (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10)); + pr_debug("sdio<%6d><%3d>B_Tx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", + cmd->count, i, cmd->tot_tc, cmd->max_tc, + cmd->min_tc, cmd->tot_tc / cmd->count, + cmd->tot_bytes, + (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10)); } } @@ -222,7 +219,8 @@ static int msdc_debug_proc_read(struct seq_file *s, void *p) seq_puts(s, "Index<3> + SDIO_PROFILE + TIME\n"); seq_puts(s, "-> echo 3 1 0x1E >msdc_bebug -> enable sdio_profile, 30s\n"); - seq_printf(s, "-> SDIO_PROFILE<%d> TIME<%ds>\n", sdio_pro_enable, sdio_pro_time); + seq_printf(s, "-> SDIO_PROFILE<%d> TIME<%ds>\n", + sdio_pro_enable, sdio_pro_time); seq_puts(s, "=========================================\n\n"); return 0; @@ -249,7 +247,9 @@ static ssize_t msdc_debug_proc_write(struct file *file, cmd_buf[count] = '\0'; pr_debug("msdc Write %s\n", cmd_buf); - sscanf(cmd_buf, "%x %x %x", &cmd, &p1, &p2); + ret = sscanf(cmd_buf, "%x %x %x", &cmd, &p1, &p2); + if (ret != 3) + return -EINVAL; if (cmd == SD_TOOL_ZONE) { id = p1; @@ -266,10 +266,8 @@ static ssize_t msdc_debug_proc_write(struct file *file, } } else if (cmd == SD_TOOL_SDIO_PROFILE) { if (p1 == 1) { /* enable profile */ - if (gpt_enable == 0) { - // msdc_init_gpt(); /* --- by chhung */ + if (gpt_enable == 0) gpt_enable = 1; - } sdio_pro_enable = 1; if (p2 == 0) p2 = 1; diff --git a/drivers/staging/mt7621-mmc/dbg.h b/drivers/staging/mt7621-mmc/dbg.h index 2f2c56b73987..2d447b2d92ae 100644 --- a/drivers/staging/mt7621-mmc/dbg.h +++ b/drivers/staging/mt7621-mmc/dbg.h @@ -5,7 +5,8 @@ * is confidential and proprietary to MediaTek Inc. and/or its licensors. * Without the prior written permission of MediaTek inc. and/or its licensors, * any reproduction, modification, use or disclosure of MediaTek Software, - * and information contained herein, in whole or in part, shall be strictly prohibited. + * and information contained herein, in whole or in part, shall be strictly + * prohibited. * * MediaTek Inc. (C) 2010. All rights reserved. * @@ -18,19 +19,20 @@ * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH - * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES - * THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES - * CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK - * SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR - * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND - * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, - * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, - * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO - * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. + * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY + * ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY + * THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK + * SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO + * RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN + * FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND + * CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED + * HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK + * SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE + * PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. * - * The following software/firmware and/or related documentation ("MediaTek Software") - * have been modified by MediaTek Inc. All revisions are subject to any receiver's - * applicable license agreements with MediaTek Inc. + * The following software/firmware and/or related documentation + * ("MediaTek Software") have been modified by MediaTek Inc. All revisions are + * subject to any receiver's applicable license agreements with MediaTek Inc. */ #ifndef __MT_MSDC_DEUBG__ #define __MT_MSDC_DEUBG__ @@ -74,75 +76,25 @@ enum msdc_dbg { }; /* Debug message event */ -#define DBG_EVT_NONE (0) /* No event */ -#define DBG_EVT_DMA (1 << 0) /* DMA related event */ -#define DBG_EVT_CMD (1 << 1) /* MSDC CMD related event */ -#define DBG_EVT_RSP (1 << 2) /* MSDC CMD RSP related event */ -#define DBG_EVT_INT (1 << 3) /* MSDC INT event */ -#define DBG_EVT_CFG (1 << 4) /* MSDC CFG event */ -#define DBG_EVT_FUC (1 << 5) /* Function event */ -#define DBG_EVT_OPS (1 << 6) /* Read/Write operation event */ -#define DBG_EVT_FIO (1 << 7) /* FIFO operation event */ -#define DBG_EVT_WRN (1 << 8) /* Warning event */ -#define DBG_EVT_PWR (1 << 9) /* Power event */ +#define DBG_EVT_NONE (0) /* No event */ +#define DBG_EVT_DMA BIT(0) /* DMA related event */ +#define DBG_EVT_CMD BIT(1) /* MSDC CMD related event */ +#define DBG_EVT_RSP BIT(2) /* MSDC CMD RSP related event */ +#define DBG_EVT_INT BIT(3) /* MSDC INT event */ +#define DBG_EVT_CFG BIT(4) /* MSDC CFG event */ +#define DBG_EVT_FUC BIT(5) /* Function event */ +#define DBG_EVT_OPS BIT(6) /* Read/Write operation event */ +#define DBG_EVT_FIO BIT(7) /* FIFO operation event */ +#define DBG_EVT_WRN BIT(8) /* Warning event */ +#define DBG_EVT_PWR BIT(9) /* Power event */ #define DBG_EVT_ALL (0xffffffff) #define DBG_EVT_MASK (DBG_EVT_ALL) extern unsigned int sd_debug_zone[4]; #define TAG "msdc" -#if 0 /* +++ chhung */ -#define BUG_ON(x) \ -do { \ - if (x) { \ - printk("[BUG] %s LINE:%d FILE:%s\n", #x, __LINE__, __FILE__); \ - while (1) \ - ; \ - } \ -} while (0) -#endif /* end of +++ */ - -#define N_MSG(evt, fmt, args...) -/* -do { \ - if ((DBG_EVT_##evt) & sd_debug_zone[host->id]) { \ - printk(KERN_ERR TAG"%d -> "fmt" <- %s() : L<%d> PID<%s><0x%x>\n", \ - host->id, ##args , __FUNCTION__, __LINE__, current->comm, current->pid); \ - } \ -} while(0) -*/ - -#define ERR_MSG(fmt, args...) \ -do { \ - printk(KERN_ERR TAG"%d -> "fmt" <- %s() : L<%d> PID<%s><0x%x>\n", \ - host->id, ##args, __FUNCTION__, __LINE__, current->comm, current->pid); \ -} while (0); - -#if 1 -//defined CONFIG_MTK_MMC_CD_POLL -#define INIT_MSG(fmt, args...) -#define IRQ_MSG(fmt, args...) -#else -#define INIT_MSG(fmt, args...) \ -do { \ - printk(KERN_ERR TAG"%d -> "fmt" <- %s() : L<%d> PID<%s><0x%x>\n", \ - host->id, ##args, __FUNCTION__, __LINE__, current->comm, current->pid); \ -} while (0); - -/* PID in ISR in not corrent */ -#define IRQ_MSG(fmt, args...) \ -do { \ - printk(KERN_ERR TAG"%d -> "fmt" <- %s() : L<%d>\n", \ - host->id, ##args, __FUNCTION__, __LINE__); \ -} while (0); -#endif - void msdc_debug_proc_init(void); -#if 0 /* --- chhung */ -void msdc_init_gpt(void); -extern void GPT_GetCounter64(UINT32 *cntL32, UINT32 *cntH32); -#endif /* end of --- */ u32 msdc_time_calc(u32 old_L32, u32 old_H32, u32 new_L32, u32 new_H32); void msdc_performance(u32 opcode, u32 sizes, u32 bRx, u32 ticks); diff --git a/drivers/staging/mt7621-mmc/sd.c b/drivers/staging/mt7621-mmc/sd.c index 04d23cc7cd4a..0379f9c96f2a 100644 --- a/drivers/staging/mt7621-mmc/sd.c +++ b/drivers/staging/mt7621-mmc/sd.c @@ -72,11 +72,6 @@ #define GPIO_PULL_DOWN (0) #define GPIO_PULL_UP (1) -#if 0 /* --- by chhung */ -#define MSDC_CLKSRC_REG (0xf100000C) -#define PDN_REG (0xF1000010) -#endif /* end of --- */ - #define DEFAULT_DEBOUNCE (8) /* 8 cycles */ #define DEFAULT_DTOC (40) /* data timeout counter. 65536x40 sclk. */ @@ -100,26 +95,6 @@ static int cd_active_low = 1; //#define PERI_MSDC2_PDN (17) //#define PERI_MSDC3_PDN (18) -#if 0 /* --- by chhung */ -/* gate means clock power down */ -static int g_clk_gate = 0; -#define msdc_gate_clock(id) \ - do { \ - g_clk_gate &= ~(1 << ((id) + PERI_MSDC0_PDN)); \ - } while (0) -/* not like power down register. 1 means clock on. */ -#define msdc_ungate_clock(id) \ - do { \ - g_clk_gate |= 1 << ((id) + PERI_MSDC0_PDN); \ - } while (0) - -// do we need sync object or not -void msdc_clk_status(int *status) -{ - *status = g_clk_gate; -} -#endif /* end of --- */ - /* +++ by chhung */ struct msdc_hw msdc0_hw = { .clk_src = 0, @@ -169,11 +144,6 @@ static void msdc_clr_fifo(struct msdc_host *host) sdr_clr_bits(host->base + MSDC_INTEN, val); \ } while (0) -#define msdc_irq_restore(val) \ - do { \ - sdr_set_bits(host->base + MSDC_INTEN, val); \ - } while (0) - /* clock source for host: global */ #if defined(CONFIG_SOC_MT7620) static u32 hclks[] = {48000000}; /* +/- by chhung */ @@ -181,34 +151,6 @@ static u32 hclks[] = {48000000}; /* +/- by chhung */ static u32 hclks[] = {50000000}; /* +/- by chhung */ #endif -//============================================ -// the power for msdc host controller: global -// always keep the VMC on. -//============================================ -#define msdc_vcore_on(host) \ - do { \ - INIT_MSG("[+]VMC ref. count<%d>", ++host->pwr_ref); \ - (void)hwPowerOn(MT65XX_POWER_LDO_VMC, VOL_3300, "SD"); \ - } while (0) -#define msdc_vcore_off(host) \ - do { \ - INIT_MSG("[-]VMC ref. count<%d>", --host->pwr_ref); \ - (void)hwPowerDown(MT65XX_POWER_LDO_VMC, "SD"); \ - } while (0) - -//==================================== -// the vdd output for card: global -// always keep the VMCH on. -//==================================== -#define msdc_vdd_on(host) \ - do { \ - (void)hwPowerOn(MT65XX_POWER_LDO_VMCH, VOL_3300, "SD"); \ - } while (0) -#define msdc_vdd_off(host) \ - do { \ - (void)hwPowerDown(MT65XX_POWER_LDO_VMCH, "SD"); \ - } while (0) - #define sdc_is_busy() (readl(host->base + SDC_STS) & SDC_STS_SDCBUSY) #define sdc_is_cmd_busy() (readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) @@ -232,144 +174,6 @@ static unsigned int msdc_do_command(struct msdc_host *host, static int msdc_tune_cmdrsp(struct msdc_host *host, struct mmc_command *cmd); -#ifdef MT6575_SD_DEBUG -static void msdc_dump_card_status(struct msdc_host *host, u32 status) -{ -/* N_MSG is currently a no-op */ -#if 0 - static char *state[] = { - "Idle", /* 0 */ - "Ready", /* 1 */ - "Ident", /* 2 */ - "Stby", /* 3 */ - "Tran", /* 4 */ - "Data", /* 5 */ - "Rcv", /* 6 */ - "Prg", /* 7 */ - "Dis", /* 8 */ - "Reserved", /* 9 */ - "Reserved", /* 10 */ - "Reserved", /* 11 */ - "Reserved", /* 12 */ - "Reserved", /* 13 */ - "Reserved", /* 14 */ - "I/O mode", /* 15 */ - }; -#endif - if (status & R1_OUT_OF_RANGE) - N_MSG(RSP, "[CARD_STATUS] Out of Range"); - if (status & R1_ADDRESS_ERROR) - N_MSG(RSP, "[CARD_STATUS] Address Error"); - if (status & R1_BLOCK_LEN_ERROR) - N_MSG(RSP, "[CARD_STATUS] Block Len Error"); - if (status & R1_ERASE_SEQ_ERROR) - N_MSG(RSP, "[CARD_STATUS] Erase Seq Error"); - if (status & R1_ERASE_PARAM) - N_MSG(RSP, "[CARD_STATUS] Erase Param"); - if (status & R1_WP_VIOLATION) - N_MSG(RSP, "[CARD_STATUS] WP Violation"); - if (status & R1_CARD_IS_LOCKED) - N_MSG(RSP, "[CARD_STATUS] Card is Locked"); - if (status & R1_LOCK_UNLOCK_FAILED) - N_MSG(RSP, "[CARD_STATUS] Lock/Unlock Failed"); - if (status & R1_COM_CRC_ERROR) - N_MSG(RSP, "[CARD_STATUS] Command CRC Error"); - if (status & R1_ILLEGAL_COMMAND) - N_MSG(RSP, "[CARD_STATUS] Illegal Command"); - if (status & R1_CARD_ECC_FAILED) - N_MSG(RSP, "[CARD_STATUS] Card ECC Failed"); - if (status & R1_CC_ERROR) - N_MSG(RSP, "[CARD_STATUS] CC Error"); - if (status & R1_ERROR) - N_MSG(RSP, "[CARD_STATUS] Error"); - if (status & R1_UNDERRUN) - N_MSG(RSP, "[CARD_STATUS] Underrun"); - if (status & R1_OVERRUN) - N_MSG(RSP, "[CARD_STATUS] Overrun"); - if (status & R1_CID_CSD_OVERWRITE) - N_MSG(RSP, "[CARD_STATUS] CID/CSD Overwrite"); - if (status & R1_WP_ERASE_SKIP) - N_MSG(RSP, "[CARD_STATUS] WP Eraser Skip"); - if (status & R1_CARD_ECC_DISABLED) - N_MSG(RSP, "[CARD_STATUS] Card ECC Disabled"); - if (status & R1_ERASE_RESET) - N_MSG(RSP, "[CARD_STATUS] Erase Reset"); - if (status & R1_READY_FOR_DATA) - N_MSG(RSP, "[CARD_STATUS] Ready for Data"); - if (status & R1_SWITCH_ERROR) - N_MSG(RSP, "[CARD_STATUS] Switch error"); - if (status & R1_APP_CMD) - N_MSG(RSP, "[CARD_STATUS] App Command"); - - N_MSG(RSP, "[CARD_STATUS] '%s' State", state[R1_CURRENT_STATE(status)]); -} - -static void msdc_dump_ocr_reg(struct msdc_host *host, u32 resp) -{ - if (resp & (1 << 7)) - N_MSG(RSP, "[OCR] Low Voltage Range"); - if (resp & (1 << 15)) - N_MSG(RSP, "[OCR] 2.7-2.8 volt"); - if (resp & (1 << 16)) - N_MSG(RSP, "[OCR] 2.8-2.9 volt"); - if (resp & (1 << 17)) - N_MSG(RSP, "[OCR] 2.9-3.0 volt"); - if (resp & (1 << 18)) - N_MSG(RSP, "[OCR] 3.0-3.1 volt"); - if (resp & (1 << 19)) - N_MSG(RSP, "[OCR] 3.1-3.2 volt"); - if (resp & (1 << 20)) - N_MSG(RSP, "[OCR] 3.2-3.3 volt"); - if (resp & (1 << 21)) - N_MSG(RSP, "[OCR] 3.3-3.4 volt"); - if (resp & (1 << 22)) - N_MSG(RSP, "[OCR] 3.4-3.5 volt"); - if (resp & (1 << 23)) - N_MSG(RSP, "[OCR] 3.5-3.6 volt"); - if (resp & (1 << 24)) - N_MSG(RSP, "[OCR] Switching to 1.8V Accepted (S18A)"); - if (resp & (1 << 30)) - N_MSG(RSP, "[OCR] Card Capacity Status (CCS)"); - if (resp & (1 << 31)) - N_MSG(RSP, "[OCR] Card Power Up Status (Idle)"); - else - N_MSG(RSP, "[OCR] Card Power Up Status (Busy)"); -} - -static void msdc_dump_rca_resp(struct msdc_host *host, u32 resp) -{ - u32 status = (((resp >> 15) & 0x1) << 23) | - (((resp >> 14) & 0x1) << 22) | - (((resp >> 13) & 0x1) << 19) | - (resp & 0x1fff); - - N_MSG(RSP, "[RCA] 0x%.4x", resp >> 16); - msdc_dump_card_status(host, status); -} - -static void msdc_dump_io_resp(struct msdc_host *host, u32 resp) -{ - u32 flags = (resp >> 8) & 0xFF; -#if 0 - char *state[] = {"DIS", "CMD", "TRN", "RFU"}; -#endif - if (flags & (1 << 7)) - N_MSG(RSP, "[IO] COM_CRC_ERR"); - if (flags & (1 << 6)) - N_MSG(RSP, "[IO] Illegal command"); - if (flags & (1 << 3)) - N_MSG(RSP, "[IO] Error"); - if (flags & (1 << 2)) - N_MSG(RSP, "[IO] RFU"); - if (flags & (1 << 1)) - N_MSG(RSP, "[IO] Function number error"); - if (flags & (1 << 0)) - N_MSG(RSP, "[IO] Out of range"); - - N_MSG(RSP, "[IO] State: %s, Data:0x%x", state[(resp >> 12) & 0x3], resp & 0xFF); -} -#endif - static void msdc_set_timeout(struct msdc_host *host, u32 ns, u32 clks) { u32 timeout, clk_ns; @@ -384,9 +188,6 @@ static void msdc_set_timeout(struct msdc_host *host, u32 ns, u32 clks) timeout = timeout > 255 ? 255 : timeout; sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, timeout); - - N_MSG(OPS, "Set read data timeout: %dns %dclks -> %d x 65536 cycles", - ns, clks, timeout + 1); } static void msdc_tasklet_card(struct work_struct *work) @@ -395,7 +196,6 @@ static void msdc_tasklet_card(struct work_struct *work) struct msdc_host, card_delaywork.work); u32 inserted; u32 status = 0; - //u32 change = 0; spin_lock(&host->lock); @@ -405,16 +205,7 @@ static void msdc_tasklet_card(struct work_struct *work) else inserted = (status & MSDC_PS_CDSTS) ? 1 : 0; -#if 0 - change = host->card_inserted ^ inserted; - host->card_inserted = inserted; - - if (change && !host->suspend) { - if (inserted) - host->mmc->f_max = HOST_MAX_MCLK; // work around - mmc_detect_change(host->mmc, msecs_to_jiffies(20)); - } -#else /* Make sure: handle the last interrupt */ + /* Make sure: handle the last interrupt */ host->card_inserted = inserted; if (!host->suspend) { @@ -422,24 +213,14 @@ static void msdc_tasklet_card(struct work_struct *work) mmc_detect_change(host->mmc, msecs_to_jiffies(20)); } - IRQ_MSG("card found<%s>", inserted ? "inserted" : "removed"); -#endif - spin_unlock(&host->lock); } -#if 0 /* --- by chhung */ -/* For E2 only */ -static u8 clk_src_bit[4] = { - 0, 3, 5, 7 -}; - static void msdc_select_clksrc(struct msdc_host *host, unsigned char clksrc) { u32 val; BUG_ON(clksrc > 3); - INIT_MSG("set clock source to <%d>", clksrc); val = readl(host->base + MSDC_CLKSRC_REG); if (readl(host->base + MSDC_ECO_VER) >= 4) { @@ -466,7 +247,6 @@ static void msdc_set_mclk(struct msdc_host *host, int ddr, unsigned int hz) //u8 clksrc = hw->clk_src; if (!hz) { // set mmc system clock to 0 ? - //ERR_MSG("set mclk to 0!!!"); msdc_reset_hw(host); return; } @@ -509,11 +289,7 @@ static void msdc_set_mclk(struct msdc_host *host, int ddr, unsigned int hz) host->mclk = hz; msdc_set_timeout(host, host->timeout_ns, host->timeout_clks); // need? - INIT_MSG("================"); - INIT_MSG("!!! Set<%dKHz> Source<%dKHz> -> sclk<%dKHz>", hz / 1000, hclk / 1000, sclk / 1000); - INIT_MSG("================"); - - msdc_irq_restore(flags); + sdr_set_bits(host->base + MSDC_INTEN, flags); } /* Fix me. when need to abort */ @@ -521,7 +297,7 @@ static void msdc_abort_data(struct msdc_host *host) { struct mmc_command *stop = host->mrq->stop; - ERR_MSG("Need to Abort."); + dev_err(mmc_dev(host->mmc), "%d -> Need to Abort.\n", host->id); msdc_reset_hw(host); msdc_clr_fifo(host); @@ -530,7 +306,8 @@ static void msdc_abort_data(struct msdc_host *host) // need to check FIFO count 0 ? if (stop) { /* try to stop, but may not success */ - ERR_MSG("stop when abort CMD<%d>", stop->opcode); + dev_err(mmc_dev(host->mmc), "%d -> stop when abort CMD<%d>\n", + host->id, stop->opcode); (void)msdc_do_command(host, stop, 0, CMD_TIMEOUT); } @@ -539,126 +316,6 @@ static void msdc_abort_data(struct msdc_host *host) //} } -#if 0 /* --- by chhung */ -static void msdc_pin_config(struct msdc_host *host, int mode) -{ - struct msdc_hw *hw = host->hw; - int pull = (mode == MSDC_PIN_PULL_UP) ? GPIO_PULL_UP : GPIO_PULL_DOWN; - - /* Config WP pin */ - if (hw->flags & MSDC_WP_PIN_EN) { - if (hw->config_gpio_pin) /* NULL */ - hw->config_gpio_pin(MSDC_WP_PIN, pull); - } - - switch (mode) { - case MSDC_PIN_PULL_UP: - //sdr_set_field(MSDC_PAD_CTL0, MSDC_PAD_CTL0_CLKPU, 1); /* Check & FIXME */ - //sdr_set_field(MSDC_PAD_CTL0, MSDC_PAD_CTL0_CLKPD, 0); /* Check & FIXME */ - sdr_set_field(host->base + MSDC_PAD_CTL1, MSDC_PAD_CTL1_CMDPU, 1); - sdr_set_field(host->base + MSDC_PAD_CTL1, MSDC_PAD_CTL1_CMDPD, 0); - sdr_set_field(host->base + MSDC_PAD_CTL2, MSDC_PAD_CTL2_DATPU, 1); - sdr_set_field(host->base + MSDC_PAD_CTL2, MSDC_PAD_CTL2_DATPD, 0); - break; - case MSDC_PIN_PULL_DOWN: - //sdr_set_field(MSDC_PAD_CTL0, MSDC_PAD_CTL0_CLKPU, 0); /* Check & FIXME */ - //sdr_set_field(MSDC_PAD_CTL0, MSDC_PAD_CTL0_CLKPD, 1); /* Check & FIXME */ - sdr_set_field(host->base + MSDC_PAD_CTL1, MSDC_PAD_CTL1_CMDPU, 0); - sdr_set_field(host->base + MSDC_PAD_CTL1, MSDC_PAD_CTL1_CMDPD, 1); - sdr_set_field(host->base + MSDC_PAD_CTL2, MSDC_PAD_CTL2_DATPU, 0); - sdr_set_field(host->base + MSDC_PAD_CTL2, MSDC_PAD_CTL2_DATPD, 1); - break; - case MSDC_PIN_PULL_NONE: - default: - //sdr_set_field(MSDC_PAD_CTL0, MSDC_PAD_CTL0_CLKPU, 0); /* Check & FIXME */ - //sdr_set_field(MSDC_PAD_CTL0, MSDC_PAD_CTL0_CLKPD, 0); /* Check & FIXME */ - sdr_set_field(host->base + MSDC_PAD_CTL1, MSDC_PAD_CTL1_CMDPU, 0); - sdr_set_field(host->base + MSDC_PAD_CTL1, MSDC_PAD_CTL1_CMDPD, 0); - sdr_set_field(host->base + MSDC_PAD_CTL2, MSDC_PAD_CTL2_DATPU, 0); - sdr_set_field(host->base + MSDC_PAD_CTL2, MSDC_PAD_CTL2_DATPD, 0); - break; - } - - N_MSG(CFG, "Pins mode(%d), down(%d), up(%d)", - mode, MSDC_PIN_PULL_DOWN, MSDC_PIN_PULL_UP); -} - -void msdc_pin_reset(struct msdc_host *host, int mode) -{ - struct msdc_hw *hw = (struct msdc_hw *)host->hw; - int pull = (mode == MSDC_PIN_PULL_UP) ? GPIO_PULL_UP : GPIO_PULL_DOWN; - - /* Config reset pin */ - if (hw->flags & MSDC_RST_PIN_EN) { - if (hw->config_gpio_pin) /* NULL */ - hw->config_gpio_pin(MSDC_RST_PIN, pull); - - if (mode == MSDC_PIN_PULL_UP) - sdr_clr_bits(host->base + EMMC_IOCON, EMMC_IOCON_BOOTRST); - else - sdr_set_bits(host->base + EMMC_IOCON, EMMC_IOCON_BOOTRST); - } -} - -static void msdc_core_power(struct msdc_host *host, int on) -{ - N_MSG(CFG, "Turn %s %s power (copower: %d -> %d)", - on ? "on" : "off", "core", host->core_power, on); - - if (on && host->core_power == 0) { - msdc_vcore_on(host); - host->core_power = 1; - msleep(1); - } else if (!on && host->core_power == 1) { - msdc_vcore_off(host); - host->core_power = 0; - msleep(1); - } -} - -static void msdc_host_power(struct msdc_host *host, int on) -{ - N_MSG(CFG, "Turn %s %s power ", on ? "on" : "off", "host"); - - if (on) { - //msdc_core_power(host, 1); // need do card detection. - msdc_pin_reset(host, MSDC_PIN_PULL_UP); - } else { - msdc_pin_reset(host, MSDC_PIN_PULL_DOWN); - //msdc_core_power(host, 0); - } -} - -static void msdc_card_power(struct msdc_host *host, int on) -{ - N_MSG(CFG, "Turn %s %s power ", on ? "on" : "off", "card"); - - if (on) { - msdc_pin_config(host, MSDC_PIN_PULL_UP); - //msdc_vdd_on(host); // need todo card detection. - msleep(1); - } else { - //msdc_vdd_off(host); - msdc_pin_config(host, MSDC_PIN_PULL_DOWN); - msleep(1); - } -} - -static void msdc_set_power_mode(struct msdc_host *host, u8 mode) -{ - N_MSG(CFG, "Set power mode(%d)", mode); - - if (host->power_mode == MMC_POWER_OFF && mode != MMC_POWER_OFF) { - msdc_host_power(host, 1); - msdc_card_power(host, 1); - } else if (host->power_mode != MMC_POWER_OFF && mode == MMC_POWER_OFF) { - msdc_card_power(host, 0); - msdc_host_power(host, 0); - } - host->power_mode = mode; -} -#endif /* end of --- */ - #ifdef CONFIG_PM /* register as callback function of WIFI(combo_sdio_register_pm) . @@ -669,12 +326,6 @@ static void msdc_pm(pm_message_t state, void *data) struct msdc_host *host = (struct msdc_host *)data; int evt = state.event; - if (evt == PM_EVENT_USER_RESUME || evt == PM_EVENT_USER_SUSPEND) { - INIT_MSG("USR_%s: suspend<%d> power<%d>", - evt == PM_EVENT_USER_RESUME ? "EVENT_USER_RESUME" : "EVENT_USER_SUSPEND", - host->suspend, host->power_mode); - } - if (evt == PM_EVENT_SUSPEND || evt == PM_EVENT_USER_SUSPEND) { if (host->suspend) /* already suspend */ /* default 0*/ return; @@ -687,14 +338,14 @@ static void msdc_pm(pm_message_t state, void *data) host->pm_state = state; /* default PMSG_RESUME */ } else if (evt == PM_EVENT_RESUME || evt == PM_EVENT_USER_RESUME) { - if (!host->suspend) { - //ERR_MSG("warning: already resume"); + if (!host->suspend) return; - } /* No PM resume when USR suspend */ if (evt == PM_EVENT_RESUME && host->pm_state.event == PM_EVENT_USER_SUSPEND) { - ERR_MSG("PM Resume when in USR Suspend"); /* won't happen. */ + dev_err(mmc_dev(host->mmc), + "%d -> PM Resume when in USR Suspend\n", + host->id); /* won't happen. */ return; } @@ -802,8 +453,6 @@ static unsigned int msdc_command_start(struct msdc_host *host, rawcmd &= ~(0x0FFF << 16); } - N_MSG(CMD, "CMD<%d><0x%.8x> Arg<0x%.8x>", opcode, rawcmd, cmd->arg); - tmo = jiffies + timeout; if (opcode == MMC_SEND_STATUS) { @@ -812,7 +461,9 @@ static unsigned int msdc_command_start(struct msdc_host *host, break; if (time_after(jiffies, tmo)) { - ERR_MSG("XXX cmd_busy timeout: before CMD<%d>", opcode); + dev_err(mmc_dev(host->mmc), + "%d -> XXX cmd_busy timeout: before CMD<%d>\n", + host->id, opcode); cmd->error = -ETIMEDOUT; msdc_reset_hw(host); goto end; @@ -823,7 +474,9 @@ static unsigned int msdc_command_start(struct msdc_host *host, if (!sdc_is_busy()) break; if (time_after(jiffies, tmo)) { - ERR_MSG("XXX sdc_busy timeout: before CMD<%d>", opcode); + dev_err(mmc_dev(host->mmc), + "%d -> XXX sdc_busy timeout: before CMD<%d>\n", + host->id, opcode); cmd->error = -ETIMEDOUT; msdc_reset_hw(host); goto end; @@ -862,7 +515,9 @@ static unsigned int msdc_command_resp(struct msdc_host *host, spin_unlock(&host->lock); if (!wait_for_completion_timeout(&host->cmd_done, 10 * timeout)) { - ERR_MSG("XXX CMD<%d> wait_for_completion timeout ARG<0x%.8x>", opcode, cmd->arg); + dev_err(mmc_dev(host->mmc), + "%d -> XXX CMD<%d> wait_for_completion timeout ARG<0x%.8x>\n", + host->id, opcode, cmd->arg); cmd->error = -ETIMEDOUT; msdc_reset_hw(host); } @@ -872,40 +527,6 @@ static unsigned int msdc_command_resp(struct msdc_host *host, host->cmd = NULL; //end: -#ifdef MT6575_SD_DEBUG - switch (resp) { - case RESP_NONE: - N_MSG(RSP, "CMD_RSP(%d): %d RSP(%d)", opcode, cmd->error, resp); - break; - case RESP_R2: - N_MSG(RSP, "CMD_RSP(%d): %d RSP(%d)= %.8x %.8x %.8x %.8x", - opcode, cmd->error, resp, cmd->resp[0], cmd->resp[1], - cmd->resp[2], cmd->resp[3]); - break; - default: /* Response types 1, 3, 4, 5, 6, 7(1b) */ - N_MSG(RSP, "CMD_RSP(%d): %d RSP(%d)= 0x%.8x", - opcode, cmd->error, resp, cmd->resp[0]); - if (cmd->error == 0) { - switch (resp) { - case RESP_R1: - case RESP_R1B: - msdc_dump_card_status(host, cmd->resp[0]); - break; - case RESP_R3: - msdc_dump_ocr_reg(host, cmd->resp[0]); - break; - case RESP_R5: - msdc_dump_io_resp(host, cmd->resp[0]); - break; - case RESP_R6: - msdc_dump_rca_resp(host, cmd->resp[0]); - break; - } - } - break; - } -#endif - /* do we need to save card's RCA when SD_SEND_RELATIVE_ADDR */ if (!tune) @@ -947,20 +568,9 @@ static unsigned int msdc_do_command(struct msdc_host *host, end: - N_MSG(CMD, " return<%d> resp<0x%.8x>", cmd->error, cmd->resp[0]); return cmd->error; } -#if 0 /* --- by chhung */ -// DMA resume / start / stop -static void msdc_dma_resume(struct msdc_host *host) -{ - sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_RESUME, 1); - - N_MSG(DMA, "DMA resume"); -} -#endif /* end of --- */ - static void msdc_dma_start(struct msdc_host *host) { u32 wints = MSDC_INTEN_XFER_COMPL | MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR; @@ -968,8 +578,6 @@ static void msdc_dma_start(struct msdc_host *host) sdr_set_bits(host->base + MSDC_INTEN, wints); //dsb(); /* --- by chhung */ sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1); - - N_MSG(DMA, "DMA start"); } static void msdc_dma_stop(struct msdc_host *host) @@ -977,7 +585,6 @@ static void msdc_dma_stop(struct msdc_host *host) //u32 retries=500; u32 wints = MSDC_INTEN_XFER_COMPL | MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR; - N_MSG(DMA, "DMA status: 0x%.8x", readl(host->base + MSDC_DMA_CFG)); //while (readl(host->base + MSDC_DMA_CFG) & MSDC_DMA_CFG_STS); sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP, 1); @@ -986,8 +593,6 @@ static void msdc_dma_stop(struct msdc_host *host) //dsb(); /* --- by chhung */ sdr_clr_bits(host->base + MSDC_INTEN, wints); /* Not just xfer_comp */ - - N_MSG(DMA, "DMA stop"); } /* calc checksum */ @@ -1010,8 +615,6 @@ static void msdc_dma_setup(struct msdc_host *host, struct msdc_dma *dma, BUG_ON(sglen > MAX_BD_NUM); /* not support currently */ - N_MSG(DMA, "DMA sglen<%d> xfersz<%d>", sglen, host->xfer_size); - gpd = dma->gpd; bd = dma->bd; @@ -1044,10 +647,6 @@ static void msdc_dma_setup(struct msdc_host *host, struct msdc_dma *dma, sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_MODE, 1); writel(PHYSADDR((u32)dma->gpd_addr), host->base + MSDC_DMA_SA); - - N_MSG(DMA, "DMA_CTRL = 0x%x", readl(host->base + MSDC_DMA_CTRL)); - N_MSG(DMA, "DMA_CFG = 0x%x", readl(host->base + MSDC_DMA_CFG)); - N_MSG(DMA, "DMA_SA = 0x%x", readl(host->base + MSDC_DMA_SA)); } static int msdc_do_request(struct mmc_host *mmc, struct mmc_request *mrq) @@ -1062,21 +661,14 @@ static int msdc_do_request(struct mmc_host *mmc, struct mmc_request *mrq) #define SND_DAT 0 #define SND_CMD 1 - BUG_ON(mmc == NULL); - BUG_ON(mrq == NULL); + BUG_ON(!mmc); + BUG_ON(!mrq); host->error = 0; cmd = mrq->cmd; data = mrq->cmd->data; -#if 0 /* --- by chhung */ - //if(host->id ==1){ - N_MSG(OPS, "enable clock!"); - msdc_ungate_clock(host->id); - //} -#endif /* end of --- */ - if (!data) { send_type = SND_CMD; if (msdc_do_command(host, cmd, 1, CMD_TIMEOUT) != 0) @@ -1125,15 +717,22 @@ static int msdc_do_request(struct mmc_host *mmc, struct mmc_request *mrq) spin_unlock(&host->lock); if (!wait_for_completion_timeout(&host->xfer_done, DAT_TIMEOUT)) { - ERR_MSG("XXX CMD<%d> wait xfer_done<%d> timeout!!", cmd->opcode, data->blocks * data->blksz); - ERR_MSG(" DMA_SA = 0x%x", - readl(host->base + MSDC_DMA_SA)); - ERR_MSG(" DMA_CA = 0x%x", - readl(host->base + MSDC_DMA_CA)); - ERR_MSG(" DMA_CTRL = 0x%x", - readl(host->base + MSDC_DMA_CTRL)); - ERR_MSG(" DMA_CFG = 0x%x", - readl(host->base + MSDC_DMA_CFG)); + dev_err(mmc_dev(host->mmc), + "%d -> XXX CMD<%d> wait xfer_done<%d> timeout!!\n", + host->id, cmd->opcode, + data->blocks * data->blksz); + dev_err(mmc_dev(host->mmc), + "%d -> DMA_SA = 0x%x\n", + host->id, readl(host->base + MSDC_DMA_SA)); + dev_err(mmc_dev(host->mmc), + "%d -> DMA_CA = 0x%x\n", + host->id, readl(host->base + MSDC_DMA_CA)); + dev_err(mmc_dev(host->mmc), + "%d -> DMA_CTRL = 0x%x\n", + host->id, readl(host->base + MSDC_DMA_CTRL)); + dev_err(mmc_dev(host->mmc), + "%d -> DMA_CFG = 0x%x\n", + host->id, readl(host->base + MSDC_DMA_CFG)); data->error = -ETIMEDOUT; msdc_reset_hw(host); @@ -1151,48 +750,13 @@ static int msdc_do_request(struct mmc_host *mmc, struct mmc_request *mrq) } done: - if (data != NULL) { + if (data) { host->data = NULL; dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len, mmc_get_dma_dir(data)); host->blksz = 0; - -#if 0 // don't stop twice! - if (host->hw->flags & MSDC_REMOVABLE && data->error) { - msdc_abort_data(host); - /* reset in IRQ, stop command has issued. -> No need */ - } -#endif - - N_MSG(OPS, "CMD<%d> data<%s %s> blksz<%d> block<%d> error<%d>", cmd->opcode, (dma ? "dma" : "pio"), - (read ? "read " : "write"), data->blksz, data->blocks, data->error); } -#if 0 /* --- by chhung */ -#if 1 - //if(host->id==1) { - if (send_type == SND_CMD) { - if (cmd->opcode == MMC_SEND_STATUS) { - if ((cmd->resp[0] & CARD_READY_FOR_DATA) || (CARD_CURRENT_STATE(cmd->resp[0]) != 7)) { - N_MSG(OPS, "disable clock, CMD13 IDLE"); - msdc_gate_clock(host->id); - } - } else { - N_MSG(OPS, "disable clock, CMD<%d>", cmd->opcode); - msdc_gate_clock(host->id); - } - } else { - if (read) { - N_MSG(OPS, "disable clock!!! Read CMD<%d>", cmd->opcode); - msdc_gate_clock(host->id); - } - } - //} -#else - msdc_gate_clock(host->id); -#endif -#endif /* end of --- */ - if (mrq->cmd->error) host->error = 0x001; if (mrq->data && mrq->data->error) @@ -1200,8 +764,6 @@ done: if (mrq->stop && mrq->stop->error) host->error |= 0x100; - //if (host->error) ERR_MSG("host->error<%d>", host->error); - return host->error; } @@ -1213,11 +775,7 @@ static int msdc_app_cmd(struct mmc_host *mmc, struct msdc_host *host) memset(&cmd, 0, sizeof(struct mmc_command)); cmd.opcode = MMC_APP_CMD; -#if 0 /* bug: we meet mmc->card is null when ACMD6 */ - cmd.arg = mmc->card->rca << 16; -#else cmd.arg = host->app_cmd_arg; -#endif cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; memset(&mrq, 0, sizeof(struct mmc_request)); @@ -1260,19 +818,27 @@ static int msdc_tune_cmdrsp(struct msdc_host *host, struct mmc_command *cmd) if (host->app_cmd) { result = msdc_app_cmd(host->mmc, host); if (result) { - ERR_MSG("TUNE_CMD app_cmd<%d> failed: RESP_RXDLY<%d>,R_SMPL<%d>", - host->mrq->cmd->opcode, cur_rrdly, cur_rsmpl); + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_CMD app_cmd<%d> failed: RESP_RXDLY<%d>,R_SMPL<%d>\n", + host->id, + host->mrq->cmd->opcode, + cur_rrdly, cur_rsmpl); continue; } } result = msdc_do_command(host, cmd, 0, CMD_TIMEOUT); // not tune. - ERR_MSG("TUNE_CMD<%d> %s PAD_CMD_RESP_RXDLY[26:22]<%d> R_SMPL[1]<%d>", cmd->opcode, - (result == 0) ? "PASS" : "FAIL", cur_rrdly, cur_rsmpl); + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_CMD<%d> %s PAD_CMD_RESP_RXDLY[26:22]<%d> R_SMPL[1]<%d>\n", + host->id, cmd->opcode, + (result == 0) ? "PASS" : "FAIL", cur_rrdly, + cur_rsmpl); if (result == 0) return 0; if (result != -EIO) { - ERR_MSG("TUNE_CMD<%d> Error<%d> not -EIO", cmd->opcode, result); + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_CMD<%d> Error<%d> not -EIO\n", + host->id, cmd->opcode, result); return result; } @@ -1325,7 +891,10 @@ static int msdc_tune_bread(struct mmc_host *mmc, struct mmc_request *mrq) if (host->app_cmd) { result = msdc_app_cmd(host->mmc, host); if (result) { - ERR_MSG("TUNE_BREAD app_cmd<%d> failed", host->mrq->cmd->opcode); + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_BREAD app_cmd<%d> failed\n", + host->id, + host->mrq->cmd->opcode); continue; } } @@ -1336,10 +905,13 @@ static int msdc_tune_bread(struct mmc_host *mmc, struct mmc_request *mrq) &dcrc); /* RO */ if (!ddr) dcrc &= ~SDC_DCRC_STS_NEG; - ERR_MSG("TUNE_BREAD<%s> dcrc<0x%x> DATRDDLY0/1<0x%x><0x%x> dsmpl<0x%x>", - (result == 0 && dcrc == 0) ? "PASS" : "FAIL", dcrc, - readl(host->base + MSDC_DAT_RDDLY0), - readl(host->base + MSDC_DAT_RDDLY1), cur_dsmpl); + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_BREAD<%s> dcrc<0x%x> DATRDDLY0/1<0x%x><0x%x> dsmpl<0x%x>\n", + host->id, + (result == 0 && dcrc == 0) ? "PASS" : "FAIL", + dcrc, readl(host->base + MSDC_DAT_RDDLY0), + readl(host->base + MSDC_DAT_RDDLY1), + cur_dsmpl); /* Fix me: result is 0, but dcrc is still exist */ if (result == 0 && dcrc == 0) { @@ -1348,8 +920,11 @@ static int msdc_tune_bread(struct mmc_host *mmc, struct mmc_request *mrq) /* there is a case: command timeout, and data phase not processed */ if (mrq->data->error != 0 && mrq->data->error != -EIO) { - ERR_MSG("TUNE_READ: result<0x%x> cmd_error<%d> data_error<%d>", - result, mrq->cmd->error, mrq->data->error); + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_READ: result<0x%x> cmd_error<%d> data_error<%d>\n", + host->id, result, + mrq->cmd->error, + mrq->data->error); goto done; } } @@ -1458,13 +1033,18 @@ static int msdc_tune_bwrite(struct mmc_host *mmc, struct mmc_request *mrq) if (host->app_cmd) { result = msdc_app_cmd(host->mmc, host); if (result) { - ERR_MSG("TUNE_BWRITE app_cmd<%d> failed", host->mrq->cmd->opcode); + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_BWRITE app_cmd<%d> failed\n", + host->id, + host->mrq->cmd->opcode); continue; } } result = msdc_do_request(mmc, mrq); - ERR_MSG("TUNE_BWRITE<%s> DSPL<%d> DATWRDLY<%d> MSDC_DAT_RDDLY0<0x%x>", + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_BWRITE<%s> DSPL<%d> DATWRDLY<%d> MSDC_DAT_RDDLY0<0x%x>\n", + host->id, result == 0 ? "PASS" : "FAIL", cur_dsmpl, cur_wrrdly, cur_rxdly0); @@ -1473,8 +1053,11 @@ static int msdc_tune_bwrite(struct mmc_host *mmc, struct mmc_request *mrq) } else { /* there is a case: command timeout, and data phase not processed */ if (mrq->data->error != -EIO) { - ERR_MSG("TUNE_READ: result<0x%x> cmd_error<%d> data_error<%d>", - result, mrq->cmd->error, mrq->data->error); + dev_err(mmc_dev(host->mmc), + "%d -> TUNE_READ: result<0x%x> cmd_error<%d> data_error<%d>\n", + host->id, result, + mrq->cmd->error, + mrq->data->error); goto done; } } @@ -1508,7 +1091,8 @@ static int msdc_get_card_status(struct mmc_host *mmc, struct msdc_host *host, u3 if (mmc->card) { cmd.arg = mmc->card->rca << 16; } else { - ERR_MSG("cmd13 mmc card is null"); + dev_err(mmc_dev(host->mmc), "%d -> cmd13 mmc card is null\n", + host->id); cmd.arg = host->app_cmd_arg; } cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC; @@ -1535,7 +1119,8 @@ static int msdc_check_busy(struct mmc_host *mmc, struct msdc_host *host) if (err) return err; /* need cmd12? */ - ERR_MSG("cmd<13> resp<0x%x>", status); + dev_err(mmc_dev(host->mmc), "%d -> cmd<13> resp<0x%x>\n", + host->id, status); } while (R1_CURRENT_STATE(status) == 7); return err; @@ -1559,7 +1144,9 @@ static int msdc_tune_request(struct mmc_host *mmc, struct mmc_request *mrq) } else { ret = msdc_check_busy(mmc, host); if (ret) { - ERR_MSG("XXX cmd13 wait program done failed"); + dev_err(mmc_dev(host->mmc), + "%d -> XXX cmd13 wait program done failed\n", + host->id); return ret; } /* CRC and TO */ @@ -1575,22 +1162,10 @@ static void msdc_ops_request(struct mmc_host *mmc, struct mmc_request *mrq) { struct msdc_host *host = mmc_priv(mmc); - //=== for sdio profile === -#if 0 /* --- by chhung */ - u32 old_H32, old_L32, new_H32, new_L32; - u32 ticks = 0, opcode = 0, sizes = 0, bRx = 0; -#endif /* end of --- */ - WARN_ON(host->mrq); /* start to process */ spin_lock(&host->lock); -#if 0 /* --- by chhung */ - if (sdio_pro_enable) { //=== for sdio profile === - if (mrq->cmd->opcode == 52 || mrq->cmd->opcode == 53) - GPT_GetCounter64(&old_L32, &old_H32); - } -#endif /* end of --- */ host->mrq = mrq; @@ -1610,26 +1185,6 @@ static void msdc_ops_request(struct mmc_host *mmc, struct mmc_request *mrq) host->mrq = NULL; -#if 0 /* --- by chhung */ - //=== for sdio profile === - if (sdio_pro_enable) { - if (mrq->cmd->opcode == 52 || mrq->cmd->opcode == 53) { - GPT_GetCounter64(&new_L32, &new_H32); - ticks = msdc_time_calc(old_L32, old_H32, new_L32, new_H32); - - opcode = mrq->cmd->opcode; - if (mrq->cmd->data) { - sizes = mrq->cmd->data->blocks * mrq->cmd->data->blksz; - bRx = mrq->cmd->data->flags & MMC_DATA_READ ? 1 : 0; - } else { - bRx = mrq->cmd->arg & 0x80000000 ? 1 : 0; - } - - if (!mrq->cmd->error) - msdc_performance(opcode, sizes, bRx, ticks); - } - } -#endif /* end of --- */ spin_unlock(&host->lock); mmc_request_done(mmc, mrq); @@ -1659,8 +1214,6 @@ static void msdc_set_buswidth(struct msdc_host *host, u32 width) } writel(val, host->base + SDC_CFG); - - N_MSG(CFG, "Bus Width = %d", width); } /* ops.set_ios */ @@ -1698,7 +1251,6 @@ static void msdc_ops_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) switch (ios->power_mode) { case MMC_POWER_OFF: case MMC_POWER_UP: - // msdc_set_power_mode(host, ios->power_mode); /* --- by chhung */ break; case MMC_POWER_ON: host->power_mode = MMC_POWER_ON; @@ -1711,7 +1263,6 @@ static void msdc_ops_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (host->mclk != ios->clock) { if (ios->clock > 25000000) { //if (!(host->hw->flags & MSDC_REMOVABLE)) { - INIT_MSG("SD data latch edge<%d>", MSDC_SMPL_FALLING); sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_RSPL, MSDC_SMPL_FALLING); sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DSPL, @@ -1764,7 +1315,6 @@ static int msdc_ops_get_cd(struct mmc_host *mmc) return 1; #else host->card_inserted = (host->pm_state.event == PM_EVENT_USER_RESUME) ? 1 : 0; - INIT_MSG("sdio ops_get_cd<%d>", host->card_inserted); return host->card_inserted; #endif } @@ -1772,9 +1322,6 @@ static int msdc_ops_get_cd(struct mmc_host *mmc) /* MSDC_CD_PIN_EN set for card */ if (host->hw->flags & MSDC_CD_PIN_EN) { spin_lock_irqsave(&host->lock, flags); -#if 0 - present = host->card_inserted; /* why not read from H/W: Fix me*/ -#else // CD present = readl(host->base + MSDC_PS) & MSDC_PS_CDSTS; if (cd_active_low) @@ -1782,13 +1329,11 @@ static int msdc_ops_get_cd(struct mmc_host *mmc) else present = present ? 1 : 0; host->card_inserted = present; -#endif spin_unlock_irqrestore(&host->lock, flags); } else { present = 0; /* TODO? Check DAT3 pins for card detection */ } - INIT_MSG("ops_get_cd return<%d>", present); return present; } @@ -1823,19 +1368,12 @@ static irqreturn_t msdc_irq(int irq, void *dev_id) if (intsts & MSDC_INT_CDSC) { if (host->mmc->caps & MMC_CAP_NEEDS_POLL) return IRQ_HANDLED; - IRQ_MSG("MSDC_INT_CDSC irq<0x%.8x>", intsts); schedule_delayed_work(&host->card_delaywork, HZ); /* tuning when plug card ? */ } - /* sdio interrupt */ - if (intsts & MSDC_INT_SDIOIRQ) { - IRQ_MSG("XXX MSDC_INT_SDIOIRQ"); /* seems not sdio irq */ - //mmc_signal_sdio_irq(host->mmc); - } - /* transfer complete interrupt */ - if (data != NULL) { + if (data) { if (inten & MSDC_INT_XFER_COMPL) { data->bytes_xfered = host->xfer_size; complete(&host->xfer_done); @@ -1847,13 +1385,10 @@ static irqreturn_t msdc_irq(int irq, void *dev_id) msdc_clr_fifo(host); msdc_clr_int(); - if (intsts & MSDC_INT_DATTMO) { - IRQ_MSG("XXX CMD<%d> MSDC_INT_DATTMO", host->mrq->cmd->opcode); + if (intsts & MSDC_INT_DATTMO) data->error = -ETIMEDOUT; - } else if (intsts & MSDC_INT_DATCRCERR) { - IRQ_MSG("XXX CMD<%d> MSDC_INT_DATCRCERR, SDC_DCRC_STS<0x%x>", host->mrq->cmd->opcode, readl(host->base + SDC_DCRC_STS)); + else if (intsts & MSDC_INT_DATCRCERR) data->error = -EIO; - } //if(readl(MSDC_INTEN) & MSDC_INT_XFER_COMPL) { complete(&host->xfer_done); /* Read CRC come fast, XFER_COMPL not enabled */ @@ -1861,7 +1396,7 @@ static irqreturn_t msdc_irq(int irq, void *dev_id) } /* command interrupts */ - if ((cmd != NULL) && (intsts & cmdsts)) { + if (cmd && (intsts & cmdsts)) { if ((intsts & MSDC_INT_CMDRDY) || (intsts & MSDC_INT_ACMDRDY) || (intsts & MSDC_INT_ACMD19_DONE)) { u32 *rsp = &cmd->resp[0]; @@ -1883,16 +1418,8 @@ static irqreturn_t msdc_irq(int irq, void *dev_id) break; } } else if ((intsts & MSDC_INT_RSPCRCERR) || (intsts & MSDC_INT_ACMDCRCERR)) { - if (intsts & MSDC_INT_ACMDCRCERR) - IRQ_MSG("XXX CMD<%d> MSDC_INT_ACMDCRCERR", cmd->opcode); - else - IRQ_MSG("XXX CMD<%d> MSDC_INT_RSPCRCERR", cmd->opcode); cmd->error = -EIO; } else if ((intsts & MSDC_INT_CMDTMO) || (intsts & MSDC_INT_ACMDTMO)) { - if (intsts & MSDC_INT_ACMDTMO) - IRQ_MSG("XXX CMD<%d> MSDC_INT_ACMDTMO", cmd->opcode); - else - IRQ_MSG("XXX CMD<%d> MSDC_INT_CMDTMO", cmd->opcode); cmd->error = -ETIMEDOUT; msdc_reset_hw(host); msdc_clr_fifo(host); @@ -1903,36 +1430,8 @@ static irqreturn_t msdc_irq(int irq, void *dev_id) /* mmc irq interrupts */ if (intsts & MSDC_INT_MMCIRQ) - printk(KERN_INFO "msdc[%d] MMCIRQ: SDC_CSTS=0x%.8x\r\n", - host->id, readl(host->base + SDC_CSTS)); - -#ifdef MT6575_SD_DEBUG - { -/* msdc_int_reg *int_reg = (msdc_int_reg*)&intsts;*/ - N_MSG(INT, "IRQ_EVT(0x%x): MMCIRQ(%d) CDSC(%d), ACRDY(%d), ACTMO(%d), ACCRE(%d) AC19DN(%d)", - intsts, - int_reg->mmcirq, - int_reg->cdsc, - int_reg->atocmdrdy, - int_reg->atocmdtmo, - int_reg->atocmdcrc, - int_reg->atocmd19done); - N_MSG(INT, "IRQ_EVT(0x%x): SDIO(%d) CMDRDY(%d), CMDTMO(%d), RSPCRC(%d), CSTA(%d)", - intsts, - int_reg->sdioirq, - int_reg->cmdrdy, - int_reg->cmdtmo, - int_reg->rspcrc, - int_reg->csta); - N_MSG(INT, "IRQ_EVT(0x%x): XFCMP(%d) DXDONE(%d), DATTMO(%d), DATCRC(%d), DMAEMP(%d)", - intsts, - int_reg->xfercomp, - int_reg->dxferdone, - int_reg->dattmo, - int_reg->datcrc, - int_reg->dmaqempty); - } -#endif + dev_info(mmc_dev(host->mmc), "msdc[%d] MMCIRQ: SDC_CSTS=0x%.8x\r\n", + host->id, readl(host->base + SDC_CSTS)); return IRQ_HANDLED; } @@ -1958,14 +1457,11 @@ static void msdc_enable_cd_irq(struct msdc_host *host, int enable) return; } - N_MSG(CFG, "CD IRQ Enable(%d)", enable); - if (enable) { /* card detection circuit relies on the core power so that the core power * shouldn't be turned off. Here adds a reference count to keep * the core power alive. */ - //msdc_vcore_on(host); //did in msdc_init_hw() if (hw->config_gpio_pin) /* NULL */ hw->config_gpio_pin(MSDC_CD_PIN, GPIO_PULL_UP); @@ -1988,7 +1484,6 @@ static void msdc_enable_cd_irq(struct msdc_host *host, int enable) /* Here decreases a reference count to core power since card * detection circuit is shutdown. */ - //msdc_vcore_off(host); } } @@ -1996,14 +1491,6 @@ static void msdc_enable_cd_irq(struct msdc_host *host, int enable) static void msdc_init_hw(struct msdc_host *host) { - /* Power on */ -#if 0 /* --- by chhung */ - msdc_vcore_on(host); - msdc_pin_reset(host, MSDC_PIN_PULL_UP); - msdc_select_clksrc(host, hw->clk_src); - enable_clock(PERI_MSDC0_PDN + host->id, "SD"); - msdc_vdd_on(host); -#endif /* end of --- */ /* Configure to MMC/SD mode */ sdr_set_field(host->base + MSDC_CFG, MSDC_CFG_MODE, MSDC_SDMMC); @@ -2035,10 +1522,6 @@ static void msdc_init_hw(struct msdc_host *host) writel(0x00000000, host->base + MSDC_DAT_RDDLY1); writel(0x00000000, host->base + MSDC_IOCON); -#if 0 // use MT7620 default value: 0x403c004f - /* bit0 modified: Rx Data Clock Source: 1 -> 2.0*/ - writel(0x003C000F, host->base + MSDC_PATCH_BIT0); -#endif if (readl(host->base + MSDC_ECO_VER) >= 4) { if (host->id == 1) { @@ -2094,8 +1577,6 @@ static void msdc_init_hw(struct msdc_host *host) sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, DEFAULT_DTOC); msdc_set_buswidth(host, MMC_BUS_WIDTH_1); - - N_MSG(FUC, "init hardware done!"); } /* called by msdc_drv_remove */ @@ -2107,7 +1588,6 @@ static void msdc_deinit_hw(struct msdc_host *host) /* Disable card detection */ msdc_enable_cd_irq(host, 0); - // msdc_set_power_mode(host, MMC_POWER_OFF); /* make sure power down */ /* --- by chhung */ } /* init gpd and bd list in msdc_drv_probe */ @@ -2289,7 +1769,8 @@ static int msdc_drv_remove(struct platform_device *pdev) host = mmc_priv(mmc); BUG_ON(!host); - ERR_MSG("removed !!!"); + dev_err(mmc_dev(host->mmc), "%d -> removed !!!\n", + host->id); platform_set_drvdata(pdev, NULL); mmc_remove_host(host->mmc); @@ -2313,6 +1794,7 @@ static int msdc_drv_remove(struct platform_device *pdev) static void msdc_drv_pm(struct platform_device *pdev, pm_message_t state) { struct mmc_host *mmc = platform_get_drvdata(pdev); + if (mmc) { struct msdc_host *host = mmc_priv(mmc); msdc_pm(state, (void *)host); @@ -2370,7 +1852,7 @@ static int __init mt_msdc_init(void) ret = platform_driver_register(&mt_msdc_driver); if (ret) { - printk(KERN_ERR DRV_NAME ": Can't register driver"); + pr_err("%s: Can't register driver", DRV_NAME); return ret; } diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c index a49e2795af6b..8371a9cdb164 100644 --- a/drivers/staging/mt7621-pci/pci-mt7621.c +++ b/drivers/staging/mt7621-pci/pci-mt7621.c @@ -122,7 +122,7 @@ #define RALINK_PCIE_CLK_EN BIT(21) #define MEMORY_BASE 0x0 -static int pcie_link_status = 0; +static int pcie_link_status; /** * struct mt7621_pcie_port - PCIe port information @@ -214,7 +214,7 @@ write_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg, u32 val) pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA); } -void +static void set_pcie_phy(struct mt7621_pcie *pcie, u32 offset, int start_b, int bits, int val) { @@ -225,7 +225,7 @@ set_pcie_phy(struct mt7621_pcie *pcie, u32 offset, pcie_write(pcie, reg, offset); } -void +static void bypass_pipe_rst(struct mt7621_pcie *pcie) { /* PCIe Port 0 */ @@ -239,7 +239,7 @@ bypass_pipe_rst(struct mt7621_pcie *pcie) set_pcie_phy(pcie, (RALINK_PCIEPHY_P2_CTL_OFFSET + 0x02c), 4, 1, 0x01); // rg_pe1_pipe_cmd_frc[4] } -void +static void set_phy_for_ssc(struct mt7621_pcie *pcie) { unsigned long reg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0); @@ -387,15 +387,8 @@ static int mt7621_pcie_parse_dt(struct mt7621_pcie *pcie) struct device *dev = pcie->dev; struct device_node *node = dev->of_node; struct resource regs; - const char *type; int err; - type = of_get_property(node, "device_type", NULL); - if (!type || strcmp(type, "pci") != 0) { - dev_err(dev, "invalid \"device_type\" %s\n", type); - return -EINVAL; - } - err = of_address_to_resource(node, 0, ®s); if (err) { dev_err(dev, "missing \"reg\" property\n"); @@ -481,12 +474,12 @@ static int mt7621_pci_probe(struct platform_device *pdev) ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST | RALINK_PCIE1_RST | RALINK_PCIE2_RST); - *(unsigned int *)(0xbe000060) &= ~(0x3<<10 | 0x3<<3); - *(unsigned int *)(0xbe000060) |= 0x1<<10 | 0x1<<3; + *(unsigned int *)(0xbe000060) &= ~(0x3 << 10 | 0x3 << 3); + *(unsigned int *)(0xbe000060) |= BIT(10) | BIT(3); mdelay(100); - *(unsigned int *)(0xbe000600) |= 0x1<<19 | 0x1<<8 | 0x1<<7; // use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3) + *(unsigned int *)(0xbe000600) |= BIT(19) | BIT(8) | BIT(7); // use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3) mdelay(100); - *(unsigned int *)(0xbe000620) &= ~(0x1<<19 | 0x1<<8 | 0x1<<7); // clear DATA + *(unsigned int *)(0xbe000620) &= ~(BIT(19) | BIT(8) | BIT(7)); // clear DATA mdelay(100); @@ -496,18 +489,15 @@ static int mt7621_pci_probe(struct platform_device *pdev) DEASSERT_SYSRST_PCIE(val); - if ((*(unsigned int *)(0xbe00000c)&0xFFFF) == 0x0101) // MT7621 E2 + if ((*(unsigned int *)(0xbe00000c) & 0xFFFF) == 0x0101) // MT7621 E2 bypass_pipe_rst(pcie); set_phy_for_ssc(pcie); - val = read_config(pcie, 0, 0x70c); - printk("Port 0 N_FTS = %x\n", (unsigned int)val); - - val = read_config(pcie, 1, 0x70c); - printk("Port 1 N_FTS = %x\n", (unsigned int)val); - - val = read_config(pcie, 2, 0x70c); - printk("Port 2 N_FTS = %x\n", (unsigned int)val); + list_for_each_entry_safe(port, tmp, &pcie->ports, list) { + u32 slot = port->slot; + val = read_config(pcie, slot, 0x70c); + dev_info(dev, "Port %d N_FTS = %x\n", (unsigned int)val, slot); + } rt_sysc_m32(0, RALINK_PCIE_RST, RALINK_RSTCTRL); rt_sysc_m32(0x30, 2 << 4, SYSC_REG_SYSTEM_CONFIG1); @@ -520,18 +510,18 @@ static int mt7621_pci_probe(struct platform_device *pdev) rt_sysc_m32(RALINK_PCIE_RST, 0, RALINK_RSTCTRL); /* Use GPIO control instead of PERST_N */ - *(unsigned int *)(0xbe000620) |= 0x1<<19 | 0x1<<8 | 0x1<<7; // set DATA + *(unsigned int *)(0xbe000620) |= BIT(19) | BIT(8) | BIT(7); // set DATA mdelay(1000); if ((pcie_read(pcie, RT6855_PCIE0_OFFSET + RALINK_PCI_STATUS) & 0x1) == 0) { printk("PCIE0 no card, disable it(RST&CLK)\n"); ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST); rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1); - pcie_link_status &= ~(1<<0); + pcie_link_status &= ~(BIT(0)); } else { - pcie_link_status |= 1<<0; + pcie_link_status |= BIT(0); val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); - val |= (1<<20); // enable pcie1 interrupt + val |= BIT(20); // enable pcie1 interrupt pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); } @@ -539,11 +529,11 @@ static int mt7621_pci_probe(struct platform_device *pdev) printk("PCIE1 no card, disable it(RST&CLK)\n"); ASSERT_SYSRST_PCIE(RALINK_PCIE1_RST); rt_sysc_m32(RALINK_PCIE1_CLK_EN, 0, RALINK_CLKCFG1); - pcie_link_status &= ~(1<<1); + pcie_link_status &= ~(BIT(1)); } else { - pcie_link_status |= 1<<1; + pcie_link_status |= BIT(1); val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); - val |= (1<<21); // enable pcie1 interrupt + val |= BIT(21); // enable pcie1 interrupt pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); } @@ -551,11 +541,11 @@ static int mt7621_pci_probe(struct platform_device *pdev) printk("PCIE2 no card, disable it(RST&CLK)\n"); ASSERT_SYSRST_PCIE(RALINK_PCIE2_RST); rt_sysc_m32(RALINK_PCIE2_CLK_EN, 0, RALINK_CLKCFG1); - pcie_link_status &= ~(1<<2); + pcie_link_status &= ~(BIT(2)); } else { - pcie_link_status |= 1<<2; + pcie_link_status |= BIT(2); val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR); - val |= (1<<22); // enable pcie2 interrupt + val |= BIT(22); // enable pcie2 interrupt pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR); } @@ -654,26 +644,26 @@ pcie(2/1/0) link status pcie2_num pcie1_num pcie0_num switch (pcie_link_status) { case 7: val = read_config(pcie, 2, 0x4); - write_config(pcie, 2, 0x4, val|0x4); + write_config(pcie, 2, 0x4, val | 0x4); val = read_config(pcie, 2, 0x70c); - val &= ~(0xff)<<8; - val |= 0x50<<8; + val &= ~(0xff) << 8; + val |= 0x50 << 8; write_config(pcie, 2, 0x70c, val); case 3: case 5: case 6: val = read_config(pcie, 1, 0x4); - write_config(pcie, 1, 0x4, val|0x4); + write_config(pcie, 1, 0x4, val | 0x4); val = read_config(pcie, 1, 0x70c); - val &= ~(0xff)<<8; - val |= 0x50<<8; + val &= ~(0xff) << 8; + val |= 0x50 << 8; write_config(pcie, 1, 0x70c, val); default: val = read_config(pcie, 0, 0x4); - write_config(pcie, 0, 0x4, val|0x4); //bus master enable + write_config(pcie, 0, 0x4, val | 0x4); //bus master enable val = read_config(pcie, 0, 0x70c); - val &= ~(0xff)<<8; - val |= 0x50<<8; + val &= ~(0xff) << 8; + val |= 0x50 << 8; write_config(pcie, 0, 0x70c, val); } diff --git a/drivers/staging/octeon-usb/octeon-hcd.c b/drivers/staging/octeon-usb/octeon-hcd.c index cff5e790b196..9c766f5b812f 100644 --- a/drivers/staging/octeon-usb/octeon-hcd.c +++ b/drivers/staging/octeon-usb/octeon-hcd.c @@ -377,29 +377,6 @@ struct octeon_hcd { struct cvmx_usb_tx_fifo nonperiodic; }; -/* This macro spins on a register waiting for it to reach a condition. */ -#define CVMX_WAIT_FOR_FIELD32(address, _union, cond, timeout_usec) \ - ({int result; \ - do { \ - u64 done = cvmx_get_cycle() + (u64)timeout_usec * \ - octeon_get_clock_rate() / 1000000; \ - union _union c; \ - \ - while (1) { \ - c.u32 = cvmx_usb_read_csr32(usb, address); \ - \ - if (cond) { \ - result = 0; \ - break; \ - } else if (cvmx_get_cycle() > done) { \ - result = -1; \ - break; \ - } else \ - __delay(100); \ - } \ - } while (0); \ - result; }) - /* * This macro logically sets a single field in a CSR. It does the sequence * read, modify, and write @@ -593,6 +570,33 @@ static inline int cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe) return 0; /* Data0 */ } +/* Loops through register until txfflsh or rxfflsh become zero.*/ +static int cvmx_wait_tx_rx(struct octeon_hcd *usb, int fflsh_type) +{ + int result; + u64 address = CVMX_USBCX_GRSTCTL(usb->index); + u64 done = cvmx_get_cycle() + 100 * + (u64)octeon_get_clock_rate / 1000000; + union cvmx_usbcx_grstctl c; + + while (1) { + c.u32 = cvmx_usb_read_csr32(usb, address); + if (fflsh_type == 0 && c.s.txfflsh == 0) { + result = 0; + break; + } else if (fflsh_type == 1 && c.s.rxfflsh == 0) { + result = 0; + break; + } else if (cvmx_get_cycle() > done) { + result = -1; + break; + } + + __delay(100); + } + return result; +} + static void cvmx_fifo_setup(struct octeon_hcd *usb) { union cvmx_usbcx_ghwcfg3 usbcx_ghwcfg3; @@ -634,12 +638,10 @@ static void cvmx_fifo_setup(struct octeon_hcd *usb) cvmx_usbcx_grstctl, txfnum, 0x10); USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), cvmx_usbcx_grstctl, txfflsh, 1); - CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), - cvmx_usbcx_grstctl, c.s.txfflsh == 0, 100); + cvmx_wait_tx_rx(usb, 0); USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), cvmx_usbcx_grstctl, rxfflsh, 1); - CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), - cvmx_usbcx_grstctl, c.s.rxfflsh == 0, 100); + cvmx_wait_tx_rx(usb, 1); } /** @@ -2768,7 +2770,7 @@ static int cvmx_usb_poll_channel(struct octeon_hcd *usb, int channel) (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT)) pipe->flags |= CVMX_USB_PIPE_FLAGS_NEED_PING; - if (unlikely(WARN_ON_ONCE(bytes_this_transfer < 0))) { + if (WARN_ON_ONCE(bytes_this_transfer < 0)) { /* * In some rare cases the DMA engine seems to get stuck and * keeps substracting same byte count over and over again. In diff --git a/drivers/staging/olpc_dcon/Kconfig b/drivers/staging/olpc_dcon/Kconfig index c91a56f77bcb..192cc8d0853f 100644 --- a/drivers/staging/olpc_dcon/Kconfig +++ b/drivers/staging/olpc_dcon/Kconfig @@ -2,6 +2,7 @@ config FB_OLPC_DCON tristate "One Laptop Per Child Display CONtroller support" depends on OLPC && FB depends on I2C + depends on BACKLIGHT_LCD_SUPPORT depends on (GPIO_CS5535 || GPIO_CS5535=n) select BACKLIGHT_CLASS_DEVICE help diff --git a/drivers/staging/olpc_dcon/olpc_dcon.c b/drivers/staging/olpc_dcon/olpc_dcon.c index 2744c9f0920e..6b714f740ac3 100644 --- a/drivers/staging/olpc_dcon/olpc_dcon.c +++ b/drivers/staging/olpc_dcon/olpc_dcon.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Mainly by David Woodhouse, somewhat modified by Jordan Crouse * @@ -5,10 +6,6 @@ * Copyright © 2006-2007 Advanced Micro Devices, Inc. * Copyright © 2009 VIA Technology, Inc. * Copyright (c) 2010-2011 Andres Salomon <dilinger@queued.net> - * - * This program is free software. You can redistribute it and/or - * modify it under the terms of version 2 of the GNU General Public - * License as published by the Free Software Foundation. */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt diff --git a/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c b/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c index 633c58ce24ee..ff145d493e1b 100644 --- a/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c +++ b/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Mainly by David Woodhouse, somewhat modified by Jordan Crouse * @@ -5,10 +6,6 @@ * Copyright © 2006-2007 Advanced Micro Devices, Inc. * Copyright © 2009 VIA Technology, Inc. * Copyright (c) 2010 Andres Salomon <dilinger@queued.net> - * - * This program is free software. You can redistribute it and/or - * modify it under the terms of version 2 of the GNU General Public - * License as published by the Free Software Foundation. */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt diff --git a/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c b/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c index 64584425b01c..838daa2be3ef 100644 --- a/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c +++ b/drivers/staging/olpc_dcon/olpc_dcon_xo_1_5.c @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2009,2010 One Laptop per Child - * - * This program is free software. You can redistribute it and/or - * modify it under the terms of version 2 of the GNU General Public - * License as published by the Free Software Foundation. */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt diff --git a/drivers/staging/pi433/rf69.c b/drivers/staging/pi433/rf69.c index 085272fb393f..4fa6c0237e59 100644 --- a/drivers/staging/pi433/rf69.c +++ b/drivers/staging/pi433/rf69.c @@ -853,7 +853,6 @@ int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size) #ifdef DEBUG_FIFO_ACCESS int i; #endif - char spi_address = REG_FIFO | WRITE_BIT; u8 local_buffer[FIFO_SIZE + 1]; if (size > FIFO_SIZE) { @@ -862,7 +861,7 @@ int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size) return -EMSGSIZE; } - local_buffer[0] = spi_address; + local_buffer[0] = REG_FIFO | WRITE_BIT; memcpy(&local_buffer[1], buffer, size); #ifdef DEBUG_FIFO_ACCESS diff --git a/drivers/staging/rtl8188eu/Makefile b/drivers/staging/rtl8188eu/Makefile index 4e606b03ec03..7da911c2ab89 100644 --- a/drivers/staging/rtl8188eu/Makefile +++ b/drivers/staging/rtl8188eu/Makefile @@ -28,7 +28,7 @@ r8188eu-y := \ hal/hal_intf.o \ hal/hal_com.o \ hal/odm.o \ - hal/odm_HWConfig.o \ + hal/odm_hwconfig.o \ hal/odm_rtl8188e.o \ hal/rtl8188e_cmd.o \ hal/rtl8188e_dm.o \ diff --git a/drivers/staging/rtl8188eu/TODO b/drivers/staging/rtl8188eu/TODO index 7581e25f231d..5faa0a9bba25 100644 --- a/drivers/staging/rtl8188eu/TODO +++ b/drivers/staging/rtl8188eu/TODO @@ -1,5 +1,5 @@ TODO: -- find and remove remaining code valid only for 5 HGz. Most of the obvious +- find and remove remaining code valid only for 5 GHz. Most of the obvious ones have been removed, but things like channel > 14 still exist. - find and remove any code for other chips that is left over - convert any remaining unusual variable types diff --git a/drivers/staging/rtl8188eu/core/rtw_ap.c b/drivers/staging/rtl8188eu/core/rtw_ap.c index 676d549ef786..1c319c2ca86d 100644 --- a/drivers/staging/rtl8188eu/core/rtw_ap.c +++ b/drivers/staging/rtl8188eu/core/rtw_ap.c @@ -36,7 +36,7 @@ void free_mlme_ap_info(struct adapter *padapter) struct sta_priv *pstapriv = &padapter->stapriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; pmlmepriv->update_bcn = false; pmlmeext->bstart_bss = false; @@ -337,8 +337,6 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level) unsigned char sta_band = 0, raid, shortGIrate = false; unsigned int tx_ra_bitmap = 0; struct ht_priv *psta_ht = NULL; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wlan_bssid_ex *pcur_network = (struct wlan_bssid_ex *)&pmlmepriv->cur_network.network; if (psta) psta_ht = &psta->htpriv; @@ -363,20 +361,13 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level) shortGIrate = psta_ht->sgi; } - if (pcur_network->Configuration.DSConfig > 14) { - /* 5G band */ - if (tx_ra_bitmap & 0xffff000) - sta_band |= WIRELESS_11_5N | WIRELESS_11A; - else - sta_band |= WIRELESS_11A; - } else { - if (tx_ra_bitmap & 0xffff000) - sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; - else if (tx_ra_bitmap & 0xff0) - sta_band |= WIRELESS_11G | WIRELESS_11B; - else - sta_band |= WIRELESS_11B; - } + if (tx_ra_bitmap & 0xffff000) + sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; + else if (tx_ra_bitmap & 0xff0) + sta_band |= WIRELESS_11G | WIRELESS_11B; + else + sta_band |= WIRELESS_11B; + psta->wireless_mode = sta_band; diff --git a/drivers/staging/rtl8188eu/core/rtw_cmd.c b/drivers/staging/rtl8188eu/core/rtw_cmd.c index 59039211dad2..9b2a497aa413 100644 --- a/drivers/staging/rtl8188eu/core/rtw_cmd.c +++ b/drivers/staging/rtl8188eu/core/rtw_cmd.c @@ -243,11 +243,11 @@ u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid, if (check_fwstate(pmlmepriv, _FW_LINKED) == true) rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 1); - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); if (!ph2c) return _FAIL; - psurveyPara = kzalloc(sizeof(struct sitesurvey_parm), GFP_ATOMIC); + psurveyPara = kzalloc(sizeof(*psurveyPara), GFP_ATOMIC); if (!psurveyPara) { kfree(ph2c); return _FAIL; @@ -325,7 +325,7 @@ u8 rtw_createbss_cmd(struct adapter *padapter) else RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, (" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); - pcmd = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + pcmd = kzalloc(sizeof(*pcmd), GFP_ATOMIC); if (!pcmd) { res = _FAIL; goto exit; @@ -367,7 +367,7 @@ u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork) else RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+Join cmd: SSid =[%s]\n", pmlmepriv->assoc_ssid.Ssid)); - pcmd = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + pcmd = kzalloc(sizeof(*pcmd), GFP_ATOMIC); if (!pcmd) { res = _FAIL; goto exit; @@ -527,8 +527,8 @@ u8 rtw_setopmode_cmd(struct adapter *padapter, enum ndis_802_11_network_infra n struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); - psetop = kzalloc(sizeof(struct setopmode_parm), GFP_KERNEL); + ph2c = kzalloc(sizeof(*ph2c), GFP_KERNEL); + psetop = kzalloc(sizeof(*psetop), GFP_KERNEL); if (!ph2c || !psetop) { kfree(ph2c); kfree(psetop); @@ -552,9 +552,9 @@ u8 rtw_setstakey_cmd(struct adapter *padapter, u8 *psta, u8 unicast_key) struct security_priv *psecuritypriv = &padapter->securitypriv; struct sta_info *sta = (struct sta_info *)psta; - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); - psetstakey_para = kzalloc(sizeof(struct set_stakey_parm), GFP_KERNEL); - psetstakey_rsp = kzalloc(sizeof(struct set_stakey_rsp), GFP_KERNEL); + ph2c = kzalloc(sizeof(*ph2c), GFP_KERNEL); + psetstakey_para = kzalloc(sizeof(*psetstakey_para), GFP_KERNEL); + psetstakey_rsp = kzalloc(sizeof(*psetstakey_rsp), GFP_KERNEL); if (!ph2c || !psetstakey_para || !psetstakey_rsp) { kfree(ph2c); @@ -597,20 +597,20 @@ u8 rtw_clearstakey_cmd(struct adapter *padapter, u8 *psta, u8 entry, u8 enqueue) if (!enqueue) { clear_cam_entry(padapter, entry); } else { - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); if (!ph2c) { res = _FAIL; goto exit; } - psetstakey_para = kzalloc(sizeof(struct set_stakey_parm), GFP_ATOMIC); + psetstakey_para = kzalloc(sizeof(*psetstakey_para), GFP_ATOMIC); if (!psetstakey_para) { kfree(ph2c); res = _FAIL; goto exit; } - psetstakey_rsp = kzalloc(sizeof(struct set_stakey_rsp), GFP_ATOMIC); + psetstakey_rsp = kzalloc(sizeof(*psetstakey_rsp), GFP_ATOMIC); if (!psetstakey_rsp) { kfree(ph2c); kfree(psetstakey_para); @@ -642,13 +642,13 @@ u8 rtw_addbareq_cmd(struct adapter *padapter, u8 tid, u8 *addr) struct addBaReq_parm *paddbareq_parm; u8 res = _SUCCESS; - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); if (!ph2c) { res = _FAIL; goto exit; } - paddbareq_parm = kzalloc(sizeof(struct addBaReq_parm), GFP_ATOMIC); + paddbareq_parm = kzalloc(sizeof(*paddbareq_parm), GFP_ATOMIC); if (!paddbareq_parm) { kfree(ph2c); res = _FAIL; @@ -677,13 +677,13 @@ u8 rtw_dynamic_chk_wk_cmd(struct adapter *padapter) struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); if (!ph2c) { res = _FAIL; goto exit; } - pdrvextra_cmd_parm = kzalloc(sizeof(struct drvextra_cmd_parm), GFP_ATOMIC); + pdrvextra_cmd_parm = kzalloc(sizeof(*pdrvextra_cmd_parm), GFP_ATOMIC); if (!pdrvextra_cmd_parm) { kfree(ph2c); res = _FAIL; @@ -719,7 +719,7 @@ u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue) } /* prepare cmd parameter */ - setChannelPlan_param = kzalloc(sizeof(struct SetChannelPlan_param), GFP_KERNEL); + setChannelPlan_param = kzalloc(sizeof(*setChannelPlan_param), GFP_KERNEL); if (!setChannelPlan_param) { res = _FAIL; goto exit; @@ -728,7 +728,7 @@ u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue) if (enqueue) { /* need enqueue, prepare cmd_obj and enqueue */ - pcmdobj = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); + pcmdobj = kzalloc(sizeof(*pcmdobj), GFP_KERNEL); if (!pcmdobj) { kfree(setChannelPlan_param); res = _FAIL; @@ -745,7 +745,6 @@ u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue) kfree(setChannelPlan_param); } - /* do something based on res... */ if (res == _SUCCESS) padapter->mlmepriv.ChannelPlan = chplan; @@ -884,13 +883,13 @@ u8 rtw_lps_ctrl_wk_cmd(struct adapter *padapter, u8 lps_ctrl_type, u8 enqueue) u8 res = _SUCCESS; if (enqueue) { - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); if (!ph2c) { res = _FAIL; goto exit; } - pdrvextra_cmd_parm = kzalloc(sizeof(struct drvextra_cmd_parm), GFP_ATOMIC); + pdrvextra_cmd_parm = kzalloc(sizeof(*pdrvextra_cmd_parm), GFP_ATOMIC); if (!pdrvextra_cmd_parm) { kfree(ph2c); res = _FAIL; @@ -926,13 +925,13 @@ u8 rtw_rpt_timer_cfg_cmd(struct adapter *padapter, u16 min_time) u8 res = _SUCCESS; - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); + ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); if (!ph2c) { res = _FAIL; goto exit; } - pdrvextra_cmd_parm = kzalloc(sizeof(struct drvextra_cmd_parm), GFP_ATOMIC); + pdrvextra_cmd_parm = kzalloc(sizeof(*pdrvextra_cmd_parm), GFP_ATOMIC); if (!pdrvextra_cmd_parm) { kfree(ph2c); res = _FAIL; @@ -967,13 +966,13 @@ u8 rtw_antenna_select_cmd(struct adapter *padapter, u8 antenna, u8 enqueue) return res; if (enqueue) { - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); + ph2c = kzalloc(sizeof(*ph2c), GFP_KERNEL); if (!ph2c) { res = _FAIL; goto exit; } - pdrvextra_cmd_parm = kzalloc(sizeof(struct drvextra_cmd_parm), GFP_KERNEL); + pdrvextra_cmd_parm = kzalloc(sizeof(*pdrvextra_cmd_parm), GFP_KERNEL); if (!pdrvextra_cmd_parm) { kfree(ph2c); res = _FAIL; @@ -1000,8 +999,8 @@ u8 rtw_ps_cmd(struct adapter *padapter) struct drvextra_cmd_parm *pdrvextra_cmd_parm; struct cmd_priv *pcmdpriv = &padapter->cmdpriv; - ppscmd = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC); - pdrvextra_cmd_parm = kzalloc(sizeof(struct drvextra_cmd_parm), GFP_ATOMIC); + ppscmd = kzalloc(sizeof(*ppscmd), GFP_ATOMIC); + pdrvextra_cmd_parm = kzalloc(sizeof(*pdrvextra_cmd_parm), GFP_ATOMIC); if (!ppscmd || !pdrvextra_cmd_parm) { kfree(ppscmd); kfree(pdrvextra_cmd_parm); @@ -1064,13 +1063,13 @@ u8 rtw_chk_hi_queue_cmd(struct adapter *padapter) struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; - ph2c = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL); + ph2c = kzalloc(sizeof(*ph2c), GFP_ATOMIC); if (!ph2c) { res = _FAIL; goto exit; } - pdrvextra_cmd_parm = kzalloc(sizeof(struct drvextra_cmd_parm), GFP_KERNEL); + pdrvextra_cmd_parm = kzalloc(sizeof(*pdrvextra_cmd_parm), GFP_ATOMIC); if (!pdrvextra_cmd_parm) { kfree(ph2c); res = _FAIL; diff --git a/drivers/staging/rtl8188eu/core/rtw_debug.c b/drivers/staging/rtl8188eu/core/rtw_debug.c index 67461fdf315c..6c2fe1a112ac 100644 --- a/drivers/staging/rtl8188eu/core/rtw_debug.c +++ b/drivers/staging/rtl8188eu/core/rtw_debug.c @@ -153,13 +153,11 @@ int proc_get_best_channel(char *page, char **start, struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; int len = 0; - u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; + u32 i, best_channel_24G = 1, index_24G = 0; for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) { if (pmlmeext->channel_set[i].ChannelNum == 1) index_24G = i; - if (pmlmeext->channel_set[i].ChannelNum == 36) - index_5G = i; } for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) { @@ -171,32 +169,11 @@ int proc_get_best_channel(char *page, char **start, } } - /* 5G */ - if (pmlmeext->channel_set[i].ChannelNum >= 36 && - pmlmeext->channel_set[i].ChannelNum < 140) { - /* Find primary channel */ - if (((pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0) && - (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) { - index_5G = i; - best_channel_5G = pmlmeext->channel_set[i].ChannelNum; - } - } - - if (pmlmeext->channel_set[i].ChannelNum >= 149 && - pmlmeext->channel_set[i].ChannelNum < 165) { - /* find primary channel */ - if (((pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0) && - (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) { - index_5G = i; - best_channel_5G = pmlmeext->channel_set[i].ChannelNum; - } - } /* debug */ len += snprintf(page + len, count - len, "The rx cnt of channel %3d = %d\n", pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count); } - len += snprintf(page + len, count - len, "best_channel_5G = %d\n", best_channel_5G); len += snprintf(page + len, count - len, "best_channel_24G = %d\n", best_channel_24G); *eof = 1; diff --git a/drivers/staging/rtl8188eu/core/rtw_efuse.c b/drivers/staging/rtl8188eu/core/rtw_efuse.c index 0fd306a808c4..b7be71f904ed 100644 --- a/drivers/staging/rtl8188eu/core/rtw_efuse.c +++ b/drivers/staging/rtl8188eu/core/rtw_efuse.c @@ -22,13 +22,9 @@ enum{ }; /* - * Function: efuse_power_switch - * - * Overview: When we want to enable write operation, we should change to - * pwr on state. When we stop write, we should switch to 500k mode - * and disable LDO 2.5V. + * When we want to enable write operation, we should change to pwr on state. + * When we stop write, we should switch to 500k mode and disable LDO 2.5V. */ - void efuse_power_switch(struct adapter *pAdapter, u8 write, u8 pwrstate) { u8 tempval; @@ -41,7 +37,7 @@ void efuse_power_switch(struct adapter *pAdapter, u8 write, u8 pwrstate) tmpv16 = usb_read16(pAdapter, REG_SYS_ISO_CTRL); if (!(tmpv16 & PWC_EV12V)) { tmpv16 |= PWC_EV12V; - usb_write16(pAdapter, REG_SYS_ISO_CTRL, tmpv16); + usb_write16(pAdapter, REG_SYS_ISO_CTRL, tmpv16); } /* Reset: 0x0000h[28], default valid */ tmpv16 = usb_read16(pAdapter, REG_SYS_FUNC_EN); @@ -86,16 +82,20 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) u16 **eFuseWord = NULL; u16 efuse_utilized = 0; u8 u1temp = 0; + void **tmp = NULL; efuseTbl = kzalloc(EFUSE_MAP_LEN_88E, GFP_KERNEL); if (!efuseTbl) return; - eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); - if (!eFuseWord) { + tmp = kzalloc(EFUSE_MAX_SECTION_88E * (sizeof(void *) + EFUSE_MAX_WORD_UNIT * sizeof(u16)), GFP_KERNEL); + if (!tmp) { DBG_88E("%s: alloc eFuseWord fail!\n", __func__); goto eFuseWord_failed; } + for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) + tmp[i] = ((char *)(tmp + EFUSE_MAX_SECTION_88E)) + i * EFUSE_MAX_WORD_UNIT * sizeof(u16); + eFuseWord = (u16 **)tmp; /* 0. Refresh efuse init map as all oxFF. */ for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) @@ -360,15 +360,13 @@ u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_e static u16 Efuse_GetCurrentSize(struct adapter *pAdapter) { - int bContinual = true; u16 efuse_addr = 0; u8 hoffset = 0, hworden = 0; u8 efuse_data, word_cnts = 0; rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); - while (bContinual && - efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data) && + while (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data) && AVAILABLE_EFUSE_ADDR(efuse_addr)) { if (efuse_data != 0xFF) { if ((efuse_data&0x1F) == 0x0F) { /* extended header */ @@ -390,7 +388,7 @@ static u16 Efuse_GetCurrentSize(struct adapter *pAdapter) /* read next header */ efuse_addr = efuse_addr + (word_cnts*2)+1; } else { - bContinual = false; + break; } } @@ -453,7 +451,7 @@ int Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data) bDataEmpty = false; } } - if (bDataEmpty == false) { + if (!bDataEmpty) { ReadState = PG_STATE_DATA; } else {/* read next header */ efuse_addr = efuse_addr + (word_cnts*2)+1; @@ -512,7 +510,7 @@ static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, st static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt) { - bool bRet = false; + bool ret = false; u16 efuse_addr = *pAddr; u16 efuse_max_available_len = EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E; @@ -564,7 +562,7 @@ static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuse if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr)) return false; } else { - bRet = true; + ret = true; break; } } else if ((tmp_header & 0x1F) == 0x0F) { /* wrong extended header */ @@ -574,12 +572,12 @@ static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuse } *pAddr = efuse_addr; - return bRet; + return ret; } static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt) { - bool bRet = false; + bool ret = false; u8 pg_header = 0, tmp_header = 0; u16 efuse_addr = *pAddr; u8 repeatcnt = 0; @@ -597,7 +595,7 @@ static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuse } if (pg_header == tmp_header) { - bRet = true; + ret = true; } else { struct pgpkt fixPkt; @@ -609,7 +607,7 @@ static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuse } *pAddr = efuse_addr; - return bRet; + return ret; } static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt) @@ -639,14 +637,14 @@ hal_EfusePgPacketWriteHeader( u16 *pAddr, struct pgpkt *pTargetPkt) { - bool bRet = false; + bool ret = false; if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) - bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt); + ret = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt); else - bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt); + ret = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt); - return bRet; + return ret; } static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt, @@ -678,19 +676,19 @@ static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt, static bool hal_EfuseCheckIfDatafollowed(struct adapter *pAdapter, u8 word_cnts, u16 startAddr) { - bool bRet = false; + bool ret = false; u8 i, efuse_data; for (i = 0; i < (word_cnts*2); i++) { if (efuse_OneByteRead(pAdapter, (startAddr+i), &efuse_data) && (efuse_data != 0xFF)) - bRet = true; + ret = true; } - return bRet; + return ret; } static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt) { - bool bRet = false; + bool ret = false; u8 i, efuse_data = 0, cur_header = 0; u8 matched_wden = 0, badworden = 0; u16 startAddr = 0; @@ -703,7 +701,7 @@ static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u while (1) { if (startAddr >= efuse_max_available_len) { - bRet = false; + ret = false; break; } @@ -713,7 +711,7 @@ static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u startAddr++; efuse_OneByteRead(pAdapter, startAddr, &efuse_data); if (ALL_WORDS_DISABLED(efuse_data)) { - bRet = false; + ret = false; break; } else { curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); @@ -740,7 +738,7 @@ static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data); if (!PgWriteSuccess) { - bRet = false; /* write fail, return */ + ret = false; /* write fail, return */ break; } } @@ -756,11 +754,11 @@ static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u } else { /* not used header, 0xff */ *pAddr = startAddr; - bRet = true; + ret = true; break; } } - return bRet; + return ret; } static bool @@ -868,9 +866,7 @@ u8 efuse_OneByteWrite(struct adapter *pAdapter, u16 addr, u8 data) return result; } -/* - * Overview: Read allowed word in current efuse section data. - */ +/* Read allowed word in current efuse section data. */ void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata) { if (!(word_en & BIT(0))) { @@ -891,9 +887,7 @@ void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata) } } -/* - * Overview: Read All Efuse content - */ +/* Read All Efuse content */ static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse) { efuse_power_switch(pAdapter, false, true); @@ -903,12 +897,8 @@ static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse) efuse_power_switch(pAdapter, false, false); } -/* - * Overview: Transfer current EFUSE content to shadow init and modify map. - */ -void EFUSE_ShadowMapUpdate( - struct adapter *pAdapter, - u8 efuseType) +/* Transfer current EFUSE content to shadow init and modify map. */ +void EFUSE_ShadowMapUpdate(struct adapter *pAdapter, u8 efuseType) { struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); diff --git a/drivers/staging/rtl8188eu/core/rtw_ieee80211.c b/drivers/staging/rtl8188eu/core/rtw_ieee80211.c index 7d5cbaf50f1c..5c4ff81987bd 100644 --- a/drivers/staging/rtl8188eu/core/rtw_ieee80211.c +++ b/drivers/staging/rtl8188eu/core/rtw_ieee80211.c @@ -100,19 +100,13 @@ bool rtw_is_cckratesonly_included(u8 *rate) int rtw_check_network_type(unsigned char *rate, int ratelen, int channel) { - if (channel > 14) { - if (rtw_is_cckrates_included(rate)) - return WIRELESS_INVALID; - else - return WIRELESS_11A; - } else { /* could be pure B, pure G, or B/G */ - if (rtw_is_cckratesonly_included(rate)) - return WIRELESS_11B; - else if (rtw_is_cckrates_included(rate)) - return WIRELESS_11BG; - else - return WIRELESS_11G; - } + /* could be pure B, pure G, or B/G */ + if (rtw_is_cckratesonly_included(rate)) + return WIRELESS_11B; + else if (rtw_is_cckrates_included(rate)) + return WIRELESS_11BG; + else + return WIRELESS_11G; } u8 *rtw_set_fixed_ie(void *pbuf, unsigned int len, void *source, @@ -252,7 +246,7 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv) wireless_mode = pregistrypriv->wireless_mode; } - rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode); + rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode); rateLen = rtw_get_rateset_len(pdev_network->SupportedRates); @@ -290,7 +284,7 @@ unsigned char *rtw_get_wpa_ie(unsigned char *pie, uint *wpa_ie_len, int limit) if (pbuf) { /* check if oui matches... */ - if (!memcmp((pbuf + 2), wpa_oui_type, sizeof(wpa_oui_type)) == false) + if (memcmp((pbuf + 2), wpa_oui_type, sizeof(wpa_oui_type))) goto check_next_ie; /* check version... */ diff --git a/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c b/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c index c040f185074b..0b3eb0b40975 100644 --- a/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c +++ b/drivers/staging/rtl8188eu/core/rtw_ioctl_set.c @@ -17,11 +17,11 @@ u8 rtw_do_join(struct adapter *padapter) { struct list_head *plist, *phead; u8 *pibss = NULL; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct __queue *queue = &(pmlmepriv->scanned_queue); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct __queue *queue = &pmlmepriv->scanned_queue; u8 ret = _SUCCESS; - spin_lock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_lock_bh(&pmlmepriv->scanned_queue.lock); phead = get_list_head(queue); plist = phead->next; @@ -36,7 +36,7 @@ u8 rtw_do_join(struct adapter *padapter) pmlmepriv->to_join = true; if (list_empty(&queue->queue)) { - spin_unlock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_unlock_bh(&pmlmepriv->scanned_queue.lock); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); /* when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty */ @@ -60,18 +60,18 @@ u8 rtw_do_join(struct adapter *padapter) } else { int select_ret; - spin_unlock_bh(&(pmlmepriv->scanned_queue.lock)); + spin_unlock_bh(&pmlmepriv->scanned_queue.lock); select_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv); if (select_ret == _SUCCESS) { pmlmepriv->to_join = false; mod_timer(&pmlmepriv->assoc_timer, jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT)); } else { - if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) { /* submit createbss_cmd to change to a ADHOC_MASTER */ /* pmlmepriv->lock has been acquired by caller... */ - struct wlan_bssid_ex *pdev_network = &(padapter->registrypriv.dev_network); + struct wlan_bssid_ex *pdev_network = &padapter->registrypriv.dev_network; pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; @@ -136,16 +136,16 @@ u8 rtw_set_802_11_bssid(struct adapter *padapter, u8 *bssid) spin_lock_bh(&pmlmepriv->lock); DBG_88E("Set BSSID under fw_state = 0x%08x\n", get_fwstate(pmlmepriv)); - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) goto handle_tkip_countermeasure; else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) goto release_mlme_lock; - if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE)) { + if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE)) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_bssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); if (!memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN)) { - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == false) + if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE)) goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */ } else { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("Set BSSID not the same bssid\n")); @@ -154,12 +154,12 @@ u8 rtw_set_802_11_bssid(struct adapter *padapter, u8 *bssid) rtw_disassoc_cmd(padapter, 0, true); - if (check_fwstate(pmlmepriv, _FW_LINKED) == true) + if (check_fwstate(pmlmepriv, _FW_LINKED)) rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter); - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true)) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); } @@ -172,7 +172,7 @@ handle_tkip_countermeasure: if (padapter->securitypriv.btkip_countermeasure) { cur_time = jiffies; - if ((cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ) { + if (cur_time - padapter->securitypriv.btkip_countermeasure_time > 60 * HZ) { padapter->securitypriv.btkip_countermeasure = false; padapter->securitypriv.btkip_countermeasure_time = 0; } else { @@ -220,18 +220,18 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid) spin_lock_bh(&pmlmepriv->lock); DBG_88E("Set SSID under fw_state = 0x%08x\n", get_fwstate(pmlmepriv)); - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) goto handle_tkip_countermeasure; - else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == true) + else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) goto release_mlme_lock; - if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE)) { + if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE)) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); - if ((pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength) && - (!memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength))) { - if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == false)) { + if (pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength && + !memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength)) { + if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("Set SSID is the same ssid, fw_state = 0x%08x\n", get_fwstate(pmlmepriv))); @@ -240,12 +240,12 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid) /* if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again */ rtw_disassoc_cmd(padapter, 0, true); - if (check_fwstate(pmlmepriv, _FW_LINKED) == true) + if (check_fwstate(pmlmepriv, _FW_LINKED)) rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter); - if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); } @@ -262,12 +262,12 @@ u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid) rtw_disassoc_cmd(padapter, 0, true); - if (check_fwstate(pmlmepriv, _FW_LINKED) == true) + if (check_fwstate(pmlmepriv, _FW_LINKED)) rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter); - if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true) { + if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) { _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); } @@ -279,7 +279,7 @@ handle_tkip_countermeasure: if (padapter->securitypriv.btkip_countermeasure) { cur_time = jiffies; - if ((cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ) { + if (cur_time - padapter->securitypriv.btkip_countermeasure_time > 60 * HZ) { padapter->securitypriv.btkip_countermeasure = false; padapter->securitypriv.btkip_countermeasure_time = 0; } else { @@ -291,7 +291,7 @@ handle_tkip_countermeasure: memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(struct ndis_802_11_ssid)); pmlmepriv->assoc_by_bssid = false; - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) pmlmepriv->to_join = true; else status = rtw_do_join(padapter); @@ -308,9 +308,9 @@ exit: u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter, enum ndis_802_11_network_infra networktype) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wlan_network *cur_network = &pmlmepriv->cur_network; - enum ndis_802_11_network_infra *pold_state = &(cur_network->network.InfrastructureMode); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + enum ndis_802_11_network_infra *pold_state = &cur_network->network.InfrastructureMode; RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_, ("+rtw_set_802_11_infrastructure_mode: old =%d new =%d fw_state = 0x%08x\n", @@ -331,16 +331,17 @@ u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter, #endif } - if ((check_fwstate(pmlmepriv, _FW_LINKED)) || - (*pold_state == Ndis802_11IBSS)) + if (check_fwstate(pmlmepriv, _FW_LINKED) || + *pold_state == Ndis802_11IBSS) rtw_disassoc_cmd(padapter, 0, true); - if ((check_fwstate(pmlmepriv, _FW_LINKED)) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))) + if (check_fwstate(pmlmepriv, _FW_LINKED) || + check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) rtw_free_assoc_resources(padapter); - if ((*pold_state == Ndis802_11Infrastructure) || (*pold_state == Ndis802_11IBSS)) { - if (check_fwstate(pmlmepriv, _FW_LINKED) == true) + if (*pold_state == Ndis802_11Infrastructure || + *pold_state == Ndis802_11IBSS) { + if (check_fwstate(pmlmepriv, _FW_LINKED)) rtw_indicate_disconnect(padapter); /* will clr Linked_state; before this function, we must have checked whether issue dis-assoc_cmd or not */ } @@ -394,8 +395,8 @@ u8 rtw_set_802_11_disassociate(struct adapter *padapter) u8 rtw_set_802_11_bssid_list_scan(struct adapter *padapter, struct ndis_802_11_ssid *pssid, int ssid_max_num) { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - u8 res = true; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + u8 res = true; RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("+%s(), fw_state =%x\n", __func__, get_fwstate(pmlmepriv))); @@ -409,14 +410,14 @@ u8 rtw_set_802_11_bssid_list_scan(struct adapter *padapter, struct ndis_802_11_s goto exit; } - if ((check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)) || - (pmlmepriv->LinkDetectInfo.bBusyTraffic)) { + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING) || + pmlmepriv->LinkDetectInfo.bBusyTraffic) { /* Scan or linking is in progress, do nothing. */ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("%s fail since fw_state = %x\n", __func__, get_fwstate(pmlmepriv))); res = true; if (check_fwstate(pmlmepriv, - (_FW_UNDER_SURVEY|_FW_UNDER_LINKING)) == true) + _FW_UNDER_SURVEY | _FW_UNDER_LINKING)) RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n###_FW_UNDER_SURVEY|_FW_UNDER_LINKING\n\n")); else RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n###pmlmepriv->sitesurveyctrl.traffic_busy == true\n\n")); @@ -444,7 +445,8 @@ u8 rtw_set_802_11_authentication_mode(struct adapter *padapter, enum ndis_802_11 int res; u8 ret; - RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_802_11_auth.mode(): mode =%x\n", authmode)); + RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, + ("set_802_11_auth.mode(): mode =%x\n", authmode)); psecuritypriv->ndisauthtype = authmode; @@ -467,9 +469,9 @@ u8 rtw_set_802_11_authentication_mode(struct adapter *padapter, enum ndis_802_11 u8 rtw_set_802_11_add_wep(struct adapter *padapter, struct ndis_802_11_wep *wep) { - int keyid, res; - struct security_priv *psecuritypriv = &(padapter->securitypriv); - u8 ret = _SUCCESS; + int keyid, res; + struct security_priv *psecuritypriv = &padapter->securitypriv; + u8 ret = _SUCCESS; keyid = wep->KeyIndex & 0x3fffffff; @@ -497,7 +499,8 @@ u8 rtw_set_802_11_add_wep(struct adapter *padapter, struct ndis_802_11_wep *wep) ("rtw_set_802_11_add_wep:before memcpy, wep->KeyLength = 0x%x wep->KeyIndex = 0x%x keyid =%x\n", wep->KeyLength, wep->KeyIndex, keyid)); - memcpy(&(psecuritypriv->dot11DefKey[keyid].skey[0]), &(wep->KeyMaterial), wep->KeyLength); + memcpy(&psecuritypriv->dot11DefKey[keyid].skey[0], + &wep->KeyMaterial, wep->KeyLength); psecuritypriv->dot11DefKeylen[keyid] = wep->KeyLength; @@ -527,31 +530,27 @@ exit: return ret; } -/* -* rtw_get_cur_max_rate - -* @adapter: pointer to struct adapter structure -* -* Return 0 or 100Kbps -*/ +/* Return 0 or 100Kbps */ u16 rtw_get_cur_max_rate(struct adapter *adapter) { - int i = 0; - u8 *p; - u16 rate = 0, max_rate = 0; - struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + int i = 0; + u8 *p; + u16 rate = 0, max_rate = 0; + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; struct registry_priv *pregistrypriv = &adapter->registrypriv; - struct mlme_priv *pmlmepriv = &adapter->mlmepriv; - struct wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network; - u8 bw_40MHz = 0, short_GI_20 = 0, short_GI_40 = 0; - u32 ht_ielen = 0; + struct mlme_priv *pmlmepriv = &adapter->mlmepriv; + struct wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network; + u8 bw_40MHz = 0, short_GI_20 = 0, short_GI_40 = 0; + u32 ht_ielen = 0; - if ((!check_fwstate(pmlmepriv, _FW_LINKED)) && - (!check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))) + if (!check_fwstate(pmlmepriv, _FW_LINKED) && + !check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) return 0; - if (pmlmeext->cur_wireless_mode & (WIRELESS_11_24N|WIRELESS_11_5N)) { - p = rtw_get_ie(&pcur_bss->ies[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->ie_length-12); + if (pmlmeext->cur_wireless_mode & (WIRELESS_11_24N | WIRELESS_11_5N)) { + p = rtw_get_ie(&pcur_bss->ies[12], _HT_CAPABILITY_IE_, + &ht_ielen, pcur_bss->ie_length - 12); if (p && ht_ielen > 0) { /* cur_bwmod is updated by beacon, pmlmeinfo is updated by association response */ bw_40MHz = (pmlmeext->cur_bwmode && (HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH & pmlmeinfo->HT_info.infos[0])) ? 1 : 0; @@ -561,33 +560,28 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter) max_rate = rtw_mcs_rate( RF_1T1R, - bw_40MHz & (pregistrypriv->cbw40_enable), + bw_40MHz & pregistrypriv->cbw40_enable, short_GI_20, short_GI_40, pmlmeinfo->HT_caps.mcs.rx_mask ); } } else { - while ((pcur_bss->SupportedRates[i] != 0) && (pcur_bss->SupportedRates[i] != 0xFF)) { - rate = pcur_bss->SupportedRates[i]&0x7F; + while (pcur_bss->SupportedRates[i] != 0 && + pcur_bss->SupportedRates[i] != 0xFF) { + rate = pcur_bss->SupportedRates[i] & 0x7F; if (rate > max_rate) max_rate = rate; i++; } - max_rate = max_rate*10/2; + max_rate *= 5; } return max_rate; } -/* -* rtw_set_country - -* @adapter: pointer to struct adapter structure -* @country_code: string of country code -* -* Return _SUCCESS or _FAIL -*/ +/* Return _SUCCESS or _FAIL */ int rtw_set_country(struct adapter *adapter, const char *country_code) { int i; diff --git a/drivers/staging/rtl8188eu/core/rtw_led.c b/drivers/staging/rtl8188eu/core/rtw_led.c index cbef871a7679..a2e7789aecbd 100644 --- a/drivers/staging/rtl8188eu/core/rtw_led.c +++ b/drivers/staging/rtl8188eu/core/rtw_led.c @@ -18,7 +18,7 @@ static void BlinkTimerCallback(struct timer_list *t) struct LED_871x *pLed = from_timer(pLed, t, BlinkTimer); struct adapter *padapter = pLed->padapter; - if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped)) + if (padapter->bSurpriseRemoved || padapter->bDriverStopped) return; schedule_work(&pLed->BlinkWorkItem); @@ -95,10 +95,12 @@ static void SwLedBlink1(struct LED_871x *pLed) /* Change LED according to BlinkingLedState specified. */ if (pLed->BlinkingLedState == RTW_LED_ON) { SwLedOn(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); + RT_TRACE(_module_rtl8712_led_c_, _drv_info_, + ("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); } else { SwLedOff(padapter, pLed); - RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); + RT_TRACE(_module_rtl8712_led_c_, _drv_info_, + ("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); } if (padapter->pwrctrlpriv.rf_pwrstate != rf_on) { @@ -245,131 +247,134 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct case LED_CTL_POWER_ON: case LED_CTL_START_TO_LINK: case LED_CTL_NO_LINK: - if (!pLed->bLedNoLinkBlinkInProgress) { - if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) - return; - if (pLed->bLedLinkBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedLinkBlinkInProgress = false; - } - if (pLed->bLedBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedBlinkInProgress = false; - } - - pLed->bLedNoLinkBlinkInProgress = true; - pLed->CurrLedState = LED_BLINK_SLOWLY; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - mod_timer(&pLed->BlinkTimer, jiffies + - msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA)); + if (pLed->bLedNoLinkBlinkInProgress) + break; + if (pLed->CurrLedState == LED_BLINK_SCAN || + IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedLinkBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedLinkBlinkInProgress = false; + } + if (pLed->bLedBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedBlinkInProgress = false; } + pLed->bLedNoLinkBlinkInProgress = true; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + mod_timer(&pLed->BlinkTimer, jiffies + + msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA)); break; case LED_CTL_LINK: - if (!pLed->bLedLinkBlinkInProgress) { - if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) - return; - if (pLed->bLedNoLinkBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedNoLinkBlinkInProgress = false; - } - if (pLed->bLedBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedBlinkInProgress = false; - } - pLed->bLedLinkBlinkInProgress = true; - pLed->CurrLedState = LED_BLINK_NORMAL; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - mod_timer(&pLed->BlinkTimer, jiffies + - msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA)); + if (pLed->bLedLinkBlinkInProgress) + break; + if (pLed->CurrLedState == LED_BLINK_SCAN || + IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedNoLinkBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedNoLinkBlinkInProgress = false; + } + if (pLed->bLedBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedBlinkInProgress = false; } + pLed->bLedLinkBlinkInProgress = true; + pLed->CurrLedState = LED_BLINK_NORMAL; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + mod_timer(&pLed->BlinkTimer, jiffies + + msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA)); break; case LED_CTL_SITE_SURVEY: - if ((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED))) { - ; - } else if (!pLed->bLedScanBlinkInProgress) { - if (IS_LED_WPS_BLINKING(pLed)) - return; - if (pLed->bLedNoLinkBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedNoLinkBlinkInProgress = false; - } - if (pLed->bLedLinkBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedLinkBlinkInProgress = false; - } - if (pLed->bLedBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedBlinkInProgress = false; - } - pLed->bLedScanBlinkInProgress = true; - pLed->CurrLedState = LED_BLINK_SCAN; - pLed->BlinkTimes = 24; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - mod_timer(&pLed->BlinkTimer, jiffies + - msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA)); + if (pmlmepriv->LinkDetectInfo.bBusyTraffic && + check_fwstate(pmlmepriv, _FW_LINKED)) + break; + if (pLed->bLedScanBlinkInProgress) + break; + if (IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedNoLinkBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedNoLinkBlinkInProgress = false; + } + if (pLed->bLedLinkBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedLinkBlinkInProgress = false; + } + if (pLed->bLedBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedBlinkInProgress = false; } + pLed->bLedScanBlinkInProgress = true; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 24; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + mod_timer(&pLed->BlinkTimer, jiffies + + msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA)); break; case LED_CTL_TX: case LED_CTL_RX: - if (!pLed->bLedBlinkInProgress) { - if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) - return; - if (pLed->bLedNoLinkBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedNoLinkBlinkInProgress = false; - } - if (pLed->bLedLinkBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedLinkBlinkInProgress = false; - } - pLed->bLedBlinkInProgress = true; - pLed->CurrLedState = LED_BLINK_TXRX; - pLed->BlinkTimes = 2; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - mod_timer(&pLed->BlinkTimer, jiffies + - msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA)); + if (pLed->bLedBlinkInProgress) + break; + if (pLed->CurrLedState == LED_BLINK_SCAN || + IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedNoLinkBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedNoLinkBlinkInProgress = false; + } + if (pLed->bLedLinkBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedLinkBlinkInProgress = false; } + pLed->bLedBlinkInProgress = true; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + mod_timer(&pLed->BlinkTimer, jiffies + + msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA)); break; case LED_CTL_START_WPS: /* wait until xinpin finish */ case LED_CTL_START_WPS_BOTTON: - if (!pLed->bLedWPSBlinkInProgress) { - if (pLed->bLedNoLinkBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedNoLinkBlinkInProgress = false; - } - if (pLed->bLedLinkBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedLinkBlinkInProgress = false; - } - if (pLed->bLedBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedBlinkInProgress = false; - } - if (pLed->bLedScanBlinkInProgress) { - del_timer_sync(&pLed->BlinkTimer); - pLed->bLedScanBlinkInProgress = false; - } - pLed->bLedWPSBlinkInProgress = true; - pLed->CurrLedState = LED_BLINK_WPS; - if (pLed->bLedOn) - pLed->BlinkingLedState = RTW_LED_OFF; - else - pLed->BlinkingLedState = RTW_LED_ON; - mod_timer(&pLed->BlinkTimer, jiffies + - msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA)); + if (pLed->bLedWPSBlinkInProgress) + break; + if (pLed->bLedNoLinkBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedNoLinkBlinkInProgress = false; + } + if (pLed->bLedLinkBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedLinkBlinkInProgress = false; } + if (pLed->bLedBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedBlinkInProgress = false; + } + if (pLed->bLedScanBlinkInProgress) { + del_timer_sync(&pLed->BlinkTimer); + pLed->bLedScanBlinkInProgress = false; + } + pLed->bLedWPSBlinkInProgress = true; + pLed->CurrLedState = LED_BLINK_WPS; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + mod_timer(&pLed->BlinkTimer, jiffies + + msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA)); break; case LED_CTL_STOP_WPS: if (pLed->bLedNoLinkBlinkInProgress) { @@ -378,7 +383,7 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct } if (pLed->bLedLinkBlinkInProgress) { del_timer_sync(&pLed->BlinkTimer); - pLed->bLedLinkBlinkInProgress = false; + pLed->bLedLinkBlinkInProgress = false; } if (pLed->bLedBlinkInProgress) { del_timer_sync(&pLed->BlinkTimer); @@ -446,7 +451,8 @@ static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAct break; } - RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("Led %d\n", pLed->CurrLedState)); + RT_TRACE(_module_rtl8712_led_c_, _drv_info_, + ("Led %d\n", pLed->CurrLedState)); } /* */ @@ -457,7 +463,7 @@ void BlinkHandler(struct LED_871x *pLed) { struct adapter *padapter = pLed->padapter; - if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped)) + if (padapter->bSurpriseRemoved || padapter->bDriverStopped) return; SwLedBlink1(pLed); @@ -465,8 +471,8 @@ void BlinkHandler(struct LED_871x *pLed) void LedControl8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction) { - if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped) || - (!padapter->hw_init_completed)) + if (padapter->bSurpriseRemoved || padapter->bDriverStopped || + !padapter->hw_init_completed) return; if ((padapter->pwrctrlpriv.rf_pwrstate != rf_on && diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme.c b/drivers/staging/rtl8188eu/core/rtw_mlme.c index eca06f05c0c4..b9bd864f323c 100644 --- a/drivers/staging/rtl8188eu/core/rtw_mlme.c +++ b/drivers/staging/rtl8188eu/core/rtw_mlme.c @@ -20,7 +20,7 @@ #include <rtw_ioctl_set.h> #include <linux/vmalloc.h> -extern unsigned char MCS_rate_1R[16]; +extern const u8 MCS_rate_1R[16]; int rtw_init_mlme_priv(struct adapter *padapter) { @@ -228,7 +228,7 @@ int rtw_if_up(struct adapter *padapter) int res; if (padapter->bDriverStopped || padapter->bSurpriseRemoved || - (check_fwstate(&padapter->mlmepriv, _FW_LINKED) == false)) { + !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_if_up:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); @@ -305,7 +305,7 @@ static int is_same_ess(struct wlan_bssid_ex *a, struct wlan_bssid_ex *b) int is_same_network(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst) { - u16 s_cap, d_cap; + u16 s_cap, d_cap; __le16 le_scap, le_dcap; memcpy((u8 *)&le_scap, rtw_get_capability_from_ie(src->ies), 2); @@ -540,7 +540,7 @@ static int rtw_is_desired_network(struct adapter *adapter, struct wlan_network * /* TODO: Perry: For Power Management */ void rtw_atimdone_event_callback(struct adapter *adapter, u8 *pbuf) { - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("receive atimdone_evet\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("receive atimdone_event\n")); } void rtw_survey_event_callback(struct adapter *adapter, u8 *pbuf) @@ -578,7 +578,7 @@ void rtw_survey_event_callback(struct adapter *adapter, u8 *pbuf) } /* lock pmlmepriv->lock when you accessing network_q */ - if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == false) { + if (!check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) { if (pnetwork->Ssid.Ssid[0] == 0) pnetwork->Ssid.SsidLength = 0; rtw_add_network(adapter, pnetwork); @@ -615,7 +615,7 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf) if (pmlmepriv->to_join) { if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true)) { - if (check_fwstate(pmlmepriv, _FW_LINKED) == false) { + if (!check_fwstate(pmlmepriv, _FW_LINKED)) { set_fwstate(pmlmepriv, _FW_UNDER_LINKING); if (rtw_select_and_join_from_scanned_queue(pmlmepriv) == _SUCCESS) { @@ -828,29 +828,6 @@ inline void rtw_indicate_scan_done(struct adapter *padapter, bool aborted) rtw_os_indicate_scan_done(padapter, aborted); } -void rtw_scan_abort(struct adapter *adapter) -{ - unsigned long start; - struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); - - start = jiffies; - pmlmeext->scan_abort = true; - while (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) && - jiffies_to_msecs(jiffies - start) <= 200) { - if (adapter->bDriverStopped || adapter->bSurpriseRemoved) - break; - DBG_88E(FUNC_NDEV_FMT"fw_state=_FW_UNDER_SURVEY!\n", FUNC_NDEV_ARG(adapter->pnetdev)); - msleep(20); - } - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { - if (!adapter->bDriverStopped && !adapter->bSurpriseRemoved) - DBG_88E(FUNC_NDEV_FMT"waiting for scan_abort time out!\n", FUNC_NDEV_ARG(adapter->pnetdev)); - rtw_indicate_scan_done(adapter, true); - } - pmlmeext->scan_abort = false; -} - static struct sta_info *rtw_joinbss_update_stainfo(struct adapter *padapter, struct wlan_network *pnetwork) { int i; @@ -865,7 +842,7 @@ static struct sta_info *rtw_joinbss_update_stainfo(struct adapter *padapter, str if (psta) { /* update ptarget_sta */ DBG_88E("%s\n", __func__); psta->aid = pnetwork->join_res; - psta->mac_id = 0; + psta->mac_id = 0; /* sta mode */ rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, true); /* security related */ @@ -1061,12 +1038,12 @@ void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf) } /* s4. indicate connect */ - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { - rtw_indicate_connect(adapter); - } else { - /* adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback */ - RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("adhoc mode, fw_state:%x", get_fwstate(pmlmepriv))); - } + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) { + rtw_indicate_connect(adapter); + } else { + /* adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback */ + RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("adhoc mode, fw_state:%x", get_fwstate(pmlmepriv))); + } /* s5. Cancel assoc_timer */ del_timer_sync(&pmlmepriv->assoc_timer); @@ -1161,7 +1138,7 @@ void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf) struct wlan_network *cur_network = &(pmlmepriv->cur_network); struct wlan_network *ptarget_wlan = NULL; - if (rtw_access_ctrl(adapter, pstassoc->macaddr) == false) + if (!rtw_access_ctrl(adapter, pstassoc->macaddr)) return; #if defined(CONFIG_88EU_AP_MODE) @@ -1437,17 +1414,17 @@ static int rtw_check_join_candidate(struct mlme_priv *pmlmepriv /* check ssid, if needed */ if (pmlmepriv->assoc_ssid.SsidLength) { if (competitor->network.Ssid.SsidLength != pmlmepriv->assoc_ssid.SsidLength || - !memcmp(competitor->network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength) == false) + memcmp(competitor->network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) goto exit; } - if (rtw_is_desired_network(adapter, competitor) == false) + if (!rtw_is_desired_network(adapter, competitor)) goto exit; if (pmlmepriv->to_roaming) { since_scan = jiffies - competitor->last_scanned; if (jiffies_to_msecs(since_scan) >= RTW_SCAN_RESULT_EXPIRE || - is_same_ess(&competitor->network, &pmlmepriv->cur_network.network) == false) + !is_same_ess(&competitor->network, &pmlmepriv->cur_network.network)) goto exit; } @@ -1819,18 +1796,8 @@ void rtw_update_registrypriv_dev_network(struct adapter *adapter) case WIRELESS_11BG_24N: pdev_network->NetworkTypeInUse = Ndis802_11OFDM24; break; - case WIRELESS_11A: - case WIRELESS_11A_5N: - pdev_network->NetworkTypeInUse = Ndis802_11OFDM5; - break; - case WIRELESS_11ABGN: - if (pregistrypriv->channel > 14) - pdev_network->NetworkTypeInUse = Ndis802_11OFDM5; - else - pdev_network->NetworkTypeInUse = Ndis802_11OFDM24; - break; default: - /* TODO */ + pdev_network->NetworkTypeInUse = Ndis802_11OFDM24; break; } diff --git a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c index 1115050077e4..6790b840aef8 100644 --- a/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c +++ b/drivers/staging/rtl8188eu/core/rtw_mlme_ext.c @@ -39,7 +39,10 @@ extern unsigned char REALTEK_96B_IE[]; /******************************************************** MCS rate definitions *********************************************************/ -unsigned char MCS_rate_1R[16] = {0xff, 0x00, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; +const u8 MCS_rate_1R[16] = { + 0xff, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; /******************************************************** ChannelPlan definitions @@ -1513,7 +1516,7 @@ static int issue_deauth_ex(struct adapter *padapter, u8 *da, break; if (i < try_cnt && wait_ms > 0 && ret == _FAIL) - msleep(wait_ms); + mdelay(wait_ms); } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); if (ret != _FAIL) { @@ -2401,10 +2404,7 @@ static void process_80211d(struct adapter *padapter, struct wlan_bssid_ex *bssid p++; for (j = 0; j < noc; j++) { - if (fcn <= 14) - channel = fcn + j; /* 2.4 GHz */ - else - channel = fcn + j*4; /* 5 GHz */ + channel = fcn + j; chplan_ap.Channel[i++] = channel; } @@ -2481,14 +2481,6 @@ static void process_80211d(struct adapter *padapter, struct wlan_bssid_ex *bssid j++; } - /* keep original STA 5G channel plan */ - while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) { - chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; - chplan_new[k].ScanType = chplan_sta[i].ScanType; - i++; - k++; - } - pmlmeext->update_channel_plan_by_ap_done = 1; } @@ -2982,11 +2974,11 @@ static unsigned int OnAssocReq(struct adapter *padapter, /* checking SSID */ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SSID_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); - if (!p) - status = _STATS_FAILURE_; - if (ie_len == 0) { /* broadcast ssid, however it is not allowed in assocreq */ + if (!p || ie_len == 0) { + /* broadcast ssid, however it is not allowed in assocreq */ status = _STATS_FAILURE_; + goto OnAssocReqFail; } else { /* check if ssid match */ if (memcmp((void *)(p+2), cur->Ssid.Ssid, cur->Ssid.SsidLength)) @@ -3844,24 +3836,20 @@ Following are the initialization functions for WiFi MLME *****************************************************************************/ static struct mlme_handler mlme_sta_tbl[] = { - {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, - {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, - {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, - {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, - {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, - {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, - - /*---------------------------------------------------------- - below 2 are reserved - -----------------------------------------------------------*/ - {0, "DoReserved", &DoReserved}, - {0, "DoReserved", &DoReserved}, - {WIFI_BEACON, "OnBeacon", &OnBeacon}, - {WIFI_ATIM, "OnATIM", &OnAtim}, - {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, - {WIFI_AUTH, "OnAuth", &OnAuthClient}, - {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, - {WIFI_ACTION, "OnAction", &OnAction}, + {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, + {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, + {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, + {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, + {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, + {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, + {0, "DoReserved", &DoReserved}, + {0, "DoReserved", &DoReserved}, + {WIFI_BEACON, "OnBeacon", &OnBeacon}, + {WIFI_ATIM, "OnATIM", &OnAtim}, + {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, + {WIFI_AUTH, "OnAuth", &OnAuthClient}, + {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, + {WIFI_ACTION, "OnAction", &OnAction}, }; int init_hw_mlme_ext(struct adapter *padapter) @@ -3969,7 +3957,7 @@ static void init_channel_list(struct adapter *padapter, if (!has_channel(channel_set, chanset_size, ch)) continue; - if ((0 == padapter->registrypriv.ht_enable) && (8 == o->inc)) + if (!padapter->registrypriv.ht_enable && o->inc == 8) continue; if ((0 == (padapter->registrypriv.cbw40_enable & BIT(1))) && diff --git a/drivers/staging/rtl8188eu/core/rtw_pwrctrl.c b/drivers/staging/rtl8188eu/core/rtw_pwrctrl.c index 5ab6fc22a156..9764e85c000c 100644 --- a/drivers/staging/rtl8188eu/core/rtw_pwrctrl.c +++ b/drivers/staging/rtl8188eu/core/rtw_pwrctrl.c @@ -292,7 +292,7 @@ void rtw_set_rpwm(struct adapter *padapter, u8 pslv) pslv = PS_STATE_S3; } - if ((pwrpriv->rpwm == pslv)) { + if (pwrpriv->rpwm == pslv) { RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ("%s: Already set rpwm[0x%02X], new=0x%02X!\n", __func__, pwrpriv->rpwm, pslv)); return; @@ -344,7 +344,7 @@ static u8 PS_RDY_CHECK(struct adapter *padapter) if (delta_time < LPS_DELAY_TIME) return false; - if ((check_fwstate(pmlmepriv, _FW_LINKED) == false) || + if ((!check_fwstate(pmlmepriv, _FW_LINKED)) || (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) || (check_fwstate(pmlmepriv, WIFI_AP_STATE)) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) || @@ -352,7 +352,8 @@ static u8 PS_RDY_CHECK(struct adapter *padapter) return false; if (pwrpriv->bInSuspend) return false; - if ((padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) && (padapter->securitypriv.binstallGrpkey == false)) { + if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && + !padapter->securitypriv.binstallGrpkey) { DBG_88E("Group handshake still in progress !!!\n"); return false; } @@ -438,7 +439,7 @@ void LPS_Enter(struct adapter *padapter) { struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; - if (PS_RDY_CHECK(padapter) == false) + if (!PS_RDY_CHECK(padapter)) return; if (pwrpriv->bLeisurePs) { diff --git a/drivers/staging/rtl8188eu/core/rtw_recv.c b/drivers/staging/rtl8188eu/core/rtw_recv.c index 17b4b9257b49..dc447cc78c32 100644 --- a/drivers/staging/rtl8188eu/core/rtw_recv.c +++ b/drivers/staging/rtl8188eu/core/rtw_recv.c @@ -233,7 +233,7 @@ static int recvframe_chkmic(struct adapter *adapter, /* calculate mic code */ if (stainfo) { - if (IS_MCAST(prxattrib->ra)) { + if (is_multicast_ether_addr(prxattrib->ra)) { if (!psecuritypriv) { res = _FAIL; RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, @@ -321,11 +321,11 @@ static int recvframe_chkmic(struct adapter *adapter, /* double check key_index for some timing issue , */ /* cannot compare with psecuritypriv->dot118021XGrpKeyid also cause timing issue */ - if ((IS_MCAST(prxattrib->ra) == true) && (prxattrib->key_index != pmlmeinfo->key_index)) + if (is_multicast_ether_addr(prxattrib->ra) && prxattrib->key_index != pmlmeinfo->key_index) brpt_micerror = false; if ((prxattrib->bdecrypted) && (brpt_micerror)) { - rtw_handle_tkip_mic_err(adapter, (u8)IS_MCAST(prxattrib->ra)); + rtw_handle_tkip_mic_err(adapter, (u8)is_multicast_ether_addr(prxattrib->ra)); RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, (" mic error :prxattrib->bdecrypted=%d ", prxattrib->bdecrypted)); DBG_88E(" mic error :prxattrib->bdecrypted=%d\n", prxattrib->bdecrypted); } else { @@ -335,7 +335,7 @@ static int recvframe_chkmic(struct adapter *adapter, res = _FAIL; } else { /* mic checked ok */ - if ((!psecuritypriv->bcheck_grpkey) && (IS_MCAST(prxattrib->ra))) { + if (!psecuritypriv->bcheck_grpkey && is_multicast_ether_addr(prxattrib->ra)) { psecuritypriv->bcheck_grpkey = true; RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("psecuritypriv->bcheck_grpkey = true")); } @@ -488,7 +488,7 @@ static struct recv_frame *portctrl(struct adapter *adapter, prtnframe = precv_frame; } - return prtnframe; + return prtnframe; } static int recv_decache(struct recv_frame *precv_frame, u8 bretry, @@ -648,7 +648,7 @@ int sta2sta_data_frame(struct adapter *adapter, struct recv_frame *precv_frame, u8 *mybssid = get_bssid(pmlmepriv); u8 *myhwaddr = myid(&adapter->eeprompriv); u8 *sta_addr = NULL; - int bmcast = IS_MCAST(pattrib->dst); + bool mcast = is_multicast_ether_addr(pattrib->dst); if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true)) { @@ -659,7 +659,7 @@ int sta2sta_data_frame(struct adapter *adapter, struct recv_frame *precv_frame, goto exit; } - if ((memcmp(myhwaddr, pattrib->dst, ETH_ALEN)) && (!bmcast)) { + if (memcmp(myhwaddr, pattrib->dst, ETH_ALEN) && !mcast) { ret = _FAIL; goto exit; } @@ -681,9 +681,9 @@ int sta2sta_data_frame(struct adapter *adapter, struct recv_frame *precv_frame, } sta_addr = pattrib->bssid; } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { - if (bmcast) { + if (mcast) { /* For AP mode, if DA == MCAST, then BSSID should be also MCAST */ - if (!IS_MCAST(pattrib->bssid)) { + if (!is_multicast_ether_addr(pattrib->bssid)) { ret = _FAIL; goto exit; } @@ -700,7 +700,7 @@ int sta2sta_data_frame(struct adapter *adapter, struct recv_frame *precv_frame, ret = _FAIL; } - if (bmcast) + if (mcast) *psta = rtw_get_bcmc_stainfo(adapter); else *psta = rtw_get_stainfo(pstapriv, sta_addr); /* get ap_info */ @@ -727,7 +727,7 @@ static int ap2sta_data_frame( struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8 *mybssid = get_bssid(pmlmepriv); u8 *myhwaddr = myid(&adapter->eeprompriv); - int bmcast = IS_MCAST(pattrib->dst); + bool mcast = is_multicast_ether_addr(pattrib->dst); if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) && (check_fwstate(pmlmepriv, _FW_LINKED) == true || @@ -740,7 +740,7 @@ static int ap2sta_data_frame( } /* da should be for me */ - if ((memcmp(myhwaddr, pattrib->dst, ETH_ALEN)) && (!bmcast)) { + if (memcmp(myhwaddr, pattrib->dst, ETH_ALEN) && !mcast) { RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, (" %s: compare DA fail; DA=%pM\n", __func__, (pattrib->dst))); ret = _FAIL; @@ -755,7 +755,7 @@ static int ap2sta_data_frame( (" %s: compare BSSID fail ; BSSID=%pM\n", __func__, (pattrib->bssid))); RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("mybssid=%pM\n", (mybssid))); - if (!bmcast) { + if (!mcast) { DBG_88E("issue_deauth to the nonassociated ap=%pM for the reason(7)\n", (pattrib->bssid)); issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); } @@ -764,7 +764,7 @@ static int ap2sta_data_frame( goto exit; } - if (bmcast) + if (mcast) *psta = rtw_get_bcmc_stainfo(adapter); else *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get ap_info */ @@ -789,7 +789,7 @@ static int ap2sta_data_frame( ret = RTW_RX_HANDLED; goto exit; } else { - if (!memcmp(myhwaddr, pattrib->dst, ETH_ALEN) && (!bmcast)) { + if (!memcmp(myhwaddr, pattrib->dst, ETH_ALEN) && !mcast) { *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); /* get sta_info */ if (*psta == NULL) { DBG_88E("issue_deauth to the ap =%pM for the reason(7)\n", (pattrib->bssid)); @@ -1129,9 +1129,9 @@ static int validate_recv_data_frame(struct adapter *adapter, if (pattrib->privacy) { RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("%s:pattrib->privacy=%x\n", __func__, pattrib->privacy)); - RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("\n ^^^^^^^^^^^IS_MCAST(pattrib->ra(0x%02x))=%d^^^^^^^^^^^^^^^6\n", pattrib->ra[0], IS_MCAST(pattrib->ra))); + RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("\n ^^^^^^^^^^^is_multicast_ether_addr(pattrib->ra(0x%02x))=%d^^^^^^^^^^^^^^^6\n", pattrib->ra[0], is_multicast_ether_addr(pattrib->ra))); - GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, IS_MCAST(pattrib->ra)); + GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, is_multicast_ether_addr(pattrib->ra)); RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("\n pattrib->encrypt=%d\n", pattrib->encrypt)); @@ -1283,8 +1283,8 @@ static int wlanhdr_to_ethhdr(struct recv_frame *precvframe) psnap_type = ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; /* convert hdr + possible LLC headers into Ethernet header */ if ((!memcmp(psnap, rtw_rfc1042_header, SNAP_SIZE) && - (!memcmp(psnap_type, SNAP_ETH_TYPE_IPX, 2) == false) && - (!memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_AARP, 2) == false)) || + memcmp(psnap_type, SNAP_ETH_TYPE_IPX, 2) && + memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_AARP, 2)) || !memcmp(psnap, rtw_bridge_tunnel_header, SNAP_SIZE)) { /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ bsnaphdr = true; @@ -1971,7 +1971,8 @@ static int recv_func(struct adapter *padapter, struct recv_frame *rframe) if (ret == _SUCCESS) { /* check if need to enqueue into uc_swdec_pending_queue*/ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && - !IS_MCAST(prxattrib->ra) && prxattrib->encrypt > 0 && + !is_multicast_ether_addr(prxattrib->ra) && + prxattrib->encrypt > 0 && prxattrib->bdecrypted == 0 && !is_wep_enc(psecuritypriv->dot11PrivacyAlgrthm) && !psecuritypriv->busetkipkey) { @@ -2041,7 +2042,7 @@ static void rtw_signal_stat_timer_hdl(struct timer_list *t) } /* update value of signal_strength, rssi, signal_qual */ - if (check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) == false) { + if (!check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY)) { tmp_s = avg_signal_strength + (_alpha - 1) * recvpriv->signal_strength; tmp_s = DIV_ROUND_UP(tmp_s, _alpha); diff --git a/drivers/staging/rtl8188eu/core/rtw_security.c b/drivers/staging/rtl8188eu/core/rtw_security.c index 2a48b09ea9ae..f7407632e80b 100644 --- a/drivers/staging/rtl8188eu/core/rtw_security.c +++ b/drivers/staging/rtl8188eu/core/rtw_security.c @@ -353,7 +353,7 @@ void rtw_seccalctkipmic(u8 *key, u8 *header, u8 *data, u32 data_len, u8 *mic_cod /* Michael MIC pseudo header: DA, SA, 3 x 0, Priority */ if (header[1]&1) { /* ToDS == 1 */ - rtw_secmicappend(&micdata, &header[16], 6); /* DA */ + rtw_secmicappend(&micdata, &header[16], 6); /* DA */ if (header[1]&2) /* From Ds == 1 */ rtw_secmicappend(&micdata, &header[24], 6); else @@ -608,7 +608,7 @@ u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe) if (stainfo != NULL) { RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("%s: stainfo!= NULL!!!\n", __func__)); - if (IS_MCAST(pattrib->ra)) + if (is_multicast_ether_addr(pattrib->ra)) prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; else prwskey = &stainfo->dot118021x_UncstKey.skey[0]; @@ -678,7 +678,7 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe) if (prxattrib->encrypt == _TKIP_) { stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]); if (stainfo) { - if (IS_MCAST(prxattrib->ra)) { + if (is_multicast_ether_addr(prxattrib->ra)) { if (!psecuritypriv->binstallGrpkey) { res = _FAIL; DBG_88E("%s:rx bc/mc packets, but didn't install group key!!!!!!!!!!\n", __func__); @@ -1250,7 +1250,7 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe) if (stainfo) { RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("%s: stainfo!= NULL!!!\n", __func__)); - if (IS_MCAST(pattrib->ra)) + if (is_multicast_ether_addr(pattrib->ra)) prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; else prwskey = &stainfo->dot118021x_UncstKey.skey[0]; @@ -1273,8 +1273,7 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe) } } - - return res; + return res; } u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe) @@ -1296,7 +1295,7 @@ u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe) struct security_priv *psecuritypriv = &padapter->securitypriv; char iv[8], icv[8]; - if (IS_MCAST(prxattrib->ra)) { + if (is_multicast_ether_addr(prxattrib->ra)) { /* in concurrent we should use sw descrypt in group key, so we remove this message */ if (!psecuritypriv->binstallGrpkey) { res = _FAIL; diff --git a/drivers/staging/rtl8188eu/core/rtw_wlan_util.c b/drivers/staging/rtl8188eu/core/rtw_wlan_util.c index b9406583e501..3e05e2c7f61b 100644 --- a/drivers/staging/rtl8188eu/core/rtw_wlan_util.c +++ b/drivers/staging/rtl8188eu/core/rtw_wlan_util.c @@ -107,26 +107,20 @@ unsigned char networktype_to_raid(unsigned char network_type) u8 judge_network_type(struct adapter *padapter, unsigned char *rate, int ratelen) { u8 network_type = 0; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; - if (pmlmeext->cur_channel > 14) { - if (pmlmeinfo->HT_enable) - network_type = WIRELESS_11_5N; + if (pmlmeinfo->HT_enable) + network_type = WIRELESS_11_24N; - network_type |= WIRELESS_11A; - } else { - if (pmlmeinfo->HT_enable) - network_type = WIRELESS_11_24N; - - if ((cckratesonly_included(rate, ratelen)) == true) - network_type |= WIRELESS_11B; - else if ((cckrates_included(rate, ratelen)) == true) - network_type |= WIRELESS_11BG; - else - network_type |= WIRELESS_11G; - } - return network_type; + if (cckratesonly_included(rate, ratelen)) + network_type |= WIRELESS_11B; + else if (cckrates_included(rate, ratelen)) + network_type |= WIRELESS_11BG; + else + network_type |= WIRELESS_11G; + + return network_type; } static unsigned char ratetbl_val_2wifirate(unsigned char rate) @@ -460,9 +454,9 @@ void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key) void clear_cam_entry(struct adapter *padapter, u8 entry) { - unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; - unsigned char null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + u8 null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + u8 null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; write_cam(padapter, entry, 0, null_sta, null_key); } @@ -852,7 +846,7 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len) unsigned char ht_info_infos_0; int ssid_len; - if (is_client_associated_to_ap(Adapter) == false) + if (!is_client_associated_to_ap(Adapter)) return true; len = packet_len - sizeof(struct ieee80211_hdr_3addr); @@ -862,7 +856,7 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len) return _FAIL; } - if (!memcmp(cur_network->network.MacAddress, pbssid, 6) == false) { + if (memcmp(cur_network->network.MacAddress, pbssid, 6)) { DBG_88E("Oops: rtw_check_network_encrypt linked but recv other bssid bcn\n%pM %pM\n", (pbssid), (cur_network->network.MacAddress)); return true; @@ -1419,32 +1413,25 @@ void update_wireless_mode(struct adapter *padapter) { int ratelen, network_type = 0; u32 SIFS_Timer; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); - unsigned char *rate = cur_network->SupportedRates; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; + unsigned char *rate = cur_network->SupportedRates; ratelen = rtw_get_rateset_len(cur_network->SupportedRates); - if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) + if (pmlmeinfo->HT_info_enable && pmlmeinfo->HT_caps_enable) pmlmeinfo->HT_enable = 1; - if (pmlmeext->cur_channel > 14) { - if (pmlmeinfo->HT_enable) - network_type = WIRELESS_11_5N; + if (pmlmeinfo->HT_enable) + network_type = WIRELESS_11_24N; - network_type |= WIRELESS_11A; - } else { - if (pmlmeinfo->HT_enable) - network_type = WIRELESS_11_24N; - - if ((cckratesonly_included(rate, ratelen)) == true) - network_type |= WIRELESS_11B; - else if ((cckrates_included(rate, ratelen)) == true) - network_type |= WIRELESS_11BG; - else - network_type |= WIRELESS_11G; - } + if (cckratesonly_included(rate, ratelen)) + network_type |= WIRELESS_11B; + else if (cckrates_included(rate, ratelen)) + network_type |= WIRELESS_11BG; + else + network_type |= WIRELESS_11G; pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode; diff --git a/drivers/staging/rtl8188eu/core/rtw_xmit.c b/drivers/staging/rtl8188eu/core/rtw_xmit.c index 2130d78e0d9f..0a3e710590ed 100644 --- a/drivers/staging/rtl8188eu/core/rtw_xmit.c +++ b/drivers/staging/rtl8188eu/core/rtw_xmit.c @@ -77,8 +77,6 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter) goto exit; } pxmitpriv->pxmit_frame_buf = PTR_ALIGN(pxmitpriv->pallocated_frame_buf, 4); - /* pxmitpriv->pxmit_frame_buf = pxmitpriv->pallocated_frame_buf + 4 - */ - /* ((size_t) (pxmitpriv->pallocated_frame_buf) &3); */ pxframe = (struct xmit_frame *)pxmitpriv->pxmit_frame_buf; @@ -115,8 +113,6 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter) } pxmitpriv->pxmitbuf = PTR_ALIGN(pxmitpriv->pallocated_xmitbuf, 4); - /* pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 - */ - /* ((size_t) (pxmitpriv->pallocated_xmitbuf) &3); */ pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; @@ -254,10 +250,12 @@ static void update_attrib_vcs_info(struct adapter *padapter, struct xmit_frame * else /* no frag */ sz = pattrib->last_txcmdsz; - /* (1) RTS_Threshold is compared to the MPDU, not MSDU. */ - /* (2) If there are more than one frag in this MSDU, only the first frag uses protection frame. */ - /* Other fragments are protected by previous fragment. */ - /* So we only need to check the length of first fragment. */ + /* (1) RTS_Threshold is compared to the MPDU, not MSDU. + * (2) If there are more than one frag in this MSDU, + * only the first frag uses protection frame. + * Other fragments are protected by previous fragment. + * So we only need to check the length of first fragment. + */ if (pmlmeext->cur_wireless_mode < WIRELESS_11_24N || padapter->registrypriv.wifi_spec) { if (sz > padapter->registrypriv.rts_thresh) { pattrib->vcs_mode = RTS_CTS; @@ -321,13 +319,6 @@ static void update_attrib_vcs_info(struct adapter *padapter, struct xmit_frame * static void update_attrib_phy_info(struct pkt_attrib *pattrib, struct sta_info *psta) { - /*if (psta->rtsen) - pattrib->vcs_mode = RTS_CTS; - else if (psta->cts2self) - pattrib->vcs_mode = CTS_TO_SELF; - else - pattrib->vcs_mode = NONE_VCS;*/ - pattrib->mdata = 0; pattrib->eosp = 0; pattrib->triggered = 0; @@ -344,9 +335,9 @@ static void update_attrib_phy_info(struct pkt_attrib *pattrib, struct sta_info * pattrib->retry_ctrl = false; } -u8 qos_acm(u8 acm_mask, u8 priority) +u8 qos_acm(u8 acm_mask, u8 priority) { - u8 change_priority = priority; + u8 change_priority = priority; switch (priority) { case 0: @@ -368,7 +359,8 @@ u8 qos_acm(u8 acm_mask, u8 priority) change_priority = 5; break; default: - DBG_88E("qos_acm(): invalid pattrib->priority: %d!!!\n", priority); + DBG_88E("%s(): invalid pattrib->priority: %d!!!\n", + __func__, priority); break; } @@ -383,8 +375,10 @@ static void set_qos(struct sk_buff *skb, struct pkt_attrib *pattrib) skb_copy_bits(skb, ETH_HLEN, &ip_hdr, sizeof(ip_hdr)); pattrib->priority = ip_hdr.tos >> 5; } else if (pattrib->ether_type == ETH_P_PAE) { - /* "When priority processing of data frames is supported, */ - /* a STA's SME should send EAPOL-Key frames at the highest priority." */ + /* When priority processing of data frames is supported, + * a STA's SME should send EAPOL-Key frames at the highest + * priority. + */ pattrib->priority = 7; } else { pattrib->priority = 0; @@ -399,7 +393,7 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p struct sta_info *psta = NULL; struct ethhdr etherhdr; - int bmcast; + bool mcast; struct sta_priv *pstapriv = &padapter->stapriv; struct security_priv *psecuritypriv = &padapter->securitypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; @@ -430,8 +424,10 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p pattrib->pktlen = pkt->len - ETH_HLEN; if (pattrib->ether_type == ETH_P_IP) { - /* The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time */ - /* to prevent DHCP protocol fail */ + /* The following is for DHCP and ARP packet, we use + * cck1M to tx these packets and let LPS awake some + * time to prevent DHCP protocol fail. + */ u8 tmp[24]; skb_copy_bits(pkt, ETH_HLEN, tmp, 24); @@ -460,10 +456,10 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p if ((pattrib->ether_type == ETH_P_ARP) || (pattrib->ether_type == ETH_P_PAE) || (pattrib->dhcp_pkt == 1)) rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1); - bmcast = IS_MCAST(pattrib->ra); + mcast = is_multicast_ether_addr(pattrib->ra); /* get sta_info */ - if (bmcast) { + if (mcast) { psta = rtw_get_bcmc_stainfo(padapter); } else { psta = rtw_get_stainfo(pstapriv, pattrib->ra); @@ -494,7 +490,8 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p pattrib->subtype = WIFI_DATA_TYPE; pattrib->priority = 0; - if (check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) { + if (check_fwstate(pmlmepriv, WIFI_AP_STATE | + WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) { if (psta->qos_option) set_qos(pkt, pattrib); } else { @@ -517,7 +514,7 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p goto exit; } } else { - GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast); + GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, mcast); switch (psecuritypriv->dot11AuthAlgrthm) { case dot11AuthAlgrthm_Open: @@ -526,7 +523,7 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex; break; case dot11AuthAlgrthm_8021X: - if (bmcast) + if (mcast) pattrib->key_idx = (u8)psecuritypriv->dot118021XGrpKeyid; else pattrib->key_idx = 0; @@ -596,7 +593,6 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr struct xmit_priv *pxmitpriv = &padapter->xmitpriv; u8 priority[4] = {0x0, 0x0, 0x0, 0x0}; u8 hw_hdr_offset = 0; - int bmcst = IS_MCAST(pattrib->ra); if (pattrib->psta) stainfo = pattrib->psta; @@ -605,7 +601,7 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr hw_hdr_offset = TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); - if (pattrib->encrypt == _TKIP_) {/* if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_PRIVACY_) */ + if (pattrib->encrypt == _TKIP_) { /* encode mic code */ if (stainfo) { u8 null_key[16] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, @@ -614,30 +610,27 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr pframe = pxmitframe->buf_addr + hw_hdr_offset; - if (bmcst) { + if (is_multicast_ether_addr(pattrib->ra)) { if (!memcmp(psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey, null_key, 16)) return _FAIL; /* start to calculate the mic code */ rtw_secmicsetkey(&micdata, psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey); } else { - if (!memcmp(&stainfo->dot11tkiptxmickey.skey[0], null_key, 16)) { - /* DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey == 0\n"); */ - /* msleep(10); */ + if (!memcmp(&stainfo->dot11tkiptxmickey.skey[0], null_key, 16)) return _FAIL; - } /* start to calculate the mic code */ rtw_secmicsetkey(&micdata, &stainfo->dot11tkiptxmickey.skey[0]); } - if (pframe[1]&1) { /* ToDS == 1 */ + if (pframe[1] & 1) { /* ToDS == 1 */ rtw_secmicappend(&micdata, &pframe[16], 6); /* DA */ - if (pframe[1]&2) /* From Ds == 1 */ + if (pframe[1] & 2) /* From Ds == 1 */ rtw_secmicappend(&micdata, &pframe[24], 6); else rtw_secmicappend(&micdata, &pframe[10], 6); } else { /* ToDS == 0 */ rtw_secmicappend(&micdata, &pframe[4], 6); /* DA */ - if (pframe[1]&2) /* From Ds == 1 */ + if (pframe[1] & 2) /* From Ds == 1 */ rtw_secmicappend(&micdata, &pframe[16], 6); else rtw_secmicappend(&micdata, &pframe[10], 6); @@ -654,23 +647,31 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr payload = (u8 *)round_up((size_t)(payload), 4); RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("=== curfragnum=%d, pframe = 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x,!!!\n", - curfragnum, *payload, *(payload+1), - *(payload+2), *(payload+3), - *(payload+4), *(payload+5), - *(payload+6), *(payload+7))); + curfragnum, *payload, *(payload + 1), + *(payload + 2), *(payload + 3), + *(payload + 4), *(payload + 5), + *(payload + 6), *(payload + 7))); - payload = payload+pattrib->hdrlen+pattrib->iv_len; + payload += pattrib->hdrlen + pattrib->iv_len; RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("curfragnum=%d pattrib->hdrlen=%d pattrib->iv_len=%d", curfragnum, pattrib->hdrlen, pattrib->iv_len)); - if ((curfragnum+1) == pattrib->nr_frags) { - length = pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len-((pattrib->bswenc) ? pattrib->icv_len : 0); + if (curfragnum + 1 == pattrib->nr_frags) { + length = pattrib->last_txcmdsz - + pattrib->hdrlen - + pattrib->iv_len - + ((pattrib->bswenc) ? + pattrib->icv_len : 0); rtw_secmicappend(&micdata, payload, length); - payload = payload+length; + payload += length; } else { - length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-((pattrib->bswenc) ? pattrib->icv_len : 0); + length = pxmitpriv->frag_len - + pattrib->hdrlen - + pattrib->iv_len - + ((pattrib->bswenc) ? + pattrib->icv_len : 0); rtw_secmicappend(&micdata, payload, length); - payload = payload+length+pattrib->icv_len; + payload += length + pattrib->icv_len; RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("curfragnum=%d length=%d pattrib->icv_len=%d", curfragnum, length, pattrib->icv_len)); } } @@ -686,8 +687,8 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr pattrib->last_txcmdsz += 8; RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("\n ======== last pkt ========\n")); - payload = payload-pattrib->last_txcmdsz+8; - for (curfragnum = 0; curfragnum < pattrib->last_txcmdsz; curfragnum = curfragnum+8) + payload -= pattrib->last_txcmdsz + 8; + for (curfragnum = 0; curfragnum < pattrib->last_txcmdsz; curfragnum += 8) RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, (" %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x ", *(payload + curfragnum), *(payload + curfragnum + 1), @@ -743,12 +744,10 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr struct sta_info *psta; - int bmcst = IS_MCAST(pattrib->ra); - if (pattrib->psta) { psta = pattrib->psta; } else { - if (bmcst) + if (is_multicast_ether_addr(pattrib->ra)) psta = rtw_get_bcmc_stainfo(padapter); else psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); @@ -836,11 +835,11 @@ s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattr if (SN_LESS(pattrib->seqnum, tx_seq)) { pattrib->ampdu_en = false;/* AGG BK */ } else if (SN_EQUAL(pattrib->seqnum, tx_seq)) { - psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq+1)&0xfff; + psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq + 1) & 0xfff; pattrib->ampdu_en = true;/* AGG EN */ } else { - psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum+1)&0xfff; + psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum + 1) & 0xfff; pattrib->ampdu_en = true;/* AGG EN */ } } @@ -856,9 +855,9 @@ s32 rtw_txframes_pending(struct adapter *padapter) struct xmit_priv *pxmitpriv = &padapter->xmitpriv; return (!list_empty(&pxmitpriv->be_pending.queue) || - !list_empty(&pxmitpriv->bk_pending.queue) || - !list_empty(&pxmitpriv->vi_pending.queue) || - !list_empty(&pxmitpriv->vo_pending.queue)); + !list_empty(&pxmitpriv->bk_pending.queue) || + !list_empty(&pxmitpriv->vi_pending.queue) || + !list_empty(&pxmitpriv->vo_pending.queue)); } s32 rtw_txframes_sta_ac_pending(struct adapter *padapter, struct pkt_attrib *pattrib) @@ -914,7 +913,7 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; u8 *pbuf_start; - s32 bmcst = IS_MCAST(pattrib->ra); + bool mcast = is_multicast_ether_addr(pattrib->ra); s32 res = _SUCCESS; size_t remainder = pkt->len - ETH_HLEN; @@ -964,13 +963,13 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); break; case _TKIP_: - if (bmcst) + if (mcast) TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); else TKIP_IV(pattrib->iv, psta->dot11txpn, 0); break; case _AES_: - if (bmcst) + if (mcast) AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); else AES_IV(pattrib->iv, psta->dot11txpn, 0); @@ -981,7 +980,10 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct RT_TRACE(_module_rtl871x_xmit_c_, _drv_notice_, ("%s: keyid=%d pattrib->iv[3]=%.2x pframe=%.2x %.2x %.2x %.2x\n", - __func__, padapter->securitypriv.dot11PrivacyKeyIndex, pattrib->iv[3], *pframe, *(pframe+1), *(pframe+2), *(pframe+3))); + __func__, + padapter->securitypriv.dot11PrivacyKeyIndex, + pattrib->iv[3], *pframe, *(pframe + 1), + *(pframe + 2), *(pframe + 3))); pframe += pattrib->iv_len; @@ -997,7 +999,7 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct if ((pattrib->icv_len > 0) && (pattrib->bswenc)) mpdu_len -= pattrib->icv_len; - mem_sz = min_t(size_t, bmcst ? pattrib->pktlen : mpdu_len, remainder); + mem_sz = min_t(size_t, mcast ? pattrib->pktlen : mpdu_len, remainder); skb_copy_bits(pkt, pkt->len - remainder, pframe, mem_sz); remainder -= mem_sz; @@ -1010,7 +1012,7 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct frg_inx++; - if (bmcst || remainder == 0) { + if (mcast || remainder == 0) { pattrib->nr_frags = frg_inx; pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + ((pattrib->nr_frags == 1) ? llc_sz : 0) + @@ -1041,7 +1043,7 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct xmitframe_swencrypt(padapter, pxmitframe); - if (!bmcst) + if (!mcast) update_attrib_vcs_info(padapter, pxmitframe); else pattrib->vcs_mode = NONE_VCS; @@ -1121,7 +1123,7 @@ void rtw_count_tx_stats(struct adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) { + if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) { pxmitpriv->tx_bytes += sz; pmlmepriv->LinkDetectInfo.NumTxOkInPeriod += pxmitframe->agg_num; @@ -1147,7 +1149,6 @@ struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv) list_del_init(&pxmitbuf->list); pxmitpriv->free_xmit_extbuf_cnt--; pxmitbuf->priv_data = NULL; - /* pxmitbuf->ext_tag = true; */ if (pxmitbuf->sctx) { DBG_88E("%s pxmitbuf->sctx is not NULL\n", __func__); rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); @@ -1184,8 +1185,6 @@ struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv) struct xmit_buf *pxmitbuf; struct __queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; - /* DBG_88E("+rtw_alloc_xmitbuf\n"); */ - spin_lock_irqsave(&pfree_xmitbuf_queue->lock, irql); pxmitbuf = list_first_entry_or_null(&pfree_xmitbuf_queue->queue, struct xmit_buf, list); @@ -1276,7 +1275,6 @@ struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv) pxframe->pxmitbuf = NULL; memset(&pxframe->attrib, 0, sizeof(struct pkt_attrib)); - /* pxframe->attrib.psta = NULL; */ pxframe->frame_tag = DATA_FRAMETAG; @@ -1350,7 +1348,6 @@ s32 rtw_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitfram if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL) { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("%s: drop xmit pkt for classifier fail\n", __func__)); -/* pxmitframe->pkt = NULL; */ return _FAIL; } @@ -1429,7 +1426,8 @@ exit: return pxmitframe; } -struct tx_servq *rtw_get_sta_pending(struct adapter *padapter, struct sta_info *psta, int up, u8 *ac) +struct tx_servq *rtw_get_sta_pending(struct adapter *padapter, + struct sta_info *psta, int up, u8 *ac) { struct tx_servq *ptxservq; @@ -1438,26 +1436,30 @@ struct tx_servq *rtw_get_sta_pending(struct adapter *padapter, struct sta_info * case 2: ptxservq = &psta->sta_xmitpriv.bk_q; *(ac) = 3; - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("%s : BK\n", __func__)); + RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, + ("%s : BK\n", __func__)); break; case 4: case 5: ptxservq = &psta->sta_xmitpriv.vi_q; *(ac) = 1; - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("%s : VI\n", __func__)); + RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, + ("%s : VI\n", __func__)); break; case 6: case 7: ptxservq = &psta->sta_xmitpriv.vo_q; *(ac) = 0; - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("%s : VO\n", __func__)); + RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, + ("%s : VO\n", __func__)); break; case 0: case 3: default: ptxservq = &psta->sta_xmitpriv.be_q; *(ac) = 2; - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("%s : BE\n", __func__)); + RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, + ("%s : BE\n", __func__)); break; } @@ -1617,7 +1619,7 @@ s32 rtw_xmit(struct adapter *padapter, struct sk_buff **ppkt) spin_unlock_bh(&pxmitpriv->lock); #endif - if (rtw_hal_xmit(padapter, pxmitframe) == false) + if (!rtw_hal_xmit(padapter, pxmitframe)) return 1; return 0; @@ -1632,9 +1634,9 @@ int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_fra struct sta_priv *pstapriv = &padapter->stapriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - int bmcst = IS_MCAST(pattrib->ra); + bool mcast = is_multicast_ether_addr(pattrib->ra); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == false) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return ret; if (pattrib->psta) @@ -1646,12 +1648,12 @@ int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_fra return ret; if (pattrib->triggered == 1) { - if (bmcst) + if (mcast) pattrib->qsel = 0x11;/* HIQ */ return ret; } - if (bmcst) { + if (mcast) { spin_lock_bh(&psta->sleep_q.lock); if (pstapriv->sta_dz_bitmap) {/* if any one sta is in ps mode */ @@ -1676,10 +1678,10 @@ int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_fra spin_lock_bh(&psta->sleep_q.lock); - if (psta->state&WIFI_SLEEP_STATE) { + if (psta->state & WIFI_SLEEP_STATE) { u8 wmmps_ac = 0; - if (pstapriv->sta_dz_bitmap&BIT(psta->aid)) { + if (pstapriv->sta_dz_bitmap & BIT(psta->aid)) { list_del_init(&pxmitframe->list); list_add_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); @@ -1773,21 +1775,26 @@ void stop_sta_xmit(struct adapter *padapter, struct sta_info *psta) pstapriv->sta_dz_bitmap |= BIT(psta->aid); - dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vo_q.sta_pending); + dequeue_xmitframes_to_sleeping_queue(padapter, psta, + &pstaxmitpriv->vo_q.sta_pending); list_del_init(&pstaxmitpriv->vo_q.tx_pending); - dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vi_q.sta_pending); + dequeue_xmitframes_to_sleeping_queue(padapter, psta, + &pstaxmitpriv->vi_q.sta_pending); list_del_init(&pstaxmitpriv->vi_q.tx_pending); - dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->be_q.sta_pending); + dequeue_xmitframes_to_sleeping_queue(padapter, psta, + &pstaxmitpriv->be_q.sta_pending); list_del_init(&pstaxmitpriv->be_q.tx_pending); - dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->bk_q.sta_pending); + dequeue_xmitframes_to_sleeping_queue(padapter, psta, + &pstaxmitpriv->bk_q.sta_pending); list_del_init(&pstaxmitpriv->bk_q.tx_pending); /* for BC/MC Frames */ pstaxmitpriv = &psta_bmc->sta_xmitpriv; - dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->be_q.sta_pending); + dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, + &pstaxmitpriv->be_q.sta_pending); list_del_init(&pstaxmitpriv->be_q.tx_pending); spin_unlock_bh(&pxmitpriv->lock); @@ -1863,7 +1870,7 @@ void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta) update_mask = BIT(0); - if (psta->state&WIFI_SLEEP_STATE) + if (psta->state & WIFI_SLEEP_STATE) psta->state ^= WIFI_SLEEP_STATE; if (psta->state & WIFI_STA_ALIVE_CHK_STATE) { @@ -1881,7 +1888,7 @@ void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta) if (!psta_bmc) return; - if ((pstapriv->sta_dz_bitmap&0xfffe) == 0x0) { /* no any sta in ps mode */ + if ((pstapriv->sta_dz_bitmap & 0xfffe) == 0x0) { /* no any sta in ps mode */ spin_lock_bh(&psta_bmc->sleep_q.lock); xmitframe_phead = get_list_head(&psta_bmc->sleep_q); diff --git a/drivers/staging/rtl8188eu/hal/bb_cfg.c b/drivers/staging/rtl8188eu/hal/bb_cfg.c index 1862c1396c85..11e0bb9c67d7 100644 --- a/drivers/staging/rtl8188eu/hal/bb_cfg.c +++ b/drivers/staging/rtl8188eu/hal/bb_cfg.c @@ -1,9 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 /****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -******************************************************************************/ + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + ******************************************************************************/ #include "odm_precomp.h" diff --git a/drivers/staging/rtl8188eu/hal/fw.c b/drivers/staging/rtl8188eu/hal/fw.c index 1b8341f40995..486ee4bd4744 100644 --- a/drivers/staging/rtl8188eu/hal/fw.c +++ b/drivers/staging/rtl8188eu/hal/fw.c @@ -98,9 +98,9 @@ static void rtl88e_firmware_selfreset(struct adapter *adapt) { u8 u1b_tmp; - u1b_tmp = usb_read8(adapt, REG_SYS_FUNC_EN+1); - usb_write8(adapt, REG_SYS_FUNC_EN+1, (u1b_tmp & (~BIT(2)))); - usb_write8(adapt, REG_SYS_FUNC_EN+1, (u1b_tmp | BIT(2))); + u1b_tmp = usb_read8(adapt, REG_SYS_FUNC_EN + 1); + usb_write8(adapt, REG_SYS_FUNC_EN + 1, (u1b_tmp & (~BIT(2)))); + usb_write8(adapt, REG_SYS_FUNC_EN + 1, (u1b_tmp | BIT(2))); } static int _rtl88e_fw_free_to_go(struct adapter *adapt) diff --git a/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c b/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c index 464c11710398..6dbd7d261f1e 100644 --- a/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c +++ b/drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c @@ -418,14 +418,16 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf } else { pRaInfo->LowestRate = 0; } - if (pRaInfo->HighestRate > 0x13) - pRaInfo->PTModeSS = 3; - else if (pRaInfo->HighestRate > 0x0b) - pRaInfo->PTModeSS = 2; - else if (pRaInfo->HighestRate > 0x0b) - pRaInfo->PTModeSS = 1; - else - pRaInfo->PTModeSS = 0; + + if (pRaInfo->HighestRate > 0x13) + pRaInfo->PTModeSS = 3; + else if (pRaInfo->HighestRate > 0x0b) + pRaInfo->PTModeSS = 2; + else if (pRaInfo->HighestRate > 0x0b) + pRaInfo->PTModeSS = 1; + else + pRaInfo->PTModeSS = 0; + ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ODM_ARFBRefresh_8188E(): PTModeSS =%d\n", pRaInfo->PTModeSS)); diff --git a/drivers/staging/rtl8188eu/hal/hal_com.c b/drivers/staging/rtl8188eu/hal/hal_com.c index 7202e1767fc0..ff481fbd074c 100644 --- a/drivers/staging/rtl8188eu/hal/hal_com.c +++ b/drivers/staging/rtl8188eu/hal/hal_com.c @@ -45,9 +45,8 @@ void dump_chip_info(struct HAL_VERSION chip_vers) #define CHAN_PLAN_HW 0x80 /* return the final channel plan decision */ -u8 hal_com_get_channel_plan(struct adapter *padapter, u8 hw_channel_plan, - u8 sw_channel_plan, u8 def_channel_plan, - bool load_fail) +u8 hal_com_get_channel_plan(u8 hw_channel_plan, u8 sw_channel_plan, + u8 def_channel_plan, bool load_fail) { u8 sw_cfg; u8 chnlplan; @@ -119,7 +118,7 @@ u8 MRateToHwRate(u8 rate) return ret; } -void HalSetBrateCfg(struct adapter *adapt, u8 *brates, u16 *rate_cfg) +void hal_set_brate_cfg(u8 *brates, u16 *rate_cfg) { u8 i, is_brate, brate; @@ -263,10 +262,10 @@ static void three_out_pipe(struct adapter *adapter, bool wifi_cfg) } } -bool Hal_MappingOutPipe(struct adapter *adapter, u8 numoutpipe) +bool hal_mapping_out_pipe(struct adapter *adapter, u8 numoutpipe) { struct registry_priv *pregistrypriv = &adapter->registrypriv; - bool wifi_cfg = (pregistrypriv->wifi_spec) ? true : false; + bool wifi_cfg = (pregistrypriv->wifi_spec) ? true : false; bool result = true; switch (numoutpipe) { diff --git a/drivers/staging/rtl8188eu/hal/odm.c b/drivers/staging/rtl8188eu/hal/odm.c index 9d567838a43a..4ab490c1c13b 100644 --- a/drivers/staging/rtl8188eu/hal/odm.c +++ b/drivers/staging/rtl8188eu/hal/odm.c @@ -418,7 +418,7 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) /* 1 Modify DIG lower bound, deal with abnormally large false alarm */ if (pFalseAlmCnt->Cnt_all > 10000) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case.\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnormally false alarm case.\n")); if (pDM_DigTable->LargeFAHit != 3) pDM_DigTable->LargeFAHit++; @@ -768,22 +768,7 @@ u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u return rate_bitmap; } -/*----------------------------------------------------------------------------- - * Function: odm_RefreshRateAdaptiveMask() - * - * Overview: Update rate table mask according to rssi - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 05/27/2009 hpfan Create Version 0. - * - *---------------------------------------------------------------------------*/ +/* Update rate table mask according to rssi */ void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) { if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) @@ -1074,7 +1059,7 @@ void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */ + if (pregpriv->wifi_spec == 1) /* (pmlmeinfo->HT_enable == 0)) */ goto dm_CheckEdcaTurbo_EXIT; if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX) diff --git a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c b/drivers/staging/rtl8188eu/hal/odm_hwconfig.c index 0464dc41f860..82d6b2e18b29 100644 --- a/drivers/staging/rtl8188eu/hal/odm_HWConfig.c +++ b/drivers/staging/rtl8188eu/hal/odm_hwconfig.c @@ -14,52 +14,48 @@ #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm)) #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm)) -static u8 odm_QueryRxPwrPercentage(s8 AntPower) +static u8 odm_query_rxpwrpercentage(s8 antpower) { - if ((AntPower <= -100) || (AntPower >= 20)) - return 0; - else if (AntPower >= 0) - return 100; + if ((antpower <= -100) || (antpower >= 20)) + return 0; + else if (antpower >= 0) + return 100; else - return 100+AntPower; + return 100 + antpower; } /* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */ /* IF other SW team do not support the feature, remove this section.?? */ -static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig) +static s32 odm_signal_scale_mapping(struct odm_dm_struct *dm_odm, s32 currsig) { - s32 RetSig = 0; - - if (CurrSig >= 51 && CurrSig <= 100) - RetSig = 100; - else if (CurrSig >= 41 && CurrSig <= 50) - RetSig = 80 + ((CurrSig - 40)*2); - else if (CurrSig >= 31 && CurrSig <= 40) - RetSig = 66 + (CurrSig - 30); - else if (CurrSig >= 21 && CurrSig <= 30) - RetSig = 54 + (CurrSig - 20); - else if (CurrSig >= 10 && CurrSig <= 20) - RetSig = 42 + (((CurrSig - 10) * 2) / 3); - else if (CurrSig >= 5 && CurrSig <= 9) - RetSig = 22 + (((CurrSig - 5) * 3) / 2); - else if (CurrSig >= 1 && CurrSig <= 4) - RetSig = 6 + (((CurrSig - 1) * 3) / 2); + s32 retsig = 0; + + if (currsig >= 51 && currsig <= 100) + retsig = 100; + else if (currsig >= 41 && currsig <= 50) + retsig = 80 + ((currsig - 40) * 2); + else if (currsig >= 31 && currsig <= 40) + retsig = 66 + (currsig - 30); + else if (currsig >= 21 && currsig <= 30) + retsig = 54 + (currsig - 20); + else if (currsig >= 10 && currsig <= 20) + retsig = 42 + (((currsig - 10) * 2) / 3); + else if (currsig >= 5 && currsig <= 9) + retsig = 22 + (((currsig - 5) * 3) / 2); + else if (currsig >= 1 && currsig <= 4) + retsig = 6 + (((currsig - 1) * 3) / 2); else - RetSig = CurrSig; - return RetSig; -} + retsig = currsig; -static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig) -{ - return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig); + return retsig; } -static u8 odm_EVMdbToPercentage(s8 Value) +static u8 odm_evm_db_to_percentage(s8 value) { /* -33dB~0dB to 0%~99% */ s8 ret_val; - ret_val = Value; + ret_val = value; if (ret_val >= 0) ret_val = 0; @@ -115,42 +111,42 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, switch (LNA_idx) { case 7: if (VGA_idx <= 27) - rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */ + rx_pwr_all = -100 + 2 * (27-VGA_idx); /* VGA_idx = 27~2 */ else rx_pwr_all = -100; break; case 6: - rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */ + rx_pwr_all = -48 + 2 * (2-VGA_idx); /* VGA_idx = 2~0 */ break; case 5: - rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */ + rx_pwr_all = -42 + 2 * (7-VGA_idx); /* VGA_idx = 7~5 */ break; case 4: - rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */ + rx_pwr_all = -36 + 2 * (7-VGA_idx); /* VGA_idx = 7~4 */ break; case 3: - rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */ + rx_pwr_all = -24 + 2 * (7-VGA_idx); /* VGA_idx = 7~0 */ break; case 2: if (cck_highpwr) - rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */ + rx_pwr_all = -12 + 2 * (5-VGA_idx); /* VGA_idx = 5~0 */ else - rx_pwr_all = -6 + 2*(5-VGA_idx); + rx_pwr_all = -6 + 2 * (5-VGA_idx); break; case 1: - rx_pwr_all = 8-2*VGA_idx; + rx_pwr_all = 8-2 * VGA_idx; break; case 0: - rx_pwr_all = 14-2*VGA_idx; + rx_pwr_all = 14-2 * VGA_idx; break; default: break; } rx_pwr_all += 6; - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); + PWDB_ALL = odm_query_rxpwrpercentage(rx_pwr_all); if (!cck_highpwr) { if (PWDB_ALL >= 80) - PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; + PWDB_ALL = ((PWDB_ALL-80)<<1) + ((PWDB_ALL-80)>>1) + 80; else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) PWDB_ALL += 3; if (PWDB_ALL > 100) @@ -185,17 +181,17 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, /* (1)Get RSSI for HT rate */ - for (i = RF_PATH_A; i < RF_PATH_MAX; i++) { + for (i = RF_PATH_A; i < RF_PATH_MAX; i++) { /* 2008/01/30 MH we will judge RF RX path now. */ if (dm_odm->RFPathRxEnable & BIT(i)) rf_rx_num++; - rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110; + rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F) * 2) - 110; pPhyInfo->RxPwr[i] = rx_pwr[i]; /* Translate DBM to percentage. */ - RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); + RSSI = odm_query_rxpwrpercentage(rx_pwr[i]); total_rssi += RSSI; /* Modification for ext-LNA board */ @@ -218,7 +214,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, /* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */ rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110; - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); + PWDB_ALL = odm_query_rxpwrpercentage(rx_pwr_all); PWDB_ALL_BT = PWDB_ALL; pPhyInfo->RxPWDBAll = PWDB_ALL; @@ -236,7 +232,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */ /* fill most significant bit to "zero" when doing shifting operation which may change a negative */ /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */ - EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */ + EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */ if (pPktinfo->bPacketMatchBSSID) { if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */ @@ -248,10 +244,10 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */ /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */ if (isCCKrate) { - pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */ + pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */ } else { if (rf_rx_num != 0) - pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num)); + pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, total_rssi /= rf_rx_num)); } /* For 92C/92D HW (Hybrid) Antenna Diversity */ @@ -339,12 +335,12 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, } else { if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) { UndecoratedSmoothedOFDM = - (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + + (((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor-1)) + (RSSI_Ave)) / (Rx_Smooth_Factor); UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; } else { UndecoratedSmoothedOFDM = - (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + + (((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor-1)) + (RSSI_Ave)) / (Rx_Smooth_Factor); } } @@ -382,7 +378,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, if (pEntry->rssi_stat.ValidBit == 64) { Weighting = min_t(u32, OFDM_pkt << 4, 64); - UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; + UndecoratedSmoothedPWDB = (Weighting * UndecoratedSmoothedOFDM + (64-Weighting) * UndecoratedSmoothedCCK)>>6; } else { if (pEntry->rssi_stat.ValidBit != 0) UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM + diff --git a/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c b/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c index d5001920f77c..251bd8aba3b1 100644 --- a/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c +++ b/drivers/staging/rtl8188eu/hal/odm_rtl8188e.c @@ -13,7 +13,7 @@ static void dm_rx_hw_antena_div_init(struct odm_dm_struct *dm_odm) struct adapter *adapter = dm_odm->Adapter; u32 value32; - if (*(dm_odm->mp_mode) == 1) { + if (*dm_odm->mp_mode == 1) { dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); @@ -23,7 +23,7 @@ static void dm_rx_hw_antena_div_init(struct odm_dm_struct *dm_odm) /* MAC Setting */ value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, - value32|(BIT(23) | BIT(25))); + value32 | (BIT(23) | BIT(25))); /* Pin Settings */ phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); @@ -44,7 +44,7 @@ static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm) struct adapter *adapter = dm_odm->Adapter; u32 value32; - if (*(dm_odm->mp_mode) == 1) { + if (*dm_odm->mp_mode == 1) { dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, @@ -55,7 +55,7 @@ static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm) /* MAC Setting */ value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, - value32|(BIT(23) | BIT(25))); + value32 | (BIT(23) | BIT(25))); /* Pin Settings */ phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0); phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); @@ -88,11 +88,9 @@ static void dm_fast_training_init(struct odm_dm_struct *dm_odm) struct adapter *adapter = dm_odm->Adapter; u32 value32, i; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u32 AntCombination = 2; - if (*(dm_odm->mp_mode) == 1) { + if (*dm_odm->mp_mode == 1) return; - } for (i = 0; i < 6; i++) { dm_fat_tbl->Bssid[i] = 0; @@ -105,9 +103,11 @@ static void dm_fast_training_init(struct odm_dm_struct *dm_odm) /* MAC Setting */ value32 = phy_query_bb_reg(adapter, 0x4c, bMaskDWord); - phy_set_bb_reg(adapter, 0x4c, bMaskDWord, value32|(BIT(23) | BIT(25))); + phy_set_bb_reg(adapter, 0x4c, bMaskDWord, + value32 | (BIT(23) | BIT(25))); value32 = phy_query_bb_reg(adapter, 0x7B4, bMaskDWord); - phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT(16) | BIT(17))); + phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, + value32 | (BIT(16) | BIT(17))); /* Match MAC ADDR */ phy_set_bb_reg(adapter, 0x7b4, 0xFFFF, 0); @@ -120,35 +120,12 @@ static void dm_fast_training_init(struct odm_dm_struct *dm_odm) phy_set_bb_reg(adapter, 0xca4, bMaskDWord, 0x000000a0); /* antenna mapping table */ - if (AntCombination == 2) { - if (!dm_odm->bIsMPChip) { /* testchip */ - phy_set_bb_reg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 1); - phy_set_bb_reg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 2); - } else { /* MPchip */ - phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1); - phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2); - } - } else if (AntCombination == 7) { - if (!dm_odm->bIsMPChip) { /* testchip */ - phy_set_bb_reg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 0); - phy_set_bb_reg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 1); - phy_set_bb_reg(adapter, 0x878, BIT(16), 0); - phy_set_bb_reg(adapter, 0x858, BIT(15) | BIT(14), 2); - phy_set_bb_reg(adapter, 0x878, BIT(19) | BIT(18) | BIT(17), 3); - phy_set_bb_reg(adapter, 0x878, BIT(22) | BIT(21) | BIT(20), 4); - phy_set_bb_reg(adapter, 0x878, BIT(25) | BIT(24) | BIT(23), 5); - phy_set_bb_reg(adapter, 0x878, BIT(28) | BIT(27) | BIT(26), 6); - phy_set_bb_reg(adapter, 0x878, BIT(31) | BIT(30) | BIT(29), 7); - } else { /* MPchip */ - phy_set_bb_reg(adapter, 0x914, bMaskByte0, 0); - phy_set_bb_reg(adapter, 0x914, bMaskByte1, 1); - phy_set_bb_reg(adapter, 0x914, bMaskByte2, 2); - phy_set_bb_reg(adapter, 0x914, bMaskByte3, 3); - phy_set_bb_reg(adapter, 0x918, bMaskByte0, 4); - phy_set_bb_reg(adapter, 0x918, bMaskByte1, 5); - phy_set_bb_reg(adapter, 0x918, bMaskByte2, 6); - phy_set_bb_reg(adapter, 0x918, bMaskByte3, 7); - } + if (!dm_odm->bIsMPChip) { /* testchip */ + phy_set_bb_reg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 1); + phy_set_bb_reg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 2); + } else { /* MPchip */ + phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1); + phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2); } /* Default Ant Setting when no fast training */ @@ -157,7 +134,7 @@ static void dm_fast_training_init(struct odm_dm_struct *dm_odm) phy_set_bb_reg(adapter, 0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Enter Traing state */ - phy_set_bb_reg(adapter, 0x864, BIT(2) | BIT(1) | BIT(0), (AntCombination-1)); + phy_set_bb_reg(adapter, 0x864, BIT(2) | BIT(1) | BIT(0), 1); phy_set_bb_reg(adapter, 0xc50, BIT(7), 1); } @@ -219,8 +196,8 @@ static void update_tx_ant_88eu(struct odm_dm_struct *dm_odm, u8 ant, u32 mac_id) else target_ant = AUX_ANT_CG_TRX; dm_fat_tbl->antsel_a[mac_id] = target_ant & BIT(0); - dm_fat_tbl->antsel_b[mac_id] = (target_ant & BIT(1))>>1; - dm_fat_tbl->antsel_c[mac_id] = (target_ant & BIT(2))>>2; + dm_fat_tbl->antsel_b[mac_id] = (target_ant & BIT(1)) >> 1; + dm_fat_tbl->antsel_c[mac_id] = (target_ant & BIT(2)) >> 2; } void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm, @@ -273,11 +250,13 @@ static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm) for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { entry = dm_odm->pODM_StaInfo[i]; if (IS_STA_VALID(entry)) { - /* 2 Caculate RSSI per Antenna */ + /* 2 Calculate RSSI per Antenna */ main_rssi = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ? - (dm_fat_tbl->MainAnt_Sum[i]/dm_fat_tbl->MainAnt_Cnt[i]) : 0; + (dm_fat_tbl->MainAnt_Sum[i] / + dm_fat_tbl->MainAnt_Cnt[i]) : 0; aux_rssi = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ? - (dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0; + (dm_fat_tbl->AuxAnt_Sum[i] / + dm_fat_tbl->AuxAnt_Cnt[i]) : 0; target_ant = (main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT; /* 2 Select max_rssi for DIG */ local_max_rssi = max(main_rssi, aux_rssi); diff --git a/drivers/staging/rtl8188eu/hal/phy.c b/drivers/staging/rtl8188eu/hal/phy.c index 3c7cf8720df8..482d48e003b7 100644 --- a/drivers/staging/rtl8188eu/hal/phy.c +++ b/drivers/staging/rtl8188eu/hal/phy.c @@ -298,25 +298,6 @@ void rtw_hal_set_chan(struct adapter *adapt, u8 channel) #define ODM_TXPWRTRACK_MAX_IDX_88E 6 -static u8 get_right_chnl_for_iqk(u8 chnl) -{ - u8 place; - u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { - 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, - 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, - 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, - 155, 157, 159, 161, 163, 165 - }; - - if (chnl > 14) { - for (place = 0; place < sizeof(channel_all); place++) { - if (channel_all[place] == chnl) - return ++place; - } - } - return 0; -} - void rtl88eu_dm_txpower_track_adjust(struct odm_dm_struct *dm_odm, u8 type, u8 *direction, u32 *out_write_val) { @@ -1215,7 +1196,7 @@ void rtl88eu_phy_iq_calibrate(struct adapter *adapt, bool recovery) { struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv; s32 result[4][8]; - u8 i, final, chn_index; + u8 i, final; bool pathaok, pathbok; s32 reg_e94, reg_e9c, reg_ea4, reg_eb4, reg_ebc, reg_ec4; bool is12simular, is13simular, is23simular; @@ -1324,12 +1305,10 @@ void rtl88eu_phy_iq_calibrate(struct adapter *adapt, bool recovery) (reg_ec4 == 0)); } - chn_index = get_right_chnl_for_iqk(adapt->HalData->CurrentChannel); - if (final < 4) { for (i = 0; i < IQK_Matrix_REG_NUM; i++) - dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[chn_index].Value[0][i] = result[final][i]; - dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[chn_index].bIQKDone = true; + dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].Value[0][i] = result[final][i]; + dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].bIQKDone = true; } save_adda_registers(adapt, iqk_bb_reg_92c, diff --git a/drivers/staging/rtl8188eu/hal/pwrseq.c b/drivers/staging/rtl8188eu/hal/pwrseq.c index 4aa1dec0b5e4..f7890a8f4673 100644 --- a/drivers/staging/rtl8188eu/hal/pwrseq.c +++ b/drivers/staging/rtl8188eu/hal/pwrseq.c @@ -8,9 +8,8 @@ #include "pwrseq.h" #include <rtl8188e_hal.h> -/* - drivers should parse below arrays and do the corresponding actions -*/ +/* drivers should parse below arrays and do the corresponding actions */ + /* 3 Power on Array */ struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = { diff --git a/drivers/staging/rtl8188eu/hal/rf_cfg.c b/drivers/staging/rtl8188eu/hal/rf_cfg.c index 0700d8bd448d..02aeb12c9870 100644 --- a/drivers/staging/rtl8188eu/hal/rf_cfg.c +++ b/drivers/staging/rtl8188eu/hal/rf_cfg.c @@ -177,7 +177,7 @@ static void rtl8188e_config_rf_reg(struct adapter *adapt, u32 content = 0x1000; /*RF Content: radio_a_txt*/ u32 maskforphyset = content & 0xE000; - rtl_rfreg_delay(adapt, RF90_PATH_A, addr | maskforphyset, + rtl_rfreg_delay(adapt, RF_PATH_A, addr | maskforphyset, RFREG_OFFSET_MASK, data); } diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c index 607170775fa5..31e80d693f32 100644 --- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c +++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c @@ -240,8 +240,7 @@ s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) return status; } -void -Hal_InitPGData88E(struct adapter *padapter) +void Hal_InitPGData88E(struct adapter *padapter) { struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); @@ -258,11 +257,7 @@ Hal_InitPGData88E(struct adapter *padapter) } } -void -Hal_EfuseParseIDCode88E( - struct adapter *padapter, - u8 *hwinfo - ) +void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo) { struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); u16 EEPROMId; @@ -378,58 +373,20 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, } } -static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup) +static void Hal_GetChnlGroup88E(u8 chnl, u8 *group) { - u8 bIn24G = true; - - if (chnl <= 14) { - bIn24G = true; - - if (chnl < 3) /* Channel 1-2 */ - *pGroup = 0; - else if (chnl < 6) /* Channel 3-5 */ - *pGroup = 1; - else if (chnl < 9) /* Channel 6-8 */ - *pGroup = 2; - else if (chnl < 12) /* Channel 9-11 */ - *pGroup = 3; - else if (chnl < 14) /* Channel 12-13 */ - *pGroup = 4; - else if (chnl == 14) /* Channel 14 */ - *pGroup = 5; - } else { - /* probably, this branch is suitable only for 5 GHz */ - - bIn24G = false; - - if (chnl <= 40) - *pGroup = 0; - else if (chnl <= 48) - *pGroup = 1; - else if (chnl <= 56) - *pGroup = 2; - else if (chnl <= 64) - *pGroup = 3; - else if (chnl <= 104) - *pGroup = 4; - else if (chnl <= 112) - *pGroup = 5; - else if (chnl <= 120) - *pGroup = 5; - else if (chnl <= 128) - *pGroup = 6; - else if (chnl <= 136) - *pGroup = 7; - else if (chnl <= 144) - *pGroup = 8; - else if (chnl <= 153) - *pGroup = 9; - else if (chnl <= 161) - *pGroup = 10; - else if (chnl <= 177) - *pGroup = 11; - } - return bIn24G; + if (chnl < 3) /* Channel 1-2 */ + *group = 0; + else if (chnl < 6) /* Channel 3-5 */ + *group = 1; + else if (chnl < 9) /* Channel 6-8 */ + *group = 2; + else if (chnl < 12) /* Channel 9-11 */ + *group = 3; + else if (chnl < 14) /* Channel 12-13 */ + *group = 4; + else if (chnl == 14) /* Channel 14 */ + *group = 5; } void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) @@ -461,7 +418,7 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto struct hal_data_8188e *pHalData = padapter->HalData; struct txpowerinfo24g pwrInfo24G; u8 ch, group; - u8 bIn24G, TxCount; + u8 TxCount; Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail); @@ -469,19 +426,16 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto pHalData->bTXPowerDataReadFromEEPORM = true; for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { - bIn24G = Hal_GetChnlGroup88E(ch, &group); - if (bIn24G) { - pHalData->Index24G_CCK_Base[0][ch] = pwrInfo24G.IndexCCK_Base[0][group]; - if (ch == 14) - pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][4]; - else - pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][group]; - } - if (bIn24G) { - DBG_88E("======= Path %d, Channel %d =======\n", 0, ch); - DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", 0, ch, pHalData->Index24G_CCK_Base[0][ch]); - DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", 0, ch, pHalData->Index24G_BW40_Base[0][ch]); - } + Hal_GetChnlGroup88E(ch, &group); + pHalData->Index24G_CCK_Base[0][ch] = pwrInfo24G.IndexCCK_Base[0][group]; + if (ch == 14) + pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][4]; + else + pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][group]; + + DBG_88E("======= Path %d, Channel %d =======\n", 0, ch); + DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", 0, ch, pHalData->Index24G_CCK_Base[0][ch]); + DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", 0, ch, pHalData->Index24G_BW40_Base[0][ch]); } for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { pHalData->CCK_24G_Diff[0][TxCount] = pwrInfo24G.CCK_Diff[0][TxCount]; @@ -551,8 +505,7 @@ void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoL void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) { padapter->mlmepriv.ChannelPlan = - hal_com_get_channel_plan(padapter, - hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF, + hal_com_get_channel_plan(hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF, padapter->registrypriv.channel_plan, RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail); diff --git a/drivers/staging/rtl8188eu/hal/usb_halinit.c b/drivers/staging/rtl8188eu/hal/usb_halinit.c index 12864b648fa8..70c02c49b177 100644 --- a/drivers/staging/rtl8188eu/hal/usb_halinit.c +++ b/drivers/staging/rtl8188eu/hal/usb_halinit.c @@ -52,7 +52,7 @@ static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPip /* All config other than above support one Bulk IN and one Interrupt IN. */ - result = Hal_MappingOutPipe(adapt, NumOutPipe); + result = hal_mapping_out_pipe(adapt, NumOutPipe); return result; } @@ -785,13 +785,13 @@ u32 rtl8188eu_hal_init(struct adapter *Adapter) haldata->RfRegChnlVal[0] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask); haldata->RfRegChnlVal[1] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask); -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); _BBTurnOnBlock(Adapter); -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); invalidate_cam_all(Adapter); -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */ phy_set_tx_power_level(Adapter, haldata->CurrentChannel); @@ -816,7 +816,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); /* Nav limit , suggest by scott */ usb_write8(Adapter, 0x652, 0x0); -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); rtl8188e_InitHalDm(Adapter); /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */ @@ -840,8 +840,8 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); /* enable tx DMA to drop the redundate data of packet */ usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); - /* 2010/08/26 MH Merge from 8192CE. */ + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); + /* 2010/08/26 MH Merge from 8192CE. */ if (pwrctrlpriv->rf_pwrstate == rf_on) { if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { rtl88eu_phy_iq_calibrate(Adapter, true); @@ -850,12 +850,12 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true; } -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); ODM_TXPowerTrackingCheck(&haldata->odmpriv); -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); - rtl88eu_phy_lc_calibrate(Adapter); + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); + rtl88eu_phy_lc_calibrate(Adapter); } /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */ @@ -866,7 +866,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12)); exit: -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); DBG_88E("%s in %dms\n", __func__, jiffies_to_msecs(jiffies - init_start_time)); @@ -980,7 +980,7 @@ u32 rtw_hal_inirp_init(struct adapter *Adapter) /* issue Rx irp to receive data */ precvbuf = precvpriv->precv_buf; for (i = 0; i < NR_RECVBUFF; i++) { - if (usb_read_port(Adapter, RECV_BULK_IN_ADDR, precvbuf) == false) { + if (!usb_read_port(Adapter, RECV_BULK_IN_ADDR, precvbuf)) { RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n")); status = _FAIL; goto exit; @@ -1267,7 +1267,7 @@ void rtw_hal_set_hwreg(struct adapter *Adapter, u8 variable, u8 *val) /* Select RRSR (in Legacy-OFDM and CCK) */ /* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */ /* We do not use other rates. */ - HalSetBrateCfg(Adapter, val, &BrateCfg); + hal_set_brate_cfg(val, &BrateCfg); DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); /* 2011.03.30 add by Luke Lee */ diff --git a/drivers/staging/rtl8188eu/include/drv_types.h b/drivers/staging/rtl8188eu/include/drv_types.h index 4ae095837bef..35c0946bc65d 100644 --- a/drivers/staging/rtl8188eu/include/drv_types.h +++ b/drivers/staging/rtl8188eu/include/drv_types.h @@ -24,11 +24,16 @@ #include <rtw_recv.h> #include <hal_intf.h> #include <hal_com.h> -#include <rtw_qos.h> #include <rtw_security.h> #include <rtw_pwrctrl.h> #include <rtw_eeprom.h> #include <sta_info.h> + +struct qos_priv { + /* bit mask option: u-apsd, s-apsd, ts, block ack... */ + unsigned int qos_option; +}; + #include <rtw_mlme.h> #include <rtw_debug.h> #include <rtw_rf.h> diff --git a/drivers/staging/rtl8188eu/include/hal_com.h b/drivers/staging/rtl8188eu/include/hal_com.h index 428a2a92820e..2f7bdade40a5 100644 --- a/drivers/staging/rtl8188eu/include/hal_com.h +++ b/drivers/staging/rtl8188eu/include/hal_com.h @@ -139,18 +139,14 @@ void dump_chip_info(struct HAL_VERSION ChipVersion); /* return the final channel plan decision */ -u8 hal_com_get_channel_plan(struct adapter *padapter, - u8 hw_channel_plan, - u8 sw_channel_plan, - u8 def_channel_plan, - bool AutoLoadFail -); +u8 hal_com_get_channel_plan(u8 hw_channel_plan, u8 sw_channel_plan, + u8 def_channel_plan, bool load_fail); u8 MRateToHwRate(u8 rate); -void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg); +void hal_set_brate_cfg(u8 *brates, u16 *rate_cfg); -bool Hal_MappingOutPipe(struct adapter *pAdapter, u8 NumOutPipe); +bool hal_mapping_out_pipe(struct adapter *adapter, u8 numoutpipe); void hal_init_macaddr(struct adapter *adapter); #endif /* __HAL_COMMON_H__ */ diff --git a/drivers/staging/rtl8188eu/include/odm_HWConfig.h b/drivers/staging/rtl8188eu/include/odm_hwconfig.h index 8cef32dc6350..8cef32dc6350 100644 --- a/drivers/staging/rtl8188eu/include/odm_HWConfig.h +++ b/drivers/staging/rtl8188eu/include/odm_hwconfig.h diff --git a/drivers/staging/rtl8188eu/include/odm_precomp.h b/drivers/staging/rtl8188eu/include/odm_precomp.h index 658a938df4c1..6efddc8f1675 100644 --- a/drivers/staging/rtl8188eu/include/odm_precomp.h +++ b/drivers/staging/rtl8188eu/include/odm_precomp.h @@ -22,14 +22,14 @@ /* 2 OutSrc Header Files */ #include "odm.h" -#include "odm_HWConfig.h" +#include "odm_hwconfig.h" #include "odm_debug.h" #include "../../rtlwifi/phydm/phydm_regdefine11n.h" #include "hal8188e_rate_adaptive.h" /* for RA,Power training */ #include "rtl8188e_hal.h" -#include "odm_reg.h" +#include "../../rtlwifi/phydm/phydm_reg.h" #include "odm_rtl8188e.h" diff --git a/drivers/staging/rtl8188eu/include/odm_reg.h b/drivers/staging/rtl8188eu/include/odm_reg.h deleted file mode 100644 index b56549ba1256..000000000000 --- a/drivers/staging/rtl8188eu/include/odm_reg.h +++ /dev/null @@ -1,106 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -/* */ -/* File Name: odm_reg.h */ -/* */ -/* Description: */ -/* */ -/* This file is for general register definition. */ -/* */ -/* */ -/* */ -#ifndef __HAL_ODM_REG_H__ -#define __HAL_ODM_REG_H__ - -/* */ -/* Register Definition */ -/* */ - -/* MAC REG */ -#define ODM_BB_RESET 0x002 -#define ODM_DUMMY 0x4fe -#define ODM_EDCA_VO_PARAM 0x500 -#define ODM_EDCA_VI_PARAM 0x504 -#define ODM_EDCA_BE_PARAM 0x508 -#define ODM_EDCA_BK_PARAM 0x50C -#define ODM_TXPAUSE 0x522 - -/* BB REG */ -#define ODM_FPGA_PHY0_PAGE8 0x800 -#define ODM_PSD_SETTING 0x808 -#define ODM_AFE_SETTING 0x818 -#define ODM_TXAGC_B_6_18 0x830 -#define ODM_TXAGC_B_24_54 0x834 -#define ODM_TXAGC_B_MCS32_5 0x838 -#define ODM_TXAGC_B_MCS0_MCS3 0x83c -#define ODM_TXAGC_B_MCS4_MCS7 0x848 -#define ODM_TXAGC_B_MCS8_MCS11 0x84c -#define ODM_ANALOG_REGISTER 0x85c -#define ODM_RF_INTERFACE_OUTPUT 0x860 -#define ODM_TXAGC_B_MCS12_MCS15 0x868 -#define ODM_TXAGC_B_11_A_2_11 0x86c -#define ODM_AD_DA_LSB_MASK 0x874 -#define ODM_ENABLE_3_WIRE 0x88c -#define ODM_PSD_REPORT 0x8b4 -#define ODM_R_ANT_SELECT 0x90c -#define ODM_CCK_ANT_SELECT 0xa07 -#define ODM_CCK_PD_THRESH 0xa0a -#define ODM_CCK_RF_REG1 0xa11 -#define ODM_CCK_MATCH_FILTER 0xa20 -#define ODM_CCK_RAKE_MAC 0xa2e -#define ODM_CCK_CNT_RESET 0xa2d -#define ODM_CCK_TX_DIVERSITY 0xa2f -#define ODM_CCK_FA_CNT_MSB 0xa5b -#define ODM_CCK_FA_CNT_LSB 0xa5c -#define ODM_CCK_NEW_FUNCTION 0xa75 -#define ODM_OFDM_PHY0_PAGE_C 0xc00 -#define ODM_OFDM_RX_ANT 0xc04 -#define ODM_R_A_RXIQI 0xc14 -#define ODM_R_A_AGC_CORE1 0xc50 -#define ODM_R_A_AGC_CORE2 0xc54 -#define ODM_R_B_AGC_CORE1 0xc58 -#define ODM_R_AGC_PAR 0xc70 -#define ODM_R_HTSTF_AGC_PAR 0xc7c -#define ODM_TX_PWR_TRAINING_A 0xc90 -#define ODM_TX_PWR_TRAINING_B 0xc98 -#define ODM_OFDM_FA_CNT1 0xcf0 -#define ODM_OFDM_PHY0_PAGE_D 0xd00 -#define ODM_OFDM_FA_CNT2 0xda0 -#define ODM_OFDM_FA_CNT3 0xda4 -#define ODM_OFDM_FA_CNT4 0xda8 -#define ODM_TXAGC_A_6_18 0xe00 -#define ODM_TXAGC_A_24_54 0xe04 -#define ODM_TXAGC_A_1_MCS32 0xe08 -#define ODM_TXAGC_A_MCS0_MCS3 0xe10 -#define ODM_TXAGC_A_MCS4_MCS7 0xe14 -#define ODM_TXAGC_A_MCS8_MCS11 0xe18 -#define ODM_TXAGC_A_MCS12_MCS15 0xe1c - -/* RF REG */ -#define ODM_GAIN_SETTING 0x00 -#define ODM_CHANNEL 0x18 - -/* Ant Detect Reg */ -#define ODM_DPDT 0x300 - -/* PSD Init */ -#define ODM_PSDREG 0x808 - -/* 92D Path Div */ -#define PATHDIV_REG 0xB30 -#define PATHDIV_TRI 0xBA0 - - -/* */ -/* Bitmap Definition */ -/* */ - -#define BIT_FA_RESET BIT(0) - - - -#endif diff --git a/drivers/staging/rtl8188eu/include/osdep_service.h b/drivers/staging/rtl8188eu/include/osdep_service.h index fbcba79a0927..cfe5698fbbb1 100644 --- a/drivers/staging/rtl8188eu/include/osdep_service.h +++ b/drivers/staging/rtl8188eu/include/osdep_service.h @@ -64,8 +64,6 @@ static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) u8 *_rtw_malloc(u32 sz); #define rtw_malloc(sz) _rtw_malloc((sz)) -void *rtw_malloc2d(int h, int w, int size); - void _rtw_init_queue(struct __queue *pqueue); struct rtw_netdev_priv_indicator { diff --git a/drivers/staging/rtl8188eu/include/phy.h b/drivers/staging/rtl8188eu/include/phy.h index e99ac3910787..40901d6dcaf5 100644 --- a/drivers/staging/rtl8188eu/include/phy.h +++ b/drivers/staging/rtl8188eu/include/phy.h @@ -4,7 +4,6 @@ #define IQK_DELAY_TIME_88E 10 #define index_mapping_NUM_88E 15 #define AVG_THERMAL_NUM_88E 4 -#define ODM_TARGET_CHNL_NUM_2G_5G 59 bool rtl88eu_phy_mac_config(struct adapter *adapt); bool rtl88eu_phy_rf_config(struct adapter *adapt); diff --git a/drivers/staging/rtl8188eu/include/rtw_mlme.h b/drivers/staging/rtl8188eu/include/rtw_mlme.h index 35997c521c35..8d9d663f0645 100644 --- a/drivers/staging/rtl8188eu/include/rtw_mlme.h +++ b/drivers/staging/rtl8188eu/include/rtw_mlme.h @@ -214,7 +214,7 @@ void hostapd_mode_unload(struct adapter *padapter); extern unsigned char WPA_TKIP_CIPHER[4]; extern unsigned char RSN_TKIP_CIPHER[4]; extern unsigned char REALTEK_96B_IE[]; -extern unsigned char MCS_rate_1R[16]; +extern const u8 MCS_rate_1R[16]; void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf); void rtw_survey_event_callback(struct adapter *adapter, u8 *pbuf); @@ -311,7 +311,6 @@ void rtw_free_assoc_resources_locked(struct adapter *adapter); void rtw_indicate_disconnect(struct adapter *adapter); void rtw_indicate_connect(struct adapter *adapter); void rtw_indicate_scan_done(struct adapter *padapter, bool aborted); -void rtw_scan_abort(struct adapter *adapter); int rtw_restruct_sec_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len); diff --git a/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h b/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h index ade68af15e04..9526da3efcc4 100644 --- a/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h +++ b/drivers/staging/rtl8188eu/include/rtw_mlme_ext.h @@ -231,22 +231,22 @@ enum SCAN_STATE { }; struct mlme_handler { - unsigned int num; - char *str; + unsigned int num; + const char *str; unsigned int (*func)(struct adapter *adapt, struct recv_frame *frame); }; struct action_handler { - unsigned int num; - char *str; + unsigned int num; + const char *str; unsigned int (*func)(struct adapter *adapt, struct recv_frame *frame); }; -struct ss_res { - int state; - int bss_cnt; - int channel_idx; - int scan_mode; +struct ss_res { + int state; + int bss_cnt; + int channel_idx; + int scan_mode; u8 ssid_num; u8 ch_num; struct ndis_802_11_ssid ssid[RTW_SSID_SCAN_AMOUNT]; diff --git a/drivers/staging/rtl8188eu/include/rtw_qos.h b/drivers/staging/rtl8188eu/include/rtw_qos.h deleted file mode 100644 index bf617da3cd6c..000000000000 --- a/drivers/staging/rtl8188eu/include/rtw_qos.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#ifndef _RTW_QOS_H_ -#define _RTW_QOS_H_ - -#include <osdep_service.h> - -struct qos_priv { - unsigned int qos_option; /* bit mask option: u-apsd, - * s-apsd, ts, block ack... - */ -}; - -#endif /* _RTL871X_QOS_H_ */ diff --git a/drivers/staging/rtl8188eu/include/wifi.h b/drivers/staging/rtl8188eu/include/wifi.h index 259bf2cce2d5..0664d5f30a96 100644 --- a/drivers/staging/rtl8188eu/include/wifi.h +++ b/drivers/staging/rtl8188eu/include/wifi.h @@ -257,14 +257,6 @@ enum WIFI_REG_DOMAIN { #define GetAddr4Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 24)) -static inline int IS_MCAST(unsigned char *da) -{ - if ((*da) & 0x01) - return true; - else - return false; -} - static inline unsigned char *get_da(unsigned char *pframe) { unsigned char *da; diff --git a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c index bee3c3a7a7a9..4ecd2ff48c41 100644 --- a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c @@ -421,7 +421,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, ret = -EOPNOTSUPP; goto exit; } - memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); + memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0); } @@ -737,7 +737,7 @@ static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_, ("\n Mode: %s is not supported\n", iw_operation_mode[wrqu->mode])); goto exit; } - if (rtw_set_802_11_infrastructure_mode(padapter, networkType) == false) { + if (!rtw_set_802_11_infrastructure_mode(padapter, networkType)) { ret = -EPERM; goto exit; } @@ -1000,8 +1000,7 @@ static int rtw_wx_set_wap(struct net_device *dev, spin_unlock_bh(&queue->lock); rtw_set_802_11_authentication_mode(padapter, authmode); - /* set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); */ - if (rtw_set_802_11_bssid(padapter, temp->sa_data) == false) { + if (!rtw_set_802_11_bssid(padapter, temp->sa_data)) { ret = -1; goto exit; } @@ -1317,8 +1316,8 @@ static int rtw_wx_set_essid(struct net_device *dev, RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: ssid =[%s]\n", src_ssid)); spin_lock_bh(&queue->lock); - phead = get_list_head(queue); - pmlmepriv->pscanned = phead->next; + phead = get_list_head(queue); + pmlmepriv->pscanned = phead->next; while (phead != pmlmepriv->pscanned) { pnetwork = container_of(pmlmepriv->pscanned, struct wlan_network, list); @@ -1354,7 +1353,7 @@ static int rtw_wx_set_essid(struct net_device *dev, RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("set ssid: set_802_11_auth. mode =%d\n", authmode)); rtw_set_802_11_authentication_mode(padapter, authmode); - if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == false) { + if (!rtw_set_802_11_ssid(padapter, &ndis_ssid)) { ret = -1; goto exit; } @@ -1370,7 +1369,7 @@ static int rtw_wx_get_essid(struct net_device *dev, struct iw_request_info *a, union iwreq_data *wrqu, char *extra) { - u32 len, ret = 0; + u32 len; struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network; @@ -1388,7 +1387,7 @@ static int rtw_wx_get_essid(struct net_device *dev, wrqu->essid.length = len; wrqu->essid.flags = 1; - return ret; + return 0; } static int rtw_wx_set_rate(struct net_device *dev, @@ -1400,7 +1399,7 @@ static int rtw_wx_set_rate(struct net_device *dev, u32 target_rate = wrqu->bitrate.value; u32 fixed = wrqu->bitrate.fixed; u32 ratevalue = 0; - u8 mpdatarate[NumRates] = {11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0xff}; + u8 mpdatarate[NumRates] = {11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0xff}; RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, (" rtw_wx_set_rate\n")); RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("target_rate = %d, fixed = %d\n", target_rate, fixed)); @@ -1673,7 +1672,7 @@ static int rtw_wx_set_enc(struct net_device *dev, memcpy(wep.KeyMaterial, keybuf, wep.KeyLength); - if (rtw_set_802_11_add_wep(padapter, &wep) == false) { + if (!rtw_set_802_11_add_wep(padapter, &wep)) { if (rf_on == pwrpriv->rf_pwrstate) ret = -EOPNOTSUPP; goto exit; @@ -2278,7 +2277,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, /* don't update "psecuritypriv->dot11PrivacyAlgrthm" and */ /* psecuritypriv->dot11PrivacyKeyIndex = keyid", but can rtw_set_key to cam */ - memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); + memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; @@ -2496,7 +2495,7 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) psta->htpriv.ht_option = false; } - if (pmlmepriv->htpriv.ht_option == false) + if (!pmlmepriv->htpriv.ht_option) psta->htpriv.ht_option = false; update_sta_info_apmode(padapter, psta); diff --git a/drivers/staging/rtl8188eu/os_dep/mlme_linux.c b/drivers/staging/rtl8188eu/os_dep/mlme_linux.c index 238c1d9cdc7b..d5ceb3beabbc 100644 --- a/drivers/staging/rtl8188eu/os_dep/mlme_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/mlme_linux.c @@ -78,7 +78,7 @@ void rtw_os_indicate_disconnect(struct adapter *adapter) { netif_carrier_off(adapter->pnetdev); /* Do it first for tx broadcast pkt after disconnection issue! */ rtw_indicate_wx_disassoc_event(adapter); - rtw_reset_securitypriv(adapter); + rtw_reset_securitypriv(adapter); } void rtw_report_sec_ie(struct adapter *adapter, u8 authmode, u8 *sec_ie) diff --git a/drivers/staging/rtl8188eu/os_dep/os_intfs.c b/drivers/staging/rtl8188eu/os_dep/os_intfs.c index 0a9877d85c79..dac9f98b4808 100644 --- a/drivers/staging/rtl8188eu/os_dep/os_intfs.c +++ b/drivers/staging/rtl8188eu/os_dep/os_intfs.c @@ -643,7 +643,7 @@ int ips_netdrv_open(struct adapter *padapter) mod_timer(&padapter->mlmepriv.dynamic_chk_timer, jiffies + msecs_to_jiffies(5000)); - return _SUCCESS; + return _SUCCESS; netdev_open_error: DBG_88E("-ips_netdrv_open - drv_open failure, bup =%d\n", padapter->bup); diff --git a/drivers/staging/rtl8188eu/os_dep/osdep_service.c b/drivers/staging/rtl8188eu/os_dep/osdep_service.c index 78daef6704ac..105f3f21bdea 100644 --- a/drivers/staging/rtl8188eu/os_dep/osdep_service.c +++ b/drivers/staging/rtl8188eu/os_dep/osdep_service.c @@ -18,20 +18,6 @@ u8 *_rtw_malloc(u32 sz) return kmalloc(sz, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); } -void *rtw_malloc2d(int h, int w, int size) -{ - int j; - void **a = kzalloc(h * sizeof(void *) + h * w * size, GFP_KERNEL); - - if (!a) - goto out; - - for (j = 0; j < h; j++) - a[j] = ((char *)(a + h)) + j * w * size; -out: - return a; -} - void _rtw_init_queue(struct __queue *pqueue) { INIT_LIST_HEAD(&pqueue->queue); diff --git a/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c b/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c index 5ddfc2ead127..d6a499692e96 100644 --- a/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c @@ -84,7 +84,7 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) { RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recvbuf2recvframe: pkt_len<=0\n")); - DBG_88E("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len\n", __func__, __LINE__); + DBG_88E("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfer_len\n", __func__, __LINE__); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } @@ -606,7 +606,7 @@ static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) if ((purb->status == -EPIPE) || (purb->status == -EPROTO)) { sreset_set_wifi_error_status(padapter, USB_WRITE_PORT_FAIL); } else if (purb->status == -EINPROGRESS) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete: EINPROGESS\n")); + RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete: EINPROGRESS\n")); goto check_completion; } else if (purb->status == -ENOENT) { DBG_88E("%s: -ENOENT\n", __func__); diff --git a/drivers/staging/rtl8188eu/os_dep/xmit_linux.c b/drivers/staging/rtl8188eu/os_dep/xmit_linux.c index d8ef9b5d81a8..017e1d628461 100644 --- a/drivers/staging/rtl8188eu/os_dep/xmit_linux.c +++ b/drivers/staging/rtl8188eu/os_dep/xmit_linux.c @@ -14,7 +14,8 @@ #include <xmit_osdep.h> #include <osdep_intf.h> -int rtw_os_xmit_resource_alloc(struct adapter *padapter, struct xmit_buf *pxmitbuf, u32 alloc_sz) +int rtw_os_xmit_resource_alloc(struct adapter *padapter, + struct xmit_buf *pxmitbuf, u32 alloc_sz) { int i; @@ -45,11 +46,11 @@ void rtw_os_xmit_resource_free(struct xmit_buf *pxmitbuf) kfree(pxmitbuf->pallocated_buf); } -#define WMM_XMIT_THRESHOLD (NR_XMITFRAME*2/5) +#define WMM_XMIT_THRESHOLD (NR_XMITFRAME * 2 / 5) void rtw_os_pkt_complete(struct adapter *padapter, struct sk_buff *pkt) { - u16 queue; + u16 queue; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; queue = skb_get_queue_mapping(pkt); @@ -89,10 +90,11 @@ void rtw_os_xmit_schedule(struct adapter *padapter) spin_unlock_bh(&pxmitpriv->lock); } -static void rtw_check_xmit_resource(struct adapter *padapter, struct sk_buff *pkt) +static void rtw_check_xmit_resource(struct adapter *padapter, + struct sk_buff *pkt) { struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - u16 queue; + u16 queue; queue = skb_get_queue_mapping(pkt); if (padapter->registrypriv.wifi_spec) { @@ -109,12 +111,12 @@ static void rtw_check_xmit_resource(struct adapter *padapter, struct sk_buff *pk static int rtw_mlcst2unicst(struct adapter *padapter, struct sk_buff *skb) { - struct sta_priv *pstapriv = &padapter->stapriv; + struct sta_priv *pstapriv = &padapter->stapriv; struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct list_head *phead, *plist; struct sk_buff *newskb; struct sta_info *psta = NULL; - s32 res; + s32 res; spin_lock_bh(&pstapriv->asoc_list_lock); phead = &pstapriv->asoc_list; @@ -126,7 +128,7 @@ static int rtw_mlcst2unicst(struct adapter *padapter, struct sk_buff *skb) plist = plist->next; - /* avoid come from STA1 and send back STA1 */ + /* avoid come from STA1 and send back STA1 */ if (!memcmp(psta->hwaddr, &skb->data[6], 6)) continue; @@ -136,18 +138,24 @@ static int rtw_mlcst2unicst(struct adapter *padapter, struct sk_buff *skb) memcpy(newskb->data, psta->hwaddr, 6); res = rtw_xmit(padapter, &newskb); if (res < 0) { - DBG_88E("%s()-%d: rtw_xmit() return error!\n", __func__, __LINE__); + DBG_88E("%s()-%d: rtw_xmit() return error!\n", + __func__, __LINE__); pxmitpriv->tx_drop++; dev_kfree_skb_any(newskb); } else { pxmitpriv->tx_pkts++; } } else { - DBG_88E("%s-%d: skb_copy() failed!\n", __func__, __LINE__); + DBG_88E("%s-%d: skb_copy() failed!\n", + __func__, __LINE__); pxmitpriv->tx_drop++; spin_unlock_bh(&pstapriv->asoc_list_lock); - return false; /* Caller shall tx this multicast frame via normal way. */ + + /* Caller shall tx this multicast frame + * via normal way. + */ + return false; } } @@ -156,17 +164,18 @@ static int rtw_mlcst2unicst(struct adapter *padapter, struct sk_buff *skb) return true; } -int rtw_xmit_entry(struct sk_buff *pkt, struct net_device *pnetdev) +int rtw_xmit_entry(struct sk_buff *pkt, struct net_device *pnetdev) { struct adapter *padapter = (struct adapter *)rtw_netdev_priv(pnetdev); struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; s32 res = 0; RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+xmit_enry\n")); - if (rtw_if_up(padapter) == false) { - RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit_entry: rtw_if_up fail\n")); + if (!rtw_if_up(padapter)) { + RT_TRACE(_module_xmit_osdep_c_, _drv_err_, + ("%s: rtw_if_up fail\n", __func__)); goto drop_packet; } @@ -175,7 +184,7 @@ int rtw_xmit_entry(struct sk_buff *pkt, struct net_device *pnetdev) if (!rtw_mc2u_disable && check_fwstate(pmlmepriv, WIFI_AP_STATE) && (IP_MCAST_MAC(pkt->data) || ICMPV6_MCAST_MAC(pkt->data)) && (padapter->registrypriv.wifi_spec == 0)) { - if (pxmitpriv->free_xmitframe_cnt > (NR_XMITFRAME/4)) { + if (pxmitpriv->free_xmitframe_cnt > NR_XMITFRAME / 4) { res = rtw_mlcst2unicst(padapter, pkt); if (res) goto exit; @@ -187,13 +196,15 @@ int rtw_xmit_entry(struct sk_buff *pkt, struct net_device *pnetdev) goto drop_packet; pxmitpriv->tx_pkts++; - RT_TRACE(_module_xmit_osdep_c_, _drv_info_, ("rtw_xmit_entry: tx_pkts=%d\n", (u32)pxmitpriv->tx_pkts)); + RT_TRACE(_module_xmit_osdep_c_, _drv_info_, + ("%s: tx_pkts=%d\n", __func__, (u32)pxmitpriv->tx_pkts)); goto exit; drop_packet: pxmitpriv->tx_drop++; dev_kfree_skb_any(pkt); - RT_TRACE(_module_xmit_osdep_c_, _drv_notice_, ("rtw_xmit_entry: drop, tx_drop=%d\n", (u32)pxmitpriv->tx_drop)); + RT_TRACE(_module_xmit_osdep_c_, _drv_notice_, + ("%s: drop, tx_drop=%d\n", __func__, (u32)pxmitpriv->tx_drop)); exit: return 0; diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c index 919231fec09c..287d0c11fa38 100644 --- a/drivers/staging/rtl8192e/rtllib_softmac.c +++ b/drivers/staging/rtl8192e/rtllib_softmac.c @@ -1680,19 +1680,19 @@ inline void rtllib_softmac_new_net(struct rtllib_device *ieee, (ssidbroad && !ssidset) || (!ssidbroad && ssidset))) || (!apset && ssidset && ssidbroad && ssidmatch) || (ieee->is_roaming && ssidset && ssidbroad && ssidmatch)) { - /* if the essid is hidden replace it with the - * essid provided by the user. + /* Save the essid so that if it is hidden, it is + * replaced with the essid provided by the user. */ if (!ssidbroad) { - strncpy(tmp_ssid, ieee->current_network.ssid, - IW_ESSID_MAX_SIZE); + memcpy(tmp_ssid, ieee->current_network.ssid, + ieee->current_network.ssid_len); tmp_ssid_len = ieee->current_network.ssid_len; } - memcpy(&ieee->current_network, net, - sizeof(struct rtllib_network)); + memcpy(&ieee->current_network, net, + sizeof(ieee->current_network)); if (!ssidbroad) { - strncpy(ieee->current_network.ssid, tmp_ssid, - IW_ESSID_MAX_SIZE); + memcpy(ieee->current_network.ssid, tmp_ssid, + tmp_ssid_len); ieee->current_network.ssid_len = tmp_ssid_len; } netdev_info(ieee->dev, diff --git a/drivers/staging/rtl8192u/ieee80211/dot11d.c b/drivers/staging/rtl8192u/ieee80211/dot11d.c index 2fb575a2b6ab..130ddfe9868f 100644 --- a/drivers/staging/rtl8192u/ieee80211/dot11d.c +++ b/drivers/staging/rtl8192u/ieee80211/dot11d.c @@ -3,42 +3,42 @@ #include "dot11d.h" -void Dot11d_Init(struct ieee80211_device *ieee) +void rtl8192u_dot11d_init(struct ieee80211_device *ieee) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(ieee); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(ieee); - pDot11dInfo->enabled = false; + dot11d_info->dot11d_enabled = false; - pDot11dInfo->state = DOT11D_STATE_NONE; - pDot11dInfo->country_ie_len = 0; - memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER + 1); - memset(pDot11dInfo->max_tx_pwr_dbm_list, 0xFF, MAX_CHANNEL_NUMBER+1); + dot11d_info->state = DOT11D_STATE_NONE; + dot11d_info->country_ie_len = 0; + memset(dot11d_info->channel_map, 0, MAX_CHANNEL_NUMBER + 1); + memset(dot11d_info->max_tx_pwr_dbm_list, 0xFF, MAX_CHANNEL_NUMBER+1); RESET_CIE_WATCHDOG(ieee); - netdev_info(ieee->dev, "Dot11d_Init()\n"); + netdev_info(ieee->dev, "rtl8192u_dot11d_init()\n"); } -EXPORT_SYMBOL(Dot11d_Init); +EXPORT_SYMBOL(rtl8192u_dot11d_init); /* Reset to the state as we are just entering a regulatory domain. */ -void Dot11d_Reset(struct ieee80211_device *ieee) +void dot11d_reset(struct ieee80211_device *ieee) { u32 i; - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(ieee); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(ieee); /* Clear old channel map */ - memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1); - memset(pDot11dInfo->max_tx_pwr_dbm_list, 0xFF, MAX_CHANNEL_NUMBER+1); + memset(dot11d_info->channel_map, 0, MAX_CHANNEL_NUMBER+1); + memset(dot11d_info->max_tx_pwr_dbm_list, 0xFF, MAX_CHANNEL_NUMBER+1); /* Set new channel map */ for (i = 1; i <= 11; i++) - (pDot11dInfo->channel_map)[i] = 1; + (dot11d_info->channel_map)[i] = 1; for (i = 12; i <= 14; i++) - (pDot11dInfo->channel_map)[i] = 2; + (dot11d_info->channel_map)[i] = 2; - pDot11dInfo->state = DOT11D_STATE_NONE; - pDot11dInfo->country_ie_len = 0; + dot11d_info->state = DOT11D_STATE_NONE; + dot11d_info->country_ie_len = 0; RESET_CIE_WATCHDOG(ieee); } -EXPORT_SYMBOL(Dot11d_Reset); +EXPORT_SYMBOL(dot11d_reset); /* * Update country IE from Beacon or Probe Resopnse and configure PHY for @@ -49,15 +49,15 @@ EXPORT_SYMBOL(Dot11d_Reset); * 1. IS_DOT11D_ENABLE() is TRUE. * 2. Input IE is an valid one. */ -void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr, +void dot11d_update_country_ie(struct ieee80211_device *dev, u8 *pTaddr, u16 CoutryIeLen, u8 *pCoutryIe) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(dev); u8 i, j, NumTriples, MaxChnlNum; struct chnl_txpower_triple *pTriple; - memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1); - memset(pDot11dInfo->max_tx_pwr_dbm_list, 0xFF, MAX_CHANNEL_NUMBER+1); + memset(dot11d_info->channel_map, 0, MAX_CHANNEL_NUMBER+1); + memset(dot11d_info->max_tx_pwr_dbm_list, 0xFF, MAX_CHANNEL_NUMBER+1); MaxChnlNum = 0; NumTriples = (CoutryIeLen - 3) / 3; /* skip 3-byte country string. */ pTriple = (struct chnl_txpower_triple *)(pCoutryIe + 3); @@ -66,20 +66,20 @@ void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr, /* It is not in a monotonically increasing order, so * stop processing. */ - netdev_err(dev->dev, "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n"); + netdev_err(dev->dev, "dot11d_update_country_ie(): Invalid country IE, skip it........1\n"); return; } if (MAX_CHANNEL_NUMBER < (pTriple->first_channel + pTriple->num_channels)) { /* It is not a valid set of channel id, so stop * processing. */ - netdev_err(dev->dev, "Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n"); + netdev_err(dev->dev, "dot11d_update_country_ie(): Invalid country IE, skip it........2\n"); return; } for (j = 0; j < pTriple->num_channels; j++) { - pDot11dInfo->channel_map[pTriple->first_channel + j] = 1; - pDot11dInfo->max_tx_pwr_dbm_list[pTriple->first_channel + j] = pTriple->max_tx_pwr_dbm; + dot11d_info->channel_map[pTriple->first_channel + j] = 1; + dot11d_info->max_tx_pwr_dbm_list[pTriple->first_channel + j] = pTriple->max_tx_pwr_dbm; MaxChnlNum = pTriple->first_channel + j; } @@ -87,90 +87,90 @@ void Dot11d_UpdateCountryIe(struct ieee80211_device *dev, u8 *pTaddr, } netdev_info(dev->dev, "Channel List:"); for (i = 1; i <= MAX_CHANNEL_NUMBER; i++) - if (pDot11dInfo->channel_map[i] > 0) + if (dot11d_info->channel_map[i] > 0) netdev_info(dev->dev, " %d", i); netdev_info(dev->dev, "\n"); UPDATE_CIE_SRC(dev, pTaddr); - pDot11dInfo->country_ie_len = CoutryIeLen; - memcpy(pDot11dInfo->country_ie_buf, pCoutryIe, CoutryIeLen); - pDot11dInfo->state = DOT11D_STATE_LEARNED; + dot11d_info->country_ie_len = CoutryIeLen; + memcpy(dot11d_info->country_ie_buf, pCoutryIe, CoutryIeLen); + dot11d_info->state = DOT11D_STATE_LEARNED; } -EXPORT_SYMBOL(Dot11d_UpdateCountryIe); +EXPORT_SYMBOL(dot11d_update_country_ie); -u8 DOT11D_GetMaxTxPwrInDbm(struct ieee80211_device *dev, u8 Channel) +u8 dot11d_get_max_tx_pwr_in_dbm(struct ieee80211_device *dev, u8 Channel) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(dev); u8 MaxTxPwrInDbm = 255; if (Channel > MAX_CHANNEL_NUMBER) { - netdev_err(dev->dev, "DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n"); + netdev_err(dev->dev, "dot11d_get_max_tx_pwr_in_dbm(): Invalid Channel\n"); return MaxTxPwrInDbm; } - if (pDot11dInfo->channel_map[Channel]) - MaxTxPwrInDbm = pDot11dInfo->max_tx_pwr_dbm_list[Channel]; + if (dot11d_info->channel_map[Channel]) + MaxTxPwrInDbm = dot11d_info->max_tx_pwr_dbm_list[Channel]; return MaxTxPwrInDbm; } -EXPORT_SYMBOL(DOT11D_GetMaxTxPwrInDbm); +EXPORT_SYMBOL(dot11d_get_max_tx_pwr_in_dbm); -void DOT11D_ScanComplete(struct ieee80211_device *dev) +void dot11d_scan_complete(struct ieee80211_device *dev) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(dev); - switch (pDot11dInfo->state) { + switch (dot11d_info->state) { case DOT11D_STATE_LEARNED: - pDot11dInfo->state = DOT11D_STATE_DONE; + dot11d_info->state = DOT11D_STATE_DONE; break; case DOT11D_STATE_DONE: if (GET_CIE_WATCHDOG(dev) == 0) { /* Reset country IE if previous one is gone. */ - Dot11d_Reset(dev); + dot11d_reset(dev); } break; case DOT11D_STATE_NONE: break; } } -EXPORT_SYMBOL(DOT11D_ScanComplete); +EXPORT_SYMBOL(dot11d_scan_complete); -int IsLegalChannel(struct ieee80211_device *dev, u8 channel) +int is_legal_channel(struct ieee80211_device *dev, u8 channel) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(dev); if (channel > MAX_CHANNEL_NUMBER) { - netdev_err(dev->dev, "IsLegalChannel(): Invalid Channel\n"); + netdev_err(dev->dev, "is_legal_channel(): Invalid Channel\n"); return 0; } - if (pDot11dInfo->channel_map[channel] > 0) + if (dot11d_info->channel_map[channel] > 0) return 1; return 0; } -EXPORT_SYMBOL(IsLegalChannel); +EXPORT_SYMBOL(is_legal_channel); -int ToLegalChannel(struct ieee80211_device *dev, u8 channel) +int to_legal_channel(struct ieee80211_device *dev, u8 channel) { - struct rt_dot11d_info *pDot11dInfo = GET_DOT11D_INFO(dev); + struct rt_dot11d_info *dot11d_info = GET_DOT11D_INFO(dev); u8 default_chn = 0; u32 i = 0; for (i = 1; i <= MAX_CHANNEL_NUMBER; i++) { - if (pDot11dInfo->channel_map[i] > 0) { + if (dot11d_info->channel_map[i] > 0) { default_chn = i; break; } } if (channel > MAX_CHANNEL_NUMBER) { - netdev_err(dev->dev, "IsLegalChannel(): Invalid Channel\n"); + netdev_err(dev->dev, "is_legal_channel(): Invalid Channel\n"); return default_chn; } - if (pDot11dInfo->channel_map[channel] > 0) + if (dot11d_info->channel_map[channel] > 0) return channel; return default_chn; } -EXPORT_SYMBOL(ToLegalChannel); +EXPORT_SYMBOL(to_legal_channel); diff --git a/drivers/staging/rtl8192u/ieee80211/dot11d.h b/drivers/staging/rtl8192u/ieee80211/dot11d.h index 363a6bed18dd..8b485fa18089 100644 --- a/drivers/staging/rtl8192u/ieee80211/dot11d.h +++ b/drivers/staging/rtl8192u/ieee80211/dot11d.h @@ -17,74 +17,41 @@ enum dot11d_state { }; struct rt_dot11d_info { - bool enabled; /* dot11MultiDomainCapabilityEnabled */ - u16 country_ie_len; /* > 0 if country_ie_buf[] contains valid country information element. */ + + /* country_ie_src_addr u16 aligned for comparison and copy */ + u8 country_ie_src_addr[ETH_ALEN]; /* Source AP of the country IE. */ u8 country_ie_buf[MAX_IE_LEN]; - u8 country_ie_src_addr[6]; /* Source AP of the country IE. */ u8 country_ie_watchdog; u8 channel_map[MAX_CHANNEL_NUMBER + 1]; /* !Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan) */ u8 max_tx_pwr_dbm_list[MAX_CHANNEL_NUMBER + 1]; enum dot11d_state state; + u8 dot11d_enabled; /* dot11MultiDomainCapabilityEnabled */ }; -#define eqMacAddr(a, b) (((a)[0] == (b)[0] && \ - (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && \ - (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0) -#define cpMacAddr(des, src) ((des)[0] = (src)[0], \ - (des)[1] = (src)[1], (des)[2] = (src)[2], \ - (des)[3] = (src)[3], (des)[4] = (src)[4], \ - (des)[5] = (src)[5]) -#define GET_DOT11D_INFO(__pIeeeDev) ((struct rt_dot11d_info *)((__pIeeeDev)->pDot11dInfo)) - -#define IS_DOT11D_ENABLE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->enabled) -#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->country_ie_len > 0) - -#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->country_ie_src_addr, __pTa) -#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->country_ie_src_addr, __pTa) - -#define GET_CIE_WATCHDOG(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->country_ie_watchdog) -#define RESET_CIE_WATCHDOG(__pIeeeDev) (GET_CIE_WATCHDOG(__pIeeeDev) = 0) -#define UPDATE_CIE_WATCHDOG(__pIeeeDev) (++GET_CIE_WATCHDOG(__pIeeeDev)) - -void -Dot11d_Init( - struct ieee80211_device *dev - ); - -void -Dot11d_Reset( - struct ieee80211_device *dev - ); +#define GET_DOT11D_INFO(ieee_dev) ((struct rt_dot11d_info *)((ieee_dev)->dot11d_info)) -void -Dot11d_UpdateCountryIe( - struct ieee80211_device *dev, - u8 *pTaddr, - u16 CoutryIeLen, - u8 *pCoutryIe - ); +#define IS_DOT11D_ENABLE(ieee_dev) (GET_DOT11D_INFO(ieee_dev)->dot11d_enabled) +#define IS_COUNTRY_IE_VALID(ieee_dev) (GET_DOT11D_INFO(ieee_dev)->country_ie_len > 0) -u8 -DOT11D_GetMaxTxPwrInDbm( - struct ieee80211_device *dev, - u8 Channel - ); +#define IS_EQUAL_CIE_SRC(ieee_dev, addr) ether_addr_equal(GET_DOT11D_INFO(ieee_dev)->country_ie_src_addr, addr) +#define UPDATE_CIE_SRC(ieee_dev, addr) ether_addr_copy(GET_DOT11D_INFO(ieee_dev)->country_ie_src_addr, addr) -void -DOT11D_ScanComplete( - struct ieee80211_device *dev - ); +#define GET_CIE_WATCHDOG(ieee_dev) (GET_DOT11D_INFO(ieee_dev)->country_ie_watchdog) +#define RESET_CIE_WATCHDOG(ieee_dev) (GET_CIE_WATCHDOG(ieee_dev) = 0) +#define UPDATE_CIE_WATCHDOG(ieee_dev) (++GET_CIE_WATCHDOG(ieee_dev)) -int IsLegalChannel( - struct ieee80211_device *dev, - u8 channel -); +void rtl8192u_dot11d_init(struct ieee80211_device *dev); +void dot11d_reset(struct ieee80211_device *dev); +void dot11d_update_country_ie(struct ieee80211_device *dev, + u8 *addr, + u16 coutry_ie_len, + u8 *coutry_ie); +u8 dot11d_get_max_tx_pwr_in_dbm(struct ieee80211_device *dev, u8 channel); +void dot11d_scan_complete(struct ieee80211_device *dev); +int is_legal_channel(struct ieee80211_device *dev, u8 channel); +int to_legal_channel(struct ieee80211_device *dev, u8 channel); -int ToLegalChannel( - struct ieee80211_device *dev, - u8 channel -); #endif /* #ifndef __INC_DOT11D_H */ diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211.h b/drivers/staging/rtl8192u/ieee80211/ieee80211.h index 3cfeac0d7214..8aa536d79900 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211.h +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211.h @@ -1329,8 +1329,13 @@ typedef enum _erp_t { struct ieee80211_network { /* These entries are used to identify a unique network */ - u8 bssid[ETH_ALEN]; + u8 bssid[ETH_ALEN]; /* u16 aligned! */ u8 channel; + + // CCXv4 S59, MBSSID. + bool bMBssidValid; + u8 MBssid[ETH_ALEN]; /* u16 aligned! */ + u8 MBssidMask; /* Ensure null-terminated for any debug msgs */ u8 ssid[IW_ESSID_MAX_SIZE + 1]; u8 ssid_len; @@ -1341,10 +1346,6 @@ struct ieee80211_network { bool bCkipSupported; bool bCcxRmEnable; u16 CcxRmState[2]; - // CCXv4 S59, MBSSID. - bool bMBssidValid; - u8 MBssidMask; - u8 MBssid[6]; // CCX 2 S38, WLAN Device Version Number element. Annie, 2006-08-20. bool bWithCcxVerNum; u8 BssCcxVerNumber; @@ -1771,7 +1772,7 @@ struct ieee80211_device { /* map of allowed channels. 0 is dummy */ // FIXME: remember to default to a basic channel plan depending of the PHY type - void *pDot11dInfo; + void *dot11d_info; bool bGlobalDomain; int rate; /* current rate */ int basic_rate; @@ -2378,11 +2379,8 @@ u8 HTGetHighestMCSRate(struct ieee80211_device *ieee, extern u8 MCS_FILTER_ALL[]; extern u16 MCS_DATA_RATE[2][2][77]; u8 HTCCheck(struct ieee80211_device *ieee, u8 *pFrame); -//extern void HTSetConnectBwModeCallback(unsigned long data); void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo); bool IsHTHalfNmodeAPs(struct ieee80211_device *ieee); -u16 HTHalfMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate); -u16 HTMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate); u16 TxCountToDataRate(struct ieee80211_device *ieee, u8 nDataRate); //function in BAPROC.c int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee, struct sk_buff *skb); @@ -2395,7 +2393,7 @@ void TsInitDelBA(struct ieee80211_device *ieee, void BaSetupTimeOut(struct timer_list *t); void TxBaInactTimeout(struct timer_list *t); void RxBaInactTimeout(struct timer_list *t); -void ResetBaEntry(PBA_RECORD pBA); +void ResetBaEntry(struct ba_record *pBA); //function in TS.c bool GetTs( struct ieee80211_device *ieee, diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c index 90a097f2cd4e..d7975aa335b2 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /******************************************************************************* * * Copyright(c) 2004 Intel Corporation. All rights reserved. @@ -28,10 +29,9 @@ * James P. Ketrenos <ipw2100-admin@linux.intel.com> * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 * - *******************************************************************************/ + ******************************************************************************/ #include <linux/compiler.h> -/* #include <linux/config.h> */ #include <linux/errno.h> #include <linux/if_arp.h> #include <linux/in6.h> @@ -64,9 +64,9 @@ static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee) if (ieee->networks) return 0; - ieee->networks = kcalloc( - MAX_NETWORK_COUNT, sizeof(struct ieee80211_network), - GFP_KERNEL); + ieee->networks = kcalloc(MAX_NETWORK_COUNT, + sizeof(struct ieee80211_network), + GFP_KERNEL); if (!ieee->networks) { printk(KERN_WARNING "%s: Out of memory allocating beacons\n", ieee->dev->name); @@ -94,7 +94,6 @@ static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee) list_add_tail(&ieee->networks[i].list, &ieee->network_free_list); } - struct net_device *alloc_ieee80211(int sizeof_priv) { struct ieee80211_device *ieee; @@ -110,7 +109,7 @@ struct net_device *alloc_ieee80211(int sizeof_priv) } ieee = netdev_priv(dev); - memset(ieee, 0, sizeof(struct ieee80211_device)+sizeof_priv); + memset(ieee, 0, sizeof(struct ieee80211_device) + sizeof_priv); ieee->dev = dev; err = ieee80211_networks_allocate(ieee); @@ -121,7 +120,6 @@ struct net_device *alloc_ieee80211(int sizeof_priv) } ieee80211_networks_initialize(ieee); - /* Default fragmentation threshold is maximum payload size */ ieee->fts = DEFAULT_FTS; ieee->scan_age = DEFAULT_MAX_SCAN_AGE; @@ -159,6 +157,11 @@ struct net_device *alloc_ieee80211(int sizeof_priv) ieee->pHTInfo = kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL); if (ieee->pHTInfo == NULL) { IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for HTInfo\n"); + + /* By this point in code ieee80211_networks_allocate() has been + * successfully called so the memory allocated should be freed + */ + ieee80211_networks_free(ieee); goto failed; } HTUpdateDefaultSetting(ieee); @@ -169,9 +172,9 @@ struct net_device *alloc_ieee80211(int sizeof_priv) INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]); for (i = 0; i < 17; i++) { - ieee->last_rxseq_num[i] = -1; - ieee->last_rxfrag_num[i] = -1; - ieee->last_packet_time[i] = 0; + ieee->last_rxseq_num[i] = -1; + ieee->last_rxfrag_num[i] = -1; + ieee->last_packet_time[i] = 0; } /* These function were added to load crypte module autoly */ @@ -186,7 +189,6 @@ struct net_device *alloc_ieee80211(int sizeof_priv) return NULL; } - void free_ieee80211(struct net_device *dev) { struct ieee80211_device *ieee = netdev_priv(dev); @@ -202,6 +204,7 @@ void free_ieee80211(struct net_device *dev) for (i = 0; i < WEP_KEYS; i++) { struct ieee80211_crypt_data *crypt = ieee->crypt[i]; + if (crypt) { if (crypt->ops) crypt->ops->deinit(crypt->priv); @@ -217,8 +220,7 @@ void free_ieee80211(struct net_device *dev) #ifdef CONFIG_IEEE80211_DEBUG u32 ieee80211_debug_level; -static int debug = \ - // IEEE80211_DL_INFO | +static int debug = // IEEE80211_DL_INFO | // IEEE80211_DL_WX | // IEEE80211_DL_SCAN | // IEEE80211_DL_STATE | @@ -247,10 +249,11 @@ static int show_debug_level(struct seq_file *m, void *v) } static ssize_t write_debug_level(struct file *file, const char __user *buffer, - size_t count, loff_t *ppos) + size_t count, loff_t *ppos) { unsigned long val; int err = kstrtoul_from_user(buffer, count, 0, &val); + if (err) return err; ieee80211_debug_level = val; @@ -277,7 +280,7 @@ int __init ieee80211_debug_init(void) ieee80211_debug_level = debug; ieee80211_proc = proc_mkdir(DRV_NAME, init_net.proc_net); - if (ieee80211_proc == NULL) { + if (!ieee80211_proc) { IEEE80211_ERROR("Unable to create " DRV_NAME " proc directory\n"); return -EIO; diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c index 28cae82d795c..5147f7c01e31 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c @@ -794,7 +794,7 @@ static u8 parse_subframe(struct sk_buff *skb, } if (rx_stats->bContainHTC) { - LLCOffset += sHTCLng; + LLCOffset += HTCLNG; } // Null packet, don't indicate it to upper layer ChkLength = LLCOffset;/* + (Frame_WEP(frame)!=0 ?Adapter->MgntInfo.SecurityInfo.EncryptionHeadOverhead:0);*/ @@ -1582,7 +1582,7 @@ static inline void ieee80211_extract_country_ie( if (!IS_COUNTRY_IE_VALID(ieee)) { - Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data); + dot11d_update_country_ie(ieee, addr2, info_element->len, info_element->data); } } @@ -1944,7 +1944,7 @@ int ieee80211_parse_info_param(struct ieee80211_device *ieee, { network->bMBssidValid = true; network->MBssidMask = 0xff << (network->MBssidMask); - cpMacAddr(network->MBssid, network->bssid); + ether_addr_copy(network->MBssid, network->bssid); network->MBssid[5] &= network->MBssidMask; } else @@ -2439,7 +2439,7 @@ static inline void ieee80211_process_probe_response( // then wireless adapter should do active scan from ch1~11 and // passive scan from ch12~14 - if (!IsLegalChannel(ieee, network->channel)) + if (!is_legal_channel(ieee, network->channel)) goto out; if (ieee->bGlobalDomain) { @@ -2448,7 +2448,7 @@ static inline void ieee80211_process_probe_response( // Case 1: Country code if(IS_COUNTRY_IE_VALID(ieee) ) { - if (!IsLegalChannel(ieee, network->channel)) { + if (!is_legal_channel(ieee, network->channel)) { printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network->channel); goto out; } @@ -2469,7 +2469,7 @@ static inline void ieee80211_process_probe_response( // Case 1: Country code if(IS_COUNTRY_IE_VALID(ieee) ) { - if (!IsLegalChannel(ieee, network->channel)) { + if (!is_legal_channel(ieee, network->channel)) { printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n",network->channel); goto out; } diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c index 212cc9ccbb96..8635faf84316 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c @@ -464,7 +464,7 @@ out: } else { ieee->sync_scan_hurryup = 0; if (IS_DOT11D_ENABLE(ieee)) - DOT11D_ScanComplete(ieee); + dot11d_scan_complete(ieee); mutex_unlock(&ieee->scan_mutex); } } @@ -504,7 +504,7 @@ static void ieee80211_softmac_scan_wq(struct work_struct *work) return; out: if (IS_DOT11D_ENABLE(ieee)) - DOT11D_ScanComplete(ieee); + dot11d_scan_complete(ieee); ieee->actscanning = false; watchdog = 0; ieee->scanning = 0; @@ -2357,7 +2357,7 @@ void ieee80211_disassociate(struct ieee80211_device *ieee) if (ieee->data_hard_stop) ieee->data_hard_stop(ieee->dev); if (IS_DOT11D_ENABLE(ieee)) - Dot11d_Reset(ieee); + dot11d_reset(ieee); ieee->state = IEEE80211_NOLINK; ieee->is_set_key = false; ieee->link_change(ieee->dev); @@ -2542,8 +2542,8 @@ void ieee80211_softmac_init(struct ieee80211_device *ieee) for (i = 0; i < 5; i++) ieee->seq_ctrl[i] = 0; - ieee->pDot11dInfo = kzalloc(sizeof(struct rt_dot11d_info), GFP_KERNEL); - if (!ieee->pDot11dInfo) + ieee->dot11d_info = kzalloc(sizeof(struct rt_dot11d_info), GFP_KERNEL); + if (!ieee->dot11d_info) IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't alloc memory for DOT11D\n"); //added for AP roaming ieee->LinkDetectInfo.SlotNum = 2; @@ -2603,8 +2603,8 @@ void ieee80211_softmac_init(struct ieee80211_device *ieee) void ieee80211_softmac_free(struct ieee80211_device *ieee) { mutex_lock(&ieee->wx_mutex); - kfree(ieee->pDot11dInfo); - ieee->pDot11dInfo = NULL; + kfree(ieee->dot11d_info); + ieee->dot11d_info = NULL; del_timer_sync(&ieee->associate_timer); cancel_delayed_work(&ieee->associate_retry_wq); diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c index cc4049de975d..024fa2702546 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c @@ -335,14 +335,14 @@ static void ieee80211_tx_query_agg_cap(struct ieee80211_device *ieee, printk("===>can't get TS\n"); return; } - if (!pTxTs->tx_admitted_ba_record.bValid) + if (!pTxTs->tx_admitted_ba_record.valid) { TsStartAddBaProcess(ieee, pTxTs); goto FORCED_AGG_SETTING; } else if (!pTxTs->using_ba) { - if (SN_LESS(pTxTs->tx_admitted_ba_record.BaStartSeqCtrl.field.SeqNum, (pTxTs->tx_cur_seq + 1) % 4096)) + if (SN_LESS(pTxTs->tx_admitted_ba_record.start_seq_ctrl.field.seq_num, (pTxTs->tx_cur_seq + 1) % 4096)) pTxTs->using_ba = true; else goto FORCED_AGG_SETTING; diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c index f2fcdec9bd17..fa59c712c74b 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c @@ -147,13 +147,13 @@ static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee, if (network->mode >= IEEE_N_24G)//add N rate here; { - PHT_CAPABILITY_ELE ht_cap = NULL; + struct ht_capability_ele *ht_cap = NULL; bool is40M = false, isShortGI = false; u8 max_mcs = 0; if (!memcmp(network->bssht.bdHTCapBuf, EWC11NHTCap, 4)) - ht_cap = (PHT_CAPABILITY_ELE)&network->bssht.bdHTCapBuf[4]; + ht_cap = (struct ht_capability_ele *)&network->bssht.bdHTCapBuf[4]; else - ht_cap = (PHT_CAPABILITY_ELE)&network->bssht.bdHTCapBuf[0]; + ht_cap = (struct ht_capability_ele *)&network->bssht.bdHTCapBuf[0]; is40M = (ht_cap->ChlWidth)?1:0; isShortGI = (ht_cap->ChlWidth)? ((ht_cap->ShortGI40Mhz)?1:0): diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_BA.h b/drivers/staging/rtl8192u/ieee80211/rtl819x_BA.h index b6a76aae4832..1a727856ba53 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_BA.h +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_BA.h @@ -2,67 +2,53 @@ #ifndef _BATYPE_H_ #define _BATYPE_H_ -#define TOTAL_TXBA_NUM 16 -#define TOTAL_RXBA_NUM 16 +#define BA_SETUP_TIMEOUT 200 -#define BA_SETUP_TIMEOUT 200 -#define BA_INACT_TIMEOUT 60000 +#define BA_POLICY_DELAYED 0 +#define BA_POLICY_IMMEDIATE 1 -#define BA_POLICY_DELAYED 0 -#define BA_POLICY_IMMEDIATE 1 - -#define ADDBA_STATUS_SUCCESS 0 +#define ADDBA_STATUS_SUCCESS 0 #define ADDBA_STATUS_REFUSED 37 #define ADDBA_STATUS_INVALID_PARAM 38 -#define DELBA_REASON_QSTA_LEAVING 36 -#define DELBA_REASON_END_BA 37 -#define DELBA_REASON_UNKNOWN_BA 38 -#define DELBA_REASON_TIMEOUT 39 -/* whether need define BA Action frames here? -struct ieee80211_ADDBA_Req{ - struct ieee80211_header_data header; - u8 category; - u8 -} __attribute__ ((packed)); -*/ -//Is this need?I put here just to make it easier to define structure BA_RECORD //WB -typedef union _SEQUENCE_CONTROL{ - u16 ShortData; +#define DELBA_REASON_END_BA 37 +#define DELBA_REASON_UNKNOWN_BA 38 +#define DELBA_REASON_TIMEOUT 39 + +union sequence_control { + u16 short_data; struct { - u16 FragNum:4; - u16 SeqNum:12; + u16 frag_num:4; + u16 seq_num:12; } field; -} SEQUENCE_CONTROL, *PSEQUENCE_CONTROL; +}; -typedef union _BA_PARAM_SET { - u8 charData[2]; - u16 shortData; +union ba_param_set { + u16 short_data; struct { - u16 AMSDU_Support:1; - u16 BAPolicy:1; - u16 TID:4; - u16 BufferSize:10; + u16 amsdu_support:1; + u16 ba_policy:1; + u16 tid:4; + u16 buffer_size:10; } field; -} BA_PARAM_SET, *PBA_PARAM_SET; +}; -typedef union _DELBA_PARAM_SET { - u8 charData[2]; - u16 shortData; +union delba_param_set { + u16 short_data; struct { - u16 Reserved:11; - u16 Initiator:1; - u16 TID:4; + u16 reserved:11; + u16 initiator:1; + u16 tid:4; } field; -} DELBA_PARAM_SET, *PDELBA_PARAM_SET; - -typedef struct _BA_RECORD { - struct timer_list Timer; - u8 bValid; - u8 DialogToken; - BA_PARAM_SET BaParamSet; - u16 BaTimeoutValue; - SEQUENCE_CONTROL BaStartSeqCtrl; -} BA_RECORD, *PBA_RECORD; +}; + +struct ba_record { + struct timer_list timer; + u8 valid; + u8 dialog_token; + union ba_param_set param_set; + u16 timeout_value; + union sequence_control start_seq_ctrl; +}; #endif //end _BATYPE_H_ diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c b/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c index 01b631c2a180..109445407cec 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c @@ -12,26 +12,26 @@ /******************************************************************************************************************** *function: Activate BA entry. And if Time is nozero, start timer. - * input: PBA_RECORD pBA //BA entry to be enabled + * input: struct ba_record *pBA //BA entry to be enabled * u16 Time //indicate time delay. * output: none ********************************************************************************************************************/ -static void ActivateBAEntry(struct ieee80211_device *ieee, PBA_RECORD pBA, u16 Time) +static void ActivateBAEntry(struct ieee80211_device *ieee, struct ba_record *pBA, u16 Time) { - pBA->bValid = true; + pBA->valid = true; if (Time != 0) - mod_timer(&pBA->Timer, jiffies + msecs_to_jiffies(Time)); + mod_timer(&pBA->timer, jiffies + msecs_to_jiffies(Time)); } /******************************************************************************************************************** *function: deactivate BA entry, including its timer. - * input: PBA_RECORD pBA //BA entry to be disabled + * input: struct ba_record *pBA //BA entry to be disabled * output: none ********************************************************************************************************************/ -static void DeActivateBAEntry(struct ieee80211_device *ieee, PBA_RECORD pBA) +static void DeActivateBAEntry(struct ieee80211_device *ieee, struct ba_record *pBA) { - pBA->bValid = false; - del_timer_sync(&pBA->Timer); + pBA->valid = false; + del_timer_sync(&pBA->timer); } /******************************************************************************************************************** *function: deactivete BA entry in Tx Ts, and send DELBA. @@ -42,18 +42,18 @@ static void DeActivateBAEntry(struct ieee80211_device *ieee, PBA_RECORD pBA) ********************************************************************************************************************/ static u8 TxTsDeleteBA(struct ieee80211_device *ieee, struct tx_ts_record *pTxTs) { - PBA_RECORD pAdmittedBa = &pTxTs->tx_admitted_ba_record; //These two BA entries must exist in TS structure - PBA_RECORD pPendingBa = &pTxTs->tx_pending_ba_record; + struct ba_record *pAdmittedBa = &pTxTs->tx_admitted_ba_record; //These two BA entries must exist in TS structure + struct ba_record *pPendingBa = &pTxTs->tx_pending_ba_record; u8 bSendDELBA = false; // Delete pending BA - if (pPendingBa->bValid) { + if (pPendingBa->valid) { DeActivateBAEntry(ieee, pPendingBa); bSendDELBA = true; } // Delete admitted BA - if (pAdmittedBa->bValid) { + if (pAdmittedBa->valid) { DeActivateBAEntry(ieee, pAdmittedBa); bSendDELBA = true; } @@ -70,10 +70,10 @@ static u8 TxTsDeleteBA(struct ieee80211_device *ieee, struct tx_ts_record *pTxTs ********************************************************************************************************************/ static u8 RxTsDeleteBA(struct ieee80211_device *ieee, struct rx_ts_record *pRxTs) { - PBA_RECORD pBa = &pRxTs->rx_admitted_ba_record; + struct ba_record *pBa = &pRxTs->rx_admitted_ba_record; u8 bSendDELBA = false; - if (pBa->bValid) { + if (pBa->valid) { DeActivateBAEntry(ieee, pBa); bSendDELBA = true; } @@ -84,28 +84,28 @@ static u8 RxTsDeleteBA(struct ieee80211_device *ieee, struct rx_ts_record *pRxTs /******************************************************************************************************************** *function: reset BA entry * input: - * PBA_RECORD pBA //entry to be reset + * struct ba_record *pBA //entry to be reset * output: none ********************************************************************************************************************/ -void ResetBaEntry(PBA_RECORD pBA) +void ResetBaEntry(struct ba_record *pBA) { - pBA->bValid = false; - pBA->BaParamSet.shortData = 0; - pBA->BaTimeoutValue = 0; - pBA->DialogToken = 0; - pBA->BaStartSeqCtrl.ShortData = 0; + pBA->valid = false; + pBA->param_set.short_data = 0; + pBA->timeout_value = 0; + pBA->dialog_token = 0; + pBA->start_seq_ctrl.short_data = 0; } //These functions need porting here or not? /******************************************************************************************************************************* *function: construct ADDBAREQ and ADDBARSP frame here together. * input: u8* Dst //ADDBA frame's destination - * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA. + * struct ba_record *pBA //BA_RECORD entry which stores the necessary information for BA. * u16 StatusCode //status code in RSP and I will use it to indicate whether it's RSP or REQ(will I?) * u8 type //indicate whether it's RSP(ACT_ADDBARSP) ow REQ(ACT_ADDBAREQ) * output: none * return: sk_buff* skb //return constructed skb to xmit *******************************************************************************************************************************/ -static struct sk_buff *ieee80211_ADDBA(struct ieee80211_device *ieee, u8 *Dst, PBA_RECORD pBA, u16 StatusCode, u8 type) +static struct sk_buff *ieee80211_ADDBA(struct ieee80211_device *ieee, u8 *Dst, struct ba_record *pBA, u16 StatusCode, u8 type) { struct sk_buff *skb = NULL; struct rtl_80211_hdr_3addr *BAReq = NULL; @@ -140,7 +140,7 @@ static struct sk_buff *ieee80211_ADDBA(struct ieee80211_device *ieee, u8 *Dst, P *tag++ = ACT_CAT_BA; *tag++ = type; // Dialog Token - *tag++ = pBA->DialogToken; + *tag++ = pBA->dialog_token; if (ACT_ADDBARSP == type) { // Status Code @@ -151,16 +151,16 @@ static struct sk_buff *ieee80211_ADDBA(struct ieee80211_device *ieee, u8 *Dst, P } // BA Parameter Set - put_unaligned_le16(pBA->BaParamSet.shortData, tag); + put_unaligned_le16(pBA->param_set.short_data, tag); tag += 2; // BA Timeout Value - put_unaligned_le16(pBA->BaTimeoutValue, tag); + put_unaligned_le16(pBA->timeout_value, tag); tag += 2; if (ACT_ADDBAREQ == type) { // BA Start SeqCtrl - memcpy(tag, (u8 *)&(pBA->BaStartSeqCtrl), 2); + memcpy(tag, (u8 *)&(pBA->start_seq_ctrl), 2); tag += 2; } @@ -173,7 +173,7 @@ static struct sk_buff *ieee80211_ADDBA(struct ieee80211_device *ieee, u8 *Dst, P /******************************************************************************************************************** *function: construct DELBA frame * input: u8* dst //DELBA frame's destination - * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA + * struct ba_record *pBA //BA_RECORD entry which stores the necessary information for BA * enum tr_select TxRxSelect //TX RX direction * u16 ReasonCode //status code. * output: none @@ -182,12 +182,12 @@ static struct sk_buff *ieee80211_ADDBA(struct ieee80211_device *ieee, u8 *Dst, P static struct sk_buff *ieee80211_DELBA( struct ieee80211_device *ieee, u8 *dst, - PBA_RECORD pBA, + struct ba_record *pBA, enum tr_select TxRxSelect, u16 ReasonCode ) { - DELBA_PARAM_SET DelbaParamSet; + union delba_param_set DelbaParamSet; struct sk_buff *skb = NULL; struct rtl_80211_hdr_3addr *Delba = NULL; u8 *tag = NULL; @@ -201,8 +201,8 @@ static struct sk_buff *ieee80211_DELBA( memset(&DelbaParamSet, 0, 2); - DelbaParamSet.field.Initiator = (TxRxSelect == TX_DIR) ? 1 : 0; - DelbaParamSet.field.TID = pBA->BaParamSet.field.TID; + DelbaParamSet.field.initiator = (TxRxSelect == TX_DIR) ? 1 : 0; + DelbaParamSet.field.tid = pBA->param_set.field.tid; skb = dev_alloc_skb(len + sizeof(struct rtl_80211_hdr_3addr)); //need to add something others? FIXME if (!skb) { @@ -226,7 +226,7 @@ static struct sk_buff *ieee80211_DELBA( // DELBA Parameter Set - put_unaligned_le16(DelbaParamSet.shortData, tag); + put_unaligned_le16(DelbaParamSet.short_data, tag); tag += 2; // Reason Code @@ -243,12 +243,12 @@ static struct sk_buff *ieee80211_DELBA( /******************************************************************************************************************** *function: send ADDBAReq frame out * input: u8* dst //ADDBAReq frame's destination - * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA + * struct ba_record *pBA //BA_RECORD entry which stores the necessary information for BA * output: none * notice: If any possible, please hide pBA in ieee. And temporarily use Manage Queue as softmac_mgmt_xmit() usually does ********************************************************************************************************************/ static void ieee80211_send_ADDBAReq(struct ieee80211_device *ieee, - u8 *dst, PBA_RECORD pBA) + u8 *dst, struct ba_record *pBA) { struct sk_buff *skb; skb = ieee80211_ADDBA(ieee, dst, pBA, 0, ACT_ADDBAREQ); //construct ACT_ADDBAREQ frames so set statuscode zero. @@ -266,13 +266,13 @@ static void ieee80211_send_ADDBAReq(struct ieee80211_device *ieee, /******************************************************************************************************************** *function: send ADDBARSP frame out * input: u8* dst //DELBA frame's destination - * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA + * struct ba_record *pBA //BA_RECORD entry which stores the necessary information for BA * u16 StatusCode //RSP StatusCode * output: none * notice: If any possible, please hide pBA in ieee. And temporarily use Manage Queue as softmac_mgmt_xmit() usually does ********************************************************************************************************************/ static void ieee80211_send_ADDBARsp(struct ieee80211_device *ieee, u8 *dst, - PBA_RECORD pBA, u16 StatusCode) + struct ba_record *pBA, u16 StatusCode) { struct sk_buff *skb; skb = ieee80211_ADDBA(ieee, dst, pBA, StatusCode, ACT_ADDBARSP); //construct ACT_ADDBARSP frames @@ -289,7 +289,7 @@ static void ieee80211_send_ADDBARsp(struct ieee80211_device *ieee, u8 *dst, /******************************************************************************************************************** *function: send ADDBARSP frame out * input: u8* dst //DELBA frame's destination - * PBA_RECORD pBA //BA_RECORD entry which stores the necessary information for BA + * struct ba_record *pBA //BA_RECORD entry which stores the necessary information for BA * enum tr_select TxRxSelect //TX or RX * u16 ReasonCode //DEL ReasonCode * output: none @@ -297,7 +297,7 @@ static void ieee80211_send_ADDBARsp(struct ieee80211_device *ieee, u8 *dst, ********************************************************************************************************************/ static void ieee80211_send_DELBA(struct ieee80211_device *ieee, u8 *dst, - PBA_RECORD pBA, enum tr_select TxRxSelect, + struct ba_record *pBA, enum tr_select TxRxSelect, u16 ReasonCode) { struct sk_buff *skb; @@ -321,10 +321,10 @@ int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee, struct sk_buff *skb) struct rtl_80211_hdr_3addr *req = NULL; u16 rc = 0; u8 *dst = NULL, *pDialogToken = NULL, *tag = NULL; - PBA_RECORD pBA = NULL; - PBA_PARAM_SET pBaParamSet = NULL; + struct ba_record *pBA = NULL; + union ba_param_set *pBaParamSet = NULL; u16 *pBaTimeoutVal = NULL; - PSEQUENCE_CONTROL pBaStartSeqCtrl = NULL; + union sequence_control *pBaStartSeqCtrl = NULL; struct rx_ts_record *pTS = NULL; if (skb->len < sizeof(struct rtl_80211_hdr_3addr) + 9) { @@ -342,9 +342,9 @@ int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee, struct sk_buff *skb) dst = &req->addr2[0]; tag += sizeof(struct rtl_80211_hdr_3addr); pDialogToken = tag + 2; //category+action - pBaParamSet = (PBA_PARAM_SET)(tag + 3); //+DialogToken + pBaParamSet = (union ba_param_set *)(tag + 3); //+DialogToken pBaTimeoutVal = (u16 *)(tag + 5); - pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7); + pBaStartSeqCtrl = (union sequence_control *)(req + 7); netdev_info(ieee->dev, "====================>rx ADDBAREQ from :%pM\n", dst); //some other capability is not ready now. @@ -362,7 +362,7 @@ int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee, struct sk_buff *skb) ieee, (struct ts_common_info **)(&pTS), dst, - (u8)(pBaParamSet->field.TID), + (u8)(pBaParamSet->field.tid), RX_DIR, true)) { rc = ADDBA_STATUS_REFUSED; @@ -371,10 +371,10 @@ int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee, struct sk_buff *skb) } pBA = &pTS->rx_admitted_ba_record; // To Determine the ADDBA Req content - // We can do much more check here, including BufferSize, AMSDU_Support, Policy, StartSeqCtrl... + // We can do much more check here, including buffer_size, AMSDU_Support, Policy, StartSeqCtrl... // I want to check StartSeqCtrl to make sure when we start aggregation!!! // - if (pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED) { + if (pBaParamSet->field.ba_policy == BA_POLICY_DELAYED) { rc = ADDBA_STATUS_INVALID_PARAM; IEEE80211_DEBUG(IEEE80211_DL_ERR, "BA Policy is not correct in %s()\n", __func__); goto OnADDBAReq_Fail; @@ -382,16 +382,16 @@ int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee, struct sk_buff *skb) // Admit the ADDBA Request // DeActivateBAEntry(ieee, pBA); - pBA->DialogToken = *pDialogToken; - pBA->BaParamSet = *pBaParamSet; - pBA->BaTimeoutValue = *pBaTimeoutVal; - pBA->BaStartSeqCtrl = *pBaStartSeqCtrl; + pBA->dialog_token = *pDialogToken; + pBA->param_set = *pBaParamSet; + pBA->timeout_value = *pBaTimeoutVal; + pBA->start_seq_ctrl = *pBaStartSeqCtrl; //for half N mode we only aggregate 1 frame if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)) - pBA->BaParamSet.field.BufferSize = 1; + pBA->param_set.field.buffer_size = 1; else - pBA->BaParamSet.field.BufferSize = 32; - ActivateBAEntry(ieee, pBA, pBA->BaTimeoutValue); + pBA->param_set.field.buffer_size = 32; + ActivateBAEntry(ieee, pBA, pBA->timeout_value); ieee80211_send_ADDBARsp(ieee, dst, pBA, ADDBA_STATUS_SUCCESS); // End of procedure. @@ -399,11 +399,11 @@ int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee, struct sk_buff *skb) OnADDBAReq_Fail: { - BA_RECORD BA; - BA.BaParamSet = *pBaParamSet; - BA.BaTimeoutValue = *pBaTimeoutVal; - BA.DialogToken = *pDialogToken; - BA.BaParamSet.field.BAPolicy = BA_POLICY_IMMEDIATE; + struct ba_record BA; + BA.param_set = *pBaParamSet; + BA.timeout_value = *pBaTimeoutVal; + BA.dialog_token = *pDialogToken; + BA.param_set.field.ba_policy = BA_POLICY_IMMEDIATE; ieee80211_send_ADDBARsp(ieee, dst, &BA, rc); return 0; //we send RSP out. } @@ -419,11 +419,11 @@ OnADDBAReq_Fail: int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee, struct sk_buff *skb) { struct rtl_80211_hdr_3addr *rsp = NULL; - PBA_RECORD pPendingBA, pAdmittedBA; + struct ba_record *pPendingBA, *pAdmittedBA; struct tx_ts_record *pTS = NULL; u8 *dst = NULL, *pDialogToken = NULL, *tag = NULL; u16 *pStatusCode = NULL, *pBaTimeoutVal = NULL; - PBA_PARAM_SET pBaParamSet = NULL; + union ba_param_set *pBaParamSet = NULL; u16 ReasonCode; if (skb->len < sizeof(struct rtl_80211_hdr_3addr) + 9) { @@ -439,7 +439,7 @@ int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee, struct sk_buff *skb) tag += sizeof(struct rtl_80211_hdr_3addr); pDialogToken = tag + 2; pStatusCode = (u16 *)(tag + 3); - pBaParamSet = (PBA_PARAM_SET)(tag + 5); + pBaParamSet = (union ba_param_set *)(tag + 5); pBaTimeoutVal = (u16 *)(tag + 7); // Check the capability @@ -461,7 +461,7 @@ int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee, struct sk_buff *skb) ieee, (struct ts_common_info **)(&pTS), dst, - (u8)(pBaParamSet->field.TID), + (u8)(pBaParamSet->field.tid), TX_DIR, false)) { IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS in %s()\n", __func__); @@ -478,11 +478,11 @@ int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee, struct sk_buff *skb) // Check if related BA is waiting for setup. // If not, reject by sending DELBA frame. // - if (pAdmittedBA->bValid) { + if (pAdmittedBA->valid) { // Since BA is already setup, we ignore all other ADDBA Response. IEEE80211_DEBUG(IEEE80211_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. Drop because already admit it! \n"); return -1; - } else if ((!pPendingBA->bValid) || (*pDialogToken != pPendingBA->DialogToken)) { + } else if ((!pPendingBA->valid) || (*pDialogToken != pPendingBA->dialog_token)) { IEEE80211_DEBUG(IEEE80211_DL_ERR, "OnADDBARsp(): Recv ADDBA Rsp. BA invalid, DELBA! \n"); ReasonCode = DELBA_REASON_UNKNOWN_BA; goto OnADDBARsp_Reject; @@ -498,7 +498,7 @@ int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee, struct sk_buff *skb) // We can compare the value of BA parameter set that Peer returned and Self sent. // If it is OK, then admitted. Or we can send DELBA to cancel BA mechanism. // - if (pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED) { + if (pBaParamSet->field.ba_policy == BA_POLICY_DELAYED) { // Since this is a kind of ADDBA failed, we delay next ADDBA process. pTS->add_ba_req_delayed = true; DeActivateBAEntry(ieee, pAdmittedBA); @@ -510,10 +510,10 @@ int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee, struct sk_buff *skb) // // Admitted condition // - pAdmittedBA->DialogToken = *pDialogToken; - pAdmittedBA->BaTimeoutValue = *pBaTimeoutVal; - pAdmittedBA->BaStartSeqCtrl = pPendingBA->BaStartSeqCtrl; - pAdmittedBA->BaParamSet = *pBaParamSet; + pAdmittedBA->dialog_token = *pDialogToken; + pAdmittedBA->timeout_value = *pBaTimeoutVal; + pAdmittedBA->start_seq_ctrl = pPendingBA->start_seq_ctrl; + pAdmittedBA->param_set = *pBaParamSet; DeActivateBAEntry(ieee, pAdmittedBA); ActivateBAEntry(ieee, pAdmittedBA, *pBaTimeoutVal); } else { @@ -526,8 +526,8 @@ int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee, struct sk_buff *skb) OnADDBARsp_Reject: { - BA_RECORD BA; - BA.BaParamSet = *pBaParamSet; + struct ba_record BA; + BA.param_set = *pBaParamSet; ieee80211_send_DELBA(ieee, dst, &BA, TX_DIR, ReasonCode); return 0; } @@ -543,7 +543,7 @@ OnADDBARsp_Reject: int ieee80211_rx_DELBA(struct ieee80211_device *ieee, struct sk_buff *skb) { struct rtl_80211_hdr_3addr *delba = NULL; - PDELBA_PARAM_SET pDelBaParamSet = NULL; + union delba_param_set *pDelBaParamSet = NULL; u8 *dst = NULL; if (skb->len < sizeof(struct rtl_80211_hdr_3addr) + 6) { @@ -563,16 +563,16 @@ int ieee80211_rx_DELBA(struct ieee80211_device *ieee, struct sk_buff *skb) IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_BA, skb->data, skb->len); delba = (struct rtl_80211_hdr_3addr *)skb->data; dst = &delba->addr2[0]; - pDelBaParamSet = (PDELBA_PARAM_SET)&delba->payload[2]; + pDelBaParamSet = (union delba_param_set *)&delba->payload[2]; - if (pDelBaParamSet->field.Initiator == 1) { + if (pDelBaParamSet->field.initiator == 1) { struct rx_ts_record *pRxTs; if (!GetTs( ieee, (struct ts_common_info **)&pRxTs, dst, - (u8)pDelBaParamSet->field.TID, + (u8)pDelBaParamSet->field.tid, RX_DIR, false)) { IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS for RXTS in %s()\n", __func__); @@ -587,7 +587,7 @@ int ieee80211_rx_DELBA(struct ieee80211_device *ieee, struct sk_buff *skb) ieee, (struct ts_common_info **)&pTxTs, dst, - (u8)pDelBaParamSet->field.TID, + (u8)pDelBaParamSet->field.tid, TX_DIR, false)) { IEEE80211_DEBUG(IEEE80211_DL_ERR, "can't get TS for TXTS in %s()\n", __func__); @@ -615,22 +615,22 @@ TsInitAddBA( u8 bOverwritePending ) { - PBA_RECORD pBA = &pTS->tx_pending_ba_record; + struct ba_record *pBA = &pTS->tx_pending_ba_record; - if (pBA->bValid && !bOverwritePending) + if (pBA->valid && !bOverwritePending) return; // Set parameters to "Pending" variable set DeActivateBAEntry(ieee, pBA); - pBA->DialogToken++; // DialogToken: Only keep the latest dialog token - pBA->BaParamSet.field.AMSDU_Support = 0; // Do not support A-MSDU with A-MPDU now!! - pBA->BaParamSet.field.BAPolicy = Policy; // Policy: Delayed or Immediate - pBA->BaParamSet.field.TID = pTS->ts_common_info.t_spec.ts_info.uc_tsid; // TID - // BufferSize: This need to be set according to A-MPDU vector - pBA->BaParamSet.field.BufferSize = 32; // BufferSize: This need to be set according to A-MPDU vector - pBA->BaTimeoutValue = 0; // Timeout value: Set 0 to disable Timer - pBA->BaStartSeqCtrl.field.SeqNum = (pTS->tx_cur_seq + 3) % 4096; // Block Ack will start after 3 packets later. + pBA->dialog_token++; // DialogToken: Only keep the latest dialog token + pBA->param_set.field.amsdu_support = 0; // Do not support A-MSDU with A-MPDU now!! + pBA->param_set.field.ba_policy = Policy; // Policy: Delayed or Immediate + pBA->param_set.field.tid = pTS->ts_common_info.t_spec.ts_info.uc_tsid; // TID + // buffer_size: This need to be set according to A-MPDU vector + pBA->param_set.field.buffer_size = 32; // buffer_size: This need to be set according to A-MPDU vector + pBA->timeout_value = 0; // Timeout value: Set 0 to disable Timer + pBA->start_seq_ctrl.field.seq_num = (pTS->tx_cur_seq + 3) % 4096; // Block Ack will start after 3 packets later. ActivateBAEntry(ieee, pBA, BA_SETUP_TIMEOUT); @@ -647,7 +647,7 @@ TsInitDelBA(struct ieee80211_device *ieee, struct ts_common_info *pTsCommonInfo, ieee80211_send_DELBA( ieee, pTsCommonInfo->addr, - (pTxTs->tx_admitted_ba_record.bValid)?(&pTxTs->tx_admitted_ba_record):(&pTxTs->tx_pending_ba_record), + (pTxTs->tx_admitted_ba_record.valid)?(&pTxTs->tx_admitted_ba_record):(&pTxTs->tx_pending_ba_record), TxRxSelect, DELBA_REASON_END_BA); } else if (TxRxSelect == RX_DIR) { @@ -669,16 +669,16 @@ TsInitDelBA(struct ieee80211_device *ieee, struct ts_common_info *pTsCommonInfo, ********************************************************************************************************************/ void BaSetupTimeOut(struct timer_list *t) { - struct tx_ts_record *pTxTs = from_timer(pTxTs, t, tx_pending_ba_record.Timer); + struct tx_ts_record *pTxTs = from_timer(pTxTs, t, tx_pending_ba_record.timer); pTxTs->add_ba_req_in_progress = false; pTxTs->add_ba_req_delayed = true; - pTxTs->tx_pending_ba_record.bValid = false; + pTxTs->tx_pending_ba_record.valid = false; } void TxBaInactTimeout(struct timer_list *t) { - struct tx_ts_record *pTxTs = from_timer(pTxTs, t, tx_admitted_ba_record.Timer); + struct tx_ts_record *pTxTs = from_timer(pTxTs, t, tx_admitted_ba_record.timer); struct ieee80211_device *ieee = container_of(pTxTs, struct ieee80211_device, TxTsRecord[pTxTs->num]); TxTsDeleteBA(ieee, pTxTs); ieee80211_send_DELBA( @@ -691,7 +691,7 @@ void TxBaInactTimeout(struct timer_list *t) void RxBaInactTimeout(struct timer_list *t) { - struct rx_ts_record *pRxTs = from_timer(pRxTs, t, rx_admitted_ba_record.Timer); + struct rx_ts_record *pRxTs = from_timer(pRxTs, t, rx_admitted_ba_record.timer); struct ieee80211_device *ieee = container_of(pRxTs, struct ieee80211_device, RxTsRecord[pRxTs->num]); RxTsDeleteBA(ieee, pRxTs); diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h b/drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h index 7d54a7cd9514..64d5359cf7e2 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_HT.h @@ -2,40 +2,34 @@ #ifndef _RTL819XU_HTTYPE_H_ #define _RTL819XU_HTTYPE_H_ -//------------------------------------------------------------ -// The HT Capability element is present in beacons, association request, -// reassociation request and probe response frames -//------------------------------------------------------------ - -// -// MIMO Power Save Settings -// -#define MIMO_PS_STATIC 0 - -// -// There should be 128 bits to cover all of the MCS rates. However, since -// 8190 does not support too much rates, one integer is quite enough. -// - -#define sHTCLng 4 +/* + * The HT Capability element is present in beacons, association request, + * reassociation request and probe response frames + */ +/* + * MIMO Power Save Settings + */ +#define MIMO_PS_STATIC 0 -#define HT_SUPPORTED_MCS_1SS_BITMAP 0x000000ff -#define HT_SUPPORTED_MCS_2SS_BITMAP 0x0000ff00 -#define HT_SUPPORTED_MCS_1SS_2SS_BITMAP HT_MCS_1SS_BITMAP|HT_MCS_1SS_2SS_BITMAP +/* + * There should be 128 bits to cover all of the MCS rates. However, since + * 8190 does not support too much rates, one integer is quite enough. + */ +#define HTCLNG 4 -// -// Represent Channel Width in HT Capabilities -// +/* + * Represent Channel Width in HT Capabilities + */ enum ht_channel_width { HT_CHANNEL_WIDTH_20 = 0, HT_CHANNEL_WIDTH_20_40 = 1, }; -// -// Represent Extension Channel Offset in HT Capabilities -// This is available only in 40Mhz mode. -// +/* + * Represent Extension Channel Offset in HT Capabilities + * This is available only in 40Mhz mode. + */ enum ht_extension_chan_offset { HT_EXTCHNL_OFFSET_NO_EXT = 0, HT_EXTCHNL_OFFSET_UPPER = 1, @@ -43,53 +37,7 @@ enum ht_extension_chan_offset { HT_EXTCHNL_OFFSET_LOWER = 3, }; -typedef enum _CHNLOP { - CHNLOP_NONE = 0, // No Action now - CHNLOP_SCAN = 1, // Scan in progress - CHNLOP_SWBW = 2, // Bandwidth switching in progress - CHNLOP_SWCHNL = 3, // Software Channel switching in progress -} CHNLOP, *PCHNLOP; - -// Determine if the Channel Operation is in progress -#define CHHLOP_IN_PROGRESS(_pHTInfo) \ - ((_pHTInfo)->ChnlOp > CHNLOP_NONE) ? TRUE : FALSE - -/* -typedef union _HT_CAPABILITY{ - u16 ShortData; - u8 CharData[2]; - struct - { - u16 AdvCoding:1; - u16 ChlWidth:1; - u16 MimoPwrSave:2; - u16 GreenField:1; - u16 ShortGI20Mhz:1; - u16 ShortGI40Mhz:1; - u16 STBC:1; - u16 BeamForm:1; - u16 DelayBA:1; - u16 MaxAMSDUSize:1; - u16 DssCCk:1; - u16 PSMP:1; - u16 Rsvd:3; - }Field; -}HT_CAPABILITY, *PHT_CAPABILITY; - -typedef union _HT_CAPABILITY_MACPARA{ - u8 ShortData; - u8 CharData[1]; - struct - { - u8 MaxRxAMPDU:2; - u8 MPDUDensity:2; - u8 Rsvd:4; - }Field; -}HT_CAPABILITY_MACPARA, *PHT_CAPABILITY_MACPARA; -*/ - -typedef struct _HT_CAPABILITY_ELE { - +struct ht_capability_ele { //HT capability info u8 AdvCoding:1; u8 ChlWidth:1; @@ -114,7 +62,6 @@ typedef struct _HT_CAPABILITY_ELE { //Supported MCS set u8 MCS[16]; - //Extended HT Capability Info u16 ExtHTCapInfo; @@ -124,13 +71,12 @@ typedef struct _HT_CAPABILITY_ELE { //Antenna Selection Capabilities u8 ASCap; -} __attribute__ ((packed)) HT_CAPABILITY_ELE, *PHT_CAPABILITY_ELE; - -//------------------------------------------------------------ -// The HT Information element is present in beacons -// Only AP is required to include this element -//------------------------------------------------------------ +} __packed; +/* + * The HT Information element is present in beacons + * Only AP is required to include this element + */ typedef struct _HT_INFORMATION_ELE { u8 ControlChl; @@ -169,12 +115,11 @@ typedef enum _HT_AGGRE_MODE_E { HT_AGG_FORCE_DISABLE = 2, }HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E; -//------------------------------------------------------------ -// The Data structure is used to keep HT related variables when card is -// configured as non-AP STA mode. **Note** Current_xxx should be set -// to default value in HTInitializeHTInfo() -//------------------------------------------------------------ - +/* + * The Data structure is used to keep HT related variables when card is + * configured as non-AP STA mode. **Note** Current_xxx should be set + * to default value in HTInitializeHTInfo() + */ typedef struct _RT_HIGH_THROUGHPUT { u8 bEnableHT; u8 bCurrentHTSupport; @@ -194,23 +139,20 @@ typedef struct _RT_HIGH_THROUGHPUT { // 802.11n spec version for "peer" HT_SPEC_VER ePeerHTSpecVer; - // HT related information for "Self" - HT_CAPABILITY_ELE SelfHTCap; // This is HT cap element sent to peer STA, which also indicate HT Rx capabilities. + struct ht_capability_ele SelfHTCap; // This is HT cap element sent to peer STA, which also indicate HT Rx capabilities. HT_INFORMATION_ELE SelfHTInfo; // This is HT info element sent to peer STA, which also indicate HT Rx capabilities. // HT related information for "Peer" u8 PeerHTCapBuf[32]; u8 PeerHTInfoBuf[32]; - // A-MSDU related u8 bAMSDU_Support; // This indicates Tx A-MSDU capability u16 nAMSDU_MaxSize; // This indicates Tx A-MSDU capability u8 bCurrent_AMSDU_Support; // This indicates Tx A-MSDU capability u16 nCurrent_AMSDU_MaxSize; // This indicates Tx A-MSDU capability - // AMPDU related <2006.08.10 Emily> u8 bAMPDUEnable; // This indicate Tx A-MPDU capability u8 bCurrentAMPDUEnable; // This indicate Tx A-MPDU capability @@ -243,7 +185,6 @@ typedef struct _RT_HIGH_THROUGHPUT { // For Bandwidth Switching u8 bSwBwInProgress; - CHNLOP ChnlOp; // software switching channel in progress. By Bruce, 2008-02-15. u8 SwBwStep; //struct timer_list SwBwTimer; //moved to ieee80211_device. as timer_list need include some header file here. @@ -278,13 +219,11 @@ typedef struct _RT_HIGH_THROUGHPUT { u32 IOTAction; } __attribute__ ((packed)) RT_HIGH_THROUGHPUT, *PRT_HIGH_THROUGHPUT; -//------------------------------------------------------------ -// The Data structure is used to keep HT related variable for "each AP" -// when card is configured as "STA mode" -//------------------------------------------------------------ - +/* + * The Data structure is used to keep HT related variable for "each AP" + * when card is configured as "STA mode" + */ typedef struct _BSS_HT { - u8 bdSupportHT; // HT related elements @@ -294,7 +233,7 @@ typedef struct _BSS_HT { u16 bdHTInfoLen; HT_SPEC_VER bdHTSpecVer; - //HT_CAPABILITY_ELE bdHTCapEle; + //struct ht_capability_ele bdHTCapEle; //HT_INFORMATION_ELE bdHTInfoEle; u8 bdRT2RTAggregation; @@ -304,27 +243,27 @@ typedef struct _BSS_HT { extern u8 MCS_FILTER_ALL[16]; extern u8 MCS_FILTER_1SS[16]; -/* 2007/07/11 MH Modify the macro. Becaus STA may link with a N-AP. If we set - STA in A/B/G mode and AP is still in N mode. The macro will be wrong. We have - to add a macro to judge wireless mode. */ +/* + * 2007/07/11 MH Modify the macro. Becaus STA may link with a N-AP. If we set + * STA in A/B/G mode and AP is still in N mode. The macro will be wrong. We have + * to add a macro to judge wireless mode. + */ #define PICK_RATE(_nLegacyRate, _nMcsRate) \ - (_nMcsRate==0)?(_nLegacyRate&0x7f):(_nMcsRate) + (_nMcsRate == 0) ? (_nLegacyRate & 0x7f) : (_nMcsRate) /* 2007/07/12 MH We only define legacy and HT wireless mode now. */ #define LEGACY_WIRELESS_MODE IEEE_MODE_MASK #define CURRENT_RATE(WirelessMode, LegacyRate, HTRate) \ - ((WirelessMode & (LEGACY_WIRELESS_MODE))!=0)?\ - (LegacyRate):\ + ((WirelessMode & (LEGACY_WIRELESS_MODE)) != 0) ?\ + (LegacyRate) :\ (PICK_RATE(LegacyRate, HTRate)) - - // MCS Bw 40 {1~7, 12~15,32} #define RATE_ADPT_1SS_MASK 0xFF #define RATE_ADPT_2SS_MASK 0xF0 //Skip MCS8~11 because mcs7 > mcs6, 9, 10, 11. 2007.01.16 by Emily #define RATE_ADPT_MCS32_MASK 0x01 -#define IS_11N_MCS_RATE(rate) (rate&0x80) +#define IS_11N_MCS_RATE(rate) (rate & 0x80) typedef enum _HT_AGGRE_SIZE { HT_AGG_SIZE_8K = 0, @@ -341,13 +280,13 @@ typedef enum _HT_IOT_PEER HT_IOT_PEER_BROADCOM = 2, HT_IOT_PEER_RALINK = 3, HT_IOT_PEER_ATHEROS = 4, - HT_IOT_PEER_CISCO= 5, + HT_IOT_PEER_CISCO = 5, HT_IOT_PEER_MAX = 6 }HT_IOT_PEER_E, *PHTIOT_PEER_E; -// -// IOT Action for different AP -// +/* + * IOT Action for different AP + */ typedef enum _HT_IOT_ACTION { HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001, HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002, diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_HTProc.c b/drivers/staging/rtl8192u/ieee80211/rtl819x_HTProc.c index b948eae5909d..c73a8058cf87 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_HTProc.c +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_HTProc.c @@ -130,15 +130,15 @@ void HTUpdateDefaultSetting(struct ieee80211_device *ieee) */ void HTDebugHTCapability(u8 *CapIE, u8 *TitleString) { - static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily - PHT_CAPABILITY_ELE pCapELE; + static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily + struct ht_capability_ele *pCapELE; if (!memcmp(CapIE, EWC11NHTCap, sizeof(EWC11NHTCap))) { //EWC IE IEEE80211_DEBUG(IEEE80211_DL_HT, "EWC IE in %s()\n", __func__); - pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[4]); + pCapELE = (struct ht_capability_ele *)(&CapIE[4]); } else { - pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[0]); + pCapELE = (struct ht_capability_ele *)(&CapIE[0]); } IEEE80211_DEBUG(IEEE80211_DL_HT, "<Log HT Capability>. Called by %s\n", TitleString); @@ -216,64 +216,7 @@ void HTDebugHTInfo(u8 *InfoIE, u8 *TitleString) pHTInfoEle->BasicMSC[1], pHTInfoEle->BasicMSC[2], pHTInfoEle->BasicMSC[3], pHTInfoEle->BasicMSC[4]); } -/* - * Return: true if station in half n mode and AP supports 40 bw - */ -static bool IsHTHalfNmode40Bandwidth(struct ieee80211_device *ieee) -{ - bool retValue = false; - PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; - - if (!pHTInfo->bCurrentHTSupport) // wireless is n mode - retValue = false; - else if (!pHTInfo->bRegBW40MHz) // station supports 40 bw - retValue = false; - else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)) // station in half n mode - retValue = false; - else if (((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ChlWidth) // ap support 40 bw - retValue = true; - else - retValue = false; - - return retValue; -} - -static bool IsHTHalfNmodeSGI(struct ieee80211_device *ieee, bool is40MHz) -{ - bool retValue = false; - PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; - - if (!pHTInfo->bCurrentHTSupport) // wireless is n mode - retValue = false; - else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)) // station in half n mode - retValue = false; - else if (is40MHz) { // ap support 40 bw - if (((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI40Mhz) // ap support 40 bw short GI - retValue = true; - else - retValue = false; - } else { - if (((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI20Mhz) // ap support 40 bw short GI - retValue = true; - else - retValue = false; - } - - return retValue; -} - -u16 HTHalfMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate) -{ - u8 is40MHz; - u8 isShortGI; - - is40MHz = (IsHTHalfNmode40Bandwidth(ieee)) ? 1 : 0; - isShortGI = (IsHTHalfNmodeSGI(ieee, is40MHz)) ? 1 : 0; - - return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate & 0x7f)]; -} - -u16 HTMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate) +static u16 HTMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate) { PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; @@ -530,7 +473,7 @@ void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo) void HTConstructCapabilityElement(struct ieee80211_device *ieee, u8 *posHTCap, u8 *len, u8 IsEncrypt) { PRT_HIGH_THROUGHPUT pHT = ieee->pHTInfo; - PHT_CAPABILITY_ELE pCapELE = NULL; + struct ht_capability_ele *pCapELE = NULL; //u8 bIsDeclareMCS13; if (!posHTCap || !pHT) { @@ -544,9 +487,9 @@ void HTConstructCapabilityElement(struct ieee80211_device *ieee, u8 *posHTCap, u u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33}; // For 11n EWC definition, 2007.07.17, by Emily memcpy(posHTCap, EWC11NHTCap, sizeof(EWC11NHTCap)); - pCapELE = (PHT_CAPABILITY_ELE)&posHTCap[4]; + pCapELE = (struct ht_capability_ele *)&posHTCap[4]; } else { - pCapELE = (PHT_CAPABILITY_ELE)posHTCap; + pCapELE = (struct ht_capability_ele *)posHTCap; } //HT capability info @@ -894,11 +837,10 @@ static u8 HTFilterMCSRate(struct ieee80211_device *ieee, u8 *pSupportMCS, return true; } -void HTSetConnectBwMode(struct ieee80211_device *ieee, enum ht_channel_width Bandwidth, enum ht_extension_chan_offset Offset); void HTOnAssocRsp(struct ieee80211_device *ieee) { PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; - PHT_CAPABILITY_ELE pPeerHTCap = NULL; + struct ht_capability_ele *pPeerHTCap = NULL; PHT_INFORMATION_ELE pPeerHTInfo = NULL; u16 nMaxAMSDUSize = 0; u8 *pMcsFilter = NULL; @@ -913,16 +855,16 @@ void HTOnAssocRsp(struct ieee80211_device *ieee) return; } IEEE80211_DEBUG(IEEE80211_DL_HT, "===> HTOnAssocRsp_wq(): HT_ENABLE\n"); -// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, pHTInfo->PeerHTCapBuf, sizeof(HT_CAPABILITY_ELE)); +// IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, pHTInfo->PeerHTCapBuf, sizeof(struct ht_capability_ele)); // IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, pHTInfo->PeerHTInfoBuf, sizeof(HT_INFORMATION_ELE)); // HTDebugHTCapability(pHTInfo->PeerHTCapBuf,"HTOnAssocRsp_wq"); // HTDebugHTInfo(pHTInfo->PeerHTInfoBuf,"HTOnAssocRsp_wq"); // if (!memcmp(pHTInfo->PeerHTCapBuf, EWC11NHTCap, sizeof(EWC11NHTCap))) - pPeerHTCap = (PHT_CAPABILITY_ELE)(&pHTInfo->PeerHTCapBuf[4]); + pPeerHTCap = (struct ht_capability_ele *)(&pHTInfo->PeerHTCapBuf[4]); else - pPeerHTCap = (PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf); + pPeerHTCap = (struct ht_capability_ele *)(pHTInfo->PeerHTCapBuf); if (!memcmp(pHTInfo->PeerHTInfoBuf, EWC11NHTInfo, sizeof(EWC11NHTInfo))) pPeerHTInfo = (PHT_INFORMATION_ELE)(&pHTInfo->PeerHTInfoBuf[4]); @@ -932,7 +874,7 @@ void HTOnAssocRsp(struct ieee80211_device *ieee) //////////////////////////////////////////////////////// // Configurations: //////////////////////////////////////////////////////// - IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA | IEEE80211_DL_HT, pPeerHTCap, sizeof(HT_CAPABILITY_ELE)); + IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA | IEEE80211_DL_HT, pPeerHTCap, sizeof(struct ht_capability_ele)); // IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA|IEEE80211_DL_HT, pPeerHTInfo, sizeof(HT_INFORMATION_ELE)); // Config Supported Channel Width setting // @@ -1069,7 +1011,6 @@ void HTOnAssocRsp(struct ieee80211_device *ieee) pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode; } -void HTSetConnectBwModeCallback(struct ieee80211_device *ieee); /* *function: initialize HT info(struct PRT_HIGH_THROUGHPUT) * input: struct ieee80211_device* ieee @@ -1122,7 +1063,6 @@ void HTInitializeHTInfo(struct ieee80211_device *ieee) memset(&pHTInfo->PeerHTInfoBuf, 0, sizeof(pHTInfo->PeerHTInfoBuf)); pHTInfo->bSwBwInProgress = false; - pHTInfo->ChnlOp = CHNLOP_NONE; // Set default IEEE spec for Draft N pHTInfo->ePeerHTSpecVer = HT_SPEC_VER_IEEE; @@ -1177,7 +1117,7 @@ void HTResetSelfAndSavePeerSetting(struct ieee80211_device *ieee, struct ieee802 { PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; // u16 nMaxAMSDUSize; -// PHT_CAPABILITY_ELE pPeerHTCap = (PHT_CAPABILITY_ELE)pNetwork->bssht.bdHTCapBuf; +// struct ht_capability_ele *pPeerHTCap = (struct ht_capability_ele *)pNetwork->bssht.bdHTCapBuf; // PHT_INFORMATION_ELE pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf; // u8* pMcsFilter; u8 bIOTAction = 0; @@ -1250,8 +1190,8 @@ void HTResetSelfAndSavePeerSetting(struct ieee80211_device *ieee, struct ieee802 void HTUpdateSelfAndPeerSetting(struct ieee80211_device *ieee, struct ieee80211_network *pNetwork) { - PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; -// PHT_CAPABILITY_ELE pPeerHTCap = (PHT_CAPABILITY_ELE)pNetwork->bssht.bdHTCapBuf; + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; +// struct ht_capability_ele *pPeerHTCap = (struct ht_capability_ele *)pNetwork->bssht.bdHTCapBuf; PHT_INFORMATION_ELE pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf; if (pHTInfo->bCurrentHTSupport) { @@ -1287,6 +1227,29 @@ u8 HTCCheck(struct ieee80211_device *ieee, u8 *pFrame) return false; } +static void HTSetConnectBwModeCallback(struct ieee80211_device *ieee) +{ + PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; + + IEEE80211_DEBUG(IEEE80211_DL_HT, "======>%s()\n", __func__); + + if (pHTInfo->bCurBW40MHz) { + if (pHTInfo->CurSTAExtChnlOffset == HT_EXTCHNL_OFFSET_UPPER) + ieee->set_chan(ieee->dev, ieee->current_network.channel + 2); + else if (pHTInfo->CurSTAExtChnlOffset == HT_EXTCHNL_OFFSET_LOWER) + ieee->set_chan(ieee->dev, ieee->current_network.channel - 2); + else + ieee->set_chan(ieee->dev, ieee->current_network.channel); + + ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset); + } else { + ieee->set_chan(ieee->dev, ieee->current_network.channel); + ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT); + } + + pHTInfo->bSwBwInProgress = false; +} + /* * This function set bandwidth mode in protocol layer. */ @@ -1337,26 +1300,3 @@ void HTSetConnectBwMode(struct ieee80211_device *ieee, enum ht_channel_width Ban // spin_unlock_irqrestore(&(ieee->bw_spinlock), flags); } - -void HTSetConnectBwModeCallback(struct ieee80211_device *ieee) -{ - PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo; - - IEEE80211_DEBUG(IEEE80211_DL_HT, "======>%s()\n", __func__); - - if (pHTInfo->bCurBW40MHz) { - if (pHTInfo->CurSTAExtChnlOffset == HT_EXTCHNL_OFFSET_UPPER) - ieee->set_chan(ieee->dev, ieee->current_network.channel + 2); - else if (pHTInfo->CurSTAExtChnlOffset == HT_EXTCHNL_OFFSET_LOWER) - ieee->set_chan(ieee->dev, ieee->current_network.channel - 2); - else - ieee->set_chan(ieee->dev, ieee->current_network.channel); - - ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset); - } else { - ieee->set_chan(ieee->dev, ieee->current_network.channel); - ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT); - } - - pHTInfo->bSwBwInProgress = false; -} diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_TS.h b/drivers/staging/rtl8192u/ieee80211/rtl819x_TS.h index 924d4b373099..7ed140009760 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_TS.h +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_TS.h @@ -78,8 +78,8 @@ struct ts_common_info { struct tx_ts_record { struct ts_common_info ts_common_info; u16 tx_cur_seq; - BA_RECORD tx_pending_ba_record; - BA_RECORD tx_admitted_ba_record; + struct ba_record tx_pending_ba_record; + struct ba_record tx_admitted_ba_record; u8 add_ba_req_in_progress; u8 add_ba_req_delayed; u8 using_ba; @@ -93,7 +93,7 @@ struct rx_ts_record { u16 rx_timeout_indicate_seq; struct list_head rx_pending_pkt_list; struct timer_list rx_pkt_pending_timer; - BA_RECORD rx_admitted_ba_record; + struct ba_record rx_admitted_ba_record; u16 rx_last_seq_num; u8 rx_last_frag_num; u8 num; diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c index d46d8f468671..c76715ffa08b 100644 --- a/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c +++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c @@ -36,11 +36,11 @@ static void RxPktPendingTimeout(struct timer_list *t) bool bPktInBuf = false; spin_lock_irqsave(&(ieee->reorder_spinlock), flags); - IEEE80211_DEBUG(IEEE80211_DL_REORDER,"==================>%s()\n",__func__); + IEEE80211_DEBUG(IEEE80211_DL_REORDER, "==================>%s()\n", __func__); if(pRxTs->rx_timeout_indicate_seq != 0xffff) { // Indicate the pending packets sequentially according to SeqNum until meet the gap. while(!list_empty(&pRxTs->rx_pending_pkt_list)) { - pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTs->rx_pending_pkt_list.prev,RX_REORDER_ENTRY,List); + pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTs->rx_pending_pkt_list.prev, RX_REORDER_ENTRY, List); if(index == 0) pRxTs->rx_indicate_seq = pReorderEntry->SeqNum; @@ -51,7 +51,7 @@ static void RxPktPendingTimeout(struct timer_list *t) if(SN_EQUAL(pReorderEntry->SeqNum, pRxTs->rx_indicate_seq)) pRxTs->rx_indicate_seq = (pRxTs->rx_indicate_seq + 1) % 4096; - IEEE80211_DEBUG(IEEE80211_DL_REORDER,"RxPktPendingTimeout(): IndicateSeq: %d\n", pReorderEntry->SeqNum); + IEEE80211_DEBUG(IEEE80211_DL_REORDER, "RxPktPendingTimeout(): IndicateSeq: %d\n", pReorderEntry->SeqNum); ieee->stats_IndicateArray[index] = pReorderEntry->prxb; index++; @@ -151,9 +151,9 @@ void TSInitialize(struct ieee80211_device *ieee) timer_setup(&pTxTS->ts_common_info.inact_timer, TsInactTimeout, 0); timer_setup(&pTxTS->ts_add_ba_timer, TsAddBaProcess, 0); - timer_setup(&pTxTS->tx_pending_ba_record.Timer, BaSetupTimeOut, + timer_setup(&pTxTS->tx_pending_ba_record.timer, BaSetupTimeOut, 0); - timer_setup(&pTxTS->tx_admitted_ba_record.Timer, + timer_setup(&pTxTS->tx_admitted_ba_record.timer, TxBaInactTimeout, 0); ResetTxTsEntry(pTxTS); list_add_tail(&pTxTS->ts_common_info.list, &ieee->Tx_TS_Unused_List); @@ -171,7 +171,7 @@ void TSInitialize(struct ieee80211_device *ieee) 0); timer_setup(&pRxTS->ts_common_info.inact_timer, TsInactTimeout, 0); - timer_setup(&pRxTS->rx_admitted_ba_record.Timer, + timer_setup(&pRxTS->rx_admitted_ba_record.timer, RxBaInactTimeout, 0); timer_setup(&pRxTS->rx_pkt_pending_timer, RxPktPendingTimeout, 0); ResetRxTsEntry(pRxTS); @@ -426,7 +426,7 @@ static void RemoveTsEntry(struct ieee80211_device *ieee, struct ts_common_info * while(!list_empty(&pRxTS->rx_pending_pkt_list)) { spin_lock_irqsave(&(ieee->reorder_spinlock), flags); //pRxReorderEntry = list_entry(&pRxTS->rx_pending_pkt_list.prev,RX_REORDER_ENTRY,List); - pRxReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTS->rx_pending_pkt_list.prev,RX_REORDER_ENTRY,List); + pRxReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTS->rx_pending_pkt_list.prev, RX_REORDER_ENTRY, List); list_del_init(&pRxReorderEntry->List); { int i = 0; @@ -529,7 +529,7 @@ void TsStartAddBaProcess(struct ieee80211_device *ieee, struct tx_ts_record *pTx mod_timer(&pTxTS->ts_add_ba_timer, jiffies + msecs_to_jiffies(TS_ADDBA_DELAY)); } else { - IEEE80211_DEBUG(IEEE80211_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n"); + IEEE80211_DEBUG(IEEE80211_DL_BA, "TsStartAddBaProcess(): Immediately Start ADDBA now!!\n"); mod_timer(&pTxTS->ts_add_ba_timer, jiffies+10); //set 10 ticks } } else { diff --git a/drivers/staging/rtl8192u/r8180_93cx6.h b/drivers/staging/rtl8192u/r8180_93cx6.h index 643d465e7105..0cdd00a4f7b8 100644 --- a/drivers/staging/rtl8192u/r8180_93cx6.h +++ b/drivers/staging/rtl8192u/r8180_93cx6.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * This is part of rtl8187 OpenSource driver * Copyright (C) Andrea Merello 2004-2005 <andrea.merello@gmail.com> @@ -21,22 +22,4 @@ #define EPROM_DELAY 10 -#define EPROM_ANAPARAM_ADDRLWORD 0xd -#define EPROM_ANAPARAM_ADDRHWORD 0xe - -#define EPROM_RFCHIPID 0x6 -#define EPROM_TXPW_BASE 0x05 -#define EPROM_RFCHIPID_RTL8225U 5 -#define EPROM_RF_PARAM 0x4 -#define EPROM_CONFIG2 0xc - -#define EPROM_VERSION 0x1E -#define MAC_ADR 0x7 - -#define CIS 0x18 - -#define EPROM_TXPW0 0x16 -#define EPROM_TXPW2 0x1b -#define EPROM_TXPW1 0x3d - int eprom_read(struct net_device *dev, u32 addr); /* reads a 16 bits word */ diff --git a/drivers/staging/rtl8192u/r8190_rtl8256.c b/drivers/staging/rtl8192u/r8190_rtl8256.c index 9b7f822e9762..a8c8e8c0660d 100644 --- a/drivers/staging/rtl8192u/r8190_rtl8256.c +++ b/drivers/staging/rtl8192u/r8190_rtl8256.c @@ -14,6 +14,11 @@ #include "r819xU_phy.h" #include "r8190_rtl8256.h" +/* + * Forward declaration of local functions + */ +static void phy_rf8256_config_para_file(struct net_device *dev); + /*-------------------------------------------------------------------------- * Overview: set RF band width (20M or 40M) * Input: struct net_device* dev @@ -23,7 +28,7 @@ * Note: 8226 support both 20M and 40 MHz *-------------------------------------------------------------------------- */ -void PHY_SetRF8256Bandwidth(struct net_device *dev, enum ht_channel_width Bandwidth) +void phy_set_rf8256_bandwidth(struct net_device *dev, enum ht_channel_width Bandwidth) { u8 eRFPath; struct r8192_priv *priv = ieee80211_priv(dev); @@ -37,9 +42,9 @@ void PHY_SetRF8256Bandwidth(struct net_device *dev, enum ht_channel_width Bandwi switch (Bandwidth) { case HT_CHANNEL_WIDTH_20: - if (priv->card_8192_version == VERSION_819xU_A + if (priv->card_8192_version == VERSION_819XU_A || priv->card_8192_version - == VERSION_819xU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ + == VERSION_819XU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0b, bMask12Bits, 0x100); /* phy para:1ba */ @@ -53,11 +58,11 @@ void PHY_SetRF8256Bandwidth(struct net_device *dev, enum ht_channel_width Bandwi (enum rf90_radio_path_e)eRFPath, 0x14, bMask12Bits, 0x5ab); } else { - RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); + RT_TRACE(COMP_ERR, "phy_set_rf8256_bandwidth(): unknown hardware version\n"); } break; case HT_CHANNEL_WIDTH_20_40: - if (priv->card_8192_version == VERSION_819xU_A || priv->card_8192_version == VERSION_819xU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ + if (priv->card_8192_version == VERSION_819XU_A || priv->card_8192_version == VERSION_819XU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0b, bMask12Bits, 0x300); /* phy para:3ba */ rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x2c, bMask12Bits, 0x3df); rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0e, bMask12Bits, 0x0a1); @@ -68,11 +73,11 @@ void PHY_SetRF8256Bandwidth(struct net_device *dev, enum ht_channel_width Bandwi else rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x14, bMask12Bits, 0x5ab); } else { - RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); + RT_TRACE(COMP_ERR, "phy_set_rf8256_bandwidth(): unknown hardware version\n"); } break; default: - RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n", Bandwidth); + RT_TRACE(COMP_ERR, "phy_set_rf8256_bandwidth(): unknown Bandwidth: %#X\n", Bandwidth); break; } @@ -85,7 +90,7 @@ void PHY_SetRF8256Bandwidth(struct net_device *dev, enum ht_channel_width Bandwi * Return: NONE *-------------------------------------------------------------------------- */ -void PHY_RF8256_Config(struct net_device *dev) +void phy_rf8256_config(struct net_device *dev) { struct r8192_priv *priv = ieee80211_priv(dev); /* Initialize general global value @@ -94,7 +99,7 @@ void PHY_RF8256_Config(struct net_device *dev) */ priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH; /* Config BB and RF */ - phy_RF8256_Config_ParaFile(dev); + phy_rf8256_config_para_file(dev); } /*-------------------------------------------------------------------------- * Overview: Interface to config 8256 @@ -103,7 +108,7 @@ void PHY_RF8256_Config(struct net_device *dev) * Return: NONE *-------------------------------------------------------------------------- */ -void phy_RF8256_Config_ParaFile(struct net_device *dev) +static void phy_rf8256_config_para_file(struct net_device *dev) { u32 u4RegValue = 0; u8 eRFPath; @@ -152,7 +157,7 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev) * TODO: this function should be removed on ASIC , Emily 2007.2.2 */ if (rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (enum rf90_radio_path_e)eRFPath)) { - RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath); + RT_TRACE(COMP_ERR, "phy_rf8256_config():Check Radio[%d] Fail!!\n", eRFPath); goto phy_RF8256_Config_ParaFile_Fail; } @@ -207,7 +212,7 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev) } if (ret) { - RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath); + RT_TRACE(COMP_ERR, "phy_rf8256_config_para_file():Radio[%d] Fail!!", eRFPath); goto phy_RF8256_Config_ParaFile_Fail; } @@ -221,7 +226,7 @@ phy_RF8256_Config_ParaFile_Fail: } -void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel) +void phy_set_rf8256_cck_tx_power(struct net_device *dev, u8 powerlevel) { u32 TxAGC = 0; struct r8192_priv *priv = ieee80211_priv(dev); @@ -240,7 +245,7 @@ void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel) } -void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel) +void phy_set_rf8256_ofdm_tx_power(struct net_device *dev, u8 powerlevel) { struct r8192_priv *priv = ieee80211_priv(dev); /* Joseph TxPower for 8192 testing */ diff --git a/drivers/staging/rtl8192u/r8190_rtl8256.h b/drivers/staging/rtl8192u/r8190_rtl8256.h index 29b926cad14b..9ea67f86f911 100644 --- a/drivers/staging/rtl8192u/r8190_rtl8256.h +++ b/drivers/staging/rtl8192u/r8190_rtl8256.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * This is part of the rtl8180-sa2400 driver * released under the GPL (See file COPYING for details). @@ -14,10 +15,10 @@ #define RTL8225H #define RTL819X_TOTAL_RF_PATH 2 /* for 8192U */ -void PHY_SetRF8256Bandwidth(struct net_device *dev, enum ht_channel_width Bandwidth); -void PHY_RF8256_Config(struct net_device *dev); -void phy_RF8256_Config_ParaFile(struct net_device *dev); -void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel); -void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel); +void phy_set_rf8256_bandwidth(struct net_device *dev, + enum ht_channel_width bandwidth); +void phy_rf8256_config(struct net_device *dev); +void phy_set_rf8256_cck_tx_power(struct net_device *dev, u8 powerlevel); +void phy_set_rf8256_ofdm_tx_power(struct net_device *dev, u8 powerlevel); #endif diff --git a/drivers/staging/rtl8192u/r8192U.h b/drivers/staging/rtl8192u/r8192U.h index 94a148994069..e65a893fd084 100644 --- a/drivers/staging/rtl8192u/r8192U.h +++ b/drivers/staging/rtl8192u/r8192U.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * This is part of rtl8187 OpenSource driver. * Copyright (C) Andrea Merello 2004-2005 <andrea.merello@gmail.com> @@ -39,19 +40,19 @@ #include "ieee80211/ieee80211.h" #define RTL8192U -#define RTL819xU_MODULE_NAME "rtl819xU" +#define RTL819XU_MODULE_NAME "rtl819xU" /* HW security */ #define MAX_KEY_LEN 61 #define KEY_BUF_SIZE 5 -#define Rx_Smooth_Factor 20 +#define RX_SMOOTH_FACTOR 20 #define DMESG(x, a...) #define DMESGW(x, a...) #define DMESGE(x, a...) extern u32 rt_global_debug_component; #define RT_TRACE(component, x, args...) \ do { \ - if (rt_global_debug_component & component) \ + if (rt_global_debug_component & (component)) \ pr_debug("RTL8192U: " x "\n", ##args); \ } while (0) @@ -111,7 +112,7 @@ extern u32 rt_global_debug_component; do { \ if ((rt_global_debug_component & (level)) == (level)) { \ int i; \ - u8 *pdata = (u8 *) data; \ + u8 *pdata = (u8 *)data; \ pr_debug("RTL8192U: %s()\n", __func__); \ for (i = 0; i < (int)(datalen); i++) { \ printk("%2x ", pdata[i]); \ @@ -798,6 +799,18 @@ typedef enum _tag_TxCmd_Config_Index { TXCMD_XXXX_CTRL, } DCMD_TXCMD_OP; +enum version_819xu { + VERSION_819XU_A, // A-cut + VERSION_819XU_B, // B-cut + VERSION_819XU_C,// C-cut +}; + +//added for different RF type +enum rt_rf_type { + RF_1T2R = 0, + RF_2T4R, +}; + typedef struct r8192_priv { struct usb_device *udev; /* For maintain info from eeprom */ @@ -815,7 +828,7 @@ typedef struct r8192_priv { /* O: rtl8192, 1: rtl8185 V B/C, 2: rtl8185 V D */ short card_8192; /* If TCR reports card V B/C, this discriminates */ - u8 card_8192_version; + enum version_819xu card_8192_version; short enable_gpio0; enum card_type { PCI, MINIPCI, CARDBUS, USB @@ -838,7 +851,7 @@ typedef struct r8192_priv { struct mutex wx_mutex; - u8 rf_type; /* 0: 1T2R, 1: 2T4R */ + enum rt_rf_type rf_type; /* 0: 1T2R, 1: 2T4R */ RT_RF_TYPE_819xU rf_chip; short (*rf_set_sens)(struct net_device *dev, short sens); @@ -864,9 +877,9 @@ typedef struct r8192_priv { int rx_inx; #endif - struct sk_buff_head rx_queue; - struct sk_buff_head skb_queue; - struct work_struct qos_activate; + struct sk_buff_head rx_queue; + struct sk_buff_head skb_queue; + struct work_struct qos_activate; short tx_urb_index; atomic_t tx_pending[0x10]; /* UART_PRIORITY + 1 */ @@ -1014,7 +1027,7 @@ typedef struct r8192_priv { u8 nrxAMPDU_aggr_num; /* For gpio */ - bool bHwRadioOff; + bool bHwRadioOff; u32 reset_count; bool bpbc_pressed; @@ -1079,9 +1092,6 @@ bool init_firmware(struct net_device *dev); short rtl819xU_tx_cmd(struct net_device *dev, struct sk_buff *skb); short rtl8192_tx(struct net_device *dev, struct sk_buff *skb); -u32 read_cam(struct net_device *dev, u8 addr); -void write_cam(struct net_device *dev, u8 addr, u32 data); - int read_nic_byte(struct net_device *dev, int x, u8 *data); int read_nic_byte_E(struct net_device *dev, int x, u8 *data); int read_nic_dword(struct net_device *dev, int x, u32 *data); @@ -1094,22 +1104,12 @@ void force_pci_posting(struct net_device *dev); void rtl8192_rtx_disable(struct net_device *dev); void rtl8192_rx_enable(struct net_device *dev); -void rtl8192_tx_enable(struct net_device *dev); - -void rtl8192_disassociate(struct net_device *dev); -void rtl8185_set_rf_pins_enable(struct net_device *dev, u32 a); -void rtl8192_set_anaparam(struct net_device *dev, u32 a); -void rtl8185_set_anaparam2(struct net_device *dev, u32 a); void rtl8192_update_msr(struct net_device *dev); int rtl8192_down(struct net_device *dev); int rtl8192_up(struct net_device *dev); void rtl8192_commit(struct net_device *dev); void rtl8192_set_chan(struct net_device *dev, short ch); -void write_phy(struct net_device *dev, u8 adr, u8 data); -void write_phy_cck(struct net_device *dev, u8 adr, u32 data); -void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data); -void rtl8185_tx_antenna(struct net_device *dev, u8 ant); void rtl8192_set_rxconf(struct net_device *dev); void rtl819xusb_beacon_tx(struct net_device *dev, u16 tx_rate); diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c index e218b5c20642..0ac0bbf7d923 100644 --- a/drivers/staging/rtl8192u/r8192U_core.c +++ b/drivers/staging/rtl8192u/r8192U_core.c @@ -128,7 +128,7 @@ static void rtl8192_usb_disconnect(struct usb_interface *intf); static struct usb_driver rtl8192_usb_driver = { - .name = RTL819xU_MODULE_NAME, /* Driver name */ + .name = RTL819XU_MODULE_NAME, /* Driver name */ .id_table = rtl8192_usb_id_tbl, /* PCI_ID table */ .probe = rtl8192_usb_probe, /* probe fn */ .disconnect = rtl8192_usb_disconnect, /* remove fn */ @@ -183,7 +183,7 @@ static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv *priv) case COUNTRY_CODE_ISRAEL: case COUNTRY_CODE_TELEC: case COUNTRY_CODE_MIC: - Dot11d_Init(ieee); + rtl8192u_dot11d_init(ieee); ieee->bGlobalDomain = false; /* actually 8225 & 8256 rf chips only support B,G,24N mode */ if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256)) { @@ -211,8 +211,8 @@ static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv *priv) /* this flag enabled to follow 11d country IE setting, * otherwise, it shall follow global domain settings. */ - GET_DOT11D_INFO(ieee)->enabled = 0; - Dot11d_Reset(ieee); + GET_DOT11D_INFO(ieee)->dot11d_enabled = 0; + dot11d_reset(ieee); ieee->bGlobalDomain = true; break; @@ -237,22 +237,6 @@ static void CamResetAllEntry(struct net_device *dev) write_nic_dword(dev, RWCAM, ulcommand); } - -void write_cam(struct net_device *dev, u8 addr, u32 data) -{ - write_nic_dword(dev, WCAMI, data); - write_nic_dword(dev, RWCAM, BIT(31) | BIT(16) | (addr & 0xff)); -} - -u32 read_cam(struct net_device *dev, u8 addr) -{ - u32 data; - - write_nic_dword(dev, RWCAM, 0x80000000 | (addr & 0xff)); - read_nic_dword(dev, 0xa8, &data); - return data; -} - int write_nic_byte_E(struct net_device *dev, int indx, u8 data) { int status; @@ -643,7 +627,7 @@ static int __maybe_unused proc_get_stats_rx(struct seq_file *m, void *v) static void rtl8192_proc_module_init(void) { RT_TRACE(COMP_INIT, "Initializing proc filesystem"); - rtl8192_proc = proc_mkdir(RTL819xU_MODULE_NAME, init_net.proc_net); + rtl8192_proc = proc_mkdir(RTL819XU_MODULE_NAME, init_net.proc_net); } static void rtl8192_proc_init_one(struct net_device *dev) @@ -846,13 +830,6 @@ void rtl8192_rx_enable(struct net_device *dev) rtl8192_rx_initiate(dev); } - -void rtl8192_tx_enable(struct net_device *dev) -{ -} - - - void rtl8192_rtx_disable(struct net_device *dev) { u8 cmd; @@ -1997,7 +1974,7 @@ static void rtl8192_update_ratr_table(struct net_device *dev) break; case IEEE_N_24G: case IEEE_N_5G: - if (ieee->pHTInfo->PeerMimoPs == 0) { /* MIMO_PS_STATIC */ + if (ieee->pHTInfo->PeerMimoPs == MIMO_PS_STATIC) { ratr_value &= 0x0007F007; } else { if (priv->rf_type == RF_1T2R) @@ -2382,20 +2359,20 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) if (ret < 0) return ret; priv->eeprom_pid = (u16)ret; - ret = eprom_read(dev, EEPROM_ChannelPlan >> 1); + ret = eprom_read(dev, EEPROM_CHANNEL_PLAN >> 1); if (ret < 0) return ret; tmpValue = (u16)ret; priv->eeprom_ChannelPlan = (tmpValue & 0xff00) >> 8; priv->btxpowerdata_readfromEEPORM = true; - ret = eprom_read(dev, (EEPROM_Customer_ID >> 1)) >> 8; + ret = eprom_read(dev, (EEPROM_CUSTOMER_ID >> 1)) >> 8; if (ret < 0) return ret; priv->eeprom_CustomerID = (u16)ret; } else { priv->eeprom_vid = 0; priv->eeprom_pid = 0; - priv->card_8192_version = VERSION_819xU_B; + priv->card_8192_version = VERSION_819XU_B; priv->eeprom_ChannelPlan = 0; priv->eeprom_CustomerID = 0; } @@ -2422,48 +2399,48 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) priv->rf_type = RTL819X_DEFAULT_RF_TYPE; /* default 1T2R */ priv->rf_chip = RF_8256; - if (priv->card_8192_version == (u8)VERSION_819xU_A) { + if (priv->card_8192_version == VERSION_819XU_A) { /* read Tx power gain offset of legacy OFDM to HT rate */ if (bLoad_From_EEPOM) { - ret = eprom_read(dev, (EEPROM_TxPowerDiff >> 1)); + ret = eprom_read(dev, (EEPROM_TX_POWER_DIFF >> 1)); if (ret < 0) return ret; priv->EEPROMTxPowerDiff = ((u16)ret & 0xff00) >> 8; } else - priv->EEPROMTxPowerDiff = EEPROM_Default_TxPower; + priv->EEPROMTxPowerDiff = EEPROM_DEFAULT_TX_POWER; RT_TRACE(COMP_EPROM, "TxPowerDiff:%d\n", priv->EEPROMTxPowerDiff); /* read ThermalMeter from EEPROM */ if (bLoad_From_EEPOM) { - ret = eprom_read(dev, (EEPROM_ThermalMeter >> 1)); + ret = eprom_read(dev, (EEPROM_THERMAL_METER >> 1)); if (ret < 0) return ret; priv->EEPROMThermalMeter = (u8)((u16)ret & 0x00ff); } else - priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter; + priv->EEPROMThermalMeter = EEPROM_DEFAULT_THERNAL_METER; RT_TRACE(COMP_EPROM, "ThermalMeter:%d\n", priv->EEPROMThermalMeter); /* for tx power track */ priv->TSSI_13dBm = priv->EEPROMThermalMeter * 100; /* read antenna tx power offset of B/C/D to A from EEPROM */ if (bLoad_From_EEPOM) { - ret = eprom_read(dev, (EEPROM_PwDiff >> 1)); + ret = eprom_read(dev, (EEPROM_PW_DIFF >> 1)); if (ret < 0) return ret; priv->EEPROMPwDiff = ((u16)ret & 0x0f00) >> 8; } else - priv->EEPROMPwDiff = EEPROM_Default_PwDiff; + priv->EEPROMPwDiff = EEPROM_DEFAULT_PW_DIFF; RT_TRACE(COMP_EPROM, "TxPwDiff:%d\n", priv->EEPROMPwDiff); /* Read CrystalCap from EEPROM */ if (bLoad_From_EEPOM) { - ret = eprom_read(dev, (EEPROM_CrystalCap >> 1)); + ret = eprom_read(dev, (EEPROM_CRYSTAL_CAP >> 1)); if (ret < 0) return ret; priv->EEPROMCrystalCap = (u16)ret & 0x0f; } else - priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap; + priv->EEPROMCrystalCap = EEPROM_DEFAULT_CRYSTAL_CAP; RT_TRACE(COMP_EPROM, "CrystalCap = %d\n", priv->EEPROMCrystalCap); /* get per-channel Tx power level */ if (bLoad_From_EEPOM) { - ret = eprom_read(dev, (EEPROM_TxPwIndex_Ver >> 1)); + ret = eprom_read(dev, (EEPROM_TX_PW_INDEX_VER >> 1)); if (ret < 0) return ret; priv->EEPROM_Def_Ver = ((u16)ret & 0xff00) >> 8; @@ -2474,7 +2451,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) int i; if (bLoad_From_EEPOM) { - ret = eprom_read(dev, (EEPROM_TxPwIndex_CCK >> 1)); + ret = eprom_read(dev, (EEPROM_TX_PW_INDEX_CCK >> 1)); if (ret < 0) return ret; priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff) >> 8; @@ -2483,10 +2460,10 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) RT_TRACE(COMP_EPROM, "CCK Tx Power Levl: 0x%02x\n", priv->EEPROMTxPowerLevelCCK); for (i = 0; i < 3; i++) { if (bLoad_From_EEPOM) { - ret = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G + i) >> 1); + ret = eprom_read(dev, (EEPROM_TX_PW_INDEX_OFDM_24G + i) >> 1); if (ret < 0) return ret; - if (((EEPROM_TxPwIndex_OFDM_24G + i) % 2) == 0) + if (((EEPROM_TX_PW_INDEX_OFDM_24G + i) % 2) == 0) tmpValue = (u16)ret & 0x00ff; else tmpValue = ((u16)ret & 0xff00) >> 8; @@ -2498,7 +2475,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) } } else if (priv->EEPROM_Def_Ver == 1) { if (bLoad_From_EEPOM) { - ret = eprom_read(dev, EEPROM_TxPwIndex_CCK_V1 >> 1); + ret = eprom_read(dev, EEPROM_TX_PW_INDEX_CCK_V1 >> 1); if (ret < 0) return ret; tmpValue = ((u16)ret & 0xff00) >> 8; @@ -2508,7 +2485,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) priv->EEPROMTxPowerLevelCCK_V1[0] = (u8)tmpValue; if (bLoad_From_EEPOM) { - ret = eprom_read(dev, (EEPROM_TxPwIndex_CCK_V1 + 2) >> 1); + ret = eprom_read(dev, (EEPROM_TX_PW_INDEX_CCK_V1 + 2) >> 1); if (ret < 0) return ret; tmpValue = (u16)ret; @@ -2517,12 +2494,12 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) *((u16 *)(&priv->EEPROMTxPowerLevelCCK_V1[1])) = tmpValue; if (bLoad_From_EEPOM) tmpValue = eprom_read(dev, - EEPROM_TxPwIndex_OFDM_24G_V1 >> 1); + EEPROM_TX_PW_INDEX_OFDM_24G_V1 >> 1); else tmpValue = 0x1010; *((u16 *)(&priv->EEPROMTxPowerLevelOFDM24G[0])) = tmpValue; if (bLoad_From_EEPOM) - tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G_V1 + 2) >> 1); + tmpValue = eprom_read(dev, (EEPROM_TX_PW_INDEX_OFDM_24G_V1 + 2) >> 1); else tmpValue = 0x10; priv->EEPROMTxPowerLevelOFDM24G[2] = (u8)tmpValue; @@ -2567,7 +2544,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev) * 92U does not enable TX power tracking. */ priv->ThermalMeter[0] = priv->EEPROMThermalMeter; - } /* end if VersionID == VERSION_819xU_A */ + } /* end if VersionID == VERSION_819XU_A */ /* for dlink led */ switch (priv->eeprom_CustomerID) { @@ -2872,7 +2849,7 @@ static bool rtl8192_adapter_start(struct net_device *dev) rtl8192_phy_configmac(dev); - if (priv->card_8192_version == (u8)VERSION_819xU_A) { + if (priv->card_8192_version == VERSION_819XU_A) { rtl8192_phy_getTxPower(dev); rtl8192_phy_setTxPower(dev, priv->chan); } @@ -3998,13 +3975,13 @@ static void rtl8192_process_phyinfo(struct r8192_priv *priv, u8 *buffer, pprevious_stats->RxMIMOSignalStrength[rfpath]; if (pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath]) { priv->stats.rx_rssi_percentage[rfpath] = - ((priv->stats.rx_rssi_percentage[rfpath] * (Rx_Smooth_Factor - 1)) + - (pprevious_stats->RxMIMOSignalStrength[rfpath])) / (Rx_Smooth_Factor); + ((priv->stats.rx_rssi_percentage[rfpath] * (RX_SMOOTH_FACTOR - 1)) + + (pprevious_stats->RxMIMOSignalStrength[rfpath])) / (RX_SMOOTH_FACTOR); priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1; } else { priv->stats.rx_rssi_percentage[rfpath] = - ((priv->stats.rx_rssi_percentage[rfpath] * (Rx_Smooth_Factor - 1)) + - (pprevious_stats->RxMIMOSignalStrength[rfpath])) / (Rx_Smooth_Factor); + ((priv->stats.rx_rssi_percentage[rfpath] * (RX_SMOOTH_FACTOR - 1)) + + (pprevious_stats->RxMIMOSignalStrength[rfpath])) / (RX_SMOOTH_FACTOR); } RT_TRACE(COMP_DBG, "priv->stats.rx_rssi_percentage[rfPath] = %d\n", @@ -4049,13 +4026,13 @@ static void rtl8192_process_phyinfo(struct r8192_priv *priv, u8 *buffer, pprevious_stats->RxPWDBAll; if (pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb) { priv->undecorated_smoothed_pwdb = - (((priv->undecorated_smoothed_pwdb) * (Rx_Smooth_Factor - 1)) + - (pprevious_stats->RxPWDBAll)) / (Rx_Smooth_Factor); + (((priv->undecorated_smoothed_pwdb) * (RX_SMOOTH_FACTOR - 1)) + + (pprevious_stats->RxPWDBAll)) / (RX_SMOOTH_FACTOR); priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1; } else { priv->undecorated_smoothed_pwdb = - (((priv->undecorated_smoothed_pwdb) * (Rx_Smooth_Factor - 1)) + - (pprevious_stats->RxPWDBAll)) / (Rx_Smooth_Factor); + (((priv->undecorated_smoothed_pwdb) * (RX_SMOOTH_FACTOR - 1)) + + (pprevious_stats->RxPWDBAll)) / (RX_SMOOTH_FACTOR); } } @@ -4098,8 +4075,8 @@ static void rtl8192_process_phyinfo(struct r8192_priv *priv, u8 *buffer, if (priv->stats.rx_evm_percentage[nspatial_stream] == 0) /* initialize */ priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream]; priv->stats.rx_evm_percentage[nspatial_stream] = - ((priv->stats.rx_evm_percentage[nspatial_stream] * (Rx_Smooth_Factor - 1)) + - (pprevious_stats->RxMIMOSignalQuality[nspatial_stream] * 1)) / (Rx_Smooth_Factor); + ((priv->stats.rx_evm_percentage[nspatial_stream] * (RX_SMOOTH_FACTOR - 1)) + + (pprevious_stats->RxMIMOSignalQuality[nspatial_stream] * 1)) / (RX_SMOOTH_FACTOR); } } } @@ -4460,15 +4437,15 @@ static void TranslateRxSignalStuff819xUsb(struct sk_buff *skb, /* Check if the received packet is acceptable. */ bpacket_match_bssid = (type != IEEE80211_FTYPE_CTL) && - (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3)) + (ether_addr_equal(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3)) && (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV); bpacket_toself = bpacket_match_bssid & - (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr)); + (ether_addr_equal(praddr, priv->ieee80211->dev->dev_addr)); if (WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BEACON) bPacketBeacon = true; if (WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK) { - if ((eqMacAddr(praddr, dev->dev_addr))) + if ((ether_addr_equal(praddr, dev->dev_addr))) bToSelfBA = true; } diff --git a/drivers/staging/rtl8192u/r8192U_hw.h b/drivers/staging/rtl8192u/r8192U_hw.h index 00a123d44207..5a958335681d 100644 --- a/drivers/staging/rtl8192u/r8192U_hw.h +++ b/drivers/staging/rtl8192u/r8192U_hw.h @@ -20,24 +20,6 @@ #ifndef R8192_HW #define R8192_HW -typedef enum _VERSION_819xU { - VERSION_819xU_A, // A-cut - VERSION_819xU_B, // B-cut - VERSION_819xU_C,// C-cut -} VERSION_819xU, *PVERSION_819xU; -//added for different RF type -typedef enum _RT_RF_TYPE_DEF { - RF_1T2R = 0, - RF_2T4R, - - RF_819X_MAX_TYPE -} RT_RF_TYPE_DEF; - - -typedef enum _BaseBand_Config_Type { - BaseBand_Config_PHY_REG = 0, //Radio Path A - BaseBand_Config_AGC_TAB = 1, //Radio Path B -} BaseBand_Config_Type, *PBaseBand_Config_Type; #define RTL8187_REQT_READ 0xc0 #define RTL8187_REQT_WRITE 0x40 #define RTL8187_REQ_GET_REGS 0x05 @@ -47,58 +29,33 @@ typedef enum _BaseBand_Config_Type { #define MAX_RX_URB 16 #define R8180_MAX_RETRY 255 -//#define MAX_RX_NORMAL_URB 3 -//#define MAX_RX_COMMAND_URB 2 -#define RX_URB_SIZE 9100 - -#define BB_ANTATTEN_CHAN14 0x0c -#define BB_ANTENNA_B 0x40 -#define BB_HOST_BANG BIT(30) -#define BB_HOST_BANG_EN BIT(2) -#define BB_HOST_BANG_CLK BIT(1) -#define BB_HOST_BANG_RW BIT(3) -#define BB_HOST_BANG_DATA 1 +#define RX_URB_SIZE 9100 -//#if (RTL819X_FPGA_VER & RTL819X_FPGA_VIVI_070920) -#define AFR 0x010 -#define AFR_CardBEn BIT(0) -#define AFR_CLKRUN_SEL BIT(1) -#define AFR_FuncRegEn BIT(2) #define RTL8190_EEPROM_ID 0x8129 #define EEPROM_VID 0x02 #define EEPROM_PID 0x04 #define EEPROM_NODE_ADDRESS_BYTE_0 0x0C -#define EEPROM_TxPowerDiff 0x1F -#define EEPROM_ThermalMeter 0x20 -#define EEPROM_PwDiff 0x21 //0x21 -#define EEPROM_CrystalCap 0x22 //0x22 +#define EEPROM_TX_POWER_DIFF 0x1F +#define EEPROM_THERMAL_METER 0x20 +#define EEPROM_PW_DIFF 0x21 //0x21 +#define EEPROM_CRYSTAL_CAP 0x22 //0x22 -#define EEPROM_TxPwIndex_CCK 0x23 //0x23 -#define EEPROM_TxPwIndex_OFDM_24G 0x24 //0x24~0x26 -#define EEPROM_TxPwIndex_CCK_V1 0x29 //0x29~0x2B -#define EEPROM_TxPwIndex_OFDM_24G_V1 0x2C //0x2C~0x2E -#define EEPROM_TxPwIndex_Ver 0x27 //0x27 +#define EEPROM_TX_PW_INDEX_CCK 0x23 //0x23 +#define EEPROM_TX_PW_INDEX_OFDM_24G 0x24 //0x24~0x26 +#define EEPROM_TX_PW_INDEX_CCK_V1 0x29 //0x29~0x2B +#define EEPROM_TX_PW_INDEX_OFDM_24G_V1 0x2C //0x2C~0x2E +#define EEPROM_TX_PW_INDEX_VER 0x27 //0x27 -#define EEPROM_Default_TxPowerDiff 0x0 -#define EEPROM_Default_ThermalMeter 0x7 -#define EEPROM_Default_PwDiff 0x4 -#define EEPROM_Default_CrystalCap 0x5 -#define EEPROM_Default_TxPower 0x1010 -#define EEPROM_Customer_ID 0x7B //0x7B:CustomerID -#define EEPROM_ChannelPlan 0x16 //0x7C -#define EEPROM_IC_VER 0x7d //0x7D -#define EEPROM_CRC 0x7e //0x7E~0x7F +#define EEPROM_DEFAULT_THERNAL_METER 0x7 +#define EEPROM_DEFAULT_PW_DIFF 0x4 +#define EEPROM_DEFAULT_CRYSTAL_CAP 0x5 +#define EEPROM_DEFAULT_TX_POWER 0x1010 +#define EEPROM_CUSTOMER_ID 0x7B //0x7B:CustomerID +#define EEPROM_CHANNEL_PLAN 0x16 //0x7C -#define EEPROM_CID_DEFAULT 0x0 -#define EEPROM_CID_CAMEO 0x1 #define EEPROM_CID_RUNTOP 0x2 -#define EEPROM_CID_Senao 0x3 -#define EEPROM_CID_TOSHIBA 0x4 // Toshiba setting, Merge by Jacken, 2008/01/31 -#define EEPROM_CID_NetCore 0x5 -#define EEPROM_CID_Nettronix 0x6 -#define EEPROM_CID_Pronet 0x7 #define EEPROM_CID_DLINK 0x8 #define AC_PARAM_TXOP_LIMIT_OFFSET 16 @@ -108,18 +65,16 @@ typedef enum _BaseBand_Config_Type { //#endif enum _RTL8192Usb_HW { + MAC0 = 0x000, + MAC4 = 0x004, - PCIF = 0x009, // PCI Function Register 0x0009h~0x000bh #define BB_GLOBAL_RESET_BIT 0x1 BB_GLOBAL_RESET = 0x020, // BasebandGlobal Reset Register BSSIDR = 0x02E, // BSSID Register CMDR = 0x037, // Command register -#define CR_RST 0x10 #define CR_RE 0x08 #define CR_TE 0x04 -#define CR_MulRW 0x01 SIFS = 0x03E, // SIFS register - TCR = 0x040, // Transmit Configuration Register #define TCR_MXDMA_2048 7 #define TCR_LRL_OFFSET 0 @@ -132,26 +87,16 @@ enum _RTL8192Usb_HW { BIT(22) | BIT(23)) #define RX_FIFO_THRESHOLD_MASK (BIT(13) | BIT(14) | BIT(15)) #define RX_FIFO_THRESHOLD_SHIFT 13 -#define RX_FIFO_THRESHOLD_128 3 -#define RX_FIFO_THRESHOLD_256 4 -#define RX_FIFO_THRESHOLD_512 5 -#define RX_FIFO_THRESHOLD_1024 6 #define RX_FIFO_THRESHOLD_NONE 7 #define MAX_RX_DMA_MASK (BIT(8) | BIT(9) | BIT(10)) #define RCR_MXDMA_OFFSET 8 #define RCR_FIFO_OFFSET 13 #define RCR_ONLYERLPKT BIT(31) // Early Receiving based on Packet Size. -#define RCR_ENCS2 BIT(30) // Enable Carrier Sense Detection Method 2 -#define RCR_ENCS1 BIT(29) // Enable Carrier Sense Detection Method 1 -#define RCR_ENMBID BIT(27) // Enable Multiple BssId. -#define RCR_ACKTXBW (BIT(24) | BIT(25)) // TXBW Setting of ACK frames #define RCR_CBSSID BIT(23) // Accept BSSID match packet #define RCR_APWRMGT BIT(22) // Accept power management packet -#define RCR_ADD3 BIT(21) // Accept address 3 match packet #define RCR_AMF BIT(20) // Accept management type frame #define RCR_ACF BIT(19) // Accept control type frame #define RCR_ADF BIT(18) // Accept data type frame -#define RCR_RXFTH BIT(13) // Rx FIFO Threshold #define RCR_AICV BIT(12) // Accept ICV error packet #define RCR_ACRC32 BIT(5) // Accept CRC32 error packet #define RCR_AB BIT(3) // Accept broadcast packet @@ -160,14 +105,10 @@ enum _RTL8192Usb_HW { #define RCR_AAP BIT(0) // Accept all unicast packet SLOT_TIME = 0x049, // Slot Time Register ACK_TIMEOUT = 0x04c, // Ack Timeout Register - PIFS_TIME = 0x04d, // PIFS time - USTIME = 0x04e, // Microsecond Tuning Register, Sets the microsecond time unit used by MAC clock. EDCAPARA_BE = 0x050, // EDCA Parameter of AC BE EDCAPARA_BK = 0x054, // EDCA Parameter of AC BK EDCAPARA_VO = 0x058, // EDCA Parameter of AC VO EDCAPARA_VI = 0x05C, // EDCA Parameter of AC VI - RFPC = 0x05F, // Rx FIFO Packet Count - CWRR = 0x060, // Contention Window Report Register BCN_TCFG = 0x062, // Beacon Time Configuration #define BCN_TCFG_CW_SHIFT 8 #define BCN_TCFG_IFS 0 @@ -178,7 +119,6 @@ enum _RTL8192Usb_HW { BCN_ERR_THRESH = 0x078, // Beacon Error Threshold RWCAM = 0x0A0, //IN 8190 Data Sheet is called CAMcmd WCAMI = 0x0A4, // Software write CAM input content - RCAMO = 0x0A8, // Software read/write CAM config SECR = 0x0B0, //Security Configuration Register #define SCR_TxUseDK BIT(0) //Force Tx Use Default Key #define SCR_RxUseDK BIT(1) //Force Rx Use Default Key @@ -186,21 +126,6 @@ enum _RTL8192Usb_HW { #define SCR_RxDecEnable BIT(3) //Enable Rx Decryption #define SCR_SKByA2 BIT(4) //Search kEY BY A2 #define SCR_NoSKMC BIT(5) //No Key Search for Multicast -#define SCR_UseDK 0x01 -#define SCR_TxSecEnable 0x02 -#define SCR_RxSecEnable 0x04 - TPPoll = 0x0fd, // Transmit priority polling register - PSR = 0x0ff, // Page Select Register -#define CPU_CCK_LOOPBACK 0x00030000 -#define CPU_GEN_SYSTEM_RESET 0x00000001 -#define CPU_GEN_FIRMWARE_RESET 0x00000008 -#define CPU_GEN_BOOT_RDY 0x00000010 -#define CPU_GEN_FIRM_RDY 0x00000020 -#define CPU_GEN_PUT_CODE_OK 0x00000080 -#define CPU_GEN_BB_RST 0x00000100 -#define CPU_GEN_PWR_STB_CPU 0x00000004 -#define CPU_GEN_NO_LOOPBACK_MSK 0xFFF8FFFF // Set bit18,17,16 to 0. Set bit19 -#define CPU_GEN_NO_LOOPBACK_SET 0x00080000 // Set BIT19 to 1 //---------------------------------------------------------------------------- // 8190 CPU General Register (offset 0x100, 4 byte) @@ -216,72 +141,20 @@ enum _RTL8192Usb_HW { #define CPU_GEN_NO_LOOPBACK_MSK 0xFFF8FFFF // Set bit18,17,16 to 0. Set bit19 #define CPU_GEN_NO_LOOPBACK_SET 0x00080000 // Set BIT19 to 1 CPU_GEN = 0x100, // CPU Reset Register - LED1Cfg = 0x154,// LED1 Configuration Register - LED0Cfg = 0x155,// LED0 Configuration Register - AcmAvg = 0x170, // ACM Average Period Register AcmHwCtrl = 0x171, // ACM Hardware Control Register //---------------------------------------------------------------------------- //// //// 8190 AcmHwCtrl bits (offset 0x171, 1 byte) ////---------------------------------------------------------------------------- // -#define AcmHw_HwEn BIT(0) #define AcmHw_BeqEn BIT(1) -#define AcmHw_ViqEn BIT(2) -#define AcmHw_VoqEn BIT(3) -#define AcmHw_BeqStatus BIT(4) -#define AcmHw_ViqStatus BIT(5) -#define AcmHw_VoqStatus BIT(6) - AcmFwCtrl = 0x172, // ACM Firmware Control Register - AES_11N_FIX = 0x173, - VOAdmTime = 0x174, // VO Queue Admitted Time Register - VIAdmTime = 0x178, // VI Queue Admitted Time Register - BEAdmTime = 0x17C, // BE Queue Admitted Time Register RQPN1 = 0x180, // Reserved Queue Page Number , Vo Vi, Be, Bk RQPN2 = 0x184, // Reserved Queue Page Number, HCCA, Cmd, Mgnt, High RQPN3 = 0x188, // Reserved Queue Page Number, Bcn, Public, -// QPRR = 0x1E0, // Queue Page Report per TID QPNR = 0x1D0, //0x1F0, // Queue Packet Number report per TID - BQDA = 0x200, // Beacon Queue Descriptor Address - HQDA = 0x204, // High Priority Queue Descriptor Address - CQDA = 0x208, // Command Queue Descriptor Address - MQDA = 0x20C, // Management Queue Descriptor Address - HCCAQDA = 0x210, // HCCA Queue Descriptor Address - VOQDA = 0x214, // VO Queue Descriptor Address - VIQDA = 0x218, // VI Queue Descriptor Address - BEQDA = 0x21C, // BE Queue Descriptor Address - BKQDA = 0x220, // BK Queue Descriptor Address - RCQDA = 0x224, // Receive command Queue Descriptor Address - RDQDA = 0x228, // Receive Queue Descriptor Start Address - - MAR0 = 0x240, // Multicast filter. - MAR4 = 0x244, - - CCX_PERIOD = 0x250, // CCX Measurement Period Register, in unit of TU. - CLM_RESULT = 0x251, // CCA Busy fraction register. - NHM_PERIOD = 0x252, // NHM Measurement Period register, in unit of TU. - NHM_THRESHOLD0 = 0x253, // Noise Histogram Meashorement0. - NHM_THRESHOLD1 = 0x254, // Noise Histogram Meashorement1. - NHM_THRESHOLD2 = 0x255, // Noise Histogram Meashorement2. - NHM_THRESHOLD3 = 0x256, // Noise Histogram Meashorement3. - NHM_THRESHOLD4 = 0x257, // Noise Histogram Meashorement4. - NHM_THRESHOLD5 = 0x258, // Noise Histogram Meashorement5. - NHM_THRESHOLD6 = 0x259, // Noise Histogram Meashorement6 - - MCTRL = 0x25A, // Measurement Control - - NHM_RPI_COUNTER0 = 0x264, // Noise Histogram RPI counter0, the fraction of signal strength < NHM_THRESHOLD0. - NHM_RPI_COUNTER1 = 0x265, // Noise Histogram RPI counter1, the fraction of signal strength in (NHM_THRESHOLD0, NHM_THRESHOLD1]. - NHM_RPI_COUNTER2 = 0x266, // Noise Histogram RPI counter2, the fraction of signal strength in (NHM_THRESHOLD1, NHM_THRESHOLD2]. - NHM_RPI_COUNTER3 = 0x267, // Noise Histogram RPI counter3, the fraction of signal strength in (NHM_THRESHOLD2, NHM_THRESHOLD3]. - NHM_RPI_COUNTER4 = 0x268, // Noise Histogram RPI counter4, the fraction of signal strength in (NHM_THRESHOLD3, NHM_THRESHOLD4]. - NHM_RPI_COUNTER5 = 0x269, // Noise Histogram RPI counter5, the fraction of signal strength in (NHM_THRESHOLD4, NHM_THRESHOLD5]. - NHM_RPI_COUNTER6 = 0x26A, // Noise Histogram RPI counter6, the fraction of signal strength in (NHM_THRESHOLD5, NHM_THRESHOLD6]. - NHM_RPI_COUNTER7 = 0x26B, // Noise Histogram RPI counter7, the fraction of signal strength in (NHM_THRESHOLD6, NHM_THRESHOLD7]. -#define BW_OPMODE_11J BIT(0) #define BW_OPMODE_5G BIT(1) #define BW_OPMODE_20MHZ BIT(2) BW_OPMODE = 0x300, // Bandwidth operation mode @@ -292,18 +165,10 @@ enum _RTL8192Usb_HW { #define MSR_LINK_SHIFT 0 #define MSR_LINK_ADHOC 1 #define MSR_LINK_MASTER 3 -#define MSR_LINK_ENEDCA BIT(4) RETRY_LIMIT = 0x304, // Retry Limit [15:8]-short, [7:0]-long #define RETRY_LIMIT_SHORT_SHIFT 8 #define RETRY_LIMIT_LONG_SHIFT 0 - TSFR = 0x308, RRSR = 0x310, // Response Rate Set -#define RRSR_RSC_OFFSET 21 -#define RRSR_SHORT_OFFSET 23 -#define RRSR_RSC_DUPLICATE 0x600000 -#define RRSR_RSC_LOWSUBCHNL 0x400000 -#define RRSR_RSC_UPSUBCHANL 0x200000 -#define RRSR_SHORT 0x800000 #define RRSR_1M BIT(0) #define RRSR_2M BIT(1) #define RRSR_5_5M BIT(2) @@ -316,17 +181,9 @@ enum _RTL8192Usb_HW { #define RRSR_36M BIT(9) #define RRSR_48M BIT(10) #define RRSR_54M BIT(11) -#define RRSR_MCS0 BIT(12) -#define RRSR_MCS1 BIT(13) -#define RRSR_MCS2 BIT(14) -#define RRSR_MCS3 BIT(15) -#define RRSR_MCS4 BIT(16) -#define RRSR_MCS5 BIT(17) -#define RRSR_MCS6 BIT(18) -#define RRSR_MCS7 BIT(19) #define BRSR_AckShortPmb BIT(23) // CCK ACK: use Short Preamble or not. - RATR0 = 0x320, // Rate Adaptive Table register1 UFWP = 0x318, + RATR0 = 0x320, // Rate Adaptive Table register1 DRIVER_RSSI = 0x32c, // Driver tell Firmware current RSSI //---------------------------------------------------------------------------- // 8190 Rate Adaptive Table Register (offset 0x320, 4 byte) @@ -372,41 +229,18 @@ enum _RTL8192Usb_HW { #define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11| \ RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 - MCS_TXAGC = 0x340, // MCS AGC - CCK_TXAGC = 0x348, // CCK AGC -// ISR = 0x350, // Interrupt Status Register -// IMR = 0x354, // Interrupt Mask Register -// IMR_POLL = 0x360, - MacBlkCtrl = 0x403, // Mac block on/off control register - EPROM_CMD = 0xfe58, #define Cmd9346CR_9356SEL BIT(4) -#define EPROM_CMD_RESERVED_MASK BIT(5) #define EPROM_CMD_OPERATING_MODE_SHIFT 6 -#define EPROM_CMD_OPERATING_MODE_MASK (BIT(7) | BIT(6)) -#define EPROM_CMD_CONFIG 0x3 #define EPROM_CMD_NORMAL 0 -#define EPROM_CMD_LOAD 1 #define EPROM_CMD_PROGRAM 2 #define EPROM_CS_BIT BIT(3) #define EPROM_CK_BIT BIT(2) #define EPROM_W_BIT BIT(1) #define EPROM_R_BIT BIT(0) - - MAC0 = 0x000, - MAC1 = 0x001, - MAC2 = 0x002, - MAC3 = 0x003, - MAC4 = 0x004, - MAC5 = 0x005, - }; //---------------------------------------------------------------------------- // 818xB AnaParm & AnaParm2 Register //---------------------------------------------------------------------------- -//#define ANAPARM_ASIC_ON 0x45090658 -//#define ANAPARM2_ASIC_ON 0x727f3f52 #define GPI 0x108 -#define GPO 0x109 -#define GPE 0x10a #endif diff --git a/drivers/staging/rtl8192u/r819xU_firmware.c b/drivers/staging/rtl8192u/r819xU_firmware.c index 9c7e19aedff1..c3ea906f3af3 100644 --- a/drivers/staging/rtl8192u/r819xU_firmware.c +++ b/drivers/staging/rtl8192u/r819xU_firmware.c @@ -208,8 +208,8 @@ bool init_firmware(struct net_device *dev) u32 file_length = 0; u8 *mapped_file = NULL; u32 init_step = 0; - opt_rst_type_e rst_opt = OPT_SYSTEM_RESET; - firmware_init_step_e starting_state = FW_INIT_STEP0_BOOT; + enum opt_rst_type_e rst_opt = OPT_SYSTEM_RESET; + enum firmware_init_step_e starting_state = FW_INIT_STEP0_BOOT; rt_firmware *pfirmware = priv->pFirmware; const struct firmware *fw_entry; diff --git a/drivers/staging/rtl8192u/r819xU_firmware.h b/drivers/staging/rtl8192u/r819xU_firmware.h index cccd1c82ffe0..b84344c1e62b 100644 --- a/drivers/staging/rtl8192u/r819xU_firmware.h +++ b/drivers/staging/rtl8192u/r819xU_firmware.h @@ -2,19 +2,18 @@ #ifndef __INC_FIRMWARE_H #define __INC_FIRMWARE_H -#define RTL8190_CPU_START_OFFSET 0x80 #define GET_COMMAND_PACKET_FRAG_THRESHOLD(v) \ - (4*(v/4) - 8 - USB_HWDESC_HEADER_LEN) + (4 * ((v) / 4) - 8 - USB_HWDESC_HEADER_LEN) -typedef enum _firmware_init_step { +enum firmware_init_step_e { FW_INIT_STEP0_BOOT = 0, FW_INIT_STEP1_MAIN = 1, FW_INIT_STEP2_DATA = 2, -} firmware_init_step_e; +}; -typedef enum _opt_rst_type { +enum opt_rst_type_e { OPT_SYSTEM_RESET = 0, OPT_FIRMWARE_RESET = 1, -} opt_rst_type_e; +}; #endif diff --git a/drivers/staging/rtl8192u/r819xU_phy.c b/drivers/staging/rtl8192u/r819xU_phy.c index 7ee10d49894b..5f04afe53d69 100644 --- a/drivers/staging/rtl8192u/r819xU_phy.c +++ b/drivers/staging/rtl8192u/r819xU_phy.c @@ -511,7 +511,8 @@ void rtl8192_phy_configmac(struct net_device *dev) * notice: BB parameters may change all the time, so please make * sure it has been synced with the newest. *****************************************************************************/ -void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType) +static void rtl8192_phyConfigBB(struct net_device *dev, + enum baseband_config_type ConfigType) { u32 i; @@ -525,7 +526,7 @@ void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType) Rtl8190AGCTAB_Array_Table = Rtl819XAGCTAB_ArrayDTM; } #endif - if (ConfigType == BaseBand_Config_PHY_REG) { + if (ConfigType == BASEBAND_CONFIG_PHY_REG) { for (i = 0; i < PHY_REG_1T2RArrayLength; i += 2) { rtl8192_setBBreg(dev, Rtl8192UsbPHY_REG_1T2RArray[i], bMaskDWord, @@ -535,7 +536,7 @@ void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType) i, Rtl8192UsbPHY_REG_1T2RArray[i], Rtl8192UsbPHY_REG_1T2RArray[i+1]); } - } else if (ConfigType == BaseBand_Config_AGC_TAB) { + } else if (ConfigType == BASEBAND_CONFIG_AGC_TAB) { for (i = 0; i < AGCTAB_ArrayLength; i += 2) { rtl8192_setBBreg(dev, Rtl8192UsbAGCTAB_Array[i], bMaskDWord, Rtl8192UsbAGCTAB_Array[i+1]); @@ -793,7 +794,7 @@ static void rtl8192_BB_Config_ParaFile(struct net_device *dev) (enum rf90_radio_path_e)0); if (status != 0) { RT_TRACE((COMP_ERR | COMP_PHY), - "PHY_RF8256_Config(): Check PHY%d Fail!!\n", + "phy_rf8256_config(): Check PHY%d Fail!!\n", eCheckItem-1); return; } @@ -802,7 +803,7 @@ static void rtl8192_BB_Config_ParaFile(struct net_device *dev) rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0); /* ----BB Register Initilazation---- */ /* ==m==>Set PHY REG From Header<==m== */ - rtl8192_phyConfigBB(dev, BaseBand_Config_PHY_REG); + rtl8192_phyConfigBB(dev, BASEBAND_CONFIG_PHY_REG); /* ----Set BB reset de-Active---- */ read_nic_dword(dev, CPU_GEN, ®_u32); @@ -810,11 +811,11 @@ static void rtl8192_BB_Config_ParaFile(struct net_device *dev) /* ----BB AGC table Initialization---- */ /* ==m==>Set PHY REG From Header<==m== */ - rtl8192_phyConfigBB(dev, BaseBand_Config_AGC_TAB); + rtl8192_phyConfigBB(dev, BASEBAND_CONFIG_AGC_TAB); /* ----Enable XSTAL ---- */ write_nic_byte_E(dev, 0x5e, 0x00); - if (priv->card_8192_version == (u8)VERSION_819xU_A) { + if (priv->card_8192_version == VERSION_819XU_A) { /* Antenna gain offset from B/C/D to A */ reg_u32 = priv->AntennaTxPwDiff[1]<<4 | priv->AntennaTxPwDiff[0]; @@ -917,8 +918,8 @@ void rtl8192_phy_setTxPower(struct net_device *dev, u8 channel) switch (priv->rf_chip) { case RF_8256: /* need further implement */ - PHY_SetRF8256CCKTxPower(dev, powerlevel); - PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G); + phy_set_rf8256_cck_tx_power(dev, powerlevel); + phy_set_rf8256_ofdm_tx_power(dev, powerlevelOFDM24G); break; default: RT_TRACE((COMP_PHY|COMP_ERR), @@ -940,7 +941,7 @@ void rtl8192_phy_RFConfig(struct net_device *dev) switch (priv->rf_chip) { case RF_8256: - PHY_RF8256_Config(dev); + phy_rf8256_config(dev); break; default: RT_TRACE(COMP_ERR, "error chip id\n"); @@ -1065,8 +1066,8 @@ static void rtl8192_SetTxPowerLevel(struct net_device *dev, u8 channel) break; case RF_8256: - PHY_SetRF8256CCKTxPower(dev, powerlevel); - PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G); + phy_set_rf8256_cck_tx_power(dev, powerlevel); + phy_set_rf8256_ofdm_tx_power(dev, powerlevelOFDM24G); break; case RF_8258: @@ -1271,7 +1272,7 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, RT_TRACE(COMP_CH, "%s() stage: %d, step: %d, channel: %d\n", __func__, *stage, *step, channel); - if (!IsLegalChannel(priv->ieee80211, channel)) { + if (!is_legal_channel(priv->ieee80211, channel)) { RT_TRACE(COMP_ERR, "set to illegal channel: %d\n", channel); /* return true to tell upper caller function this channel * setting is finished! Or it will in while loop. @@ -1367,7 +1368,7 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, switch (CurrentCmd->cmd_id) { case CMD_ID_SET_TX_PWR_LEVEL: - if (priv->card_8192_version == (u8)VERSION_819xU_A) + if (priv->card_8192_version == VERSION_819XU_A) /* consider it later! */ rtl8192_SetTxPowerLevel(dev, channel); break; @@ -1633,7 +1634,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) break; case RF_8256: - PHY_SetRF8256Bandwidth(dev, priv->CurrentChannelBW); + phy_set_rf8256_bandwidth(dev, priv->CurrentChannelBW); break; case RF_8258: diff --git a/drivers/staging/rtl8192u/r819xU_phy.h b/drivers/staging/rtl8192u/r819xU_phy.h index c7ec3182857f..8c2933264407 100644 --- a/drivers/staging/rtl8192u/r819xU_phy.h +++ b/drivers/staging/rtl8192u/r819xU_phy.h @@ -7,6 +7,11 @@ #define MAX_RFDEPENDCMD_CNT 16 #define MAX_POSTCMD_CNT 16 +enum baseband_config_type { + BASEBAND_CONFIG_PHY_REG = 0, //Radio Path A + BASEBAND_CONFIG_AGC_TAB = 1, //Radio Path B +}; + enum switch_chan_cmd_id { CMD_ID_END, CMD_ID_SET_TX_PWR_LEVEL, @@ -52,7 +57,6 @@ u32 rtl8192_phy_QueryRFReg(struct net_device *dev, enum rf90_radio_path_e e_rfpath, u32 reg_addr, u32 bitmask); void rtl8192_phy_configmac(struct net_device *dev); -void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType); u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, enum hw90_block_e CheckBlock, enum rf90_radio_path_e e_rfpath); diff --git a/drivers/staging/rtl8712/basic_types.h b/drivers/staging/rtl8712/basic_types.h index f5c0231891b1..4ad7f35b1644 100644 --- a/drivers/staging/rtl8712/basic_types.h +++ b/drivers/staging/rtl8712/basic_types.h @@ -1,16 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/drv_types.h b/drivers/staging/rtl8712/drv_types.h index ede99e96984f..48d62fe6c8d4 100644 --- a/drivers/staging/rtl8712/drv_types.h +++ b/drivers/staging/rtl8712/drv_types.h @@ -1,16 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/ethernet.h b/drivers/staging/rtl8712/ethernet.h index 039da36fad3d..4b9b8a97a0bc 100644 --- a/drivers/staging/rtl8712/ethernet.h +++ b/drivers/staging/rtl8712/ethernet.h @@ -1,16 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/hal_init.c b/drivers/staging/rtl8712/hal_init.c index 2a3f0746ee2c..7cdd609cab6c 100644 --- a/drivers/staging/rtl8712/hal_init.c +++ b/drivers/staging/rtl8712/hal_init.c @@ -1,18 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * hal_init.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/ieee80211.c b/drivers/staging/rtl8712/ieee80211.c index 7a4c00e49a88..bb4f56a5fb01 100644 --- a/drivers/staging/rtl8712/ieee80211.c +++ b/drivers/staging/rtl8712/ieee80211.c @@ -1,18 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * ieee80211.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/ieee80211.h b/drivers/staging/rtl8712/ieee80211.h index d605dfd02200..1470771daa62 100644 --- a/drivers/staging/rtl8712/ieee80211.h +++ b/drivers/staging/rtl8712/ieee80211.h @@ -1,19 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, see <http://www.gnu.org/licenses/>. - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/mlme_linux.c b/drivers/staging/rtl8712/mlme_linux.c index baaa52f04560..9d156efbc9ed 100644 --- a/drivers/staging/rtl8712/mlme_linux.c +++ b/drivers/staging/rtl8712/mlme_linux.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * mlme_linux.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/mlme_osdep.h b/drivers/staging/rtl8712/mlme_osdep.h index a20fe81f921f..9eaf94f072ff 100644 --- a/drivers/staging/rtl8712/mlme_osdep.h +++ b/drivers/staging/rtl8712/mlme_osdep.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/mp_custom_oid.h b/drivers/staging/rtl8712/mp_custom_oid.h index 40510089b781..a9fac87fcabc 100644 --- a/drivers/staging/rtl8712/mp_custom_oid.h +++ b/drivers/staging/rtl8712/mp_custom_oid.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/os_intfs.c b/drivers/staging/rtl8712/os_intfs.c index ff4e451c10f9..2d3f38007299 100644 --- a/drivers/staging/rtl8712/os_intfs.c +++ b/drivers/staging/rtl8712/os_intfs.c @@ -1,18 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * os_intfs.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/osdep_intf.h b/drivers/staging/rtl8712/osdep_intf.h index 5d37e1f951cf..2cc25db1a91d 100644 --- a/drivers/staging/rtl8712/osdep_intf.h +++ b/drivers/staging/rtl8712/osdep_intf.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/osdep_service.h b/drivers/staging/rtl8712/osdep_service.h index 5d33020554cd..e939c4a954b3 100644 --- a/drivers/staging/rtl8712/osdep_service.h +++ b/drivers/staging/rtl8712/osdep_service.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/recv_linux.c b/drivers/staging/rtl8712/recv_linux.c index 8cf4286f6318..4e20cbafa9fb 100644 --- a/drivers/staging/rtl8712/recv_linux.c +++ b/drivers/staging/rtl8712/recv_linux.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * recv_linux.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/recv_osdep.h b/drivers/staging/rtl8712/recv_osdep.h index 1f4986e940a3..dcd3b484c793 100644 --- a/drivers/staging/rtl8712/recv_osdep.h +++ b/drivers/staging/rtl8712/recv_osdep.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_bitdef.h b/drivers/staging/rtl8712/rtl8712_bitdef.h index dee35fe2587a..a4a687dcc2e7 100644 --- a/drivers/staging/rtl8712/rtl8712_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_cmd.c b/drivers/staging/rtl8712/rtl8712_cmd.c index b1dfe9f46619..1920d02f7c9f 100644 --- a/drivers/staging/rtl8712/rtl8712_cmd.c +++ b/drivers/staging/rtl8712/rtl8712_cmd.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl8712_cmd.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_cmd.h b/drivers/staging/rtl8712/rtl8712_cmd.h index 9181bb6b04c3..92fb77666d44 100644 --- a/drivers/staging/rtl8712/rtl8712_cmd.h +++ b/drivers/staging/rtl8712/rtl8712_cmd.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h b/drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h index 4b8985d50098..e125c7222ab5 100644 --- a/drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_CMDCTRL_BITDEF_H__ #define __RTL8712_CMDCTRL_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_cmdctrl_regdef.h b/drivers/staging/rtl8712/rtl8712_cmdctrl_regdef.h index 8df42a70399f..fc67771c89b7 100644 --- a/drivers/staging/rtl8712/rtl8712_cmdctrl_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_cmdctrl_regdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_CMDCTRL_REGDEF_H__ #define __RTL8712_CMDCTRL_REGDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_debugctrl_bitdef.h b/drivers/staging/rtl8712/rtl8712_debugctrl_bitdef.h index 4b3436795cb1..bb3863467f0d 100644 --- a/drivers/staging/rtl8712/rtl8712_debugctrl_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_debugctrl_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_DEBUGCTRL_BITDEF_H__ #define __RTL8712_DEBUGCTRL_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_debugctrl_regdef.h b/drivers/staging/rtl8712/rtl8712_debugctrl_regdef.h index d7c964d436a1..319220e9d53d 100644 --- a/drivers/staging/rtl8712/rtl8712_debugctrl_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_debugctrl_regdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_DEBUGCTRL_REGDEF_H__ #define __RTL8712_DEBUGCTRL_REGDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h b/drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h index 32dab81f1767..9048d6a65296 100644 --- a/drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_edcasetting_regdef.h b/drivers/staging/rtl8712/rtl8712_edcasetting_regdef.h index d992cb8b1c73..02ec9f3bba66 100644 --- a/drivers/staging/rtl8712/rtl8712_edcasetting_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_edcasetting_regdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_EDCASETTING_REGDEF_H__ #define __RTL8712_EDCASETTING_REGDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_efuse.c b/drivers/staging/rtl8712/rtl8712_efuse.c index d90213eb5e20..8bc45ffd3029 100644 --- a/drivers/staging/rtl8712/rtl8712_efuse.c +++ b/drivers/staging/rtl8712/rtl8712_efuse.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * rtl8712_efuse.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_event.h b/drivers/staging/rtl8712/rtl8712_event.h index cad7085c3f8a..0d3e5feadcc0 100644 --- a/drivers/staging/rtl8712/rtl8712_event.h +++ b/drivers/staging/rtl8712/rtl8712_event.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_fifoctrl_bitdef.h b/drivers/staging/rtl8712/rtl8712_fifoctrl_bitdef.h index bd8240476d71..f09645fa1886 100644 --- a/drivers/staging/rtl8712/rtl8712_fifoctrl_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_fifoctrl_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_FIFOCTRL_BITDEF_H__ #define __RTL8712_FIFOCTRL_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h b/drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h index 6d527380fd29..189fdeb16d7d 100644 --- a/drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_FIFOCTRL_REGDEF_H__ #define __RTL8712_FIFOCTRL_REGDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_gp_bitdef.h b/drivers/staging/rtl8712/rtl8712_gp_bitdef.h index 66c35c990983..ee651fb3fde3 100644 --- a/drivers/staging/rtl8712/rtl8712_gp_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_gp_bitdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_gp_regdef.h b/drivers/staging/rtl8712/rtl8712_gp_regdef.h index a0379360d0a3..892a7fb13923 100644 --- a/drivers/staging/rtl8712/rtl8712_gp_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_gp_regdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_hal.h b/drivers/staging/rtl8712/rtl8712_hal.h index 84456bb560ef..42f519739128 100644 --- a/drivers/staging/rtl8712/rtl8712_hal.h +++ b/drivers/staging/rtl8712/rtl8712_hal.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_interrupt_bitdef.h b/drivers/staging/rtl8712/rtl8712_interrupt_bitdef.h index 2a561d2862e0..e9732a1bcd7e 100644 --- a/drivers/staging/rtl8712/rtl8712_interrupt_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_interrupt_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_INTERRUPT_BITDEF_H__ #define __RTL8712_INTERRUPT_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_io.c b/drivers/staging/rtl8712/rtl8712_io.c index 391eff37f573..8eb79f73c014 100644 --- a/drivers/staging/rtl8712/rtl8712_io.c +++ b/drivers/staging/rtl8712/rtl8712_io.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl8712_io.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_led.c b/drivers/staging/rtl8712/rtl8712_led.c index 0aa97c9dcced..5b1004b2df47 100644 --- a/drivers/staging/rtl8712/rtl8712_led.c +++ b/drivers/staging/rtl8712/rtl8712_led.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl8712_led.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_macsetting_bitdef.h b/drivers/staging/rtl8712/rtl8712_macsetting_bitdef.h index 28e0a7ebcad7..3d9f40fa8469 100644 --- a/drivers/staging/rtl8712/rtl8712_macsetting_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_macsetting_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_MACSETTING_BITDEF_H__ #define __RTL8712_MACSETTING_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_macsetting_regdef.h b/drivers/staging/rtl8712/rtl8712_macsetting_regdef.h index ced0da9332d5..e8cb2eee9294 100644 --- a/drivers/staging/rtl8712/rtl8712_macsetting_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_macsetting_regdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_MACSETTING_REGDEF_H__ #define __RTL8712_MACSETTING_REGDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_powersave_bitdef.h b/drivers/staging/rtl8712/rtl8712_powersave_bitdef.h index 8fc689416519..53e0d6b440f3 100644 --- a/drivers/staging/rtl8712/rtl8712_powersave_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_powersave_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_POWERSAVE_BITDEF_H__ #define __RTL8712_POWERSAVE_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_powersave_regdef.h b/drivers/staging/rtl8712/rtl8712_powersave_regdef.h index 4632ddd5d1f7..1bcfde4b1c11 100644 --- a/drivers/staging/rtl8712/rtl8712_powersave_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_powersave_regdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_POWERSAVE_REGDEF_H__ #define __RTL8712_POWERSAVE_REGDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_ratectrl_bitdef.h b/drivers/staging/rtl8712/rtl8712_ratectrl_bitdef.h index 6d3d6e8522fb..1de51c48f9c1 100644 --- a/drivers/staging/rtl8712/rtl8712_ratectrl_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_ratectrl_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_RATECTRL_BITDEF_H__ #define __RTL8712_RATECTRL_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_ratectrl_regdef.h b/drivers/staging/rtl8712/rtl8712_ratectrl_regdef.h index 73dfc3610154..a3eaee0e1b69 100644 --- a/drivers/staging/rtl8712/rtl8712_ratectrl_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_ratectrl_regdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_recv.c b/drivers/staging/rtl8712/rtl8712_recv.c index 4264cd341f03..5bf9070b7a28 100644 --- a/drivers/staging/rtl8712/rtl8712_recv.c +++ b/drivers/staging/rtl8712/rtl8712_recv.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl8712_recv.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_recv.h b/drivers/staging/rtl8712/rtl8712_recv.h index 0352e6fafd90..6954c5bfbcaf 100644 --- a/drivers/staging/rtl8712/rtl8712_recv.h +++ b/drivers/staging/rtl8712/rtl8712_recv.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_regdef.h b/drivers/staging/rtl8712/rtl8712_regdef.h index e7bca55b59d0..28aec9aa539f 100644 --- a/drivers/staging/rtl8712/rtl8712_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_regdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_security_bitdef.h b/drivers/staging/rtl8712/rtl8712_security_bitdef.h index 05dafa0c3333..1c26a7eca64a 100644 --- a/drivers/staging/rtl8712/rtl8712_security_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_security_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_SECURITY_BITDEF_H__ #define __RTL8712_SECURITY_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_spec.h b/drivers/staging/rtl8712/rtl8712_spec.h index 51e042815cc9..c0bab4c49ae9 100644 --- a/drivers/staging/rtl8712/rtl8712_spec.h +++ b/drivers/staging/rtl8712/rtl8712_spec.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_syscfg_bitdef.h b/drivers/staging/rtl8712/rtl8712_syscfg_bitdef.h index 2e66d28d6918..a328ca9b340c 100644 --- a/drivers/staging/rtl8712/rtl8712_syscfg_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_syscfg_bitdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_syscfg_regdef.h b/drivers/staging/rtl8712/rtl8712_syscfg_regdef.h index 767dfdf8d83f..e95eb5832ec4 100644 --- a/drivers/staging/rtl8712/rtl8712_syscfg_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_syscfg_regdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_timectrl_bitdef.h b/drivers/staging/rtl8712/rtl8712_timectrl_bitdef.h index 724421582421..1af5f1dd3c20 100644 --- a/drivers/staging/rtl8712/rtl8712_timectrl_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_timectrl_bitdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_TIMECTRL_BITDEF_H__ #define __RTL8712_TIMECTRL_BITDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_timectrl_regdef.h b/drivers/staging/rtl8712/rtl8712_timectrl_regdef.h index 106916c7e310..b51603f1b880 100644 --- a/drivers/staging/rtl8712/rtl8712_timectrl_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_timectrl_regdef.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL8712_TIMECTRL_REGDEF_H__ #define __RTL8712_TIMECTRL_REGDEF_H__ diff --git a/drivers/staging/rtl8712/rtl8712_wmac_bitdef.h b/drivers/staging/rtl8712/rtl8712_wmac_bitdef.h index 61a3603aa587..d3b45c6cd855 100644 --- a/drivers/staging/rtl8712/rtl8712_wmac_bitdef.h +++ b/drivers/staging/rtl8712/rtl8712_wmac_bitdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_wmac_regdef.h b/drivers/staging/rtl8712/rtl8712_wmac_regdef.h index d9f8347ab461..662383fe7a8d 100644 --- a/drivers/staging/rtl8712/rtl8712_wmac_regdef.h +++ b/drivers/staging/rtl8712/rtl8712_wmac_regdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_xmit.c b/drivers/staging/rtl8712/rtl8712_xmit.c index fb64c2891e22..aa6fb516f398 100644 --- a/drivers/staging/rtl8712/rtl8712_xmit.c +++ b/drivers/staging/rtl8712/rtl8712_xmit.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl8712_xmit.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl8712_xmit.h b/drivers/staging/rtl8712/rtl8712_xmit.h index 02b1593ada01..9be8fb70c92e 100644 --- a/drivers/staging/rtl8712/rtl8712_xmit.h +++ b/drivers/staging/rtl8712/rtl8712_xmit.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_cmd.c b/drivers/staging/rtl8712/rtl871x_cmd.c index 620cee8b8514..05a78ac24987 100644 --- a/drivers/staging/rtl8712/rtl871x_cmd.c +++ b/drivers/staging/rtl8712/rtl871x_cmd.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_cmd.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_cmd.h b/drivers/staging/rtl8712/rtl871x_cmd.h index 24da2ccea04f..75a126d8e26c 100644 --- a/drivers/staging/rtl8712/rtl871x_cmd.h +++ b/drivers/staging/rtl8712/rtl871x_cmd.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_debug.h b/drivers/staging/rtl8712/rtl871x_debug.h index 74468b058258..a427547c02ba 100644 --- a/drivers/staging/rtl8712/rtl871x_debug.h +++ b/drivers/staging/rtl8712/rtl871x_debug.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_eeprom.c b/drivers/staging/rtl8712/rtl871x_eeprom.c index 4e713610ad8b..948bd0c757b5 100644 --- a/drivers/staging/rtl8712/rtl871x_eeprom.c +++ b/drivers/staging/rtl8712/rtl871x_eeprom.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_eeprom.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_eeprom.h b/drivers/staging/rtl8712/rtl871x_eeprom.h index 497276e53bbe..7bdeb2aaa025 100644 --- a/drivers/staging/rtl8712/rtl871x_eeprom.h +++ b/drivers/staging/rtl8712/rtl871x_eeprom.h @@ -1,21 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * ******************************************************************************/ #ifndef __RTL871X_EEPROM_H__ #define __RTL871X_EEPROM_H__ diff --git a/drivers/staging/rtl8712/rtl871x_event.h b/drivers/staging/rtl8712/rtl871x_event.h index 517137906e6c..d9a5476d2426 100644 --- a/drivers/staging/rtl8712/rtl871x_event.h +++ b/drivers/staging/rtl8712/rtl871x_event.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_ht.h b/drivers/staging/rtl8712/rtl871x_ht.h index 513f458ea07c..ebd78665775d 100644 --- a/drivers/staging/rtl8712/rtl871x_ht.h +++ b/drivers/staging/rtl8712/rtl871x_ht.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_io.c b/drivers/staging/rtl8712/rtl871x_io.c index 3a10940db9b7..17dafeffd6f4 100644 --- a/drivers/staging/rtl8712/rtl871x_io.c +++ b/drivers/staging/rtl8712/rtl871x_io.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_io.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * @@ -68,7 +56,7 @@ static uint _init_intf_hdl(struct _adapter *padapter, set_intf_option(&pintf_hdl->intf_option); set_intf_funs(pintf_hdl); set_intf_ops(&pintf_hdl->io_ops); - pintf_priv->intf_dev = (u8 *)&(padapter->dvobjpriv); + pintf_priv->intf_dev = (u8 *)&padapter->dvobjpriv; if (init_intf_priv(pintf_priv) == _FAIL) goto _init_intf_hdl_fail; return _SUCCESS; @@ -92,7 +80,7 @@ static uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl) pintfhdl->intf_option = 0; pintfhdl->adapter = dev; - pintfhdl->intf_dev = (u8 *)&(adapter->dvobjpriv); + pintfhdl->intf_dev = (u8 *)&adapter->dvobjpriv; if (!_init_intf_hdl(adapter, pintfhdl)) goto register_intf_hdl_fail; return _SUCCESS; @@ -135,7 +123,7 @@ uint r8712_alloc_io_queue(struct _adapter *adapter) list_add_tail(&pio_req->list, &pio_queue->free_ioreqs); pio_req++; } - if ((register_intf_hdl((u8 *)adapter, &(pio_queue->intf))) == _FAIL) + if ((register_intf_hdl((u8 *)adapter, &pio_queue->intf)) == _FAIL) goto alloc_io_queue_fail; adapter->pio_queue = pio_queue; return _SUCCESS; diff --git a/drivers/staging/rtl8712/rtl871x_io.h b/drivers/staging/rtl8712/rtl871x_io.h index dd054d7367b3..28941423b7ed 100644 --- a/drivers/staging/rtl8712/rtl871x_io.h +++ b/drivers/staging/rtl8712/rtl871x_io.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_ioctl_linux.c b/drivers/staging/rtl8712/rtl871x_ioctl_linux.c index c3ff7c3e6681..e723357ac8c0 100644 --- a/drivers/staging/rtl8712/rtl871x_ioctl_linux.c +++ b/drivers/staging/rtl8712/rtl871x_ioctl_linux.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_ioctl_linux.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * @@ -67,11 +55,6 @@ static const long ieee80211_wlan_frequencies[] = { 2472, 2484 }; -static const char * const iw_operation_mode[] = { - "Auto", "Ad-Hoc", "Managed", "Master", "Repeater", "Secondary", - "Monitor" -}; - void r8712_indicate_wx_assoc_event(struct _adapter *padapter) { union iwreq_data wrqu; @@ -1789,7 +1772,7 @@ static int r871x_wx_set_enc_ext(struct net_device *dev, return -ENOMEM; param->cmd = IEEE_CMD_SET_ENCRYPTION; eth_broadcast_addr(param->sta_addr); - strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); + strlcpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); if (pext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) param->u.crypt.set_tx = 0; if (pext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) diff --git a/drivers/staging/rtl8712/rtl871x_ioctl_rtl.c b/drivers/staging/rtl8712/rtl871x_ioctl_rtl.c index ca769f781e96..2dc20da21679 100644 --- a/drivers/staging/rtl8712/rtl871x_ioctl_rtl.c +++ b/drivers/staging/rtl8712/rtl871x_ioctl_rtl.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_ioctl_rtl.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_ioctl_rtl.h b/drivers/staging/rtl8712/rtl871x_ioctl_rtl.h index 3bcceae3cbeb..7c0b880ac686 100644 --- a/drivers/staging/rtl8712/rtl871x_ioctl_rtl.h +++ b/drivers/staging/rtl8712/rtl871x_ioctl_rtl.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_ioctl_set.c b/drivers/staging/rtl8712/rtl871x_ioctl_set.c index f4a53df7f2c1..2622d5e3bff9 100644 --- a/drivers/staging/rtl8712/rtl871x_ioctl_set.c +++ b/drivers/staging/rtl8712/rtl871x_ioctl_set.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_ioctl_set.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_ioctl_set.h b/drivers/staging/rtl8712/rtl871x_ioctl_set.h index 2c94cd151c96..8b1085aea962 100644 --- a/drivers/staging/rtl8712/rtl871x_ioctl_set.h +++ b/drivers/staging/rtl8712/rtl871x_ioctl_set.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_led.h b/drivers/staging/rtl8712/rtl871x_led.h index adfbc400a18d..ee19c873cf01 100644 --- a/drivers/staging/rtl8712/rtl871x_led.h +++ b/drivers/staging/rtl8712/rtl871x_led.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_mlme.c b/drivers/staging/rtl8712/rtl871x_mlme.c index ac547ddd72d1..a7374006a9fb 100644 --- a/drivers/staging/rtl8712/rtl871x_mlme.c +++ b/drivers/staging/rtl8712/rtl871x_mlme.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_mlme.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_mlme.h b/drivers/staging/rtl8712/rtl871x_mlme.h index 918947f38151..8a54181f4816 100644 --- a/drivers/staging/rtl8712/rtl871x_mlme.h +++ b/drivers/staging/rtl8712/rtl871x_mlme.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_mp.c b/drivers/staging/rtl8712/rtl871x_mp.c index ba208a2e1e4e..1d5364f5a518 100644 --- a/drivers/staging/rtl8712/rtl871x_mp.c +++ b/drivers/staging/rtl8712/rtl871x_mp.c @@ -1,20 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_mp.h b/drivers/staging/rtl8712/rtl871x_mp.h index 8df452e3e3ce..e79a67676469 100644 --- a/drivers/staging/rtl8712/rtl871x_mp.h +++ b/drivers/staging/rtl8712/rtl871x_mp.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_mp_ioctl.c b/drivers/staging/rtl8712/rtl871x_mp_ioctl.c index 6e264a8d0087..588346da1412 100644 --- a/drivers/staging/rtl8712/rtl871x_mp_ioctl.c +++ b/drivers/staging/rtl8712/rtl871x_mp_ioctl.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_mp_ioctl.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_mp_ioctl.h b/drivers/staging/rtl8712/rtl871x_mp_ioctl.h index 741006f1e45a..44cd911f2aa1 100644 --- a/drivers/staging/rtl8712/rtl871x_mp_ioctl.h +++ b/drivers/staging/rtl8712/rtl871x_mp_ioctl.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_pwrctrl.c b/drivers/staging/rtl8712/rtl871x_pwrctrl.c index ae4c9567bb55..351984fe254e 100644 --- a/drivers/staging/rtl8712/rtl871x_pwrctrl.c +++ b/drivers/staging/rtl8712/rtl871x_pwrctrl.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_pwrctrl.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_pwrctrl.h b/drivers/staging/rtl8712/rtl871x_pwrctrl.h index bd2c3a2df48b..11b5034f203d 100644 --- a/drivers/staging/rtl8712/rtl871x_pwrctrl.h +++ b/drivers/staging/rtl8712/rtl871x_pwrctrl.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_recv.c b/drivers/staging/rtl8712/rtl871x_recv.c index 2ef31a4e9a6b..f10896df094b 100644 --- a/drivers/staging/rtl8712/rtl871x_recv.c +++ b/drivers/staging/rtl8712/rtl871x_recv.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_recv.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_rf.h b/drivers/staging/rtl8712/rtl871x_rf.h index 133ed6462928..cc54453cd424 100644 --- a/drivers/staging/rtl8712/rtl871x_rf.h +++ b/drivers/staging/rtl8712/rtl871x_rf.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_security.c b/drivers/staging/rtl8712/rtl871x_security.c index 1075eacdb441..f82645011d02 100644 --- a/drivers/staging/rtl8712/rtl871x_security.c +++ b/drivers/staging/rtl8712/rtl871x_security.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_security.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_security.h b/drivers/staging/rtl8712/rtl871x_security.h index 46b88a41d236..25b4d379766d 100644 --- a/drivers/staging/rtl8712/rtl871x_security.h +++ b/drivers/staging/rtl8712/rtl871x_security.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_sta_mgt.c b/drivers/staging/rtl8712/rtl871x_sta_mgt.c index e2d75e4c473f..9648ee15b40e 100644 --- a/drivers/staging/rtl8712/rtl871x_sta_mgt.c +++ b/drivers/staging/rtl8712/rtl871x_sta_mgt.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_sta_mgt.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_wlan_sme.h b/drivers/staging/rtl8712/rtl871x_wlan_sme.h index 44924d5de217..97ea1451426c 100644 --- a/drivers/staging/rtl8712/rtl871x_wlan_sme.h +++ b/drivers/staging/rtl8712/rtl871x_wlan_sme.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/rtl871x_xmit.c b/drivers/staging/rtl8712/rtl871x_xmit.c index a8ae14ce6613..5c7dc9c6f76b 100644 --- a/drivers/staging/rtl8712/rtl871x_xmit.c +++ b/drivers/staging/rtl8712/rtl871x_xmit.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * rtl871x_xmit.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * @@ -433,7 +421,7 @@ static sint xmitframe_addmic(struct _adapter *padapter, r8712_secmicappend(&micdata, payload, length); payload = payload + length; - } else{ + } else { length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - ((psecuritypriv->sw_encrypt) ? diff --git a/drivers/staging/rtl8712/rtl871x_xmit.h b/drivers/staging/rtl8712/rtl871x_xmit.h index 40927277f498..3bea2e374f13 100644 --- a/drivers/staging/rtl8712/rtl871x_xmit.h +++ b/drivers/staging/rtl8712/rtl871x_xmit.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/sta_info.h b/drivers/staging/rtl8712/sta_info.h index 742dfa0ca817..45dbed10295f 100644 --- a/drivers/staging/rtl8712/sta_info.h +++ b/drivers/staging/rtl8712/sta_info.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/usb_halinit.c b/drivers/staging/rtl8712/usb_halinit.c index 0b159850f5a2..02e73c2412d4 100644 --- a/drivers/staging/rtl8712/usb_halinit.c +++ b/drivers/staging/rtl8712/usb_halinit.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * usb_halinit.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/usb_intf.c b/drivers/staging/rtl8712/usb_intf.c index 85eadddfaf06..92d75d7c51ae 100644 --- a/drivers/staging/rtl8712/usb_intf.c +++ b/drivers/staging/rtl8712/usb_intf.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * usb_intf.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/usb_ops.c b/drivers/staging/rtl8712/usb_ops.c index 332e2e51d778..eef52d5c730a 100644 --- a/drivers/staging/rtl8712/usb_ops.c +++ b/drivers/staging/rtl8712/usb_ops.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * usb_ops.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/usb_ops.h b/drivers/staging/rtl8712/usb_ops.h index 78e775a46364..d62975447d29 100644 --- a/drivers/staging/rtl8712/usb_ops.h +++ b/drivers/staging/rtl8712/usb_ops.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/usb_ops_linux.c b/drivers/staging/rtl8712/usb_ops_linux.c index 6d12a96fa65f..ee5968808332 100644 --- a/drivers/staging/rtl8712/usb_ops_linux.c +++ b/drivers/staging/rtl8712/usb_ops_linux.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * usb_ops_linux.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/usb_osintf.h b/drivers/staging/rtl8712/usb_osintf.h index 609f9210cc46..ddfa405d0c9b 100644 --- a/drivers/staging/rtl8712/usb_osintf.h +++ b/drivers/staging/rtl8712/usb_osintf.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/wifi.h b/drivers/staging/rtl8712/wifi.h index 00a4302e9983..77346debea03 100644 --- a/drivers/staging/rtl8712/wifi.h +++ b/drivers/staging/rtl8712/wifi.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/wlan_bssdef.h b/drivers/staging/rtl8712/wlan_bssdef.h index 9dc9ce5a2ccc..b54ccaacc527 100644 --- a/drivers/staging/rtl8712/wlan_bssdef.h +++ b/drivers/staging/rtl8712/wlan_bssdef.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/xmit_linux.c b/drivers/staging/rtl8712/xmit_linux.c index 4ee4136b5c28..8bcb0775411f 100644 --- a/drivers/staging/rtl8712/xmit_linux.c +++ b/drivers/staging/rtl8712/xmit_linux.c @@ -1,22 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /****************************************************************************** * xmit_linux.c * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * Linux device driver for RTL8192SU * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8712/xmit_osdep.h b/drivers/staging/rtl8712/xmit_osdep.h index 8eba7ca0ddef..21f6b31e0f50 100644 --- a/drivers/staging/rtl8712/xmit_osdep.h +++ b/drivers/staging/rtl8712/xmit_osdep.h @@ -1,20 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * diff --git a/drivers/staging/rtl8723bs/core/rtw_ap.c b/drivers/staging/rtl8723bs/core/rtw_ap.c index faf4b4158cfa..2691241bfd84 100644 --- a/drivers/staging/rtl8723bs/core/rtw_ap.c +++ b/drivers/staging/rtl8723bs/core/rtw_ap.c @@ -861,7 +861,7 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) update_hw_ht_param(padapter); } - if (pmlmepriv->cur_network.join_res != true) { /* setting only at first time */ + if (!pmlmepriv->cur_network.join_res) { /* setting only at first time */ /* WEP Key will be set before this function, do not clear CAM. */ if ( @@ -899,7 +899,7 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK, NULL); - if (pmlmepriv->cur_network.join_res != true) { /* setting only at first time */ + if (!pmlmepriv->cur_network.join_res) { /* setting only at first time */ /* u32 initialgain; */ @@ -992,7 +992,7 @@ void start_bss_network(struct adapter *padapter, u8 *pbuf) ); - if (true == pmlmeext->bstart_bss) { + if (pmlmeext->bstart_bss) { update_beacon(padapter, _TIM_IE_, NULL, true); @@ -1047,7 +1047,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) DBG_871X("%s, len =%d\n", __func__, len); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE)) return _FAIL; @@ -1379,7 +1379,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len) } /* ht_cap */ - if (pregistrypriv->ht_enable && ht_cap == true) { + if (pregistrypriv->ht_enable && ht_cap) { pmlmepriv->htpriv.ht_option = true; pmlmepriv->qospriv.qos_option = 1; @@ -1482,7 +1482,7 @@ int rtw_acl_add_sta(struct adapter *padapter, u8 *addr) spin_unlock_bh(&(pacl_node_q->lock)); - if (added == true) + if (added) return ret; @@ -1492,7 +1492,7 @@ int rtw_acl_add_sta(struct adapter *padapter, u8 *addr) paclnode = &pacl_list->aclnode[i]; - if (paclnode->valid == false) { + if (!paclnode->valid) { INIT_LIST_HEAD(&paclnode->list); @@ -1547,7 +1547,7 @@ int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr) !memcmp(baddr, addr, ETH_ALEN) ) { - if (paclnode->valid == true) { + if (paclnode->valid) { paclnode->valid = false; @@ -1912,7 +1912,7 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx) pmlmeext = &(padapter->mlmeextpriv); /* pmlmeinfo = &(pmlmeext->mlmext_info); */ - if (false == pmlmeext->bstart_bss) + if (!pmlmeext->bstart_bss) return; spin_lock_bh(&pmlmepriv->bcn_update_lock); @@ -1998,7 +1998,7 @@ static int rtw_ht_operation_update(struct adapter *padapter) struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; - if (pmlmepriv->htpriv.ht_option == true) + if (pmlmepriv->htpriv.ht_option) return 0; /* if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) */ @@ -2066,7 +2066,7 @@ static int rtw_ht_operation_update(struct adapter *padapter) void associated_clients_update(struct adapter *padapter, u8 updated) { /* update associcated stations cap. */ - if (updated == true) { + if (updated) { struct list_head *phead, *plist; struct sta_info *psta = NULL; @@ -2458,7 +2458,7 @@ void sta_info_update(struct adapter *padapter, struct sta_info *psta) psta->htpriv.ht_option = false; } - if (pmlmepriv->htpriv.ht_option == false) + if (!pmlmepriv->htpriv.ht_option) psta->htpriv.ht_option = false; update_sta_info_apmode(padapter, psta); diff --git a/drivers/staging/rtl8723bs/core/rtw_debug.c b/drivers/staging/rtl8723bs/core/rtw_debug.c index f852fde47350..a2a2cefd1786 100644 --- a/drivers/staging/rtl8723bs/core/rtw_debug.c +++ b/drivers/staging/rtl8723bs/core/rtw_debug.c @@ -657,7 +657,7 @@ int proc_get_suspend_resume_info(struct seq_file *m, void *v) DBG_871X_SEL_NL(m, "dbg_enwow_dload_fw_fail_cnt =%d\n", pdbgpriv->dbg_enwow_dload_fw_fail_cnt); DBG_871X_SEL_NL(m, "dbg_ips_drvopen_fail_cnt =%d\n", pdbgpriv->dbg_ips_drvopen_fail_cnt); DBG_871X_SEL_NL(m, "dbg_poll_fail_cnt =%d\n", pdbgpriv->dbg_poll_fail_cnt); - DBG_871X_SEL_NL(m, "dbg_rpwm_toogle_cnt =%d\n", pdbgpriv->dbg_rpwm_toogle_cnt); + DBG_871X_SEL_NL(m, "dbg_rpwm_toggle_cnt =%d\n", pdbgpriv->dbg_rpwm_toggle_cnt); DBG_871X_SEL_NL(m, "dbg_rpwm_timeout_fail_cnt =%d\n", pdbgpriv->dbg_rpwm_timeout_fail_cnt); return 0; diff --git a/drivers/staging/rtl8723bs/core/rtw_mlme.c b/drivers/staging/rtl8723bs/core/rtw_mlme.c index f9392b8db49b..4c5d5cf9dfe0 100644 --- a/drivers/staging/rtl8723bs/core/rtw_mlme.c +++ b/drivers/staging/rtl8723bs/core/rtw_mlme.c @@ -802,7 +802,7 @@ int rtw_is_desired_network(struct adapter *adapter, struct wlan_network *pnetwor /* TODO: Perry : For Power Management */ void rtw_atimdone_event_callback(struct adapter *adapter, u8 *pbuf) { - RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("receive atimdone_evet\n")); + RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("receive atimdone_event\n")); } diff --git a/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c b/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c index 0952d15f6d40..69c7abc0e3a5 100644 --- a/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c +++ b/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c @@ -1267,13 +1267,12 @@ unsigned int OnAssocReq(struct adapter *padapter, union recv_frame *precv_frame) /* checking SSID */ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SSID_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); - if (p == NULL) { - status = _STATS_FAILURE_; - } - if (ie_len == 0) /* broadcast ssid, however it is not allowed in assocreq */ + if (!p || ie_len == 0) { + /* broadcast ssid, however it is not allowed in assocreq */ status = _STATS_FAILURE_; - else { + goto OnAssocReqFail; + } else { /* check if ssid match */ if (memcmp((void *)(p+2), cur->Ssid.Ssid, cur->Ssid.SsidLength)) status = _STATS_FAILURE_; @@ -3796,7 +3795,7 @@ int issue_deauth_ex(struct adapter *padapter, u8 *da, unsigned short reason, int break; if (i < try_cnt && wait_ms > 0 && ret == _FAIL) - msleep(wait_ms); + mdelay(wait_ms); } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); diff --git a/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c b/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c index 110bbe340b78..59a667753266 100644 --- a/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c +++ b/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c @@ -1232,7 +1232,7 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal if (pwrpriv->ps_processing) { DBG_871X("%s wait ps_processing...\n", __func__); while (pwrpriv->ps_processing && jiffies_to_msecs(jiffies - start) <= 3000) - msleep(10); + mdelay(10); if (pwrpriv->ps_processing) DBG_871X("%s wait ps_processing timeout\n", __func__); else @@ -1244,7 +1244,7 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal while (pwrpriv->bInSuspend && jiffies_to_msecs(jiffies - start) <= 3000 ) { - msleep(10); + mdelay(10); } if (pwrpriv->bInSuspend) DBG_871X("%s wait bInSuspend timeout\n", __func__); diff --git a/drivers/staging/rtl8723bs/core/rtw_security.c b/drivers/staging/rtl8723bs/core/rtw_security.c index 6c8ac9e86c9f..240818b4a2c9 100644 --- a/drivers/staging/rtl8723bs/core/rtw_security.c +++ b/drivers/staging/rtl8723bs/core/rtw_security.c @@ -1543,7 +1543,7 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe) pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset; /* 4 start to encrypt each fragment */ - if ((pattrib->encrypt == _AES_)) { + if (pattrib->encrypt == _AES_) { RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_aes_encrypt: stainfo!= NULL!!!\n")); if (IS_MCAST(pattrib->ra)) @@ -1866,8 +1866,7 @@ u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe) pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data; /* 4 start to encrypt each fragment */ - if ((prxattrib->encrypt == _AES_)) { - + if (prxattrib->encrypt == _AES_) { stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]); if (stainfo != NULL) { RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_aes_decrypt: stainfo!= NULL!!!\n")); diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c index 0d2c61b67d0e..12c1cd590056 100644 --- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c +++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c @@ -2919,7 +2919,6 @@ int PHY_ConfigRFWithTxPwrTrackParaFile(struct adapter *Adapter, char *pFileName) struct hal_com_data *pHalData = GET_HAL_DATA(Adapter); int rlen = 0, rtStatus = _FAIL; char *szLine, *ptmp; - u32 i = 0; if (!(Adapter->registrypriv.load_phy_file & LOAD_RF_TXPWR_TRACK_PARA_FILE)) return rtStatus; @@ -2958,8 +2957,10 @@ int PHY_ConfigRFWithTxPwrTrackParaFile(struct adapter *Adapter, char *pFileName) char band[5] = "", path[5] = "", sign[5] = ""; char chnl[5] = "", rate[10] = ""; char data[300] = ""; /* 100 is too small */ + const int len = strlen(szLine); + int i; - if (strlen(szLine) < 10 || szLine[0] != '[') + if (len < 10 || szLine[0] != '[') continue; strncpy(band, szLine+1, 2); @@ -2973,7 +2974,7 @@ int PHY_ConfigRFWithTxPwrTrackParaFile(struct adapter *Adapter, char *pFileName) if (!ParseQualifiedString(szLine, &i, chnl, '[', ']')) { /* DBG_871X("Fail to parse channel group!\n"); */ } - while (szLine[i] != '{' && i < strlen(szLine)) + while (i < len && szLine[i] != '{') i++; if (!ParseQualifiedString(szLine, &i, data, '{', '}')) { /* DBG_871X("Fail to parse data!\n"); */ @@ -3083,7 +3084,7 @@ static int phy_ParsePowerLimitTableFile(struct adapter *Adapter, char *buffer) if (colNum > TXPWR_LMT_MAX_REGULATION_NUM) { DBG_871X( - "unvalid col number %d (greater than max %d)\n", + "invalid col number %d (greater than max %d)\n", colNum, TXPWR_LMT_MAX_REGULATION_NUM ); return _FAIL; @@ -3101,7 +3102,7 @@ static int phy_ParsePowerLimitTableFile(struct adapter *Adapter, char *buffer) /* DBG_871X("regulation %s!\n", regulation[forCnt]); */ if (regulation_name_cnt == 0) { - DBG_871X("unvalid number of regulation!\n"); + DBG_871X("invalid number of regulation!\n"); return _FAIL; } } diff --git a/drivers/staging/rtl8723bs/hal/odm_DIG.c b/drivers/staging/rtl8723bs/hal/odm_DIG.c index a12fdce77eae..4fa6cd315cf7 100644 --- a/drivers/staging/rtl8723bs/hal/odm_DIG.c +++ b/drivers/staging/rtl8723bs/hal/odm_DIG.c @@ -655,7 +655,7 @@ void odm_DIG(void *pDM_VOID) ODM_COMP_DIG, ODM_DBG_LOUD, ( - "odm_DIG(): Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n", + "odm_DIG(): Abnormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n", pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, pDM_DigTable->rx_gain_range_min ) @@ -671,7 +671,7 @@ void odm_DIG(void *pDM_VOID) ODM_COMP_DIG, ODM_DBG_LOUD, ( - "odm_DIG(): Abnrormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n", + "odm_DIG(): Abnormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n", pDM_DigTable->rx_gain_range_min ) ); diff --git a/drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c b/drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c index acc64fa8f166..0e674f39ef03 100644 --- a/drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c +++ b/drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c @@ -97,7 +97,7 @@ void odm_EdcaTurboCheckCE(void *pDM_VOID) return; } - if ((pregpriv->wifi_spec == 1)) { + if (pregpriv->wifi_spec == 1) { precvpriv->bIsAnyNonBEPkts = false; return; } diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c index 592917fc00aa..c7e55618b9a8 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c @@ -3348,7 +3348,7 @@ static void hw_var_set_opmode(struct adapter *padapter, u8 variable, u8 *val) /* disable atim wnd */ rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT|EN_BCN_FUNCTION|DIS_ATIM); /* rtw_write8(padapter, REG_BCN_CTRL, 0x18); */ - } else if ((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) { + } else if (mode == _HW_STATE_ADHOC_) { ResumeTxBeacon(padapter); rtw_write8(padapter, REG_BCN_CTRL, DIS_TSF_UDT|EN_BCN_FUNCTION|DIS_BCNQ_SUB); } else if (mode == _HW_STATE_AP_) { diff --git a/drivers/staging/rtl8723bs/include/drv_types.h b/drivers/staging/rtl8723bs/include/drv_types.h index c57f290f605a..062fda9962be 100644 --- a/drivers/staging/rtl8723bs/include/drv_types.h +++ b/drivers/staging/rtl8723bs/include/drv_types.h @@ -381,7 +381,7 @@ struct debug_priv { u32 dbg_enwow_dload_fw_fail_cnt; u32 dbg_ips_drvopen_fail_cnt; u32 dbg_poll_fail_cnt; - u32 dbg_rpwm_toogle_cnt; + u32 dbg_rpwm_toggle_cnt; u32 dbg_rpwm_timeout_fail_cnt; u64 dbg_rx_fifo_last_overflow; u64 dbg_rx_fifo_curr_overflow; diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c index c38298d960ff..28bfdbdc6e76 100644 --- a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c +++ b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c @@ -209,9 +209,9 @@ static char *translate_scan(struct adapter *padapter, i++; } - if (vht_cap == true) { + if (vht_cap) { max_rate = vht_data_rate; - } else if (ht_cap == true) { + } else if (ht_cap) { if (mcs_rate&0x8000) { /* MCS15 */ max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); } else if (mcs_rate&0x0080) { /* MCS7 */ @@ -337,7 +337,7 @@ static char *translate_scan(struct adapter *padapter, #ifdef CONFIG_SIGNAL_DISPLAY_DBM - iwe.u.qual.level = (u8) translate_percentage_to_dbm(ss);/* dbm */ + iwe.u.qual.level = (u8)translate_percentage_to_dbm(ss);/* dbm */ #else #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING { @@ -392,7 +392,7 @@ exit: static int wpa_set_auth_algs(struct net_device *dev, u32 value) { - struct adapter *padapter = (struct adapter *) rtw_netdev_priv(dev); + struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); int ret = 0; if ((value & WLAN_AUTH_SHARED_KEY) && (value & WLAN_AUTH_OPEN)) { @@ -436,7 +436,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, param->u.crypt.err = 0; param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; - if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) { + if (param_len < (u32)((u8 *)param->u.crypt.key - (u8 *)param) + param->u.crypt.key_len) { ret = -EINVAL; goto exit; } @@ -528,8 +528,8 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, } if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) { /* 802_1x */ - struct sta_info * psta,*pbcmc_sta; - struct sta_priv * pstapriv = &padapter->stapriv; + struct sta_info *psta, *pbcmc_sta; + struct sta_priv *pstapriv = &padapter->stapriv; if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == true) { /* sta mode */ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); @@ -862,7 +862,7 @@ static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, goto exit; } - if (padapter->hw_init_completed ==false) { + if (!padapter->hw_init_completed) { ret = -EPERM; goto exit; } @@ -946,7 +946,7 @@ static int rtw_wx_set_pmkid(struct net_device *dev, u8 j, blInserted = false; int intReturn = false; struct security_priv *psecuritypriv = &padapter->securitypriv; - struct iw_pmksa* pPMK = (struct iw_pmksa*) extra; + struct iw_pmksa* pPMK = (struct iw_pmksa*)extra; u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; u8 strIssueBssid[ ETH_ALEN ] = { 0x00 }; @@ -1236,7 +1236,7 @@ static int rtw_wx_set_mlme(struct net_device *dev, int ret = 0; u16 reason; struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); - struct iw_mlme *mlme = (struct iw_mlme *) extra; + struct iw_mlme *mlme = (struct iw_mlme *)extra; if (mlme == NULL) @@ -1295,7 +1295,7 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, goto exit; } - if (padapter->hw_init_completed ==false) { + if (!padapter->hw_init_completed ) { ret = -1; goto exit; } @@ -1303,7 +1303,7 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, /* When Busy Traffic, driver do not site survey. So driver return success. */ /* wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. */ /* modify by thomas 2011-02-22. */ - if (pmlmepriv->LinkDetectInfo.bBusyTraffic == true) { + if (pmlmepriv->LinkDetectInfo.bBusyTraffic) { indicate_wx_scan_complete_event(padapter); goto exit; } @@ -2390,7 +2390,7 @@ static int rtw_wx_set_channel_plan(struct net_device *dev, union iwreq_data *wrqu, char *extra) { struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev); - u8 channel_plan_req = (u8) (*((int *)wrqu)); + u8 channel_plan_req = (u8)(*((int *)wrqu)); if (_SUCCESS == rtw_set_chplan_cmd(padapter, channel_plan_req, 1, 1)) DBG_871X("%s set channel_plan = 0x%02X\n", __func__, channel_plan_req); @@ -2584,7 +2584,7 @@ static int rtw_wps_start(struct net_device *dev, goto exit; } - uintRet = copy_from_user((void*) &u32wps_start, pdata->pointer, 4); + uintRet = copy_from_user((void*)&u32wps_start, pdata->pointer, 4); if (u32wps_start == 0) u32wps_start = *extra; @@ -4229,7 +4229,7 @@ static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) * so, we just check hw_init_completed */ - if (padapter->hw_init_completed ==false) { + if (!padapter->hw_init_completed) { ret = -EPERM; goto out; } diff --git a/drivers/staging/rtl8723bs/os_dep/sdio_intf.c b/drivers/staging/rtl8723bs/os_dep/sdio_intf.c index 6d02904de63f..7c03b69b8ed3 100644 --- a/drivers/staging/rtl8723bs/os_dep/sdio_intf.c +++ b/drivers/staging/rtl8723bs/os_dep/sdio_intf.c @@ -22,7 +22,7 @@ static const struct sdio_device_id sdio_ids[] = { SDIO_DEVICE(0x024c, 0xb723), }, { /* end: all zeroes */ }, }; -static const struct acpi_device_id acpi_ids[] = { +static const struct acpi_device_id acpi_ids[] __used = { {"OBDA8723", 0x0000}, {} }; diff --git a/drivers/staging/rtlwifi/btcoexist/halbtcoutsrc.c b/drivers/staging/rtlwifi/btcoexist/halbtcoutsrc.c index 4d1f9bf53c53..24e19ffd4431 100644 --- a/drivers/staging/rtlwifi/btcoexist/halbtcoutsrc.c +++ b/drivers/staging/rtlwifi/btcoexist/halbtcoutsrc.c @@ -281,11 +281,9 @@ bool halbtc_send_bt_mp_operation(struct btc_coexist *btcoexist, u8 op_code, static void halbtc_leave_lps(struct btc_coexist *btcoexist) { struct rtl_priv *rtlpriv; - struct rtl_ps_ctl *ppsc; bool ap_enable = false; rtlpriv = btcoexist->adapter; - ppsc = rtl_psc(rtlpriv); btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &ap_enable); @@ -304,11 +302,9 @@ static void halbtc_leave_lps(struct btc_coexist *btcoexist) static void halbtc_enter_lps(struct btc_coexist *btcoexist) { struct rtl_priv *rtlpriv; - struct rtl_ps_ctl *ppsc; bool ap_enable = false; rtlpriv = btcoexist->adapter; - ppsc = rtl_psc(rtlpriv); btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &ap_enable); @@ -1261,13 +1257,13 @@ bool exhalbtc_initlize_variables_wifi_only(struct rtl_priv *rtlpriv) switch (rtlpriv->rtlhal.interface) { case INTF_PCI: - wifionly_cfg->chip_interface = BTC_INTF_PCI; + wifionly_cfg->chip_interface = WIFIONLY_INTF_PCI; break; case INTF_USB: - wifionly_cfg->chip_interface = BTC_INTF_USB; + wifionly_cfg->chip_interface = WIFIONLY_INTF_USB; break; default: - wifionly_cfg->chip_interface = BTC_INTF_UNKNOWN; + wifionly_cfg->chip_interface = WIFIONLY_INTF_UNKNOWN; break; } diff --git a/drivers/staging/rtlwifi/efuse.c b/drivers/staging/rtlwifi/efuse.c index 1dc71455f270..abb0f720cf21 100644 --- a/drivers/staging/rtlwifi/efuse.c +++ b/drivers/staging/rtlwifi/efuse.c @@ -245,7 +245,8 @@ void read_efuse(struct ieee80211_hw *hw, u16 _offset, u16 _size_byte, u8 *pbuf) if (!efuse_word) goto out; for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { - efuse_word[i] = kcalloc(efuse_max_section, sizeof(u16), GFP_ATOMIC); + efuse_word[i] = kcalloc(efuse_max_section, sizeof(u16), + GFP_ATOMIC); if (!efuse_word[i]) goto done; } diff --git a/drivers/staging/rtlwifi/halmac/rtl_halmac.c b/drivers/staging/rtlwifi/halmac/rtl_halmac.c index f0c6fc8c6aca..7bfc9620479a 100644 --- a/drivers/staging/rtlwifi/halmac/rtl_halmac.c +++ b/drivers/staging/rtlwifi/halmac/rtl_halmac.c @@ -209,7 +209,7 @@ static int init_halmac_event_with_waittime(struct rtl_priv *rtlpriv, if (!rtlpriv->halmac.indicator[id].comp) { comp = kzalloc(sizeof(*comp), GFP_KERNEL); if (!comp) - return -1; + return -ENOMEM; } else { RT_TRACE(rtlpriv, COMP_HALMAC, DBG_LOUD, "%s: <WARN> id(%d) sctx is not NULL!!\n", __func__, @@ -359,7 +359,7 @@ static int init_priv(struct rtl_halmac *halmac) size = sizeof(*indicator) * count; indicator = kzalloc(size, GFP_KERNEL); if (!indicator) - return -1; + return -ENOMEM; halmac->indicator = indicator; return 0; diff --git a/drivers/staging/rtlwifi/phydm/phydm_adc_sampling.c b/drivers/staging/rtlwifi/phydm/phydm_adc_sampling.c index 42020101380a..d6cea73fa185 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_adc_sampling.c +++ b/drivers/staging/rtlwifi/phydm/phydm_adc_sampling.c @@ -555,7 +555,7 @@ void phydm_lamode_trigger_setting(void *dm_void, char input[][16], u32 *_used, output + used, out_len - used, "{En} {0:BB,1:BB_MAC,2:RF0,3:RF1,4:MAC}\n {BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA type} {TrigTime}\n {polling_time/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n"); /**/ - } else if ((is_enable_la_mode == 1)) { + } else if (is_enable_la_mode == 1) { PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]); trig_mode = (u8)var1[1]; diff --git a/drivers/staging/rtlwifi/phydm/phydm_dig.c b/drivers/staging/rtlwifi/phydm/phydm_dig.c index 3115e7bdc749..f10776fbe2d9 100644 --- a/drivers/staging/rtlwifi/phydm/phydm_dig.c +++ b/drivers/staging/rtlwifi/phydm/phydm_dig.c @@ -813,7 +813,7 @@ void odm_DIG(void *dm_void) dig_tab->rx_gain_range_min = 0x1c; ODM_RT_TRACE( dm, ODM_COMP_DIG, - "DIG: Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x\n", + "DIG: Abnormal #beacon (%d) case in STA mode: Force lower bound to 0x%x\n", dm->phy_dbg_info.num_qry_beacon_pkt, dig_tab->rx_gain_range_min); } @@ -824,7 +824,7 @@ void odm_DIG(void *dm_void) dig_tab->rx_gain_range_min = dig_tab->rx_gain_range_max; ODM_RT_TRACE( dm, ODM_COMP_DIG, - "DIG: Abnrormal lower bound case: Force lower bound to 0x%x\n", + "DIG: Abnormal lower bound case: Force lower bound to 0x%x\n", dig_tab->rx_gain_range_min); } diff --git a/drivers/staging/rtlwifi/regd.c b/drivers/staging/rtlwifi/regd.c index 3afd206ce4b1..5213ca771175 100644 --- a/drivers/staging/rtlwifi/regd.c +++ b/drivers/staging/rtlwifi/regd.c @@ -410,7 +410,7 @@ int rtl_regd_init(struct ieee80211_hw *hw, struct wiphy *wiphy = hw->wiphy; struct country_code_to_enum_rd *country = NULL; - if (!wiphy || !&rtlpriv->regd) + if (!wiphy) return -EINVAL; /* init country_code from efuse channel plan */ diff --git a/drivers/staging/rtlwifi/wifi.h b/drivers/staging/rtlwifi/wifi.h index a45f0eb69d3f..9cb6c7906213 100644 --- a/drivers/staging/rtlwifi/wifi.h +++ b/drivers/staging/rtlwifi/wifi.h @@ -1840,10 +1840,6 @@ struct rtl_efuse { u8 efuse_map[2][EFUSE_MAX_LOGICAL_SIZE]; u16 efuse_usedbytes; u8 efuse_usedpercentage; -#ifdef EFUSE_REPG_WORKAROUND - bool efuse_re_pg_sec1flag; - u8 efuse_re_pg_data[8]; -#endif u8 autoload_failflag; u8 autoload_status; diff --git a/drivers/staging/rts5208/ms.c b/drivers/staging/rts5208/ms.c index 3a71dbb6d24a..f53adf15c685 100644 --- a/drivers/staging/rts5208/ms.c +++ b/drivers/staging/rts5208/ms.c @@ -111,9 +111,8 @@ static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, u8 val, err_code = 0; enum dma_data_direction dir; - if (!buf || !buf_len) { + if (!buf || !buf_len) return STATUS_FAIL; - } if (trans_mode == MS_TM_AUTO_READ) { dir = DMA_FROM_DEVICE; @@ -162,12 +161,11 @@ static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode, } retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); - if (retval) { + if (retval) return retval; - } - if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) { + + if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -178,9 +176,8 @@ static int ms_write_bytes(struct rtsx_chip *chip, struct ms_info *ms_card = &chip->ms_card; int retval, i; - if (!data || (data_len < cnt)) { + if (!data || (data_len < cnt)) return STATUS_ERROR; - } rtsx_init_cmd(chip); @@ -244,9 +241,8 @@ static int ms_read_bytes(struct rtsx_chip *chip, int retval, i; u8 *ptr; - if (!data) { + if (!data) return STATUS_ERROR; - } rtsx_init_cmd(chip); @@ -371,14 +367,12 @@ static int ms_set_init_para(struct rtsx_chip *chip) } retval = switch_clock(chip, ms_card->ms_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = select_card(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -389,14 +383,12 @@ static int ms_switch_clock(struct rtsx_chip *chip) int retval; retval = select_card(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = switch_clock(chip, ms_card->ms_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -409,60 +401,59 @@ static int ms_pull_ctl_disable(struct rtsx_chip *chip) retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF, MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF, MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD); - if (retval) { + if (retval) return retval; - } + } else if (CHECK_PID(chip, 0x5288)) { if (CHECK_BARO_PKG(chip, QFN)) { retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF, 0x55); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, 0x55); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, 0x4B); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, 0x69); - if (retval) { + if (retval) return retval; - } } } @@ -502,9 +493,8 @@ static int ms_pull_ctl_enable(struct rtsx_chip *chip) } retval = rtsx_send_cmd(chip, MS_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -523,36 +513,31 @@ static int ms_prepare_reset(struct rtsx_chip *chip) ms_card->pro_under_formatting = 0; retval = ms_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (!chip->ft2_fast_mode) wait_timeout(250); retval = enable_card_clock(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (chip->asic_code) { retval = ms_pull_ctl_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register(chip, FPGA_PULL_CTL, FPGA_MS_PULL_CTL_BIT | 0x20, 0); - if (retval) { + if (retval) return retval; - } } if (!chip->ft2_fast_mode) { retval = card_power_on(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } wait_timeout(150); @@ -572,9 +557,8 @@ static int ms_prepare_reset(struct rtsx_chip *chip) retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, MS_OUTPUT_EN); - if (retval) { + if (retval) return retval; - } if (chip->asic_code) { retval = rtsx_write_register(chip, MS_CFG, 0xFF, @@ -582,34 +566,31 @@ static int ms_prepare_reset(struct rtsx_chip *chip) PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1); - if (retval) { + if (retval) return retval; - } + } else { retval = rtsx_write_register(chip, MS_CFG, 0xFF, SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1); - if (retval) { + if (retval) return retval; - } } retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF, NO_WAIT_INT | NO_AUTO_READ_INT_REG); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR); - if (retval) { + if (retval) return retval; - } retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -621,9 +602,8 @@ static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) u8 val; retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG, @@ -631,14 +611,13 @@ static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val); - if (retval) { + if (retval) return retval; - } + dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val); if (val != 0x01) { if (val != 0x02) @@ -648,9 +627,9 @@ static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) } retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val); - if (retval) { + if (retval) return retval; - } + dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val); if (val != 0) { ms_card->check_ms_flow = 1; @@ -658,15 +637,15 @@ static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) } retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val); - if (retval) { + if (retval) return retval; - } + dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val); if (val == 0) { retval = rtsx_read_register(chip, PPBUF_BASE2, &val); - if (retval) { + if (retval) return retval; - } + if (val & WRT_PRTCT) chip->card_wp |= MS_CARD; else @@ -682,9 +661,9 @@ static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus) ms_card->ms_type |= TYPE_MSPRO; retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val); - if (retval) { + if (retval) return retval; - } + dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val); if (val == 0) { ms_card->ms_type &= 0x0F; @@ -720,13 +699,11 @@ static int ms_confirm_cpu_startup(struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } - if (k > 100) { + if (k > 100) return STATUS_FAIL; - } k++; wait_timeout(100); @@ -737,16 +714,14 @@ static int ms_confirm_cpu_startup(struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } if (val & INT_REG_ERR) { - if (val & INT_REG_CMDNK) { + if (val & INT_REG_CMDNK) chip->card_wp |= (MS_CARD); - } else { + else return STATUS_FAIL; - } } /* -- end confirm CPU startup */ @@ -766,9 +741,8 @@ static int ms_switch_parallel_bus(struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -787,27 +761,24 @@ static int ms_switch_8bit_bus(struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, MS_CFG, 0x98, MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING); - if (retval) { + if (retval) return retval; - } + ms_card->ms_type |= MS_8BIT; retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -820,19 +791,16 @@ static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus) for (i = 0; i < 3; i++) { retval = ms_prepare_reset(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_identify_media_type(chip, switch_8bit_bus); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_confirm_cpu_startup(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_switch_parallel_bus(chip); if (retval != STATUS_SUCCESS) { @@ -846,25 +814,22 @@ static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus) } } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } /* Switch MS-PRO into Parallel mode */ retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD); - if (retval) { + if (retval) return retval; - } retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } /* If MSPro HG Card, We shall try to switch to 8-bit bus */ if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) { @@ -887,9 +852,8 @@ static int msxc_change_power(struct rtsx_chip *chip, u8 mode) ms_cleanup_work(chip); retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } buf[0] = 0; buf[1] = mode; @@ -899,22 +863,19 @@ static int msxc_change_power(struct rtsx_chip *chip, u8 mode) buf[5] = 0; retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_read_register(chip, MS_TRANS_CFG, buf); - if (retval) { + if (retval) return retval; - } - if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) { + + if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -936,9 +897,8 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) #endif retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHK_MS8BIT(ms_card)) data[0] = PARALLEL_8BIT_IF; @@ -960,14 +920,12 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } buf = kmalloc(64 * 512, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_ERROR; - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT); @@ -1150,18 +1108,15 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) #ifdef SUPPORT_MSXC if (CHK_MSXC(ms_card)) { - if (class_code != 0x03) { + if (class_code != 0x03) return STATUS_FAIL; - } } else { - if (class_code != 0x02) { + if (class_code != 0x02) return STATUS_FAIL; - } } #else - if (class_code != 0x02) { + if (class_code != 0x02) return STATUS_FAIL; - } #endif if (device_type != 0x00) { @@ -1173,9 +1128,8 @@ static int ms_read_attribute_info(struct rtsx_chip *chip) } } - if (sub_class & 0xC0) { + if (sub_class & 0xC0) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n", class_code, device_type, sub_class); @@ -1223,18 +1177,16 @@ retry: if (retval != STATUS_SUCCESS) { if (ms_card->switch_8bit_fail) { retval = ms_pro_reset_flow(chip, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { return STATUS_FAIL; } } retval = ms_read_attribute_info(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } #ifdef XC_POWERCLASS if (CHK_HG8BIT(ms_card)) @@ -1274,9 +1226,8 @@ retry: #ifdef SUPPORT_MAGIC_GATE retval = mg_set_tpc_para_sub(chip, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } #endif if (CHK_HG8BIT(ms_card)) @@ -1293,14 +1244,12 @@ static int ms_read_status_reg(struct rtsx_chip *chip) u8 val[2]; retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) { ms_set_err_code(chip, MS_FLASH_READ_ERROR); @@ -1319,9 +1268,8 @@ static int ms_read_extra_data(struct rtsx_chip *chip, retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHK_MS4BIT(ms_card)) { /* Parallel interface */ @@ -1342,9 +1290,8 @@ static int ms_read_extra_data(struct rtsx_chip *chip, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); @@ -1353,15 +1300,13 @@ static int ms_read_extra_data(struct rtsx_chip *chip, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1370,24 +1315,21 @@ static int ms_read_extra_data(struct rtsx_chip *chip, if (val & INT_REG_CED) { if (val & INT_REG_ERR) { retval = ms_read_status_reg(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } } retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT, data, MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (buf && buf_len) { if (buf_len > MS_EXTRA_SIZE) @@ -1405,15 +1347,13 @@ static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr, int retval, i; u8 val, data[16]; - if (!buf || (buf_len < MS_EXTRA_SIZE)) { + if (!buf || (buf_len < MS_EXTRA_SIZE)) return STATUS_FAIL; - } retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6 + MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHK_MS4BIT(ms_card)) data[0] = 0x88; @@ -1431,20 +1371,17 @@ static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr, retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), NO_WAIT_INT, data, 16); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1468,9 +1405,8 @@ static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHK_MS4BIT(ms_card)) data[0] = 0x88; @@ -1484,20 +1420,17 @@ static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) data[5] = page_num; retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1524,13 +1457,11 @@ static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num) retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } - if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) { + if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1542,15 +1473,13 @@ static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk) u8 val, data[8], extra[MS_EXTRA_SIZE]; retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); @@ -1568,20 +1497,17 @@ static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk) data[7] = 0xFF; retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1606,9 +1532,8 @@ static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk) retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); @@ -1624,21 +1549,18 @@ static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk) data[5] = 0; retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ERASE_RTY: retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { if (i < 3) { @@ -1701,9 +1623,8 @@ static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk, retval = ms_write_extra_data(chip, phy_blk, i, extra, MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -1723,30 +1644,25 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, start_page, end_page); retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_read_status_reg(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_read_register(chip, PPBUF_BASE2, &val); - if (retval) { + if (retval) return retval; - } if (val & BUF_FULL) { retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (!(val & INT_REG_CED)) { ms_set_err_code(chip, MS_FLASH_WRITE_ERROR); @@ -1764,9 +1680,8 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); @@ -1783,20 +1698,17 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1817,9 +1729,8 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, MS_TM_NORMAL_READ, READ_PAGE_DATA, 0, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (uncorrect_flag) { ms_set_page_status(log_blk, setPS_NG, @@ -1854,9 +1765,8 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, if (retval == STATUS_SUCCESS) break; } - if (rty_cnt == MS_MAX_RETRY_COUNT) { + if (rty_cnt == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } } if (!(val & INT_REG_BREQ)) { @@ -1895,20 +1805,17 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE), NO_WAIT_INT, data, 16); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1926,9 +1833,8 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); @@ -1947,21 +1853,18 @@ static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -1992,26 +1895,23 @@ static int reset_ms(struct rtsx_chip *chip) #endif retval = ms_prepare_reset(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_card->ms_type |= TYPE_MS; retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_read_status_reg(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_read_register(chip, PPBUF_BASE2, &val); - if (retval) { + if (retval) return retval; - } + if (val & WRT_PRTCT) chip->card_wp |= MS_CARD; else @@ -2059,9 +1959,8 @@ RE_SEARCH: } retval = ms_read_page(chip, ms_card->boot_block, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } /* Read MS system information as sys_info */ rtsx_init_cmd(chip); @@ -2070,9 +1969,8 @@ RE_SEARCH: rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0); retval = rtsx_send_cmd(chip, MS_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } ptr = rtsx_get_cmd_data(chip); memcpy(ms_card->raw_sys_info, ptr, 96); @@ -2094,9 +1992,8 @@ RE_SEARCH: rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0); retval = rtsx_send_cmd(chip, MS_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } ptr = rtsx_get_cmd_data(chip); @@ -2169,33 +2066,29 @@ RE_SEARCH: /* Switch I/F Mode */ if (ptr[15]) { retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88); - if (retval) { + if (retval) return retval; - } + retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0); - if (retval) { + if (retval) return retval; - } retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT, MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT); - if (retval) { + if (retval) return retval; - } ms_card->ms_type |= MS_4BIT; } @@ -2221,28 +2114,24 @@ static int ms_init_l2p_tbl(struct rtsx_chip *chip) size = ms_card->segment_cnt * sizeof(struct zone_entry); ms_card->segment = vzalloc(size); - if (!ms_card->segment) { + if (!ms_card->segment) return STATUS_FAIL; - } retval = ms_read_page(chip, ms_card->boot_block, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto INIT_FAIL; - } reg_addr = PPBUF_BASE2; for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) { int block_no; retval = rtsx_read_register(chip, reg_addr++, &val1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto INIT_FAIL; - } retval = rtsx_read_register(chip, reg_addr++, &val2); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto INIT_FAIL; - } defect_block = ((u16)val1 << 8) | val2; if (defect_block == 0xFFFF) @@ -2403,9 +2292,8 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) if (!ms_card->segment) { retval = ms_init_l2p_tbl(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return retval; - } } if (ms_card->segment[seg_no].build_flag) { @@ -2423,17 +2311,15 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) if (!segment->l2p_table) { segment->l2p_table = vmalloc(array_size(table_size, 2)); - if (!segment->l2p_table) { + if (!segment->l2p_table) goto BUILD_FAIL; - } } memset((u8 *)(segment->l2p_table), 0xff, table_size * 2); if (!segment->free_table) { segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2); - if (!segment->free_table) { + if (!segment->free_table) goto BUILD_FAIL; - } } memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2); @@ -2558,9 +2444,8 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) return STATUS_SUCCESS; } retval = ms_init_page(chip, phy_blk, log_blk, 0, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto BUILD_FAIL; - } segment->l2p_table[idx] = phy_blk; if (seg_no == ms_card->segment_cnt - 1) { @@ -2591,16 +2476,14 @@ static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no) retval = ms_copy_page(chip, tmp_blk, phy_blk, log_blk, 0, ms_card->page_off + 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } segment->l2p_table[log_blk] = phy_blk; retval = ms_set_bad_block(chip, tmp_blk); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } } } @@ -2626,14 +2509,12 @@ int reset_ms_card(struct rtsx_chip *chip) memset(ms_card, 0, sizeof(struct ms_info)); retval = enable_card_clock(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = select_card(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_card->ms_type = 0; @@ -2641,27 +2522,24 @@ int reset_ms_card(struct rtsx_chip *chip) if (retval != STATUS_SUCCESS) { if (ms_card->check_ms_flow) { retval = reset_ms(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { return STATUS_FAIL; } } retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (!CHK_MSPRO(ms_card)) { /* Build table for the last segment, * to check if L2P table block exists, erasing it */ retval = ms_build_l2p_tbl(chip, seg_no); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type); @@ -2690,9 +2568,8 @@ static int mspro_set_rw_cmd(struct rtsx_chip *chip, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -2731,9 +2608,8 @@ static inline int ms_auto_tune_clock(struct rtsx_chip *chip) } retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -2782,9 +2658,8 @@ static int mspro_rw_multi_sector(struct scsi_cmnd *srb, } retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (srb->sc_data_direction == DMA_FROM_DEVICE) trans_mode = MS_TM_AUTO_READ; @@ -2792,9 +2667,8 @@ static int mspro_rw_multi_sector(struct scsi_cmnd *srb, trans_mode = MS_TM_AUTO_WRITE; retval = rtsx_read_register(chip, MS_TRANS_CFG, &val); - if (retval) { + if (retval) return retval; - } if (ms_card->seq_mode) { if ((ms_card->pre_dir != srb->sc_data_direction) || @@ -2808,9 +2682,8 @@ static int mspro_rw_multi_sector(struct scsi_cmnd *srb, ms_card->total_sec_cnt = 0; if (val & MS_INT_BREQ) { retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH); @@ -3019,14 +2892,12 @@ int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, u16 para; retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } memset(buf, 0, 2); switch (short_data_len) { @@ -3051,9 +2922,8 @@ int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } if (quick_format) para = 0x0000; @@ -3061,18 +2931,15 @@ int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip, para = 0x0001; retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp); - if (retval) { + if (retval) return retval; - } - if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) { + if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) return STATUS_FAIL; - } if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) { ms_card->pro_under_formatting = 1; @@ -3113,9 +2980,8 @@ static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHK_MS4BIT(ms_card)) data[0] = 0x88; @@ -3134,16 +3000,14 @@ static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ptr = buf; @@ -3156,9 +3020,8 @@ static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (val & INT_REG_CMDNK) { ms_set_err_code(chip, MS_CMD_NK); @@ -3197,16 +3060,14 @@ static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk, if (page_addr == (end_page - 1)) { if (!(val & INT_REG_CED)) { retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (!(val & INT_REG_CED)) { ms_set_err_code(chip, MS_FLASH_READ_ERROR); @@ -3280,9 +3141,8 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, if (!start_page) { retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, 7); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHK_MS4BIT(ms_card)) data[0] = 0x88; @@ -3299,28 +3159,24 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1, NO_WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE)); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ms_set_err_code(chip, MS_NO_ERROR); @@ -3352,23 +3208,20 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } for (i = 0; i < MS_MAX_RETRY_COUNT; i++) { retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT); if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } ptr = buf; for (page_addr = start_page; page_addr < end_page; page_addr++) { @@ -3421,16 +3274,14 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, ms_set_err_code(chip, MS_TO_ERROR); rtsx_clear_ms_error(chip); - if (retval == -ETIMEDOUT) { + if (retval == -ETIMEDOUT) return STATUS_TIMEDOUT; - } return STATUS_FAIL; } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if ((end_page - start_page) == 1) { if (!(val & INT_REG_CED)) { @@ -3442,16 +3293,14 @@ static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk, if (!(val & INT_REG_CED)) { retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } if ((page_addr == (end_page - 1)) || @@ -3479,9 +3328,8 @@ static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, retval = ms_copy_page(chip, old_blk, new_blk, log_blk, page_off, ms_card->page_off + 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } seg_no = old_blk >> 9; @@ -3507,9 +3355,8 @@ static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk, if (start_page) { retval = ms_copy_page(chip, old_blk, new_blk, log_blk, 0, start_page); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -3524,9 +3371,8 @@ int ms_delay_write(struct rtsx_chip *chip) if (delay_write->delay_write_flag) { retval = ms_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } delay_write->delay_write_flag = 0; retval = ms_finish_write(chip, @@ -3534,9 +3380,8 @@ int ms_delay_write(struct rtsx_chip *chip) delay_write->new_phyblock, delay_write->logblock, delay_write->pageoff); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -3850,14 +3695,12 @@ static int ms_poll_int(struct rtsx_chip *chip) rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED); retval = rtsx_send_cmd(chip, MS_CARD, 5000); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } val = *rtsx_get_cmd_data(chip); - if (val & MS_INT_ERR) { + if (val & MS_INT_ERR) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -3920,9 +3763,8 @@ static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num) if (retval == STATUS_SUCCESS) break; } - if (i == MS_MAX_RETRY_COUNT) { + if (i == MS_MAX_RETRY_COUNT) return STATUS_FAIL; - } if (check_ms_err(chip)) { rtsx_clear_ms_error(chip); @@ -3943,9 +3785,8 @@ static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, else retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } buf[0] = 0; buf[1] = 0; @@ -3957,9 +3798,8 @@ static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type, } retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6, NO_WAIT_INT, buf, 6); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -3979,9 +3819,8 @@ int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = mg_send_ex_cmd(chip, MG_SET_LID, 0); if (retval != STATUS_SUCCESS) { @@ -4019,14 +3858,12 @@ int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } buf = kmalloc(1540, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_ERROR; - } buf[0] = 0x04; buf[1] = 0x1A; @@ -4073,9 +3910,8 @@ int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = mg_send_ex_cmd(chip, MG_GET_ID, 0); if (retval != STATUS_SUCCESS) { @@ -4148,9 +3984,8 @@ int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0); if (retval != STATUS_SUCCESS) { @@ -4204,9 +4039,8 @@ int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0); if (retval != STATUS_SUCCESS) { @@ -4251,14 +4085,12 @@ int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } buf = kmalloc(1028, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_ERROR; - } buf[0] = 0x04; buf[1] = 0x02; @@ -4307,14 +4139,12 @@ int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip) ms_cleanup_work(chip); retval = ms_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } buf = kmalloc(1028, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_ERROR; - } bufflen = min_t(int, 1028, scsi_bufflen(srb)); rtsx_stor_get_xfer_buf(buf, bufflen, srb); @@ -4433,32 +4263,28 @@ int ms_power_off_card3v3(struct rtsx_chip *chip) int retval; retval = disable_card_clock(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (chip->asic_code) { retval = ms_pull_ctl_disable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register(chip, FPGA_PULL_CTL, FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT); - if (retval) { + if (retval) return retval; - } } retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0); - if (retval) { + if (retval) return retval; - } + if (!chip->ft2_fast_mode) { retval = card_power_off(chip, MS_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -4486,9 +4312,8 @@ int release_ms_card(struct rtsx_chip *chip) #endif retval = ms_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } diff --git a/drivers/staging/rts5208/rtsx_card.c b/drivers/staging/rts5208/rtsx_card.c index d26a8e372fce..6dc541e06fb9 100644 --- a/drivers/staging/rts5208/rtsx_card.c +++ b/drivers/staging/rts5208/rtsx_card.c @@ -647,9 +647,8 @@ int switch_ssc_clock(struct rtsx_chip *chip, int clk) dev_dbg(rtsx_dev(chip), "Switch SSC clock to %dMHz (cur_clk = %d)\n", clk, chip->cur_clk); - if ((clk <= 2) || (n > max_n)) { + if ((clk <= 2) || (n > max_n)) return STATUS_FAIL; - } mcu_cnt = (u8)(125 / clk + 3); if (mcu_cnt > 7) @@ -688,15 +687,13 @@ int switch_ssc_clock(struct rtsx_chip *chip, int clk) } retval = rtsx_send_cmd(chip, 0, WAIT_TIME); - if (retval < 0) { + if (retval < 0) return STATUS_ERROR; - } udelay(10); retval = rtsx_write_register(chip, CLK_CTL, CLK_LOW_FREQ, 0); - if (retval) { + if (retval) return retval; - } chip->cur_clk = clk; @@ -790,49 +787,41 @@ int switch_normal_clock(struct rtsx_chip *chip, int clk) } retval = rtsx_write_register(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ); - if (retval) { + if (retval) return retval; - } if (sd_vpclk_phase_reset) { retval = rtsx_write_register(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, 0); - if (retval) { + if (retval) return retval; - } } retval = rtsx_write_register(chip, CLK_DIV, 0xFF, (div << 4) | mcu_cnt); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CLK_SEL, 0xFF, sel); - if (retval) { + if (retval) return retval; - } if (sd_vpclk_phase_reset) { udelay(200); retval = rtsx_write_register(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SD_VPCLK1_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET); - if (retval) { + if (retval) return retval; - } udelay(200); } retval = rtsx_write_register(chip, CLK_CTL, 0xFF, 0); - if (retval) { + if (retval) return retval; - } chip->cur_clk = clk; @@ -878,9 +867,8 @@ int enable_card_clock(struct rtsx_chip *chip, u8 card) clk_en |= MS_CLK_EN; retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, clk_en); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -898,9 +886,8 @@ int disable_card_clock(struct rtsx_chip *chip, u8 card) clk_en |= MS_CLK_EN; retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, 0); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -924,9 +911,8 @@ int card_power_on(struct rtsx_chip *chip, u8 card) rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1); retval = rtsx_send_cmd(chip, 0, 100); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } udelay(chip->pmos_pwr_on_interval); @@ -934,9 +920,8 @@ int card_power_on(struct rtsx_chip *chip, u8 card) rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2); retval = rtsx_send_cmd(chip, 0, 100); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -955,9 +940,8 @@ int card_power_off(struct rtsx_chip *chip, u8 card) } retval = rtsx_write_register(chip, CARD_PWR_CTL, mask, val); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -969,9 +953,8 @@ int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, unsigned int lun = SCSI_LUN(srb); int i; - if (!chip->rw_card[lun]) { + if (!chip->rw_card[lun]) return STATUS_FAIL; - } for (i = 0; i < 3; i++) { chip->rw_need_retry = 0; @@ -1009,36 +992,33 @@ int card_share_mode(struct rtsx_chip *chip, int card) if (CHECK_PID(chip, 0x5208)) { mask = CARD_SHARE_MASK; - if (card == SD_CARD) { + if (card == SD_CARD) value = CARD_SHARE_48_SD; - } else if (card == MS_CARD) { + else if (card == MS_CARD) value = CARD_SHARE_48_MS; - } else if (card == XD_CARD) { + else if (card == XD_CARD) value = CARD_SHARE_48_XD; - } else { + else return STATUS_FAIL; - } } else if (CHECK_PID(chip, 0x5288)) { mask = 0x03; - if (card == SD_CARD) { + if (card == SD_CARD) value = CARD_SHARE_BAROSSA_SD; - } else if (card == MS_CARD) { + else if (card == MS_CARD) value = CARD_SHARE_BAROSSA_MS; - } else if (card == XD_CARD) { + else if (card == XD_CARD) value = CARD_SHARE_BAROSSA_XD; - } else { + else return STATUS_FAIL; - } } else { return STATUS_FAIL; } retval = rtsx_write_register(chip, CARD_SHARE_MODE, mask, value); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -1050,28 +1030,25 @@ int select_card(struct rtsx_chip *chip, int card) if (chip->cur_card != card) { u8 mod; - if (card == SD_CARD) { + if (card == SD_CARD) mod = SD_MOD_SEL; - } else if (card == MS_CARD) { + else if (card == MS_CARD) mod = MS_MOD_SEL; - } else if (card == XD_CARD) { + else if (card == XD_CARD) mod = XD_MOD_SEL; - } else if (card == SPI_CARD) { + else if (card == SPI_CARD) mod = SPI_MOD_SEL; - } else { + else return STATUS_FAIL; - } retval = rtsx_write_register(chip, CARD_SELECT, 0x07, mod); - if (retval) { + if (retval) return retval; - } chip->cur_card = card; retval = card_share_mode(chip, card); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -1120,9 +1097,8 @@ int detect_card_cd(struct rtsx_chip *chip, int card) } status = rtsx_readl(chip, RTSX_BIPR); - if (!(status & card_cd)) { + if (!(status & card_cd)) return STATUS_FAIL; - } return STATUS_SUCCESS; } diff --git a/drivers/staging/rts5208/rtsx_card.h b/drivers/staging/rts5208/rtsx_card.h index ac165d8a081c..820b1113ea89 100644 --- a/drivers/staging/rts5208/rtsx_card.h +++ b/drivers/staging/rts5208/rtsx_card.h @@ -1062,9 +1062,8 @@ static inline int card_power_off_all(struct rtsx_chip *chip) int retval; retval = rtsx_write_register(chip, CARD_PWR_CTL, 0x0F, 0x0F); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } diff --git a/drivers/staging/rts5208/rtsx_chip.c b/drivers/staging/rts5208/rtsx_chip.c index 6b1234bff09c..94fb35429bf1 100644 --- a/drivers/staging/rts5208/rtsx_chip.c +++ b/drivers/staging/rts5208/rtsx_chip.c @@ -116,34 +116,29 @@ static int rtsx_pre_handle_sdio_old(struct rtsx_chip *chip) 0xFF, MS_INS_PU | SD_WP_PU | SD_CD_PU | SD_CMD_PU); - if (retval) { + if (retval) return retval; - } } else { retval = rtsx_write_register(chip, FPGA_PULL_CTL, 0xFF, FPGA_SD_PULL_CTL_EN); - if (retval) { + if (retval) return retval; - } } retval = rtsx_write_register(chip, CARD_SHARE_MODE, 0xFF, CARD_SHARE_48_SD); - if (retval) { + if (retval) return retval; - } /* Enable SDIO internal clock */ retval = rtsx_write_register(chip, 0xFF2C, 0x01, 0x01); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SDIO_CTRL, 0xFF, SDIO_BUS_CTRL | SDIO_CD_CTRL); - if (retval) { + if (retval) return retval; - } chip->sd_int = 1; chip->sd_io = 1; @@ -164,16 +159,14 @@ static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip) if (chip->driver_first_load) { if (CHECK_PID(chip, 0x5288)) { retval = rtsx_read_register(chip, 0xFE5A, &tmp); - if (retval) { + if (retval) return retval; - } if (tmp & 0x08) sw_bypass_sd = true; } else if (CHECK_PID(chip, 0x5208)) { retval = rtsx_read_register(chip, 0xFE70, &tmp); - if (retval) { + if (retval) return retval; - } if (tmp & 0x80) sw_bypass_sd = true; } @@ -192,9 +185,8 @@ static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip) u8 cd_toggle_mask = 0; retval = rtsx_read_register(chip, TLPTISTAT, &tmp); - if (retval) { + if (retval) return retval; - } cd_toggle_mask = 0x08; if (tmp & cd_toggle_mask) { @@ -202,22 +194,19 @@ static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip) if (CHECK_PID(chip, 0x5288)) { retval = rtsx_write_register(chip, 0xFE5A, 0x08, 0x00); - if (retval) { + if (retval) return retval; - } } else if (CHECK_PID(chip, 0x5208)) { retval = rtsx_write_register(chip, 0xFE70, 0x80, 0x00); - if (retval) { + if (retval) return retval; - } } retval = rtsx_write_register(chip, TLPTISTAT, 0xFF, tmp); - if (retval) { + if (retval) return retval; - } chip->need_reset |= SD_CARD; } else { @@ -225,36 +214,31 @@ static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip) if (chip->asic_code) { retval = sd_pull_ctl_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register (chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, 0); - if (retval) { + if (retval) return retval; - } } retval = card_share_mode(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } /* Enable sdio_bus_auto_switch */ if (CHECK_PID(chip, 0x5288)) { retval = rtsx_write_register(chip, 0xFE5A, 0x08, 0x08); - if (retval) { + if (retval) return retval; - } } else if (CHECK_PID(chip, 0x5208)) { retval = rtsx_write_register(chip, 0xFE70, 0x80, 0x80); - if (retval) { + if (retval) return retval; - } } chip->chip_insert_with_sdio = 1; @@ -262,9 +246,8 @@ static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip) } } else { retval = rtsx_write_register(chip, TLPTISTAT, 0x08, 0x08); - if (retval) { + if (retval) return retval; - } chip->need_reset |= SD_CARD; } @@ -283,32 +266,28 @@ static int rtsx_reset_aspm(struct rtsx_chip *chip) ret = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF, chip->aspm_l0s_l1_en); - if (ret != STATUS_SUCCESS) { + if (ret != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } if (CHECK_PID(chip, 0x5208)) { ret = rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFF, 0x3F); - if (ret) { + if (ret) return ret; - } } ret = rtsx_write_config_byte(chip, LCTLR, chip->aspm_l0s_l1_en); - if (ret != STATUS_SUCCESS) { + if (ret != STATUS_SUCCESS) return STATUS_FAIL; - } chip->aspm_level[0] = chip->aspm_l0s_l1_en; if (CHK_SDIO_EXIST(chip)) { chip->aspm_level[1] = chip->aspm_l0s_l1_en; ret = rtsx_write_cfg_dw(chip, CHECK_PID(chip, 0x5288) ? 2 : 1, 0xC0, 0xFF, chip->aspm_l0s_l1_en); - if (ret != STATUS_SUCCESS) { + if (ret != STATUS_SUCCESS) return STATUS_FAIL; - } } chip->aspm_enabled = 1; @@ -327,9 +306,8 @@ static int rtsx_enable_pcie_intr(struct rtsx_chip *chip) if (chip->phy_debug_mode) { ret = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0); - if (ret) { + if (ret) return ret; - } rtsx_disable_bus_int(chip); } else { rtsx_enable_bus_int(chip); @@ -339,27 +317,23 @@ static int rtsx_enable_pcie_intr(struct rtsx_chip *chip) u16 reg; ret = rtsx_read_phy_register(chip, 0x00, ®); - if (ret != STATUS_SUCCESS) { + if (ret != STATUS_SUCCESS) return STATUS_FAIL; - } reg &= 0xFE7F; reg |= 0x80; ret = rtsx_write_phy_register(chip, 0x00, reg); - if (ret != STATUS_SUCCESS) { + if (ret != STATUS_SUCCESS) return STATUS_FAIL; - } ret = rtsx_read_phy_register(chip, 0x1C, ®); - if (ret != STATUS_SUCCESS) { + if (ret != STATUS_SUCCESS) return STATUS_FAIL; - } reg &= 0xFFF7; ret = rtsx_write_phy_register(chip, 0x1C, reg); - if (ret != STATUS_SUCCESS) { + if (ret != STATUS_SUCCESS) return STATUS_FAIL; - } } if (chip->driver_first_load && (chip->ic_version < IC_VER_C)) @@ -377,100 +351,85 @@ int rtsx_reset_chip(struct rtsx_chip *chip) rtsx_disable_aspm(chip); retval = rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 0x00); - if (retval) { + if (retval) return retval; - } /* Disable card clock */ retval = rtsx_write_register(chip, CARD_CLK_EN, 0x1E, 0); - if (retval) { + if (retval) return retval; - } #ifdef SUPPORT_OCP /* SSC power on, OCD power on */ if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) { retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN, 0); - if (retval) { + if (retval) return retval; - } } else { retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN, MS_OC_POWER_DOWN); - if (retval) { + if (retval) return retval; - } } retval = rtsx_write_register(chip, OCPPARA1, OCP_TIME_MASK, OCP_TIME_800); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, OCPPARA2, OCP_THD_MASK, OCP_THD_244_946); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, OCPCTL, 0xFF, CARD_OC_INT_EN | CARD_DETECT_EN); - if (retval) { + if (retval) return retval; - } #else /* OC power down */ retval = rtsx_write_register(chip, FPDCTL, OC_POWER_DOWN, OC_POWER_DOWN); - if (retval) { + if (retval) return retval; - } #endif if (!CHECK_PID(chip, 0x5288)) { retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0xFF, 0x03); - if (retval) { + if (retval) return retval; - } } /* Turn off LED */ retval = rtsx_write_register(chip, CARD_GPIO, 0xFF, 0x03); - if (retval) { + if (retval) return retval; - } /* Reset delink mode */ retval = rtsx_write_register(chip, CHANGE_LINK_STATE, 0x0A, 0); - if (retval) { + if (retval) return retval; - } /* Card driving select */ retval = rtsx_write_register(chip, CARD_DRIVE_SEL, 0xFF, chip->card_drive_sel); - if (retval) { + if (retval) return retval; - } #ifdef LED_AUTO_BLINK retval = rtsx_write_register(chip, CARD_AUTO_BLINK, 0xFF, LED_BLINK_SPEED | BLINK_EN | LED_GPIO0); - if (retval) { + if (retval) return retval; - } #endif if (chip->asic_code) { /* Enable SSC Clock */ retval = rtsx_write_register(chip, SSC_CTL1, 0xFF, SSC_8X_EN | SSC_SEL_4M); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SSC_CTL2, 0xFF, 0x12); - if (retval) { + if (retval) return retval; - } } /* @@ -482,72 +441,61 @@ int rtsx_reset_chip(struct rtsx_chip *chip) * bit[4] u_non_sticky_rst_n_dbg rst_value = 0 */ retval = rtsx_write_register(chip, CHANGE_LINK_STATE, 0x16, 0x10); - if (retval) { + if (retval) return retval; - } /* Enable ASPM */ if (chip->aspm_l0s_l1_en) { retval = rtsx_reset_aspm(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { if (chip->asic_code && CHECK_PID(chip, 0x5208)) { retval = rtsx_write_phy_register(chip, 0x07, 0x0129); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = rtsx_write_config_byte(chip, LCTLR, chip->aspm_l0s_l1_en); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = rtsx_write_config_byte(chip, 0x81, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHK_SDIO_EXIST(chip)) { retval = rtsx_write_cfg_dw(chip, CHECK_PID(chip, 0x5288) ? 2 : 1, 0xC0, 0xFF00, 0x0100); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } if (CHECK_PID(chip, 0x5288) && !CHK_SDIO_EXIST(chip)) { retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFFFF, 0x0103); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_cfg_dw(chip, 2, 0x84, 0xFF, 0x03); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, PERST_GLITCH_WIDTH, 0xFF, 0x80); - if (retval) { + if (retval) return retval; - } retval = rtsx_enable_pcie_intr(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } chip->need_reset = 0; @@ -569,17 +517,15 @@ int rtsx_reset_chip(struct rtsx_chip *chip) #else /* HW_AUTO_SWITCH_SD_BUS */ retval = rtsx_pre_handle_sdio_old(chip); #endif /* HW_AUTO_SWITCH_SD_BUS */ - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { chip->sd_io = 0; retval = rtsx_write_register(chip, SDIO_CTRL, SDIO_BUS_CTRL | SDIO_CD_CTRL, 0); - if (retval) { + if (retval) return retval; - } } nextcard: @@ -590,78 +536,67 @@ nextcard: if (chip->int_reg & CARD_EXIST) { retval = rtsx_write_register(chip, SSC_CTL1, SSC_RSTB, SSC_RSTB); - if (retval) { + if (retval) return retval; - } } dev_dbg(rtsx_dev(chip), "In %s, chip->need_reset = 0x%x\n", __func__, (unsigned int)(chip->need_reset)); retval = rtsx_write_register(chip, RCCTL, 0x01, 0x00); - if (retval) { + if (retval) return retval; - } if (CHECK_PID(chip, 0x5208) || CHECK_PID(chip, 0x5288)) { /* Turn off main power when entering S3/S4 state */ retval = rtsx_write_register(chip, MAIN_PWR_OFF_CTL, 0x03, 0x03); - if (retval) { + if (retval) return retval; - } } if (chip->remote_wakeup_en && !chip->auto_delink_en) { retval = rtsx_write_register(chip, WAKE_SEL_CTL, 0x07, 0x07); - if (retval) { + if (retval) return retval; - } if (chip->aux_pwr_exist) { retval = rtsx_write_register(chip, PME_FORCE_CTL, 0xFF, 0x33); - if (retval) { + if (retval) return retval; - } } } else { retval = rtsx_write_register(chip, WAKE_SEL_CTL, 0x07, 0x04); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, PME_FORCE_CTL, 0xFF, 0x30); - if (retval) { + if (retval) return retval; - } } if (CHECK_PID(chip, 0x5208) && (chip->ic_version >= IC_VER_D)) { retval = rtsx_write_register(chip, PETXCFG, 0x1C, 0x14); - if (retval) { + if (retval) return retval; - } } if (chip->asic_code && CHECK_PID(chip, 0x5208)) { retval = rtsx_clr_phy_reg_bit(chip, 0x1C, 2); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } if (chip->ft2_fast_mode) { retval = rtsx_write_register(chip, CARD_PWR_CTL, 0xFF, MS_PARTIAL_POWER_ON | SD_PARTIAL_POWER_ON); - if (retval) { + if (retval) return retval; - } udelay(chip->pmos_pwr_on_interval); retval = rtsx_write_register(chip, CARD_PWR_CTL, 0xFF, MS_POWER_ON | SD_POWER_ON); - if (retval) { + if (retval) return retval; - } wait_timeout(200); } @@ -715,20 +650,17 @@ static int rts5208_init(struct rtsx_chip *chip) u8 val = 0; retval = rtsx_write_register(chip, CLK_SEL, 0x03, 0x03); - if (retval) { + if (retval) return retval; - } retval = rtsx_read_register(chip, CLK_SEL, &val); - if (retval) { + if (retval) return retval; - } chip->asic_code = val == 0 ? 1 : 0; if (chip->asic_code) { retval = rtsx_read_phy_register(chip, 0x1C, ®); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "Value of phy register 0x1C is 0x%x\n", reg); @@ -737,24 +669,21 @@ static int rts5208_init(struct rtsx_chip *chip) } else { retval = rtsx_read_register(chip, 0xFE80, &val); - if (retval) { + if (retval) return retval; - } chip->ic_version = val; chip->phy_debug_mode = 0; } retval = rtsx_read_register(chip, PDINFO, &val); - if (retval) { + if (retval) return retval; - } dev_dbg(rtsx_dev(chip), "PDINFO: 0x%x\n", val); chip->aux_pwr_exist = val & AUX_PWR_DETECTED ? 1 : 0; retval = rtsx_read_register(chip, 0xFE50, &val); - if (retval) { + if (retval) return retval; - } chip->hw_bypass_sd = val & 0x01 ? 1 : 0; rtsx_read_config_byte(chip, 0x0E, &val); @@ -765,9 +694,8 @@ static int rts5208_init(struct rtsx_chip *chip) if (chip->use_hw_setting) { retval = rtsx_read_register(chip, CHANGE_LINK_STATE, &val); - if (retval) { + if (retval) return retval; - } chip->auto_delink_en = val & 0x80 ? 1 : 0; } @@ -781,42 +709,36 @@ static int rts5288_init(struct rtsx_chip *chip) u32 lval = 0; retval = rtsx_write_register(chip, CLK_SEL, 0x03, 0x03); - if (retval) { + if (retval) return retval; - } retval = rtsx_read_register(chip, CLK_SEL, &val); - if (retval) { + if (retval) return retval; - } chip->asic_code = val == 0 ? 1 : 0; chip->ic_version = 0; chip->phy_debug_mode = 0; retval = rtsx_read_register(chip, PDINFO, &val); - if (retval) { + if (retval) return retval; - } dev_dbg(rtsx_dev(chip), "PDINFO: 0x%x\n", val); chip->aux_pwr_exist = val & AUX_PWR_DETECTED ? 1 : 0; retval = rtsx_read_register(chip, CARD_SHARE_MODE, &val); - if (retval) { + if (retval) return retval; - } dev_dbg(rtsx_dev(chip), "CARD_SHARE_MODE: 0x%x\n", val); chip->baro_pkg = val & 0x04 ? QFN : LQFP; retval = rtsx_read_register(chip, 0xFE5A, &val); - if (retval) { + if (retval) return retval; - } chip->hw_bypass_sd = val & 0x10 ? 1 : 0; retval = rtsx_read_cfg_dw(chip, 0, 0x718, &lval); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } max_func = (u8)((lval >> 29) & 0x07); dev_dbg(rtsx_dev(chip), "Max function number: %d\n", max_func); @@ -827,9 +749,8 @@ static int rts5288_init(struct rtsx_chip *chip) if (chip->use_hw_setting) { retval = rtsx_read_register(chip, CHANGE_LINK_STATE, &val); - if (retval) { + if (retval) return retval; - } chip->auto_delink_en = val & 0x80 ? 1 : 0; if (CHECK_BARO_PKG(chip, LQFP)) @@ -905,28 +826,24 @@ int rtsx_init_chip(struct rtsx_chip *chip) chip->mmc_ddr_tx_phase = 0; retval = rtsx_write_register(chip, FPDCTL, SSC_POWER_DOWN, 0); - if (retval) { + if (retval) return retval; - } wait_timeout(200); retval = rtsx_write_register(chip, CLK_DIV, 0x07, 0x07); - if (retval) { + if (retval) return retval; - } dev_dbg(rtsx_dev(chip), "chip->use_hw_setting = %d\n", chip->use_hw_setting); if (CHECK_PID(chip, 0x5208)) { retval = rts5208_init(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else if (CHECK_PID(chip, 0x5288)) { retval = rts5288_init(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } if (chip->ss_en == 2) @@ -973,9 +890,8 @@ int rtsx_init_chip(struct rtsx_chip *chip) } retval = rtsx_reset_chip(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1403,9 +1319,8 @@ int rtsx_write_register(struct rtsx_chip *chip, u16 addr, u8 mask, u8 data) for (i = 0; i < MAX_RW_REG_CNT; i++) { val = rtsx_readl(chip, RTSX_HAIMR); if ((val & BIT(31)) == 0) { - if (data != (u8)val) { + if (data != (u8)val) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1432,9 +1347,8 @@ int rtsx_read_register(struct rtsx_chip *chip, u16 addr, u8 *data) break; } - if (i >= MAX_RW_REG_CNT) { + if (i >= MAX_RW_REG_CNT) return STATUS_TIMEDOUT; - } if (data) *data = (u8)(val & 0xFF); @@ -1454,9 +1368,8 @@ int rtsx_write_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 mask, retval = rtsx_write_register(chip, CFGDATA0 + i, 0xFF, (u8)(val & mask & 0xFF)); - if (retval) { + if (retval) return retval; - } mode |= (1 << i); } mask >>= 8; @@ -1465,27 +1378,23 @@ int rtsx_write_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 mask, if (mode) { retval = rtsx_write_register(chip, CFGADDR0, 0xFF, (u8)addr); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CFGADDR1, 0xFF, (u8)(addr >> 8)); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CFGRWCTL, 0xFF, 0x80 | mode | ((func_no & 0x03) << 4)); - if (retval) { + if (retval) return retval; - } for (i = 0; i < MAX_RW_REG_CNT; i++) { retval = rtsx_read_register(chip, CFGRWCTL, &tmp); - if (retval) { + if (retval) return retval; - } if ((tmp & 0x80) == 0) break; } @@ -1502,33 +1411,28 @@ int rtsx_read_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 *val) u32 data = 0; retval = rtsx_write_register(chip, CFGADDR0, 0xFF, (u8)addr); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CFGADDR1, 0xFF, (u8)(addr >> 8)); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CFGRWCTL, 0xFF, 0x80 | ((func_no & 0x03) << 4)); - if (retval) { + if (retval) return retval; - } for (i = 0; i < MAX_RW_REG_CNT; i++) { retval = rtsx_read_register(chip, CFGRWCTL, &tmp); - if (retval) { + if (retval) return retval; - } if ((tmp & 0x80) == 0) break; } for (i = 0; i < 4; i++) { retval = rtsx_read_register(chip, CFGDATA0 + i, &tmp); - if (retval) { + if (retval) return retval; - } data |= (u32)tmp << (i * 8); } @@ -1547,9 +1451,8 @@ int rtsx_write_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, int dw_len, i, j; int retval; - if (!buf) { + if (!buf) return STATUS_NOMEM; - } if ((len + offset) % 4) dw_len = (len + offset) / 4 + 1; @@ -1559,9 +1462,8 @@ int rtsx_write_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, dev_dbg(rtsx_dev(chip), "dw_len = %d\n", dw_len); data = vzalloc(array_size(dw_len, 4)); - if (!data) { + if (!data) return STATUS_NOMEM; - } mask = vzalloc(array_size(dw_len, 4)); if (!mask) { @@ -1617,9 +1519,8 @@ int rtsx_read_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf, dev_dbg(rtsx_dev(chip), "dw_len = %d\n", dw_len); data = vmalloc(array_size(dw_len, 4)); - if (!data) { + if (!data) return STATUS_NOMEM; - } for (i = 0; i < dw_len; i++) { retval = rtsx_read_cfg_dw(chip, func, aligned_addr + i * 4, @@ -1655,36 +1556,30 @@ int rtsx_write_phy_register(struct rtsx_chip *chip, u8 addr, u16 val) u8 tmp; retval = rtsx_write_register(chip, PHYDATA0, 0xFF, (u8)val); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, PHYDATA1, 0xFF, (u8)(val >> 8)); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, PHYADDR, 0xFF, addr); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, PHYRWCTL, 0xFF, 0x81); - if (retval) { + if (retval) return retval; - } for (i = 0; i < 100000; i++) { retval = rtsx_read_register(chip, PHYRWCTL, &tmp); - if (retval) { + if (retval) return retval; - } if (!(tmp & 0x80)) { finished = true; break; } } - if (!finished) { + if (!finished) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1698,38 +1593,32 @@ int rtsx_read_phy_register(struct rtsx_chip *chip, u8 addr, u16 *val) u8 tmp; retval = rtsx_write_register(chip, PHYADDR, 0xFF, addr); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, PHYRWCTL, 0xFF, 0x80); - if (retval) { + if (retval) return retval; - } for (i = 0; i < 100000; i++) { retval = rtsx_read_register(chip, PHYRWCTL, &tmp); - if (retval) { + if (retval) return retval; - } if (!(tmp & 0x80)) { finished = true; break; } } - if (!finished) { + if (!finished) return STATUS_FAIL; - } retval = rtsx_read_register(chip, PHYDATA0, &tmp); - if (retval) { + if (retval) return retval; - } data = tmp; retval = rtsx_read_register(chip, PHYDATA1, &tmp); - if (retval) { + if (retval) return retval; - } data |= (u16)tmp << 8; if (val) @@ -1745,28 +1634,24 @@ int rtsx_read_efuse(struct rtsx_chip *chip, u8 addr, u8 *val) u8 data = 0; retval = rtsx_write_register(chip, EFUSE_CTRL, 0xFF, 0x80 | addr); - if (retval) { + if (retval) return retval; - } for (i = 0; i < 100; i++) { retval = rtsx_read_register(chip, EFUSE_CTRL, &data); - if (retval) { + if (retval) return retval; - } if (!(data & 0x80)) break; udelay(1); } - if (data & 0x80) { + if (data & 0x80) return STATUS_TIMEDOUT; - } retval = rtsx_read_register(chip, EFUSE_DATA, &data); - if (retval) { + if (retval) return retval; - } if (val) *val = data; @@ -1787,28 +1672,24 @@ int rtsx_write_efuse(struct rtsx_chip *chip, u8 addr, u8 val) dev_dbg(rtsx_dev(chip), "Write 0x%x to 0x%x\n", tmp, addr); retval = rtsx_write_register(chip, EFUSE_DATA, 0xFF, tmp); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, EFUSE_CTRL, 0xFF, 0xA0 | addr); - if (retval) { + if (retval) return retval; - } for (j = 0; j < 100; j++) { retval = rtsx_read_register(chip, EFUSE_CTRL, &data); - if (retval) { + if (retval) return retval; - } if (!(data & 0x80)) break; wait_timeout(3); } - if (data & 0x80) { + if (data & 0x80) return STATUS_TIMEDOUT; - } wait_timeout(5); } @@ -1822,16 +1703,14 @@ int rtsx_clr_phy_reg_bit(struct rtsx_chip *chip, u8 reg, u8 bit) u16 value; retval = rtsx_read_phy_register(chip, reg, &value); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (value & (1 << bit)) { value &= ~(1 << bit); retval = rtsx_write_phy_register(chip, reg, value); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -1843,16 +1722,14 @@ int rtsx_set_phy_reg_bit(struct rtsx_chip *chip, u8 reg, u8 bit) u16 value; retval = rtsx_read_phy_register(chip, reg, &value); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if ((value & (1 << bit)) == 0) { value |= (1 << bit); retval = rtsx_write_phy_register(chip, reg, value); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -2153,9 +2030,8 @@ int rtsx_read_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) u16 reg_addr; u8 *ptr; - if (!buf) { + if (!buf) return STATUS_ERROR; - } ptr = buf; reg_addr = PPBUF_BASE2; @@ -2166,9 +2042,8 @@ int rtsx_read_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0); retval = rtsx_send_cmd(chip, 0, 250); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } memcpy(ptr, rtsx_get_cmd_data(chip), 256); ptr += 256; @@ -2181,9 +2056,8 @@ int rtsx_read_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) rtsx_add_cmd(chip, READ_REG_CMD, reg_addr++, 0, 0); retval = rtsx_send_cmd(chip, 0, 250); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } } memcpy(ptr, rtsx_get_cmd_data(chip), buf_len % 256); @@ -2198,9 +2072,8 @@ int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) u16 reg_addr; u8 *ptr; - if (!buf) { + if (!buf) return STATUS_ERROR; - } ptr = buf; reg_addr = PPBUF_BASE2; @@ -2214,9 +2087,8 @@ int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) } retval = rtsx_send_cmd(chip, 0, 250); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } } if (buf_len % 256) { @@ -2229,9 +2101,8 @@ int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) } retval = rtsx_send_cmd(chip, 0, 250); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -2239,9 +2110,8 @@ int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len) int rtsx_check_chip_exist(struct rtsx_chip *chip) { - if (rtsx_readl(chip, 0) == 0xFFFFFFFF) { + if (rtsx_readl(chip, 0) == 0xFFFFFFFF) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -2264,9 +2134,8 @@ int rtsx_force_power_on(struct rtsx_chip *chip, u8 ctl) if (mask) { retval = rtsx_write_register(chip, FPDCTL, mask, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHECK_PID(chip, 0x5288)) wait_timeout(200); @@ -2294,9 +2163,8 @@ int rtsx_force_power_down(struct rtsx_chip *chip, u8 ctl) if (mask) { val = mask; retval = rtsx_write_register(chip, FPDCTL, mask, val); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; diff --git a/drivers/staging/rts5208/rtsx_scsi.c b/drivers/staging/rts5208/rtsx_scsi.c index c9a6d97938f6..9c594a778425 100644 --- a/drivers/staging/rts5208/rtsx_scsi.c +++ b/drivers/staging/rts5208/rtsx_scsi.c @@ -507,9 +507,8 @@ static int inquiry(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = vmalloc(scsi_bufflen(srb)); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } #ifdef SUPPORT_MAGIC_GATE if ((chip->mspro_formatter_enable) && @@ -637,9 +636,8 @@ static int request_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = vmalloc(scsi_bufflen(srb)); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } tmp = (unsigned char *)sense; memcpy(buf, tmp, scsi_bufflen(srb)); @@ -783,9 +781,8 @@ static int mode_sense(struct scsi_cmnd *srb, struct rtsx_chip *chip) #endif buf = kmalloc(data_size, GFP_KERNEL); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } page_code = srb->cmnd[2] & 0x3f; @@ -999,9 +996,8 @@ static int read_format_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip) buf_len = (scsi_bufflen(srb) > 12) ? 0x14 : 12; buf = kmalloc(buf_len, GFP_KERNEL); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } buf[i++] = 0; buf[i++] = 0; @@ -1076,9 +1072,8 @@ static int read_capacity(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = kmalloc(8, GFP_KERNEL); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } card_size = get_card_size(chip, lun); buf[0] = (unsigned char)((card_size - 1) >> 24); @@ -1116,9 +1111,8 @@ static int read_eeprom(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = ((u16)srb->cmnd[4] << 8) | srb->cmnd[5]; buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -1180,9 +1174,8 @@ static int write_eeprom(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (unsigned short)min_t(unsigned int, scsi_bufflen(srb), len); buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -1227,9 +1220,8 @@ static int read_mem(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -1282,9 +1274,8 @@ static int write_mem(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (unsigned short)min_t(unsigned int, scsi_bufflen(srb), len); buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -1702,41 +1693,35 @@ static int set_chip_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (phy_debug_mode) { chip->phy_debug_mode = 1; retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } rtsx_disable_bus_int(chip); retval = rtsx_read_phy_register(chip, 0x1C, ®); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } reg |= 0x0001; retval = rtsx_write_phy_register(chip, 0x1C, reg); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else { chip->phy_debug_mode = 0; retval = rtsx_write_register(chip, CDRESUMECTL, 0x77, 0x77); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } rtsx_enable_bus_int(chip); retval = rtsx_read_phy_register(chip, 0x1C, ®); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } reg &= 0xFFFE; retval = rtsx_write_phy_register(chip, 0x1C, reg); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } return TRANSPORT_GOOD; @@ -1840,9 +1825,8 @@ static int read_phy_register(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (len) { buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -1903,9 +1887,8 @@ static int write_phy_register(struct scsi_cmnd *srb, struct rtsx_chip *chip) len); buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -1999,9 +1982,8 @@ static int read_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = ((u16)srb->cmnd[6] << 8) | srb->cmnd[7]; buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -2049,9 +2031,8 @@ static int write_eeprom2(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (unsigned short)min_t(unsigned int, scsi_bufflen(srb), len); buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -2096,9 +2077,8 @@ static int read_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = srb->cmnd[5]; buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } retval = rtsx_force_power_on(chip, SSC_PDCTL); if (retval != STATUS_SUCCESS) { @@ -2147,9 +2127,8 @@ static int write_efuse(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (u8)min_t(unsigned int, scsi_bufflen(srb), len); buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -2215,29 +2194,25 @@ exit: vfree(buf); retval = card_power_off(chip, SPI_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_ERROR; - } if (chip->asic_code) { retval = rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_OFF); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_ERROR; - } wait_timeout(600); retval = rtsx_write_phy_register(chip, 0x08, val); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_ERROR; - } retval = rtsx_write_register(chip, PWR_GATE_CTRL, LDO3318_PWR_MASK, LDO_ON); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_ERROR; - } } return result; @@ -2278,9 +2253,8 @@ static int read_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } retval = rtsx_read_cfg_seq(chip, func, addr, buf, len); if (retval != STATUS_SUCCESS) { @@ -2335,9 +2309,8 @@ static int write_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip) len = (unsigned short)min_t(unsigned int, scsi_bufflen(srb), len); buf = vmalloc(len); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } rtsx_stor_get_xfer_buf(buf, len, srb); scsi_set_resid(srb, scsi_bufflen(srb) - len); @@ -2657,9 +2630,8 @@ static int spi_vendor_cmd(struct scsi_cmnd *srb, struct rtsx_chip *chip) rtsx_write_register(chip, CARD_GPIO_DIR, 0x07, gpio_dir); - if (result != STATUS_SUCCESS) { + if (result != STATUS_SUCCESS) return TRANSPORT_FAILED; - } return TRANSPORT_GOOD; } @@ -2849,9 +2821,8 @@ static int get_ms_information(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = kmalloc(buf_len, GFP_KERNEL); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } i = 0; /* GET Memory Stick Media Information Response Header */ @@ -3025,9 +2996,8 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x04) && (srb->cmnd[9] == 0x1C)) { retval = mg_get_local_EKB(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else { set_sense_type(chip, lun, @@ -3041,9 +3011,8 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x24)) { retval = mg_get_rsp_chg(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else { set_sense_type(chip, lun, @@ -3062,9 +3031,8 @@ static int mg_report_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[4] == 0x00) && (srb->cmnd[5] < 32)) { retval = mg_get_ICV(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else { set_sense_type(chip, lun, @@ -3131,9 +3099,8 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { retval = mg_set_leaf_id(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else { set_sense_type(chip, lun, @@ -3147,9 +3114,8 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { retval = mg_chg(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else { set_sense_type(chip, lun, @@ -3163,9 +3129,8 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[8] == 0x00) && (srb->cmnd[9] == 0x0C)) { retval = mg_rsp(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else { set_sense_type(chip, lun, @@ -3184,9 +3149,8 @@ static int mg_send_key(struct scsi_cmnd *srb, struct rtsx_chip *chip) (srb->cmnd[4] == 0x00) && (srb->cmnd[5] < 32)) { retval = mg_set_ICV(srb, chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else { set_sense_type(chip, lun, diff --git a/drivers/staging/rts5208/sd.c b/drivers/staging/rts5208/sd.c index e7efa34195c7..ff1a9aa152ce 100644 --- a/drivers/staging/rts5208/sd.c +++ b/drivers/staging/rts5208/sd.c @@ -109,9 +109,8 @@ static int sd_check_data0_status(struct rtsx_chip *chip) u8 stat; retval = rtsx_read_register(chip, REG_SD_STAT1, &stat); - if (retval) { + if (retval) return retval; - } if (!(stat & SD_DAT0_STATUS)) { sd_set_err_code(chip, SD_BUSY); @@ -234,9 +233,8 @@ RTY_SEND_CMD: if ((cmd_idx != SEND_RELATIVE_ADDR) && (cmd_idx != SEND_IF_COND)) { if (cmd_idx != STOP_TRANSMISSION) { - if (ptr[1] & 0x80) { + if (ptr[1] & 0x80) return STATUS_FAIL; - } } #ifdef SUPPORT_SD_LOCK if (ptr[1] & 0x7D) { @@ -284,9 +282,8 @@ static int sd_read_data(struct rtsx_chip *chip, if (!buf) buf_len = 0; - if (buf_len > 512) { + if (buf_len > 512) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -331,9 +328,8 @@ static int sd_read_data(struct rtsx_chip *chip, if (buf && buf_len) { retval = rtsx_read_ppbuf(chip, buf, buf_len); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -359,9 +355,8 @@ static int sd_write_data(struct rtsx_chip *chip, u8 trans_mode, if (buf && buf_len) { retval = rtsx_write_ppbuf(chip, buf, buf_len); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } rtsx_init_cmd(chip); @@ -426,9 +421,8 @@ static int sd_check_csd(struct rtsx_chip *chip, char check_wp) break; } - if (i == 6) { + if (i == 6) return STATUS_FAIL; - } memcpy(sd_card->raw_csd, rsp + 1, 15); @@ -543,9 +537,8 @@ static int sd_set_sample_push_timing(struct rtsx_chip *chip) } retval = rtsx_write_register(chip, REG_SD_CFG1, 0x1C, val); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -606,9 +599,8 @@ static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div) val = 0x20; retval = rtsx_write_register(chip, REG_SD_CFG1, mask, val); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -619,16 +611,14 @@ static int sd_set_init_para(struct rtsx_chip *chip) int retval; retval = sd_set_sample_push_timing(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } sd_choose_proper_clock(chip); retval = switch_clock(chip, sd_card->sd_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -651,9 +641,8 @@ int sd_select_card(struct rtsx_chip *chip, int select) } retval = sd_send_cmd_get_rsp(chip, cmd_idx, addr, cmd_type, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -667,9 +656,8 @@ static int sd_update_lock_status(struct rtsx_chip *chip) retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, rsp, 5); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (rsp[1] & 0x02) sd_card->sd_lock_status |= SD_LOCKED; @@ -679,9 +667,8 @@ static int sd_update_lock_status(struct rtsx_chip *chip) dev_dbg(rtsx_dev(chip), "sd_card->sd_lock_status = 0x%x\n", sd_card->sd_lock_status); - if (rsp[1] & 0x01) { + if (rsp[1] & 0x01) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -698,9 +685,8 @@ static int sd_wait_state_data_ready(struct rtsx_chip *chip, u8 state, retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, rsp, 5); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (((rsp[3] & 0x1E) == state) && ((rsp[3] & 0x01) == data_ready)) @@ -719,31 +705,27 @@ static int sd_change_bank_voltage(struct rtsx_chip *chip, u8 voltage) retval = rtsx_write_phy_register(chip, 0x08, 0x4FC0 | chip->phy_voltage); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register(chip, SD_PAD_CTL, SD_IO_USING_1V8, 0); - if (retval) { + if (retval) return retval; - } } } else if (voltage == SD_IO_1V8) { if (chip->asic_code) { retval = rtsx_write_phy_register(chip, 0x08, 0x4C40 | chip->phy_voltage); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register(chip, SD_PAD_CTL, SD_IO_USING_1V8, SD_IO_USING_1V8); - if (retval) { + if (retval) return retval; - } } } else { return STATUS_FAIL; @@ -760,22 +742,19 @@ static int sd_voltage_switch(struct rtsx_chip *chip) retval = rtsx_write_register(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, SD_CLK_TOGGLE_EN); - if (retval) { + if (retval) return retval; - } retval = sd_send_cmd_get_rsp(chip, VOLTAGE_SWITCH, 0, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } udelay(chip->sd_voltage_switch_delay); retval = rtsx_read_register(chip, SD_BUS_STAT, &stat); - if (retval) { + if (retval) return retval; - } if (stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS | SD_DAT0_STATUS)) { return STATUS_FAIL; @@ -783,27 +762,23 @@ static int sd_voltage_switch(struct rtsx_chip *chip) retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF, SD_CLK_FORCE_STOP); - if (retval) { + if (retval) return retval; - } retval = sd_change_bank_voltage(chip, SD_IO_1V8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } wait_timeout(50); retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF, SD_CLK_TOGGLE_EN); - if (retval) { + if (retval) return retval; - } wait_timeout(10); retval = rtsx_read_register(chip, SD_BUS_STAT, &stat); - if (retval) { + if (retval) return retval; - } if ((stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS | SD_DAT0_STATUS)) != (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS | @@ -817,9 +792,8 @@ static int sd_voltage_switch(struct rtsx_chip *chip) retval = rtsx_write_register(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -831,23 +805,19 @@ static int sd_reset_dcm(struct rtsx_chip *chip, u8 tune_dir) if (tune_dir == TUNE_RX) { retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_RESET | DCM_RX); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_RX); - if (retval) { + if (retval) return retval; - } } else { retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_RESET | DCM_TX); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_TX); - if (retval) { + if (retval) return retval; - } } return STATUS_SUCCESS; @@ -877,28 +847,23 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir) if (chip->asic_code) { retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, CHANGE_CLK); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SD_VP_CTL, 0x1F, sample_point); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SD_VPCLK0_CTL, PHASE_NOT_RESET, PHASE_NOT_RESET); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, 0); - if (retval) { + if (retval) return retval; - } } else { rtsx_read_register(chip, SD_VP_CTL, &val); dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val); @@ -909,30 +874,26 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir) retval = rtsx_write_register(chip, SD_VP_CTL, PHASE_CHANGE, PHASE_CHANGE); - if (retval) { + if (retval) return retval; - } udelay(50); retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF, PHASE_CHANGE | PHASE_NOT_RESET | sample_point); - if (retval) { + if (retval) return retval; - } } else { retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, CHANGE_CLK); - if (retval) { + if (retval) return retval; - } udelay(50); retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF, PHASE_NOT_RESET | sample_point); - if (retval) { + if (retval) return retval; - } } udelay(100); @@ -942,45 +903,38 @@ static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir) rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE_DONE, DCMPS_CHANGE_DONE); retval = rtsx_send_cmd(chip, SD_CARD, 100); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto fail; - } val = *rtsx_get_cmd_data(chip); - if (val & DCMPS_ERROR) { + if (val & DCMPS_ERROR) goto fail; - } - if ((val & DCMPS_CURRENT_PHASE) != sample_point) { + if ((val & DCMPS_CURRENT_PHASE) != sample_point) goto fail; - } retval = rtsx_write_register(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0); - if (retval) { + if (retval) return retval; - } if (ddr_rx) { retval = rtsx_write_register(chip, SD_VP_CTL, PHASE_CHANGE, 0); - if (retval) { + if (retval) return retval; - } } else { retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, 0); - if (retval) { + if (retval) return retval; - } } udelay(50); } retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; @@ -1005,9 +959,8 @@ static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width) retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } cmd[0] = 0x40 | SEND_SCR; cmd[1] = 0; @@ -1024,9 +977,8 @@ static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width) memcpy(sd_card->raw_scr, buf, 8); - if ((buf[0] & 0x0F) == 0) { + if ((buf[0] & 0x0F) == 0) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1207,29 +1159,25 @@ static int sd_check_switch_mode(struct rtsx_chip *chip, u8 mode, u8 func_group, dev_dbg(rtsx_dev(chip), "Maximum current consumption: %dmA\n", cc); - if ((cc == 0) || (cc > 800)) { + if ((cc == 0) || (cc > 800)) return STATUS_FAIL; - } retval = sd_query_switch_result(chip, func_group, func_to_switch, buf, 64); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if ((cc > 400) || (func_to_switch > CURRENT_LIMIT_400)) { retval = rtsx_write_register(chip, OCPPARA2, SD_OCP_THD_MASK, chip->sd_800mA_ocp_thd); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PWR_CTL, PMOS_STRG_MASK, PMOS_STRG_800mA); - if (retval) { + if (retval) return retval; - } } } @@ -1278,9 +1226,8 @@ static int sd_check_switch(struct rtsx_chip *chip, } retval = rtsx_read_register(chip, SD_STAT1, &stat); - if (retval) { + if (retval) return retval; - } if (stat & SD_CRC16_ERR) { dev_dbg(rtsx_dev(chip), "SD CRC16 error when switching mode\n"); return STATUS_FAIL; @@ -1293,9 +1240,8 @@ static int sd_check_switch(struct rtsx_chip *chip, wait_timeout(20); } - if (!switch_good) { + if (!switch_good) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1310,9 +1256,8 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) /* Get supported functions */ retval = sd_check_switch_mode(chip, SD_CHECK_MODE, NO_ARGUMENT, NO_ARGUMENT, bus_width); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } sd_card->func_group1_mask &= ~(sd_card->sd_switch_fail); @@ -1394,13 +1339,11 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) if (CHK_SD_DDR50(sd_card)) { retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06, 0x04); - if (retval) { + if (retval) return retval; - } retval = sd_set_sample_push_timing(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } if (!func_to_switch || (func_to_switch == HS_SUPPORT)) { @@ -1454,9 +1397,8 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch, bus_width); if (retval != STATUS_SUCCESS) { - if (sd_check_err_code(chip, SD_NO_CARD)) { + if (sd_check_err_code(chip, SD_NO_CARD)) return STATUS_FAIL; - } } dev_dbg(rtsx_dev(chip), "Switch current limit finished! (%d)\n", retval); @@ -1464,9 +1406,8 @@ static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width) if (CHK_SD_DDR50(sd_card)) { retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06, 0); - if (retval) { + if (retval) return retval; - } } return STATUS_SUCCESS; @@ -1480,9 +1421,8 @@ static int sd_wait_data_idle(struct rtsx_chip *chip) for (i = 0; i < 100; i++) { retval = rtsx_read_register(chip, SD_DATA_STATE, &val); - if (retval) { + if (retval) return retval; - } if (val & SD_DATA_IDLE) { retval = STATUS_SUCCESS; break; @@ -1500,9 +1440,8 @@ static int sd_sdr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) u8 cmd[5]; retval = sd_change_phase(chip, sample_point, TUNE_RX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } cmd[0] = 0x40 | SEND_TUNING_PATTERN; cmd[1] = 0; @@ -1529,17 +1468,15 @@ static int sd_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) u8 cmd[5]; retval = sd_change_phase(chip, sample_point, TUNE_RX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "sd ddr tuning rx\n"); retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } cmd[0] = 0x40 | SD_STATUS; cmd[1] = 0; @@ -1573,9 +1510,8 @@ static int mmc_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point) bus_width = SD_BUS_WIDTH_1; retval = sd_change_phase(chip, sample_point, TUNE_RX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "mmc ddr tuning rx\n"); @@ -1603,15 +1539,13 @@ static int sd_sdr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) int retval; retval = sd_change_phase(chip, sample_point, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, SD_RSP_80CLK_TIMEOUT_EN); - if (retval) { + if (retval) return retval; - } retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); @@ -1625,9 +1559,8 @@ static int sd_sdr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -1639,9 +1572,8 @@ static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) u8 cmd[5], bus_width; retval = sd_change_phase(chip, sample_point, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (CHK_SD(sd_card)) { bus_width = SD_BUS_WIDTH_4; @@ -1655,15 +1587,13 @@ static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) } retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, SD_RSP_80CLK_TIMEOUT_EN); - if (retval) { + if (retval) return retval; - } cmd[0] = 0x40 | PROGRAM_CSD; cmd[1] = 0; @@ -1681,9 +1611,8 @@ static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point) retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0); - if (retval) { + if (retval) return retval; - } sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); @@ -1826,11 +1755,10 @@ static int sd_tuning_rx(struct rtsx_chip *chip) tuning_cmd = sd_sdr_tuning_rx_cmd; } else { - if (CHK_MMC_DDR52(sd_card)) { + if (CHK_MMC_DDR52(sd_card)) tuning_cmd = mmc_ddr_tuning_rx_cmd; - } else { + else return STATUS_FAIL; - } } for (i = 0; i < 3; i++) { @@ -1855,14 +1783,12 @@ static int sd_tuning_rx(struct rtsx_chip *chip) dev_dbg(rtsx_dev(chip), "RX phase_map = 0x%08x\n", phase_map); final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX); - if (final_phase == 0xFF) { + if (final_phase == 0xFF) return STATUS_FAIL; - } retval = sd_change_phase(chip, final_phase, TUNE_RX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1877,9 +1803,8 @@ static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip) retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, SD_RSP_80CLK_TIMEOUT_EN); - if (retval) { + if (retval) return retval; - } phase_map = 0; for (i = MAX_PHASE; i >= 0; i--) { @@ -1904,22 +1829,19 @@ static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip) retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0); - if (retval) { + if (retval) return retval; - } dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase_map = 0x%08x\n", phase_map); final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX); - if (final_phase == 0xFF) { + if (final_phase == 0xFF) return STATUS_FAIL; - } retval = sd_change_phase(chip, final_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase: %d\n", (int)final_phase); @@ -1943,11 +1865,10 @@ static int sd_tuning_tx(struct rtsx_chip *chip) tuning_cmd = sd_sdr_tuning_tx_cmd; } else { - if (CHK_MMC_DDR52(sd_card)) { + if (CHK_MMC_DDR52(sd_card)) tuning_cmd = sd_ddr_tuning_tx_cmd; - } else { + else return STATUS_FAIL; - } } for (i = 0; i < 3; i++) { @@ -1974,14 +1895,12 @@ static int sd_tuning_tx(struct rtsx_chip *chip) dev_dbg(rtsx_dev(chip), "TX phase_map = 0x%08x\n", phase_map); final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX); - if (final_phase == 0xFF) { + if (final_phase == 0xFF) return STATUS_FAIL; - } retval = sd_change_phase(chip, final_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1991,14 +1910,12 @@ static int sd_sdr_tuning(struct rtsx_chip *chip) int retval; retval = sd_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = sd_tuning_rx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -2009,27 +1926,23 @@ static int sd_ddr_tuning(struct rtsx_chip *chip) if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) { retval = sd_ddr_pre_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = sd_change_phase(chip, (u8)chip->sd_ddr_tx_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = sd_tuning_rx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) { retval = sd_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -2041,27 +1954,23 @@ static int mmc_ddr_tuning(struct rtsx_chip *chip) if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) { retval = sd_ddr_pre_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = sd_change_phase(chip, (u8)chip->mmc_ddr_tx_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = sd_tuning_rx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) { retval = sd_tuning_tx(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -2074,14 +1983,12 @@ int sd_switch_clock(struct rtsx_chip *chip) int re_tuning = 0; retval = select_card(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = switch_clock(chip, sd_card->sd_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (re_tuning) { if (CHK_SD(sd_card)) { @@ -2094,9 +2001,8 @@ int sd_switch_clock(struct rtsx_chip *chip) retval = mmc_ddr_tuning(chip); } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -2126,25 +2032,21 @@ static int sd_prepare_reset(struct rtsx_chip *chip) chip->sd_io = 0; retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return retval; - } retval = rtsx_write_register(chip, REG_SD_CFG1, 0xFF, 0x40); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR, SD_STOP | SD_CLR_ERR); - if (retval) { + if (retval) return retval; - } retval = select_card(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -2157,60 +2059,50 @@ static int sd_pull_ctl_disable(struct rtsx_chip *chip) retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF, XD_D3_PD | SD_D7_PD | SD_CLK_PD | SD_D5_PD); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, SD_D6_PD | SD_D0_PD | SD_D1_PD | XD_D5_PD); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, SD_D4_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF, MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD); - if (retval) { + if (retval) return retval; - } } else if (CHECK_PID(chip, 0x5288)) { if (CHECK_BARO_PKG(chip, QFN)) { retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF, 0x55); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, 0x55); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, 0x4B); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, 0x69); - if (retval) { + if (retval) return retval; - } } } @@ -2250,9 +2142,8 @@ int sd_pull_ctl_enable(struct rtsx_chip *chip) } retval = rtsx_send_cmd(chip, SD_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -2262,36 +2153,31 @@ static int sd_init_power(struct rtsx_chip *chip) int retval; retval = sd_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (!chip->ft2_fast_mode) wait_timeout(250); retval = enable_card_clock(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (chip->asic_code) { retval = sd_pull_ctl_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, 0); - if (retval) { + if (retval) return retval; - } } if (!chip->ft2_fast_mode) { retval = card_power_on(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } wait_timeout(260); @@ -2306,9 +2192,8 @@ static int sd_init_power(struct rtsx_chip *chip) retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -2318,14 +2203,12 @@ static int sd_dummy_clock(struct rtsx_chip *chip) int retval; retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0x01); - if (retval) { + if (retval) return retval; - } wait_timeout(5); retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -2373,9 +2256,8 @@ static int sd_check_wp_state(struct rtsx_chip *chip) retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } cmd[0] = 0x40 | SD_STATUS; cmd[1] = 0; @@ -2689,9 +2571,8 @@ SD_UNLOCK_ENTRY: retval = rtsx_write_register(chip, SD30_DRIVE_SEL, 0x07, chip->sd30_drive_sel_1v8); - if (retval) { + if (retval) return retval; - } retval = sd_set_init_para(chip); if (retval != STATUS_SUCCESS) @@ -2753,14 +2634,12 @@ SD_UNLOCK_ENTRY: if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) { retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF, 0x02); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF, 0x00); - if (retval) { + if (retval) return retval; - } } #endif @@ -2780,9 +2659,8 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return SWITCH_FAIL; - } if (width == MMC_8BIT_BUS) { buf[0] = 0x55; @@ -2798,9 +2676,8 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) } retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0x02); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return SWITCH_ERR; - } retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3, NULL, 0, byte_cnt, 1, bus_width, buf, len, 100); @@ -2811,9 +2688,8 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) } retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return SWITCH_ERR; - } dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", BUSTEST_R); @@ -2979,9 +2855,8 @@ static int mmc_switch_timing_bus(struct rtsx_chip *chip, bool switch_ddr) sd_choose_proper_clock(chip); retval = switch_clock(chip, sd_card->sd_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } /* Test Bus Procedure */ retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS); @@ -3028,18 +2903,16 @@ static int reset_mmc(struct rtsx_chip *chip) switch_fail: retval = sd_prepare_reset(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return retval; - } SET_MMC(sd_card); RTY_MMC_RST: retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } do { if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) { @@ -3075,9 +2948,8 @@ RTY_MMC_RST: i++; } while (!(rsp[1] & 0x80) && (i < 255)); - if (i == 255) { + if (i == 255) return STATUS_FAIL; - } if ((rsp[1] & 0x60) == 0x40) SET_MMC_SECTOR_MODE(sd_card); @@ -3086,47 +2958,40 @@ RTY_MMC_RST: retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } sd_card->sd_addr = 0x00100000; retval = sd_send_cmd_get_rsp(chip, SET_RELATIVE_ADDR, sd_card->sd_addr, SD_RSP_TYPE_R6, rsp, 5); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = sd_check_csd(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2; retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } #ifdef SUPPORT_SD_LOCK MMC_UNLOCK_ENTRY: retval = sd_update_lock_status(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } #endif retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } chip->card_bus_width[chip->card2lun[SD_CARD]] = 1; @@ -3136,30 +3001,26 @@ MMC_UNLOCK_ENTRY: retval = mmc_switch_timing_bus(chip, switch_ddr); if (retval != STATUS_SUCCESS) { retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } sd_card->mmc_dont_switch_bus = 1; goto switch_fail; } } - if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) { + if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) return STATUS_FAIL; - } if (switch_ddr && CHK_MMC_DDR52(sd_card)) { retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = mmc_ddr_tuning(chip); if (retval != STATUS_SUCCESS) { retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } switch_ddr = false; goto switch_fail; @@ -3170,9 +3031,8 @@ MMC_UNLOCK_ENTRY: retval = sd_read_lba0(chip); if (retval != STATUS_SUCCESS) { retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } switch_ddr = false; goto switch_fail; @@ -3185,14 +3045,12 @@ MMC_UNLOCK_ENTRY: if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) { retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF, 0x02); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF, 0x00); - if (retval) { + if (retval) return retval; - } } #endif @@ -3214,88 +3072,74 @@ int reset_sd_card(struct rtsx_chip *chip) chip->capacity[chip->card2lun[SD_CARD]] = 0; retval = enable_card_clock(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (chip->ignore_sd && CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) { if (chip->asic_code) { retval = sd_pull_ctl_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } retval = card_share_mode(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } chip->sd_io = 1; return STATUS_FAIL; } retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (chip->sd_ctl & RESET_MMC_FIRST) { retval = reset_mmc(chip); if (retval != STATUS_SUCCESS) { - if (sd_check_err_code(chip, SD_NO_CARD)) { + if (sd_check_err_code(chip, SD_NO_CARD)) return STATUS_FAIL; - } retval = reset_sd(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } } else { retval = reset_sd(chip); if (retval != STATUS_SUCCESS) { - if (sd_check_err_code(chip, SD_NO_CARD)) { + if (sd_check_err_code(chip, SD_NO_CARD)) return STATUS_FAIL; - } - if (chip->sd_io) { + if (chip->sd_io) return STATUS_FAIL; - } retval = reset_mmc(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } } retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2); - if (retval) { + if (retval) return retval; - } chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity; retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "sd_card->sd_type = 0x%x\n", sd_card->sd_type); @@ -3321,40 +3165,33 @@ static int reset_mmc_only(struct rtsx_chip *chip) chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity = 0; retval = enable_card_clock(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = sd_init_power(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = reset_mmc(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2); - if (retval) { + if (retval) return retval; - } chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity; retval = sd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "In %s, sd_card->sd_type = 0x%x\n", __func__, sd_card->sd_type); @@ -3380,9 +3217,8 @@ static int wait_data_buf_ready(struct rtsx_chip *chip) retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (sd_card->sd_data_buf_ready) { return sd_send_cmd_get_rsp(chip, SEND_STATUS, @@ -3460,9 +3296,8 @@ static inline int sd_auto_tune_clock(struct rtsx_chip *chip) } retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -3819,9 +3654,8 @@ RTY_SEND_CMD: if (rsp_type & SD_WAIT_BUSY_END) { retval = sd_check_data0_status(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return retval; - } } else { sd_set_err_code(chip, SD_TO_ERR); } @@ -3859,9 +3693,8 @@ RTY_SEND_CMD: if ((cmd_idx == SELECT_CARD) || (cmd_idx == APP_CMD) || (cmd_idx == SEND_STATUS) || (cmd_idx == STOP_TRANSMISSION)) { if ((cmd_idx != STOP_TRANSMISSION) && !special_check) { - if (ptr[1] & 0x80) { + if (ptr[1] & 0x80) return STATUS_FAIL; - } } #ifdef SUPPORT_SD_LOCK if (ptr[1] & 0x7D) { @@ -3870,15 +3703,13 @@ RTY_SEND_CMD: #endif return STATUS_FAIL; } - if (ptr[2] & 0xF8) { + if (ptr[2] & 0xF8) return STATUS_FAIL; - } if (cmd_idx == SELECT_CARD) { if (rsp_type == SD_RSP_TYPE_R2) { - if ((ptr[3] & 0x1E) != 0x04) { + if ((ptr[3] & 0x1E) != 0x04) return STATUS_FAIL; - } } } } @@ -3915,9 +3746,8 @@ int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type) rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0xFF, 0); retval = rtsx_send_cmd(chip, SD_CARD, 100); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (rsp) { int min_len = (rsp_len < len) ? rsp_len : len; @@ -4057,9 +3887,8 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } if (sd_card->pre_cmd_err) { sd_card->pre_cmd_err = 0; @@ -4085,39 +3914,34 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->last_rsp_type = rsp_type; retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } #ifdef SUPPORT_SD_LOCK if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) { if (CHK_MMC_8BIT(sd_card)) { retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) { retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } } #else retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } #endif if (standby) { retval = sd_select_card(chip, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_cmd_failed; - } } if (acmd) { @@ -4125,29 +3949,25 @@ int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_cmd_failed; - } } retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type, sd_card->rsp, rsp_len, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_cmd_failed; - } if (standby) { retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_cmd_failed; - } } #ifdef SUPPORT_SD_LOCK retval = sd_update_lock_status(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_cmd_failed; - } #endif scsi_set_resid(srb, 0); @@ -4186,9 +4006,8 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } cmd_idx = srb->cmnd[2] & 0x3F; if (srb->cmnd[1] & 0x04) @@ -4211,9 +4030,8 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->last_rsp_type = rsp_type; retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } #ifdef SUPPORT_SD_LOCK if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) { @@ -4235,16 +4053,14 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len, SD_RSP_TYPE_R1, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } } if (standby) { retval = sd_select_card(chip, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } } if (acmd) { @@ -4252,9 +4068,8 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } } if (data_len <= 512) { @@ -4273,9 +4088,8 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) cmd[4] = srb->cmnd[6]; buf = kmalloc(data_len, GFP_KERNEL); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt, blk_cnt, bus_width, buf, data_len, 2000); @@ -4340,43 +4154,37 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = ext_sd_get_rsp(chip, rsp_len, sd_card->rsp, rsp_type); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } if (standby) { retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } } if (send_cmd12) { retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0, SD_RSP_TYPE_R1b, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } } if (data_len < 512) { retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } } if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04)) @@ -4390,9 +4198,8 @@ int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_read_cmd_failed; - } scsi_set_resid(srb, 0); return TRANSPORT_GOOD; @@ -4438,9 +4245,8 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } cmd_idx = srb->cmnd[2] & 0x3F; if (srb->cmnd[1] & 0x04) @@ -4472,48 +4278,42 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->last_rsp_type = rsp_type; retval = sd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } #ifdef SUPPORT_SD_LOCK if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) { if (CHK_MMC_8BIT(sd_card)) { retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_8); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) { retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } } } #else retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return TRANSPORT_FAILED; - } #endif if (data_len < 512) { retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len, SD_RSP_TYPE_R1, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } } if (standby) { retval = sd_select_card(chip, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } } if (acmd) { @@ -4521,25 +4321,22 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } } retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type, sd_card->rsp, rsp_len, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } if (data_len <= 512) { u16 i; u8 *buf; buf = kmalloc(data_len, GFP_KERNEL); - if (!buf) { + if (!buf) return TRANSPORT_ERROR; - } rtsx_stor_get_xfer_buf(buf, data_len, srb); @@ -4663,37 +4460,32 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (standby) { retval = sd_select_card(chip, 1); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } } if (send_cmd12) { retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0, SD_RSP_TYPE_R1b, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } } if (data_len < 512) { retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1, NULL, 0, false); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } } if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04)) @@ -4707,9 +4499,8 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (retval == STATUS_SUCCESS) break; } - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) goto sd_execute_write_cmd_failed; - } #ifdef SUPPORT_SD_LOCK if (cmd_idx == LOCK_UNLOCK) { @@ -4888,36 +4679,31 @@ int sd_power_off_card3v3(struct rtsx_chip *chip) int retval; retval = disable_card_clock(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0); - if (retval) { + if (retval) return retval; - } if (!chip->ft2_fast_mode) { retval = card_power_off(chip, SD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } mdelay(50); } if (chip->asic_code) { retval = sd_pull_ctl_disable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register(chip, FPGA_PULL_CTL, FPGA_SD_PULL_CTL_BIT | 0x20, FPGA_SD_PULL_CTL_BIT); - if (retval) { + if (retval) return retval; - } } return STATUS_SUCCESS; @@ -4944,9 +4730,8 @@ int release_sd_card(struct rtsx_chip *chip) memset(sd_card->raw_scr, 0, 8); retval = sd_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } diff --git a/drivers/staging/rts5208/spi.c b/drivers/staging/rts5208/spi.c index 4675668ad977..110cb9093f30 100644 --- a/drivers/staging/rts5208/spi.c +++ b/drivers/staging/rts5208/spi.c @@ -41,14 +41,12 @@ static int spi_init(struct rtsx_chip *chip) retval = rtsx_write_register(chip, SPI_CONTROL, 0xFF, CS_POLARITY_LOW | DTO_MSB_FIRST | SPI_MASTER | SPI_MODE0 | SPI_AUTO); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SPI_TCTL, EDO_TIMING_MASK, SAMPLE_DELAY_HALF); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -60,42 +58,35 @@ static int spi_set_init_para(struct rtsx_chip *chip) retval = rtsx_write_register(chip, SPI_CLK_DIVIDER1, 0xFF, (u8)(spi->clk_div >> 8)); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SPI_CLK_DIVIDER0, 0xFF, (u8)(spi->clk_div)); - if (retval) { + if (retval) return retval; - } retval = switch_clock(chip, spi->spi_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = select_card(chip, SPI_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, CARD_CLK_EN, SPI_CLK_EN, SPI_CLK_EN); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_OE, SPI_OUTPUT_EN, SPI_OUTPUT_EN); - if (retval) { + if (retval) return retval; - } wait_timeout(10); retval = spi_init(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -247,47 +238,39 @@ static int spi_init_eeprom(struct rtsx_chip *chip) clk = CLK_30; retval = rtsx_write_register(chip, SPI_CLK_DIVIDER1, 0xFF, 0x00); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SPI_CLK_DIVIDER0, 0xFF, 0x27); - if (retval) { + if (retval) return retval; - } retval = switch_clock(chip, clk); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = select_card(chip, SPI_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, CARD_CLK_EN, SPI_CLK_EN, SPI_CLK_EN); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_OE, SPI_OUTPUT_EN, SPI_OUTPUT_EN); - if (retval) { + if (retval) return retval; - } wait_timeout(10); retval = rtsx_write_register(chip, SPI_CONTROL, 0xFF, CS_POLARITY_HIGH | SPI_EEPROM_AUTO); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, SPI_TCTL, EDO_TIMING_MASK, SAMPLE_DELAY_HALF); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -306,9 +289,8 @@ static int spi_eeprom_program_enable(struct rtsx_chip *chip) SPI_TRANSFER0_END); retval = rtsx_send_cmd(chip, 0, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -318,14 +300,12 @@ int spi_erase_eeprom_chip(struct rtsx_chip *chip) int retval; retval = spi_init_eeprom(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = spi_eeprom_program_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -339,14 +319,12 @@ int spi_erase_eeprom_chip(struct rtsx_chip *chip) SPI_TRANSFER0_END); retval = rtsx_send_cmd(chip, 0, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -356,14 +334,12 @@ int spi_erase_eeprom_byte(struct rtsx_chip *chip, u16 addr) int retval; retval = spi_init_eeprom(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = spi_eeprom_program_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -379,14 +355,12 @@ int spi_erase_eeprom_byte(struct rtsx_chip *chip, u16 addr) SPI_TRANSFER0_END); retval = rtsx_send_cmd(chip, 0, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -397,9 +371,8 @@ int spi_read_eeprom(struct rtsx_chip *chip, u16 addr, u8 *val) u8 data; retval = spi_init_eeprom(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -416,23 +389,20 @@ int spi_read_eeprom(struct rtsx_chip *chip, u16 addr, u8 *val) SPI_TRANSFER0_END); retval = rtsx_send_cmd(chip, 0, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } wait_timeout(5); retval = rtsx_read_register(chip, SPI_DATA, &data); - if (retval) { + if (retval) return retval; - } if (val) *val = data; retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -442,14 +412,12 @@ int spi_write_eeprom(struct rtsx_chip *chip, u16 addr, u8 val) int retval; retval = spi_init_eeprom(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = spi_eeprom_program_enable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -466,14 +434,12 @@ int spi_write_eeprom(struct rtsx_chip *chip, u16 addr, u8 val) SPI_TRANSFER0_END); retval = rtsx_send_cmd(chip, 0, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } retval = rtsx_write_register(chip, CARD_GPIO_DIR, 0x01, 0x01); - if (retval) { + if (retval) return retval; - } return STATUS_SUCCESS; } @@ -577,9 +543,8 @@ int spi_read_flash_id(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (len) { buf = kmalloc(len, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_ERROR; - } retval = rtsx_read_ppbuf(chip, buf, len); if (retval != STATUS_SUCCESS) { @@ -621,9 +586,8 @@ int spi_read_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip) } buf = kmalloc(SF_PAGE_LEN, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_ERROR; - } while (len) { u16 pagelen = SF_PAGE_LEN - (u8)addr; @@ -716,9 +680,8 @@ int spi_write_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (program_mode == BYTE_PROGRAM) { buf = kmalloc(4, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_ERROR; - } while (len) { retval = sf_enable_write(chip, SPI_WREN); @@ -762,14 +725,12 @@ int spi_write_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip) int first_byte = 1; retval = sf_enable_write(chip, SPI_WREN); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } buf = kmalloc(4, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_ERROR; - } while (len) { rtsx_stor_access_xfer_buf(buf, 1, srb, &index, &offset, @@ -808,19 +769,16 @@ int spi_write_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip) kfree(buf); retval = sf_disable_write(chip, SPI_WRDI); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = sf_polling_status(chip, 100); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else if (program_mode == PAGE_PROGRAM) { buf = kmalloc(SF_PAGE_LEN, GFP_KERNEL); - if (!buf) { + if (!buf) return STATUS_NOMEM; - } while (len) { u16 pagelen = SF_PAGE_LEN - (u8)addr; @@ -893,24 +851,20 @@ int spi_erase_flash(struct scsi_cmnd *srb, struct rtsx_chip *chip) if (erase_mode == PAGE_ERASE) { retval = sf_enable_write(chip, SPI_WREN); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = sf_erase(chip, ins, 1, addr); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else if (erase_mode == CHIP_ERASE) { retval = sf_enable_write(chip, SPI_WREN); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = sf_erase(chip, ins, 0, 0); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { spi_set_err_code(chip, SPI_INVALID_COMMAND); return STATUS_FAIL; @@ -935,9 +889,8 @@ int spi_write_flash_status(struct scsi_cmnd *srb, struct rtsx_chip *chip) } retval = sf_enable_write(chip, ewsr); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } rtsx_init_cmd(chip); diff --git a/drivers/staging/rts5208/xd.c b/drivers/staging/rts5208/xd.c index 261d868a3072..d71f19ceb6fa 100644 --- a/drivers/staging/rts5208/xd.c +++ b/drivers/staging/rts5208/xd.c @@ -60,9 +60,8 @@ static int xd_set_init_para(struct rtsx_chip *chip) xd_card->xd_clock = CLK_50; retval = switch_clock(chip, xd_card->xd_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -73,14 +72,12 @@ static int xd_switch_clock(struct rtsx_chip *chip) int retval; retval = select_card(chip, XD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = switch_clock(chip, xd_card->xd_clock); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -102,9 +99,8 @@ static int xd_read_id(struct rtsx_chip *chip, u8 id_cmd, u8 *id_buf, u8 buf_len) rtsx_add_cmd(chip, READ_REG_CMD, (u16)(XD_ADDRESS1 + i), 0, 0); retval = rtsx_send_cmd(chip, XD_CARD, 20); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } ptr = rtsx_get_cmd_data(chip) + 1; if (id_buf && buf_len) { @@ -173,9 +169,8 @@ static int xd_read_redundant(struct rtsx_chip *chip, u32 page_addr, rtsx_add_cmd(chip, READ_REG_CMD, XD_PARITY, 0, 0); retval = rtsx_send_cmd(chip, XD_CARD, 500); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } if (buf && buf_len) { u8 *ptr = rtsx_get_cmd_data(chip) + 1; @@ -193,9 +188,8 @@ static int xd_read_data_from_ppb(struct rtsx_chip *chip, int offset, { int retval, i; - if (!buf || (buf_len < 0)) { + if (!buf || (buf_len < 0)) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -220,9 +214,8 @@ static int xd_read_cis(struct rtsx_chip *chip, u32 page_addr, u8 *buf, int retval; u8 reg; - if (!buf || (buf_len < 10)) { + if (!buf || (buf_len < 10)) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -246,36 +239,31 @@ static int xd_read_cis(struct rtsx_chip *chip, u32 page_addr, u8 *buf, } retval = rtsx_read_register(chip, XD_PAGE_STATUS, ®); - if (retval) { + if (retval) return retval; - } if (reg != XD_GPG) { rtsx_clear_xd_error(chip); return STATUS_FAIL; } retval = rtsx_read_register(chip, XD_CTL, ®); - if (retval) { + if (retval) return retval; - } if (!(reg & XD_ECC1_ERROR) || !(reg & XD_ECC1_UNCORRECTABLE)) { retval = xd_read_data_from_ppb(chip, 0, buf, buf_len); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (reg & XD_ECC1_ERROR) { u8 ecc_bit, ecc_byte; retval = rtsx_read_register(chip, XD_ECC_BIT1, &ecc_bit); - if (retval) { + if (retval) return retval; - } retval = rtsx_read_register(chip, XD_ECC_BYTE1, &ecc_byte); - if (retval) { + if (retval) return retval; - } dev_dbg(rtsx_dev(chip), "ECC_BIT1 = 0x%x, ECC_BYTE1 = 0x%x\n", ecc_bit, ecc_byte); @@ -291,22 +279,19 @@ static int xd_read_cis(struct rtsx_chip *chip, u32 page_addr, u8 *buf, rtsx_clear_xd_error(chip); retval = xd_read_data_from_ppb(chip, 256, buf, buf_len); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (reg & XD_ECC2_ERROR) { u8 ecc_bit, ecc_byte; retval = rtsx_read_register(chip, XD_ECC_BIT2, &ecc_bit); - if (retval) { + if (retval) return retval; - } retval = rtsx_read_register(chip, XD_ECC_BYTE2, &ecc_byte); - if (retval) { + if (retval) return retval; - } dev_dbg(rtsx_dev(chip), "ECC_BIT2 = 0x%x, ECC_BYTE2 = 0x%x\n", ecc_bit, ecc_byte); @@ -404,68 +389,58 @@ static int xd_pull_ctl_disable(struct rtsx_chip *chip) XD_D2_PD | XD_D1_PD | XD_D0_PD); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, XD_D7_PD | XD_D6_PD | XD_D5_PD | XD_D4_PD); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, XD_WP_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, XD_RDY_PD | XD_WE_PD | XD_RE_PD | XD_ALE_PD); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF, MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF, MS_D5_PD | MS_D4_PD); - if (retval) { + if (retval) return retval; - } } else if (CHECK_PID(chip, 0x5288)) { if (CHECK_BARO_PKG(chip, QFN)) { retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF, 0x55); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF, 0x55); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF, 0x4B); - if (retval) { + if (retval) return retval; - } retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF, 0x69); - if (retval) { + if (retval) return retval; - } } } @@ -479,9 +454,8 @@ static int reset_xd(struct rtsx_chip *chip) u8 *ptr, id_buf[4], redunt[11]; retval = select_card(chip, XD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -505,15 +479,13 @@ static int reset_xd(struct rtsx_chip *chip) rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_OE, XD_OUTPUT_EN, 0); retval = rtsx_send_cmd(chip, XD_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } if (!chip->ft2_fast_mode) { retval = card_power_off(chip, XD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } wait_timeout(250); @@ -529,14 +501,12 @@ static int reset_xd(struct rtsx_chip *chip) } retval = rtsx_send_cmd(chip, XD_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } retval = card_power_on(chip, XD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } #ifdef SUPPORT_OCP wait_timeout(50); @@ -565,17 +535,15 @@ static int reset_xd(struct rtsx_chip *chip) rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CTL, XD_CE_DISEN, XD_CE_DISEN); retval = rtsx_send_cmd(chip, XD_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } if (!chip->ft2_fast_mode) wait_timeout(200); retval = xd_set_init_para(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } /* Read ID to check if the timing setting is right */ for (i = 0; i < 4; i++) { @@ -598,9 +566,8 @@ static int reset_xd(struct rtsx_chip *chip) rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0); retval = rtsx_send_cmd(chip, XD_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } ptr = rtsx_get_cmd_data(chip) + 1; @@ -612,9 +579,8 @@ static int reset_xd(struct rtsx_chip *chip) continue; retval = xd_read_id(chip, READ_ID, id_buf, 4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "READ_ID: 0x%x 0x%x 0x%x 0x%x\n", id_buf[0], id_buf[1], id_buf[2], id_buf[3]); @@ -694,9 +660,8 @@ static int reset_xd(struct rtsx_chip *chip) /* Confirm timing setting */ for (j = 0; j < 10; j++) { retval = xd_read_id(chip, READ_ID, id_buf, 4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (id_buf[1] != xd_card->device_code) break; @@ -716,22 +681,19 @@ static int reset_xd(struct rtsx_chip *chip) } retval = xd_read_id(chip, READ_xD_ID, id_buf, 4); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } dev_dbg(rtsx_dev(chip), "READ_xD_ID: 0x%x 0x%x 0x%x 0x%x\n", id_buf[0], id_buf[1], id_buf[2], id_buf[3]); - if (id_buf[2] != XD_ID_CODE) { + if (id_buf[2] != XD_ID_CODE) return STATUS_FAIL; - } /* Search CIS block */ for (i = 0; i < 24; i++) { u32 page_addr; - if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { + if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) return STATUS_FAIL; - } page_addr = (u32)i << xd_card->block_shift; @@ -769,9 +731,8 @@ static int reset_xd(struct rtsx_chip *chip) page_addr += j; retval = xd_read_cis(chip, page_addr, buf, 10); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if ((buf[0] == 0x01) && (buf[1] == 0x03) && (buf[2] == 0xD9) && @@ -841,17 +802,15 @@ static int xd_init_l2p_tbl(struct rtsx_chip *chip) dev_dbg(rtsx_dev(chip), "%s: zone_cnt = %d\n", __func__, xd_card->zone_cnt); - if (xd_card->zone_cnt < 1) { + if (xd_card->zone_cnt < 1) return STATUS_FAIL; - } size = xd_card->zone_cnt * sizeof(struct zone_entry); dev_dbg(rtsx_dev(chip), "Buffer size for l2p table is %d\n", size); xd_card->zone = vmalloc(size); - if (!xd_card->zone) { + if (!xd_card->zone) return STATUS_ERROR; - } for (i = 0; i < xd_card->zone_cnt; i++) { xd_card->zone[i].build_flag = 0; @@ -1028,19 +987,16 @@ int reset_xd_card(struct rtsx_chip *chip) xd_card->delay_write.delay_write_flag = 0; retval = enable_card_clock(chip, XD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = reset_xd(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = xd_init_l2p_tbl(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1054,9 +1010,8 @@ static int xd_mark_bad_block(struct rtsx_chip *chip, u32 phy_blk) dev_dbg(rtsx_dev(chip), "mark block 0x%x as bad block\n", phy_blk); - if (phy_blk == BLK_NOT_FOUND) { + if (phy_blk == BLK_NOT_FOUND) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -1107,12 +1062,10 @@ static int xd_init_page(struct rtsx_chip *chip, u32 phy_blk, dev_dbg(rtsx_dev(chip), "Init block 0x%x\n", phy_blk); - if (start_page > end_page) { + if (start_page > end_page) return STATUS_FAIL; - } - if (phy_blk == BLK_NOT_FOUND) { + if (phy_blk == BLK_NOT_FOUND) return STATUS_FAIL; - } rtsx_init_cmd(chip); @@ -1164,13 +1117,11 @@ static int xd_copy_page(struct rtsx_chip *chip, u32 old_blk, u32 new_blk, dev_dbg(rtsx_dev(chip), "Copy page from block 0x%x to block 0x%x\n", old_blk, new_blk); - if (start_page > end_page) { + if (start_page > end_page) return STATUS_FAIL; - } - if ((old_blk == BLK_NOT_FOUND) || (new_blk == BLK_NOT_FOUND)) { + if ((old_blk == BLK_NOT_FOUND) || (new_blk == BLK_NOT_FOUND)) return STATUS_FAIL; - } old_page = (old_blk << xd_card->block_shift) + start_page; new_page = (new_blk << xd_card->block_shift) + start_page; @@ -1179,9 +1130,8 @@ static int xd_copy_page(struct rtsx_chip *chip, u32 old_blk, u32 new_blk, retval = rtsx_write_register(chip, CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); - if (retval) { + if (retval) return retval; - } for (i = start_page; i < end_page; i++) { if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { @@ -1287,9 +1237,8 @@ static int xd_reset_cmd(struct rtsx_chip *chip) rtsx_add_cmd(chip, READ_REG_CMD, XD_CTL, 0, 0); retval = rtsx_send_cmd(chip, XD_CARD, 100); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } ptr = rtsx_get_cmd_data(chip) + 1; if (((ptr[0] & READY_FLAG) == READY_STATE) && (ptr[1] & XD_RDY)) @@ -1305,9 +1254,8 @@ static int xd_erase_block(struct rtsx_chip *chip, u32 phy_blk) u8 reg = 0, *ptr; int i, retval; - if (phy_blk == BLK_NOT_FOUND) { + if (phy_blk == BLK_NOT_FOUND) return STATUS_FAIL; - } page_addr = phy_blk << xd_card->block_shift; @@ -1333,9 +1281,8 @@ static int xd_erase_block(struct rtsx_chip *chip, u32 phy_blk) } xd_set_err_code(chip, XD_ERASE_FAIL); retval = xd_reset_cmd(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } continue; } @@ -1382,17 +1329,15 @@ static int xd_build_l2p_tbl(struct rtsx_chip *chip, int zone_no) if (!zone->l2p_table) { zone->l2p_table = vmalloc(2000); - if (!zone->l2p_table) { + if (!zone->l2p_table) goto build_fail; - } } memset((u8 *)(zone->l2p_table), 0xff, 2000); if (!zone->free_table) { zone->free_table = vmalloc(XD_FREE_TABLE_CNT * 2); - if (!zone->free_table) { + if (!zone->free_table) goto build_fail; - } } memset((u8 *)(zone->free_table), 0xff, XD_FREE_TABLE_CNT * 2); @@ -1555,9 +1500,8 @@ static int xd_send_cmd(struct rtsx_chip *chip, u8 cmd) XD_TRANSFER_END, XD_TRANSFER_END); retval = rtsx_send_cmd(chip, XD_CARD, 200); - if (retval < 0) { + if (retval < 0) return STATUS_FAIL; - } return STATUS_SUCCESS; } @@ -1636,17 +1580,15 @@ static int xd_read_multiple_pages(struct rtsx_chip *chip, u32 phy_blk, fail: retval = rtsx_read_register(chip, XD_PAGE_STATUS, ®_val); - if (retval) { + if (retval) return retval; - } if (reg_val != XD_GPG) xd_set_err_code(chip, XD_PRG_ERROR); retval = rtsx_read_register(chip, XD_CTL, ®_val); - if (retval) { + if (retval) return retval; - } if (((reg_val & (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE)) == (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE)) || @@ -1702,9 +1644,8 @@ static int xd_finish_write(struct rtsx_chip *chip, dev_dbg(rtsx_dev(chip), "new_blk = 0x%x, ", new_blk); dev_dbg(rtsx_dev(chip), "log_blk = 0x%x\n", log_blk); - if (page_off > xd_card->page_off) { + if (page_off > xd_card->page_off) return STATUS_FAIL; - } zone_no = (int)(log_blk / 1000); log_off = (u16)(log_blk % 1000); @@ -1760,9 +1701,8 @@ static int xd_prepare_write(struct rtsx_chip *chip, if (page_off) { retval = xd_copy_page(chip, old_blk, new_blk, 0, page_off); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -1858,9 +1798,8 @@ static int xd_write_multiple_pages(struct rtsx_chip *chip, u32 old_blk, fail: retval = rtsx_read_register(chip, XD_DAT, ®_val); - if (retval) { + if (retval) return retval; - } if (reg_val & PROGRAM_ERROR) { xd_set_err_code(chip, XD_PRG_ERROR); xd_mark_bad_block(chip, new_blk); @@ -1880,9 +1819,8 @@ int xd_delay_write(struct rtsx_chip *chip) if (delay_write->delay_write_flag) { dev_dbg(rtsx_dev(chip), "%s\n", __func__); retval = xd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } delay_write->delay_write_flag = 0; retval = xd_finish_write(chip, @@ -1890,9 +1828,8 @@ int xd_delay_write(struct rtsx_chip *chip) delay_write->new_phyblock, delay_write->logblock, delay_write->pageoff); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } return STATUS_SUCCESS; @@ -1924,9 +1861,8 @@ int xd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, ptr = (u8 *)scsi_sglist(srb); retval = xd_switch_clock(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) { chip->card_fail |= XD_CARD; @@ -2180,34 +2116,29 @@ int xd_power_off_card3v3(struct rtsx_chip *chip) int retval; retval = disable_card_clock(chip, XD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } retval = rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0); - if (retval) { + if (retval) return retval; - } if (!chip->ft2_fast_mode) { retval = card_power_off(chip, XD_CARD); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } wait_timeout(50); } if (chip->asic_code) { retval = xd_pull_ctl_disable(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } } else { retval = rtsx_write_register(chip, FPGA_PULL_CTL, 0xFF, 0xDF); - if (retval) { + if (retval) return retval; - } } return STATUS_SUCCESS; @@ -2227,9 +2158,8 @@ int release_xd_card(struct rtsx_chip *chip) xd_free_l2p_tbl(chip); retval = xd_power_off_card3v3(chip); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) return STATUS_FAIL; - } return STATUS_SUCCESS; } diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index 7e22d093b091..4dac691ad1b1 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -131,7 +131,7 @@ static int programModeRegisters(struct mode_parameter *pModeParam, DISPLAY_CTRL_HSYNC_PHASE | DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE); - poke32(CRT_DISPLAY_CTRL, tmp | reg); + poke32(CRT_DISPLAY_CTRL, tmp | reg); } } else if (pll->clockType == PRIMARY_PLL) { diff --git a/drivers/staging/sm750fb/ddk750_sii164.c b/drivers/staging/sm750fb/ddk750_sii164.c index 4b34a083f5cf..8391f57d5383 100644 --- a/drivers/staging/sm750fb/ddk750_sii164.c +++ b/drivers/staging/sm750fb/ddk750_sii164.c @@ -39,8 +39,8 @@ unsigned short sii164GetVendorID(void) { unsigned short vendorID; - vendorID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_HIGH) << 8) | - (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_LOW); + vendorID = ((unsigned short)i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_HIGH) << 8) | + (unsigned short)i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_LOW); return vendorID; } @@ -56,8 +56,8 @@ unsigned short sii164GetDeviceID(void) { unsigned short deviceID; - deviceID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_HIGH) << 8) | - (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_LOW); + deviceID = ((unsigned short)i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_HIGH) << 8) | + (unsigned short)i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_LOW); return deviceID; } diff --git a/drivers/staging/sm750fb/sm750.c b/drivers/staging/sm750fb/sm750.c index 846d7d243994..e9f10c2669ea 100644 --- a/drivers/staging/sm750fb/sm750.c +++ b/drivers/staging/sm750fb/sm750.c @@ -1007,7 +1007,7 @@ NO_PARAM: } } -static void sm750fb_frambuffer_release(struct sm750_dev *sm750_dev) +static void sm750fb_framebuffer_release(struct sm750_dev *sm750_dev) { struct fb_info *fb_info; @@ -1019,7 +1019,7 @@ static void sm750fb_frambuffer_release(struct sm750_dev *sm750_dev) } } -static int sm750fb_frambuffer_alloc(struct sm750_dev *sm750_dev, int fbidx) +static int sm750fb_framebuffer_alloc(struct sm750_dev *sm750_dev, int fbidx) { struct fb_info *fb_info; struct lynxfb_par *par; @@ -1137,7 +1137,7 @@ static int lynxfb_pci_probe(struct pci_dev *pdev, /* allocate frame buffer info structures according to g_dualview */ max_fb = g_dualview ? 2 : 1; for (fbidx = 0; fbidx < max_fb; fbidx++) { - err = sm750fb_frambuffer_alloc(sm750_dev, fbidx); + err = sm750fb_framebuffer_alloc(sm750_dev, fbidx); if (err) goto release_fb; } @@ -1145,7 +1145,7 @@ static int lynxfb_pci_probe(struct pci_dev *pdev, return 0; release_fb: - sm750fb_frambuffer_release(sm750_dev); + sm750fb_framebuffer_release(sm750_dev); return err; } @@ -1155,7 +1155,7 @@ static void lynxfb_pci_remove(struct pci_dev *pdev) sm750_dev = pci_get_drvdata(pdev); - sm750fb_frambuffer_release(sm750_dev); + sm750fb_framebuffer_release(sm750_dev); arch_phys_wc_del(sm750_dev->mtrr.vram); iounmap(sm750_dev->pvReg); diff --git a/drivers/staging/speakup/spk_ttyio.c b/drivers/staging/speakup/spk_ttyio.c index eac63aab8162..979e3ae249c1 100644 --- a/drivers/staging/speakup/spk_ttyio.c +++ b/drivers/staging/speakup/spk_ttyio.c @@ -227,9 +227,9 @@ static int spk_ttyio_out_unicode(struct spk_synth *in_synth, u16 ch) { int ret; - if (ch < 0x80) + if (ch < 0x80) { ret = spk_ttyio_out(in_synth, ch); - else if (ch < 0x800) { + } else if (ch < 0x800) { ret = spk_ttyio_out(in_synth, 0xc0 | (ch >> 6)); ret &= spk_ttyio_out(in_synth, 0x80 | (ch & 0x3f)); } else { diff --git a/drivers/staging/vboxvideo/TODO b/drivers/staging/vboxvideo/TODO index 468eea856ca6..2e0f99c3f10c 100644 --- a/drivers/staging/vboxvideo/TODO +++ b/drivers/staging/vboxvideo/TODO @@ -1,5 +1,4 @@ TODO: --Move the driver over to the atomic API -Get a full review from the drm-maintainers on dri-devel done on this driver -Extend this TODO with the results of that review diff --git a/drivers/staging/vboxvideo/vbox_drv.c b/drivers/staging/vboxvideo/vbox_drv.c index 69cc508af1bc..257030460fb6 100644 --- a/drivers/staging/vboxvideo/vbox_drv.c +++ b/drivers/staging/vboxvideo/vbox_drv.c @@ -49,139 +49,140 @@ static const struct pci_device_id pciidlist[] = { }; MODULE_DEVICE_TABLE(pci, pciidlist); +static struct drm_fb_helper_funcs vbox_fb_helper_funcs = { + .fb_probe = vboxfb_create, +}; + static int vbox_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { - struct drm_device *dev = NULL; + struct vbox_private *vbox; int ret = 0; - dev = drm_dev_alloc(&driver, &pdev->dev); - if (IS_ERR(dev)) { - ret = PTR_ERR(dev); - goto err_drv_alloc; + if (!vbox_check_supported(VBE_DISPI_ID_HGSMI)) + return -ENODEV; + + vbox = kzalloc(sizeof(*vbox), GFP_KERNEL); + if (!vbox) + return -ENOMEM; + + ret = drm_dev_init(&vbox->ddev, &driver, &pdev->dev); + if (ret) { + kfree(vbox); + return ret; } + vbox->ddev.pdev = pdev; + vbox->ddev.dev_private = vbox; + pci_set_drvdata(pdev, vbox); + mutex_init(&vbox->hw_mutex); + ret = pci_enable_device(pdev); if (ret) - goto err_pci_enable; - - dev->pdev = pdev; - pci_set_drvdata(pdev, dev); + goto err_dev_put; - ret = vbox_driver_load(dev); + ret = vbox_hw_init(vbox); if (ret) - goto err_vbox_driver_load; + goto err_pci_disable; - ret = drm_dev_register(dev, 0); + ret = vbox_mm_init(vbox); if (ret) - goto err_drv_dev_register; - - return ret; - - err_drv_dev_register: - vbox_driver_unload(dev); - err_vbox_driver_load: - pci_disable_device(pdev); - err_pci_enable: - drm_dev_put(dev); - err_drv_alloc: - return ret; -} - -static void vbox_pci_remove(struct pci_dev *pdev) -{ - struct drm_device *dev = pci_get_drvdata(pdev); - - drm_dev_unregister(dev); - vbox_driver_unload(dev); - drm_dev_put(dev); -} + goto err_hw_fini; -static int vbox_drm_freeze(struct drm_device *dev) -{ - struct vbox_private *vbox = dev->dev_private; + ret = vbox_mode_init(vbox); + if (ret) + goto err_mm_fini; - drm_kms_helper_poll_disable(dev); + ret = vbox_irq_init(vbox); + if (ret) + goto err_mode_fini; - pci_save_state(dev->pdev); + ret = drm_fb_helper_fbdev_setup(&vbox->ddev, &vbox->fb_helper, + &vbox_fb_helper_funcs, 32, + vbox->num_crtcs); + if (ret) + goto err_irq_fini; - drm_fb_helper_set_suspend_unlocked(&vbox->fbdev->helper, true); + ret = drm_dev_register(&vbox->ddev, 0); + if (ret) + goto err_fbdev_fini; return 0; -} - -static int vbox_drm_thaw(struct drm_device *dev) -{ - struct vbox_private *vbox = dev->dev_private; - - drm_mode_config_reset(dev); - drm_helper_resume_force_mode(dev); - drm_fb_helper_set_suspend_unlocked(&vbox->fbdev->helper, false); - return 0; +err_fbdev_fini: + vbox_fbdev_fini(vbox); +err_irq_fini: + vbox_irq_fini(vbox); +err_mode_fini: + vbox_mode_fini(vbox); +err_mm_fini: + vbox_mm_fini(vbox); +err_hw_fini: + vbox_hw_fini(vbox); +err_pci_disable: + pci_disable_device(pdev); +err_dev_put: + drm_dev_put(&vbox->ddev); + return ret; } -static int vbox_drm_resume(struct drm_device *dev) +static void vbox_pci_remove(struct pci_dev *pdev) { - int ret; - - if (pci_enable_device(dev->pdev)) - return -EIO; - - ret = vbox_drm_thaw(dev); - if (ret) - return ret; - - drm_kms_helper_poll_enable(dev); - - return 0; + struct vbox_private *vbox = pci_get_drvdata(pdev); + + drm_dev_unregister(&vbox->ddev); + vbox_fbdev_fini(vbox); + vbox_irq_fini(vbox); + vbox_mode_fini(vbox); + vbox_mm_fini(vbox); + vbox_hw_fini(vbox); + drm_dev_put(&vbox->ddev); } static int vbox_pm_suspend(struct device *dev) { - struct pci_dev *pdev = to_pci_dev(dev); - struct drm_device *ddev = pci_get_drvdata(pdev); + struct vbox_private *vbox = dev_get_drvdata(dev); int error; - error = vbox_drm_freeze(ddev); + error = drm_mode_config_helper_suspend(&vbox->ddev); if (error) return error; - pci_disable_device(pdev); - pci_set_power_state(pdev, PCI_D3hot); + pci_save_state(vbox->ddev.pdev); + pci_disable_device(vbox->ddev.pdev); + pci_set_power_state(vbox->ddev.pdev, PCI_D3hot); return 0; } static int vbox_pm_resume(struct device *dev) { - struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); + struct vbox_private *vbox = dev_get_drvdata(dev); + + if (pci_enable_device(vbox->ddev.pdev)) + return -EIO; - return vbox_drm_resume(ddev); + return drm_mode_config_helper_resume(&vbox->ddev); } static int vbox_pm_freeze(struct device *dev) { - struct pci_dev *pdev = to_pci_dev(dev); - struct drm_device *ddev = pci_get_drvdata(pdev); - - if (!ddev || !ddev->dev_private) - return -ENODEV; + struct vbox_private *vbox = dev_get_drvdata(dev); - return vbox_drm_freeze(ddev); + return drm_mode_config_helper_suspend(&vbox->ddev); } static int vbox_pm_thaw(struct device *dev) { - struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); + struct vbox_private *vbox = dev_get_drvdata(dev); - return vbox_drm_thaw(ddev); + return drm_mode_config_helper_resume(&vbox->ddev); } static int vbox_pm_poweroff(struct device *dev) { - struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); + struct vbox_private *vbox = dev_get_drvdata(dev); - return vbox_drm_freeze(ddev); + return drm_mode_config_helper_suspend(&vbox->ddev); } static const struct dev_pm_ops vbox_pm_ops = { @@ -259,10 +260,10 @@ static void vbox_master_drop(struct drm_device *dev, struct drm_file *file_priv) static struct drm_driver driver = { .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | - DRIVER_PRIME, + DRIVER_PRIME | DRIVER_ATOMIC, .dev_priv_size = 0, - .lastclose = vbox_driver_lastclose, + .lastclose = drm_fb_helper_lastclose, .master_set = vbox_master_set, .master_drop = vbox_master_drop, diff --git a/drivers/staging/vboxvideo/vbox_drv.h b/drivers/staging/vboxvideo/vbox_drv.h index 594f84272957..73395a7536c5 100644 --- a/drivers/staging/vboxvideo/vbox_drv.h +++ b/drivers/staging/vboxvideo/vbox_drv.h @@ -72,10 +72,16 @@ sizeof(struct hgsmi_host_flags)) #define HOST_FLAGS_OFFSET GUEST_HEAP_USABLE_SIZE -struct vbox_fbdev; +struct vbox_framebuffer { + struct drm_framebuffer base; + struct drm_gem_object *obj; +}; struct vbox_private { - struct drm_device *dev; + /* Must be first; or we must define our own release callback */ + struct drm_device ddev; + struct drm_fb_helper fb_helper; + struct vbox_framebuffer afb; u8 __iomem *guest_heap; u8 __iomem *vbva_buffers; @@ -90,8 +96,6 @@ struct vbox_private { /** Array of structures for receiving mode hints. */ struct vbva_modehint *last_mode_hints; - struct vbox_fbdev *fbdev; - int fb_mtrr; struct { @@ -115,21 +119,12 @@ struct vbox_private { * encompassing all screen ones or is the fbdev console active? */ bool single_framebuffer; - u32 cursor_width; - u32 cursor_height; - u32 cursor_hot_x; - u32 cursor_hot_y; - size_t cursor_data_size; u8 cursor_data[CURSOR_DATA_SIZE]; }; #undef CURSOR_PIXEL_COUNT #undef CURSOR_DATA_SIZE -int vbox_driver_load(struct drm_device *dev); -void vbox_driver_unload(struct drm_device *dev); -void vbox_driver_lastclose(struct drm_device *dev); - struct vbox_gem_object; struct vbox_connector { @@ -145,43 +140,51 @@ struct vbox_connector { struct vbox_crtc { struct drm_crtc base; - bool blanked; bool disconnected; unsigned int crtc_id; u32 fb_offset; bool cursor_enabled; u32 x_hint; u32 y_hint; + /* + * When setting a mode we not only pass the mode to the hypervisor, + * but also information on how to map / translate input coordinates + * for the emulated USB tablet. This input-mapping may change when + * the mode on *another* crtc changes. + * + * This means that sometimes we must do a modeset on other crtc-s then + * the one being changed to update the input-mapping. Including crtc-s + * which may be disabled inside the guest (shown as a black window + * on the host unless closed by the user). + * + * With atomic modesetting the mode-info of disabled crtcs gets zeroed + * yet we need it when updating the input-map to avoid resizing the + * window as a side effect of a mode_set on another crtc. Therefor we + * cache the info of the last mode below. + */ + u32 width; + u32 height; + u32 x; + u32 y; }; struct vbox_encoder { struct drm_encoder base; }; -struct vbox_framebuffer { - struct drm_framebuffer base; - struct drm_gem_object *obj; -}; - -struct vbox_fbdev { - struct drm_fb_helper helper; - struct vbox_framebuffer afb; - int size; - struct ttm_bo_kmap_obj mapping; - int x1, y1, x2, y2; /* dirty rect */ - spinlock_t dirty_lock; -}; - #define to_vbox_crtc(x) container_of(x, struct vbox_crtc, base) #define to_vbox_connector(x) container_of(x, struct vbox_connector, base) #define to_vbox_encoder(x) container_of(x, struct vbox_encoder, base) #define to_vbox_framebuffer(x) container_of(x, struct vbox_framebuffer, base) -int vbox_mode_init(struct drm_device *dev); -void vbox_mode_fini(struct drm_device *dev); +bool vbox_check_supported(u16 id); +int vbox_hw_init(struct vbox_private *vbox); +void vbox_hw_fini(struct vbox_private *vbox); + +int vbox_mode_init(struct vbox_private *vbox); +void vbox_mode_fini(struct vbox_private *vbox); #define DRM_MODE_FB_CMD drm_mode_fb_cmd2 -#define CRTC_FB(crtc) ((crtc)->primary->fb) void vbox_enable_accel(struct vbox_private *vbox); void vbox_disable_accel(struct vbox_private *vbox); @@ -191,14 +194,14 @@ void vbox_framebuffer_dirty_rectangles(struct drm_framebuffer *fb, struct drm_clip_rect *rects, unsigned int num_rects); -int vbox_framebuffer_init(struct drm_device *dev, +int vbox_framebuffer_init(struct vbox_private *vbox, struct vbox_framebuffer *vbox_fb, const struct DRM_MODE_FB_CMD *mode_cmd, struct drm_gem_object *obj); -int vbox_fbdev_init(struct drm_device *dev); -void vbox_fbdev_fini(struct drm_device *dev); -void vbox_fbdev_set_base(struct vbox_private *vbox, unsigned long gpu_addr); +int vboxfb_create(struct drm_fb_helper *helper, + struct drm_fb_helper_surface_size *sizes); +void vbox_fbdev_fini(struct vbox_private *vbox); struct vbox_bo { struct ttm_buffer_object bo; @@ -218,6 +221,11 @@ static inline struct vbox_bo *vbox_bo(struct ttm_buffer_object *bo) #define to_vbox_obj(x) container_of(x, struct vbox_gem_object, base) +static inline u64 vbox_bo_gpu_offset(struct vbox_bo *bo) +{ + return bo->bo.offset; +} + int vbox_dumb_create(struct drm_file *file, struct drm_device *dev, struct drm_mode_create_dumb *args); @@ -232,13 +240,13 @@ int vbox_dumb_mmap_offset(struct drm_file *file, int vbox_mm_init(struct vbox_private *vbox); void vbox_mm_fini(struct vbox_private *vbox); -int vbox_bo_create(struct drm_device *dev, int size, int align, +int vbox_bo_create(struct vbox_private *vbox, int size, int align, u32 flags, struct vbox_bo **pvboxbo); -int vbox_gem_create(struct drm_device *dev, +int vbox_gem_create(struct vbox_private *vbox, u32 size, bool iskernel, struct drm_gem_object **obj); -int vbox_bo_pin(struct vbox_bo *bo, u32 pl_flag, u64 *gpu_addr); +int vbox_bo_pin(struct vbox_bo *bo, u32 pl_flag); int vbox_bo_unpin(struct vbox_bo *bo); static inline int vbox_bo_reserve(struct vbox_bo *bo, bool no_wait) @@ -262,6 +270,8 @@ static inline void vbox_bo_unreserve(struct vbox_bo *bo) void vbox_ttm_placement(struct vbox_bo *bo, int domain); int vbox_bo_push_sysram(struct vbox_bo *bo); int vbox_mmap(struct file *filp, struct vm_area_struct *vma); +void *vbox_bo_kmap(struct vbox_bo *bo); +void vbox_bo_kunmap(struct vbox_bo *bo); /* vbox_prime.c */ int vbox_gem_prime_pin(struct drm_gem_object *obj); diff --git a/drivers/staging/vboxvideo/vbox_fb.c b/drivers/staging/vboxvideo/vbox_fb.c index 034f8ffa8f20..d1a1f74c8de3 100644 --- a/drivers/staging/vboxvideo/vbox_fb.c +++ b/drivers/staging/vboxvideo/vbox_fb.c @@ -66,38 +66,19 @@ static struct fb_ops vboxfb_ops = { .fb_debug_leave = drm_fb_helper_debug_leave, }; -static int vboxfb_create_object(struct vbox_fbdev *fbdev, - struct DRM_MODE_FB_CMD *mode_cmd, - struct drm_gem_object **gobj_p) +int vboxfb_create(struct drm_fb_helper *helper, + struct drm_fb_helper_surface_size *sizes) { - struct drm_device *dev = fbdev->helper.dev; - u32 size; - struct drm_gem_object *gobj; - u32 pitch = mode_cmd->pitches[0]; - int ret; - - size = pitch * mode_cmd->height; - ret = vbox_gem_create(dev, size, true, &gobj); - if (ret) - return ret; - - *gobj_p = gobj; - - return 0; -} - -static int vboxfb_create(struct drm_fb_helper *helper, - struct drm_fb_helper_surface_size *sizes) -{ - struct vbox_fbdev *fbdev = - container_of(helper, struct vbox_fbdev, helper); - struct drm_device *dev = fbdev->helper.dev; + struct vbox_private *vbox = + container_of(helper, struct vbox_private, fb_helper); + struct pci_dev *pdev = vbox->ddev.pdev; struct DRM_MODE_FB_CMD mode_cmd; struct drm_framebuffer *fb; struct fb_info *info; struct drm_gem_object *gobj; struct vbox_bo *bo; int size, ret; + u64 gpu_addr; u32 pitch; mode_cmd.width = sizes->surface_width; @@ -109,45 +90,35 @@ static int vboxfb_create(struct drm_fb_helper *helper, size = pitch * mode_cmd.height; - ret = vboxfb_create_object(fbdev, &mode_cmd, &gobj); + ret = vbox_gem_create(vbox, size, true, &gobj); if (ret) { DRM_ERROR("failed to create fbcon backing object %d\n", ret); return ret; } - ret = vbox_framebuffer_init(dev, &fbdev->afb, &mode_cmd, gobj); + ret = vbox_framebuffer_init(vbox, &vbox->afb, &mode_cmd, gobj); if (ret) return ret; bo = gem_to_vbox_bo(gobj); - ret = vbox_bo_reserve(bo, false); + ret = vbox_bo_pin(bo, TTM_PL_FLAG_VRAM); if (ret) return ret; - ret = vbox_bo_pin(bo, TTM_PL_FLAG_VRAM, NULL); - if (ret) { - vbox_bo_unreserve(bo); - return ret; - } - - ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap); - vbox_bo_unreserve(bo); - if (ret) { - DRM_ERROR("failed to kmap fbcon\n"); - return ret; - } - info = drm_fb_helper_alloc_fbi(helper); if (IS_ERR(info)) - return -PTR_ERR(info); + return PTR_ERR(info); - info->par = fbdev; + info->screen_size = size; + info->screen_base = (char __iomem *)vbox_bo_kmap(bo); + if (IS_ERR(info->screen_base)) + return PTR_ERR(info->screen_base); - fbdev->size = size; + info->par = helper; - fb = &fbdev->afb.base; - fbdev->helper.fb = fb; + fb = &vbox->afb.base; + helper->fb = fb; strcpy(info->fix.id, "vboxdrmfb"); @@ -162,15 +133,16 @@ static int vboxfb_create(struct drm_fb_helper *helper, * This seems to be done for safety checking that the framebuffer * is not registered twice by different drivers. */ - info->apertures->ranges[0].base = pci_resource_start(dev->pdev, 0); - info->apertures->ranges[0].size = pci_resource_len(dev->pdev, 0); + info->apertures->ranges[0].base = pci_resource_start(pdev, 0); + info->apertures->ranges[0].size = pci_resource_len(pdev, 0); drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth); - drm_fb_helper_fill_var(info, &fbdev->helper, sizes->fb_width, + drm_fb_helper_fill_var(info, helper, sizes->fb_width, sizes->fb_height); - info->screen_base = (char __iomem *)bo->kmap.virtual; - info->screen_size = size; + gpu_addr = vbox_bo_gpu_offset(bo); + info->fix.smem_start = info->apertures->ranges[0].base + gpu_addr; + info->fix.smem_len = vbox->available_vram_size - gpu_addr; #ifdef CONFIG_DRM_KMS_FB_HELPER info->fbdefio = &vbox_defio; @@ -184,86 +156,30 @@ static int vboxfb_create(struct drm_fb_helper *helper, return 0; } -static struct drm_fb_helper_funcs vbox_fb_helper_funcs = { - .fb_probe = vboxfb_create, -}; - -void vbox_fbdev_fini(struct drm_device *dev) +void vbox_fbdev_fini(struct vbox_private *vbox) { - struct vbox_private *vbox = dev->dev_private; - struct vbox_fbdev *fbdev = vbox->fbdev; - struct vbox_framebuffer *afb = &fbdev->afb; + struct vbox_framebuffer *afb = &vbox->afb; #ifdef CONFIG_DRM_KMS_FB_HELPER - if (fbdev->helper.fbdev && fbdev->helper.fbdev->fbdefio) - fb_deferred_io_cleanup(fbdev->helper.fbdev); + if (vbox->fb_helper.fbdev && vbox->fb_helper.fbdev->fbdefio) + fb_deferred_io_cleanup(vbox->fb_helper.fbdev); #endif - drm_fb_helper_unregister_fbi(&fbdev->helper); + drm_fb_helper_unregister_fbi(&vbox->fb_helper); if (afb->obj) { struct vbox_bo *bo = gem_to_vbox_bo(afb->obj); - if (!vbox_bo_reserve(bo, false)) { - if (bo->kmap.virtual) - ttm_bo_kunmap(&bo->kmap); - /* - * QXL does this, but is it really needed before - * freeing? - */ - if (bo->pin_count) - vbox_bo_unpin(bo); - vbox_bo_unreserve(bo); - } + vbox_bo_kunmap(bo); + + if (bo->pin_count) + vbox_bo_unpin(bo); + drm_gem_object_put_unlocked(afb->obj); afb->obj = NULL; } - drm_fb_helper_fini(&fbdev->helper); + drm_fb_helper_fini(&vbox->fb_helper); drm_framebuffer_unregister_private(&afb->base); drm_framebuffer_cleanup(&afb->base); } - -int vbox_fbdev_init(struct drm_device *dev) -{ - struct vbox_private *vbox = dev->dev_private; - struct vbox_fbdev *fbdev; - int ret; - - fbdev = devm_kzalloc(dev->dev, sizeof(*fbdev), GFP_KERNEL); - if (!fbdev) - return -ENOMEM; - - vbox->fbdev = fbdev; - spin_lock_init(&fbdev->dirty_lock); - - drm_fb_helper_prepare(dev, &fbdev->helper, &vbox_fb_helper_funcs); - ret = drm_fb_helper_init(dev, &fbdev->helper, vbox->num_crtcs); - if (ret) - return ret; - - ret = drm_fb_helper_single_add_all_connectors(&fbdev->helper); - if (ret) - goto err_fini; - - /* disable all the possible outputs/crtcs before entering KMS mode */ - drm_helper_disable_unused_functions(dev); - - ret = drm_fb_helper_initial_config(&fbdev->helper, 32); - if (ret) - goto err_fini; - - return 0; - -err_fini: - drm_fb_helper_fini(&fbdev->helper); - return ret; -} - -void vbox_fbdev_set_base(struct vbox_private *vbox, unsigned long gpu_addr) -{ - struct fb_info *fbdev = vbox->fbdev->helper.fbdev; - - fbdev->fix.smem_start = fbdev->apertures->ranges[0].base + gpu_addr; - fbdev->fix.smem_len = vbox->available_vram_size - gpu_addr; -} diff --git a/drivers/staging/vboxvideo/vbox_irq.c b/drivers/staging/vboxvideo/vbox_irq.c index 74abdf02d9fd..09f858ec1369 100644 --- a/drivers/staging/vboxvideo/vbox_irq.c +++ b/drivers/staging/vboxvideo/vbox_irq.c @@ -123,7 +123,7 @@ static void validate_or_set_position_hints(struct vbox_private *vbox) */ static void vbox_update_mode_hints(struct vbox_private *vbox) { - struct drm_device *dev = vbox->dev; + struct drm_device *dev = &vbox->ddev; struct drm_connector *connector; struct vbox_connector *vbox_conn; struct vbva_modehint *hints; @@ -179,7 +179,7 @@ static void vbox_hotplug_worker(struct work_struct *work) hotplug_work); vbox_update_mode_hints(vbox); - drm_kms_helper_hotplug_event(vbox->dev); + drm_kms_helper_hotplug_event(&vbox->ddev); } int vbox_irq_init(struct vbox_private *vbox) @@ -187,11 +187,11 @@ int vbox_irq_init(struct vbox_private *vbox) INIT_WORK(&vbox->hotplug_work, vbox_hotplug_worker); vbox_update_mode_hints(vbox); - return drm_irq_install(vbox->dev, vbox->dev->pdev->irq); + return drm_irq_install(&vbox->ddev, vbox->ddev.pdev->irq); } void vbox_irq_fini(struct vbox_private *vbox) { - drm_irq_uninstall(vbox->dev); + drm_irq_uninstall(&vbox->ddev); flush_work(&vbox->hotplug_work); } diff --git a/drivers/staging/vboxvideo/vbox_main.c b/drivers/staging/vboxvideo/vbox_main.c index 429f6a453619..7466c1103ff6 100644 --- a/drivers/staging/vboxvideo/vbox_main.c +++ b/drivers/staging/vboxvideo/vbox_main.c @@ -102,24 +102,30 @@ void vbox_framebuffer_dirty_rectangles(struct drm_framebuffer *fb, unsigned int num_rects) { struct vbox_private *vbox = fb->dev->dev_private; + struct drm_display_mode *mode; struct drm_crtc *crtc; + int crtc_x, crtc_y; unsigned int i; mutex_lock(&vbox->hw_mutex); list_for_each_entry(crtc, &fb->dev->mode_config.crtc_list, head) { - if (CRTC_FB(crtc) != fb) + if (crtc->primary->state->fb != fb) continue; + mode = &crtc->state->mode; + crtc_x = crtc->primary->state->src_x >> 16; + crtc_y = crtc->primary->state->src_y >> 16; + vbox_enable_accel(vbox); for (i = 0; i < num_rects; ++i) { struct vbva_cmd_hdr cmd_hdr; unsigned int crtc_id = to_vbox_crtc(crtc)->crtc_id; - if ((rects[i].x1 > crtc->x + crtc->hwmode.hdisplay) || - (rects[i].y1 > crtc->y + crtc->hwmode.vdisplay) || - (rects[i].x2 < crtc->x) || - (rects[i].y2 < crtc->y)) + if ((rects[i].x1 > crtc_x + mode->hdisplay) || + (rects[i].y1 > crtc_y + mode->vdisplay) || + (rects[i].x2 < crtc_x) || + (rects[i].y2 < crtc_y)) continue; cmd_hdr.x = (s16)rects[i].x1; @@ -155,16 +161,16 @@ static const struct drm_framebuffer_funcs vbox_fb_funcs = { .dirty = vbox_user_framebuffer_dirty, }; -int vbox_framebuffer_init(struct drm_device *dev, +int vbox_framebuffer_init(struct vbox_private *vbox, struct vbox_framebuffer *vbox_fb, const struct DRM_MODE_FB_CMD *mode_cmd, struct drm_gem_object *obj) { int ret; - drm_helper_mode_fill_fb_struct(dev, &vbox_fb->base, mode_cmd); + drm_helper_mode_fill_fb_struct(&vbox->ddev, &vbox_fb->base, mode_cmd); vbox_fb->obj = obj; - ret = drm_framebuffer_init(dev, &vbox_fb->base, &vbox_fb_funcs); + ret = drm_framebuffer_init(&vbox->ddev, &vbox_fb->base, &vbox_fb_funcs); if (ret) { DRM_ERROR("framebuffer init failed %d\n", ret); return ret; @@ -173,45 +179,11 @@ int vbox_framebuffer_init(struct drm_device *dev, return 0; } -static struct drm_framebuffer *vbox_user_framebuffer_create( - struct drm_device *dev, - struct drm_file *filp, - const struct drm_mode_fb_cmd2 *mode_cmd) -{ - struct drm_gem_object *obj; - struct vbox_framebuffer *vbox_fb; - int ret = -ENOMEM; - - obj = drm_gem_object_lookup(filp, mode_cmd->handles[0]); - if (!obj) - return ERR_PTR(-ENOENT); - - vbox_fb = kzalloc(sizeof(*vbox_fb), GFP_KERNEL); - if (!vbox_fb) - goto err_unref_obj; - - ret = vbox_framebuffer_init(dev, vbox_fb, mode_cmd, obj); - if (ret) - goto err_free_vbox_fb; - - return &vbox_fb->base; - -err_free_vbox_fb: - kfree(vbox_fb); -err_unref_obj: - drm_gem_object_put_unlocked(obj); - return ERR_PTR(ret); -} - -static const struct drm_mode_config_funcs vbox_mode_funcs = { - .fb_create = vbox_user_framebuffer_create, -}; - static int vbox_accel_init(struct vbox_private *vbox) { unsigned int i; - vbox->vbva_info = devm_kcalloc(vbox->dev->dev, vbox->num_crtcs, + vbox->vbva_info = devm_kcalloc(vbox->ddev.dev, vbox->num_crtcs, sizeof(*vbox->vbva_info), GFP_KERNEL); if (!vbox->vbva_info) return -ENOMEM; @@ -219,7 +191,7 @@ static int vbox_accel_init(struct vbox_private *vbox) /* Take a command buffer for each screen from the end of usable VRAM. */ vbox->available_vram_size -= vbox->num_crtcs * VBVA_MIN_BUFFER_SIZE; - vbox->vbva_buffers = pci_iomap_range(vbox->dev->pdev, 0, + vbox->vbva_buffers = pci_iomap_range(vbox->ddev.pdev, 0, vbox->available_vram_size, vbox->num_crtcs * VBVA_MIN_BUFFER_SIZE); @@ -238,7 +210,7 @@ static int vbox_accel_init(struct vbox_private *vbox) static void vbox_accel_fini(struct vbox_private *vbox) { vbox_disable_accel(vbox); - pci_iounmap(vbox->dev->pdev, vbox->vbva_buffers); + pci_iounmap(vbox->ddev.pdev, vbox->vbva_buffers); } /** Do we support the 4.3 plus mode hint reporting interface? */ @@ -262,7 +234,7 @@ static bool have_hgsmi_mode_hints(struct vbox_private *vbox) return have_hints == VINF_SUCCESS && have_cursor == VINF_SUCCESS; } -static bool vbox_check_supported(u16 id) +bool vbox_check_supported(u16 id) { u16 dispi_id; @@ -276,7 +248,7 @@ static bool vbox_check_supported(u16 id) * Set up our heaps and data exchange buffers in VRAM before handing the rest * to the memory manager. */ -static int vbox_hw_init(struct vbox_private *vbox) +int vbox_hw_init(struct vbox_private *vbox) { int ret = -ENOMEM; @@ -287,7 +259,7 @@ static int vbox_hw_init(struct vbox_private *vbox) /* Map guest-heap at end of vram */ vbox->guest_heap = - pci_iomap_range(vbox->dev->pdev, 0, GUEST_HEAP_OFFSET(vbox), + pci_iomap_range(vbox->ddev.pdev, 0, GUEST_HEAP_OFFSET(vbox), GUEST_HEAP_SIZE); if (!vbox->guest_heap) return -ENOMEM; @@ -322,7 +294,7 @@ static int vbox_hw_init(struct vbox_private *vbox) goto err_destroy_guest_pool; } - vbox->last_mode_hints = devm_kcalloc(vbox->dev->dev, vbox->num_crtcs, + vbox->last_mode_hints = devm_kcalloc(vbox->ddev.dev, vbox->num_crtcs, sizeof(struct vbva_modehint), GFP_KERNEL); if (!vbox->last_mode_hints) { @@ -339,102 +311,18 @@ static int vbox_hw_init(struct vbox_private *vbox) err_destroy_guest_pool: gen_pool_destroy(vbox->guest_pool); err_unmap_guest_heap: - pci_iounmap(vbox->dev->pdev, vbox->guest_heap); + pci_iounmap(vbox->ddev.pdev, vbox->guest_heap); return ret; } -static void vbox_hw_fini(struct vbox_private *vbox) +void vbox_hw_fini(struct vbox_private *vbox) { vbox_accel_fini(vbox); gen_pool_destroy(vbox->guest_pool); - pci_iounmap(vbox->dev->pdev, vbox->guest_heap); -} - -int vbox_driver_load(struct drm_device *dev) -{ - struct vbox_private *vbox; - int ret = 0; - - if (!vbox_check_supported(VBE_DISPI_ID_HGSMI)) - return -ENODEV; - - vbox = devm_kzalloc(dev->dev, sizeof(*vbox), GFP_KERNEL); - if (!vbox) - return -ENOMEM; - - dev->dev_private = vbox; - vbox->dev = dev; - - mutex_init(&vbox->hw_mutex); - - ret = vbox_hw_init(vbox); - if (ret) - return ret; - - ret = vbox_mm_init(vbox); - if (ret) - goto err_hw_fini; - - drm_mode_config_init(dev); - - dev->mode_config.funcs = (void *)&vbox_mode_funcs; - dev->mode_config.min_width = 64; - dev->mode_config.min_height = 64; - dev->mode_config.preferred_depth = 24; - dev->mode_config.max_width = VBE_DISPI_MAX_XRES; - dev->mode_config.max_height = VBE_DISPI_MAX_YRES; - - ret = vbox_mode_init(dev); - if (ret) - goto err_drm_mode_cleanup; - - ret = vbox_irq_init(vbox); - if (ret) - goto err_mode_fini; - - ret = vbox_fbdev_init(dev); - if (ret) - goto err_irq_fini; - - return 0; - -err_irq_fini: - vbox_irq_fini(vbox); -err_mode_fini: - vbox_mode_fini(dev); -err_drm_mode_cleanup: - drm_mode_config_cleanup(dev); - vbox_mm_fini(vbox); -err_hw_fini: - vbox_hw_fini(vbox); - return ret; -} - -void vbox_driver_unload(struct drm_device *dev) -{ - struct vbox_private *vbox = dev->dev_private; - - vbox_fbdev_fini(dev); - vbox_irq_fini(vbox); - vbox_mode_fini(dev); - drm_mode_config_cleanup(dev); - vbox_mm_fini(vbox); - vbox_hw_fini(vbox); + pci_iounmap(vbox->ddev.pdev, vbox->guest_heap); } -/** - * @note this is described in the DRM framework documentation. AST does not - * have it, but we get an oops on driver unload if it is not present. - */ -void vbox_driver_lastclose(struct drm_device *dev) -{ - struct vbox_private *vbox = dev->dev_private; - - if (vbox->fbdev) - drm_fb_helper_restore_fbdev_mode_unlocked(&vbox->fbdev->helper); -} - -int vbox_gem_create(struct drm_device *dev, +int vbox_gem_create(struct vbox_private *vbox, u32 size, bool iskernel, struct drm_gem_object **obj) { struct vbox_bo *vboxbo; @@ -446,7 +334,7 @@ int vbox_gem_create(struct drm_device *dev, if (size == 0) return -EINVAL; - ret = vbox_bo_create(dev, size, 0, 0, &vboxbo); + ret = vbox_bo_create(vbox, size, 0, 0, &vboxbo); if (ret) { if (ret != -ERESTARTSYS) DRM_ERROR("failed to allocate GEM object\n"); @@ -461,14 +349,16 @@ int vbox_gem_create(struct drm_device *dev, int vbox_dumb_create(struct drm_file *file, struct drm_device *dev, struct drm_mode_create_dumb *args) { - int ret; + struct vbox_private *vbox = + container_of(dev, struct vbox_private, ddev); struct drm_gem_object *gobj; u32 handle; + int ret; args->pitch = args->width * ((args->bpp + 7) / 8); args->size = args->pitch * args->height; - ret = vbox_gem_create(dev, args->size, false, &gobj); + ret = vbox_gem_create(vbox, args->size, false, &gobj); if (ret) return ret; @@ -482,24 +372,11 @@ int vbox_dumb_create(struct drm_file *file, return 0; } -static void vbox_bo_unref(struct vbox_bo **bo) -{ - struct ttm_buffer_object *tbo; - - if ((*bo) == NULL) - return; - - tbo = &((*bo)->bo); - ttm_bo_unref(&tbo); - if (!tbo) - *bo = NULL; -} - void vbox_gem_free_object(struct drm_gem_object *obj) { struct vbox_bo *vbox_bo = gem_to_vbox_bo(obj); - vbox_bo_unref(&vbox_bo); + ttm_bo_put(&vbox_bo->bo); } static inline u64 vbox_bo_mmap_offset(struct vbox_bo *bo) diff --git a/drivers/staging/vboxvideo/vbox_mode.c b/drivers/staging/vboxvideo/vbox_mode.c index 79836c8fb909..6acc965247ff 100644 --- a/drivers/staging/vboxvideo/vbox_mode.c +++ b/drivers/staging/vboxvideo/vbox_mode.c @@ -32,25 +32,22 @@ * Hans de Goede <hdegoede@redhat.com> */ #include <linux/export.h> +#include <drm/drm_atomic.h> #include <drm/drm_crtc_helper.h> #include <drm/drm_plane_helper.h> +#include <drm/drm_atomic_helper.h> #include "vbox_drv.h" #include "vboxvideo.h" #include "hgsmi_channels.h" -static int vbox_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv, - u32 handle, u32 width, u32 height, - s32 hot_x, s32 hot_y); -static int vbox_cursor_move(struct drm_crtc *crtc, int x, int y); - /** * Set a graphics mode. Poke any required values into registers, do an HGSMI * mode set and tell the host we support advanced graphics functions. */ -static void vbox_do_modeset(struct drm_crtc *crtc, - const struct drm_display_mode *mode) +static void vbox_do_modeset(struct drm_crtc *crtc) { + struct drm_framebuffer *fb = crtc->primary->state->fb; struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); struct vbox_private *vbox; int width, height, bpp, pitch; @@ -58,12 +55,12 @@ static void vbox_do_modeset(struct drm_crtc *crtc, s32 x_offset, y_offset; vbox = crtc->dev->dev_private; - width = mode->hdisplay ? mode->hdisplay : 640; - height = mode->vdisplay ? mode->vdisplay : 480; - bpp = crtc->enabled ? CRTC_FB(crtc)->format->cpp[0] * 8 : 32; - pitch = crtc->enabled ? CRTC_FB(crtc)->pitches[0] : width * bpp / 8; - x_offset = vbox->single_framebuffer ? crtc->x : vbox_crtc->x_hint; - y_offset = vbox->single_framebuffer ? crtc->y : vbox_crtc->y_hint; + width = vbox_crtc->width ? vbox_crtc->width : 640; + height = vbox_crtc->height ? vbox_crtc->height : 480; + bpp = fb ? fb->format->cpp[0] * 8 : 32; + pitch = fb ? fb->pitches[0] : width * bpp / 8; + x_offset = vbox->single_framebuffer ? vbox_crtc->x : vbox_crtc->x_hint; + y_offset = vbox->single_framebuffer ? vbox_crtc->y : vbox_crtc->y_hint; /* * This is the old way of setting graphics modes. It assumed one screen @@ -71,31 +68,29 @@ static void vbox_do_modeset(struct drm_crtc *crtc, * VirtualBox, certain parts of the code still assume that the first * screen is programmed this way, so try to fake it. */ - if (vbox_crtc->crtc_id == 0 && crtc->enabled && + if (vbox_crtc->crtc_id == 0 && fb && vbox_crtc->fb_offset / pitch < 0xffff - crtc->y && vbox_crtc->fb_offset % (bpp / 8) == 0) { vbox_write_ioport(VBE_DISPI_INDEX_XRES, width); vbox_write_ioport(VBE_DISPI_INDEX_YRES, height); vbox_write_ioport(VBE_DISPI_INDEX_VIRT_WIDTH, pitch * 8 / bpp); - vbox_write_ioport(VBE_DISPI_INDEX_BPP, - CRTC_FB(crtc)->format->cpp[0] * 8); + vbox_write_ioport(VBE_DISPI_INDEX_BPP, bpp); vbox_write_ioport(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED); vbox_write_ioport( VBE_DISPI_INDEX_X_OFFSET, - vbox_crtc->fb_offset % pitch / bpp * 8 + crtc->x); + vbox_crtc->fb_offset % pitch / bpp * 8 + vbox_crtc->x); vbox_write_ioport(VBE_DISPI_INDEX_Y_OFFSET, - vbox_crtc->fb_offset / pitch + crtc->y); + vbox_crtc->fb_offset / pitch + vbox_crtc->y); } flags = VBVA_SCREEN_F_ACTIVE; - flags |= (crtc->enabled && !vbox_crtc->blanked) ? - 0 : VBVA_SCREEN_F_BLANK; + flags |= (fb && crtc->state->active) ? 0 : VBVA_SCREEN_F_BLANK; flags |= vbox_crtc->disconnected ? VBVA_SCREEN_F_DISABLED : 0; hgsmi_process_display_info(vbox->guest_pool, vbox_crtc->crtc_id, x_offset, y_offset, - crtc->x * bpp / 8 + crtc->y * pitch, - pitch, width, height, - vbox_crtc->blanked ? 0 : bpp, flags); + vbox_crtc->x * bpp / 8 + + vbox_crtc->y * pitch, + pitch, width, height, bpp, flags); } static int vbox_set_view(struct drm_crtc *crtc) @@ -132,34 +127,6 @@ static int vbox_set_view(struct drm_crtc *crtc) return 0; } -static void vbox_crtc_dpms(struct drm_crtc *crtc, int mode) -{ - struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); - struct vbox_private *vbox = crtc->dev->dev_private; - - switch (mode) { - case DRM_MODE_DPMS_ON: - vbox_crtc->blanked = false; - break; - case DRM_MODE_DPMS_STANDBY: - case DRM_MODE_DPMS_SUSPEND: - case DRM_MODE_DPMS_OFF: - vbox_crtc->blanked = true; - break; - } - - mutex_lock(&vbox->hw_mutex); - vbox_do_modeset(crtc, &crtc->hwmode); - mutex_unlock(&vbox->hw_mutex); -} - -static bool vbox_crtc_mode_fixup(struct drm_crtc *crtc, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ - return true; -} - /* * Try to map the layout of virtual screens to the range of the input device. * Return true if we need to re-set the crtc modes due to screen offset @@ -169,7 +136,7 @@ static bool vbox_set_up_input_mapping(struct vbox_private *vbox) { struct drm_crtc *crtci; struct drm_connector *connectori; - struct drm_framebuffer *fb1 = NULL; + struct drm_framebuffer *fb, *fb1 = NULL; bool single_framebuffer = true; bool old_single_framebuffer = vbox->single_framebuffer; u16 width = 0, height = 0; @@ -179,30 +146,30 @@ static bool vbox_set_up_input_mapping(struct vbox_private *vbox) * If so then screen layout can be deduced from the crtc offsets. * Same fall-back if this is the fbdev frame-buffer. */ - list_for_each_entry(crtci, &vbox->dev->mode_config.crtc_list, head) { + list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, head) { + fb = crtci->primary->state->fb; + if (!fb) + continue; + if (!fb1) { - fb1 = CRTC_FB(crtci); - if (to_vbox_framebuffer(fb1) == &vbox->fbdev->afb) + fb1 = fb; + if (to_vbox_framebuffer(fb1) == &vbox->afb) break; - } else if (CRTC_FB(crtci) && fb1 != CRTC_FB(crtci)) { + } else if (fb != fb1) { single_framebuffer = false; } } - if (single_framebuffer) { - list_for_each_entry(crtci, &vbox->dev->mode_config.crtc_list, - head) { - if (to_vbox_crtc(crtci)->crtc_id != 0) - continue; + if (!fb1) + return false; - vbox->single_framebuffer = true; - vbox->input_mapping_width = CRTC_FB(crtci)->width; - vbox->input_mapping_height = CRTC_FB(crtci)->height; - return old_single_framebuffer != - vbox->single_framebuffer; - } + if (single_framebuffer) { + vbox->single_framebuffer = true; + vbox->input_mapping_width = fb1->width; + vbox->input_mapping_height = fb1->height; + return old_single_framebuffer != vbox->single_framebuffer; } /* Otherwise calculate the total span of all screens. */ - list_for_each_entry(connectori, &vbox->dev->mode_config.connector_list, + list_for_each_entry(connectori, &vbox->ddev.mode_config.connector_list, head) { struct vbox_connector *vbox_connector = to_vbox_connector(connectori); @@ -221,180 +188,462 @@ static bool vbox_set_up_input_mapping(struct vbox_private *vbox) return old_single_framebuffer != vbox->single_framebuffer; } -static int vbox_crtc_do_set_base(struct drm_crtc *crtc, - struct drm_framebuffer *old_fb, - struct drm_framebuffer *new_fb, - int x, int y) +static void vbox_crtc_set_base_and_mode(struct drm_crtc *crtc, + struct drm_framebuffer *fb, + struct drm_display_mode *mode, + int x, int y) { + struct vbox_bo *bo = gem_to_vbox_bo(to_vbox_framebuffer(fb)->obj); struct vbox_private *vbox = crtc->dev->dev_private; struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); - struct drm_gem_object *obj; - struct vbox_framebuffer *vbox_fb; - struct vbox_bo *bo; - int ret; - u64 gpu_addr; - - /* Unpin the previous fb. */ - if (old_fb) { - vbox_fb = to_vbox_framebuffer(old_fb); - obj = vbox_fb->obj; - bo = gem_to_vbox_bo(obj); - ret = vbox_bo_reserve(bo, false); - if (ret) - return ret; + bool needs_modeset = drm_atomic_crtc_needs_modeset(crtc->state); + + mutex_lock(&vbox->hw_mutex); - vbox_bo_unpin(bo); - vbox_bo_unreserve(bo); + vbox_crtc->width = mode->hdisplay; + vbox_crtc->height = mode->vdisplay; + vbox_crtc->x = x; + vbox_crtc->y = y; + vbox_crtc->fb_offset = vbox_bo_gpu_offset(bo); + + /* vbox_do_modeset() checks vbox->single_framebuffer so update it now */ + if (needs_modeset && vbox_set_up_input_mapping(vbox)) { + struct drm_crtc *crtci; + + list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, + head) { + if (crtci == crtc) + continue; + vbox_do_modeset(crtci); + } } - vbox_fb = to_vbox_framebuffer(new_fb); - obj = vbox_fb->obj; - bo = gem_to_vbox_bo(obj); + vbox_set_view(crtc); + vbox_do_modeset(crtc); - ret = vbox_bo_reserve(bo, false); - if (ret) - return ret; + if (needs_modeset) + hgsmi_update_input_mapping(vbox->guest_pool, 0, 0, + vbox->input_mapping_width, + vbox->input_mapping_height); - ret = vbox_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); - if (ret) { - vbox_bo_unreserve(bo); - return ret; + mutex_unlock(&vbox->hw_mutex); +} + +static void vbox_crtc_atomic_enable(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state) +{ +} + +static void vbox_crtc_atomic_disable(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state) +{ +} + +static void vbox_crtc_atomic_flush(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state) +{ + struct drm_pending_vblank_event *event; + unsigned long flags; + + if (crtc->state && crtc->state->event) { + event = crtc->state->event; + crtc->state->event = NULL; + + spin_lock_irqsave(&crtc->dev->event_lock, flags); + drm_crtc_send_vblank_event(crtc, event); + spin_unlock_irqrestore(&crtc->dev->event_lock, flags); } +} - if (&vbox->fbdev->afb == vbox_fb) - vbox_fbdev_set_base(vbox, gpu_addr); - vbox_bo_unreserve(bo); +static const struct drm_crtc_helper_funcs vbox_crtc_helper_funcs = { + .atomic_enable = vbox_crtc_atomic_enable, + .atomic_disable = vbox_crtc_atomic_disable, + .atomic_flush = vbox_crtc_atomic_flush, +}; - /* vbox_set_start_address_crt1(crtc, (u32)gpu_addr); */ - vbox_crtc->fb_offset = gpu_addr; - if (vbox_set_up_input_mapping(vbox)) { - struct drm_crtc *crtci; +static void vbox_crtc_destroy(struct drm_crtc *crtc) +{ + drm_crtc_cleanup(crtc); + kfree(crtc); +} - list_for_each_entry(crtci, &vbox->dev->mode_config.crtc_list, - head) { - vbox_set_view(crtc); - vbox_do_modeset(crtci, &crtci->mode); - } +static const struct drm_crtc_funcs vbox_crtc_funcs = { + .set_config = drm_atomic_helper_set_config, + .page_flip = drm_atomic_helper_page_flip, + /* .gamma_set = vbox_crtc_gamma_set, */ + .destroy = vbox_crtc_destroy, + .reset = drm_atomic_helper_crtc_reset, + .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, +}; + +static int vbox_primary_atomic_check(struct drm_plane *plane, + struct drm_plane_state *new_state) +{ + struct drm_crtc_state *crtc_state = NULL; + + if (new_state->crtc) { + crtc_state = drm_atomic_get_existing_crtc_state( + new_state->state, new_state->crtc); + if (WARN_ON(!crtc_state)) + return -EINVAL; } - return 0; + return drm_atomic_helper_check_plane_state(new_state, crtc_state, + DRM_PLANE_HELPER_NO_SCALING, + DRM_PLANE_HELPER_NO_SCALING, + false, true); } -static int vbox_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb) +static void vbox_primary_atomic_update(struct drm_plane *plane, + struct drm_plane_state *old_state) { - return vbox_crtc_do_set_base(crtc, old_fb, CRTC_FB(crtc), x, y); + struct drm_crtc *crtc = plane->state->crtc; + struct drm_framebuffer *fb = plane->state->fb; + + vbox_crtc_set_base_and_mode(crtc, fb, &crtc->state->mode, + plane->state->src_x >> 16, + plane->state->src_y >> 16); } -static int vbox_crtc_mode_set(struct drm_crtc *crtc, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode, - int x, int y, struct drm_framebuffer *old_fb) +static void vbox_primary_atomic_disable(struct drm_plane *plane, + struct drm_plane_state *old_state) { - struct vbox_private *vbox = crtc->dev->dev_private; + struct drm_crtc *crtc = old_state->crtc; + + /* vbox_do_modeset checks plane->state->fb and will disable if NULL */ + vbox_crtc_set_base_and_mode(crtc, old_state->fb, &crtc->state->mode, + old_state->src_x >> 16, + old_state->src_y >> 16); +} + +static int vbox_primary_prepare_fb(struct drm_plane *plane, + struct drm_plane_state *new_state) +{ + struct vbox_bo *bo; int ret; - vbox_crtc_mode_set_base(crtc, x, y, old_fb); + if (!new_state->fb) + return 0; - mutex_lock(&vbox->hw_mutex); - ret = vbox_set_view(crtc); - if (!ret) - vbox_do_modeset(crtc, mode); - hgsmi_update_input_mapping(vbox->guest_pool, 0, 0, - vbox->input_mapping_width, - vbox->input_mapping_height); - mutex_unlock(&vbox->hw_mutex); + bo = gem_to_vbox_bo(to_vbox_framebuffer(new_state->fb)->obj); + ret = vbox_bo_pin(bo, TTM_PL_FLAG_VRAM); + if (ret) + DRM_WARN("Error %d pinning new fb, out of video mem?\n", ret); return ret; } -static int vbox_crtc_page_flip(struct drm_crtc *crtc, - struct drm_framebuffer *fb, - struct drm_pending_vblank_event *event, - uint32_t page_flip_flags, - struct drm_modeset_acquire_ctx *ctx) +static void vbox_primary_cleanup_fb(struct drm_plane *plane, + struct drm_plane_state *old_state) { - struct vbox_private *vbox = crtc->dev->dev_private; - struct drm_device *drm = vbox->dev; - unsigned long flags; - int rc; + struct vbox_bo *bo; - rc = vbox_crtc_do_set_base(crtc, CRTC_FB(crtc), fb, 0, 0); - if (rc) - return rc; + if (!old_state->fb) + return; - mutex_lock(&vbox->hw_mutex); - vbox_set_view(crtc); - vbox_do_modeset(crtc, &crtc->mode); - mutex_unlock(&vbox->hw_mutex); + bo = gem_to_vbox_bo(to_vbox_framebuffer(old_state->fb)->obj); + vbox_bo_unpin(bo); +} - spin_lock_irqsave(&drm->event_lock, flags); +static int vbox_cursor_atomic_check(struct drm_plane *plane, + struct drm_plane_state *new_state) +{ + struct drm_crtc_state *crtc_state = NULL; + u32 width = new_state->crtc_w; + u32 height = new_state->crtc_h; + int ret; - if (event) - drm_crtc_send_vblank_event(crtc, event); + if (new_state->crtc) { + crtc_state = drm_atomic_get_existing_crtc_state( + new_state->state, new_state->crtc); + if (WARN_ON(!crtc_state)) + return -EINVAL; + } - spin_unlock_irqrestore(&drm->event_lock, flags); + ret = drm_atomic_helper_check_plane_state(new_state, crtc_state, + DRM_PLANE_HELPER_NO_SCALING, + DRM_PLANE_HELPER_NO_SCALING, + true, true); + if (ret) + return ret; + + if (!new_state->fb) + return 0; + + if (width > VBOX_MAX_CURSOR_WIDTH || height > VBOX_MAX_CURSOR_HEIGHT || + width == 0 || height == 0) + return -EINVAL; return 0; } -static void vbox_crtc_disable(struct drm_crtc *crtc) +/** + * Copy the ARGB image and generate the mask, which is needed in case the host + * does not support ARGB cursors. The mask is a 1BPP bitmap with the bit set + * if the corresponding alpha value in the ARGB image is greater than 0xF0. + */ +static void copy_cursor_image(u8 *src, u8 *dst, u32 width, u32 height, + size_t mask_size) { + size_t line_size = (width + 7) / 8; + u32 i, j; + + memcpy(dst + mask_size, src, width * height * 4); + for (i = 0; i < height; ++i) + for (j = 0; j < width; ++j) + if (((u32 *)src)[i * width + j] > 0xf0000000) + dst[i * line_size + j / 8] |= (0x80 >> (j % 8)); } -static void vbox_crtc_prepare(struct drm_crtc *crtc) +static void vbox_cursor_atomic_update(struct drm_plane *plane, + struct drm_plane_state *old_state) { + struct vbox_private *vbox = + container_of(plane->dev, struct vbox_private, ddev); + struct vbox_crtc *vbox_crtc = to_vbox_crtc(plane->state->crtc); + struct drm_framebuffer *fb = plane->state->fb; + struct vbox_bo *bo = gem_to_vbox_bo(to_vbox_framebuffer(fb)->obj); + u32 width = plane->state->crtc_w; + u32 height = plane->state->crtc_h; + size_t data_size, mask_size; + u32 flags; + u8 *src; + + /* + * VirtualBox uses the host windowing system to draw the cursor so + * moves are a no-op, we only need to upload new cursor sprites. + */ + if (fb == old_state->fb) + return; + + mutex_lock(&vbox->hw_mutex); + + vbox_crtc->cursor_enabled = true; + + /* pinning is done in prepare/cleanup framebuffer */ + src = vbox_bo_kmap(bo); + if (IS_ERR(src)) { + mutex_unlock(&vbox->hw_mutex); + DRM_WARN("Could not kmap cursor bo, skipping update\n"); + return; + } + + /* + * The mask must be calculated based on the alpha + * channel, one bit per ARGB word, and must be 32-bit + * padded. + */ + mask_size = ((width + 7) / 8 * height + 3) & ~3; + data_size = width * height * 4 + mask_size; + + copy_cursor_image(src, vbox->cursor_data, width, height, mask_size); + vbox_bo_kunmap(bo); + + flags = VBOX_MOUSE_POINTER_VISIBLE | VBOX_MOUSE_POINTER_SHAPE | + VBOX_MOUSE_POINTER_ALPHA; + hgsmi_update_pointer_shape(vbox->guest_pool, flags, + min_t(u32, max(fb->hot_x, 0), width), + min_t(u32, max(fb->hot_y, 0), height), + width, height, vbox->cursor_data, data_size); + + mutex_unlock(&vbox->hw_mutex); } -static void vbox_crtc_commit(struct drm_crtc *crtc) +static void vbox_cursor_atomic_disable(struct drm_plane *plane, + struct drm_plane_state *old_state) { -} + struct vbox_private *vbox = + container_of(plane->dev, struct vbox_private, ddev); + struct vbox_crtc *vbox_crtc = to_vbox_crtc(old_state->crtc); + bool cursor_enabled = false; + struct drm_crtc *crtci; -static const struct drm_crtc_helper_funcs vbox_crtc_helper_funcs = { - .dpms = vbox_crtc_dpms, - .mode_fixup = vbox_crtc_mode_fixup, - .mode_set = vbox_crtc_mode_set, - /* .mode_set_base = vbox_crtc_mode_set_base, */ - .disable = vbox_crtc_disable, - .prepare = vbox_crtc_prepare, - .commit = vbox_crtc_commit, -}; + mutex_lock(&vbox->hw_mutex); -static void vbox_crtc_reset(struct drm_crtc *crtc) + vbox_crtc->cursor_enabled = false; + + list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, head) { + if (to_vbox_crtc(crtci)->cursor_enabled) + cursor_enabled = true; + } + + if (!cursor_enabled) + hgsmi_update_pointer_shape(vbox->guest_pool, 0, 0, 0, + 0, 0, NULL, 0); + + mutex_unlock(&vbox->hw_mutex); +} + +static int vbox_cursor_prepare_fb(struct drm_plane *plane, + struct drm_plane_state *new_state) { + struct vbox_bo *bo; + + if (!new_state->fb) + return 0; + + bo = gem_to_vbox_bo(to_vbox_framebuffer(new_state->fb)->obj); + return vbox_bo_pin(bo, TTM_PL_FLAG_SYSTEM); } -static void vbox_crtc_destroy(struct drm_crtc *crtc) +static void vbox_cursor_cleanup_fb(struct drm_plane *plane, + struct drm_plane_state *old_state) { - drm_crtc_cleanup(crtc); - kfree(crtc); + struct vbox_bo *bo; + + if (!plane->state->fb) + return; + + bo = gem_to_vbox_bo(to_vbox_framebuffer(plane->state->fb)->obj); + vbox_bo_unpin(bo); } -static const struct drm_crtc_funcs vbox_crtc_funcs = { - .cursor_move = vbox_cursor_move, - .cursor_set2 = vbox_cursor_set2, - .reset = vbox_crtc_reset, - .set_config = drm_crtc_helper_set_config, - /* .gamma_set = vbox_crtc_gamma_set, */ - .page_flip = vbox_crtc_page_flip, - .destroy = vbox_crtc_destroy, +static const uint32_t vbox_cursor_plane_formats[] = { + DRM_FORMAT_ARGB8888, }; +static const struct drm_plane_helper_funcs vbox_cursor_helper_funcs = { + .atomic_check = vbox_cursor_atomic_check, + .atomic_update = vbox_cursor_atomic_update, + .atomic_disable = vbox_cursor_atomic_disable, + .prepare_fb = vbox_cursor_prepare_fb, + .cleanup_fb = vbox_cursor_cleanup_fb, +}; + +static const struct drm_plane_funcs vbox_cursor_plane_funcs = { + .update_plane = drm_atomic_helper_update_plane, + .disable_plane = drm_atomic_helper_disable_plane, + .destroy = drm_primary_helper_destroy, + .reset = drm_atomic_helper_plane_reset, + .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, +}; + +static const uint32_t vbox_primary_plane_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, +}; + +static const struct drm_plane_helper_funcs vbox_primary_helper_funcs = { + .atomic_check = vbox_primary_atomic_check, + .atomic_update = vbox_primary_atomic_update, + .atomic_disable = vbox_primary_atomic_disable, + .prepare_fb = vbox_primary_prepare_fb, + .cleanup_fb = vbox_primary_cleanup_fb, +}; + +static const struct drm_plane_funcs vbox_primary_plane_funcs = { + .update_plane = drm_atomic_helper_update_plane, + .disable_plane = drm_atomic_helper_disable_plane, + .destroy = drm_primary_helper_destroy, + .reset = drm_atomic_helper_plane_reset, + .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, +}; + +static struct drm_plane *vbox_create_plane(struct vbox_private *vbox, + unsigned int possible_crtcs, + enum drm_plane_type type) +{ + const struct drm_plane_helper_funcs *helper_funcs = NULL; + const struct drm_plane_funcs *funcs; + struct drm_plane *plane; + const uint32_t *formats; + int num_formats; + int err; + + if (type == DRM_PLANE_TYPE_PRIMARY) { + funcs = &vbox_primary_plane_funcs; + formats = vbox_primary_plane_formats; + helper_funcs = &vbox_primary_helper_funcs; + num_formats = ARRAY_SIZE(vbox_primary_plane_formats); + } else if (type == DRM_PLANE_TYPE_CURSOR) { + funcs = &vbox_cursor_plane_funcs; + formats = vbox_cursor_plane_formats; + helper_funcs = &vbox_cursor_helper_funcs; + num_formats = ARRAY_SIZE(vbox_cursor_plane_formats); + } else { + return ERR_PTR(-EINVAL); + } + + plane = kzalloc(sizeof(*plane), GFP_KERNEL); + if (!plane) + return ERR_PTR(-ENOMEM); + + err = drm_universal_plane_init(&vbox->ddev, plane, possible_crtcs, + funcs, formats, num_formats, + NULL, type, NULL); + if (err) + goto free_plane; + + drm_plane_helper_add(plane, helper_funcs); + + return plane; + +free_plane: + kfree(plane); + return ERR_PTR(-EINVAL); +} + static struct vbox_crtc *vbox_crtc_init(struct drm_device *dev, unsigned int i) { + struct vbox_private *vbox = + container_of(dev, struct vbox_private, ddev); + struct drm_plane *cursor = NULL; struct vbox_crtc *vbox_crtc; + struct drm_plane *primary; + u32 caps = 0; + int ret; + + ret = hgsmi_query_conf(vbox->guest_pool, + VBOX_VBVA_CONF32_CURSOR_CAPABILITIES, &caps); + if (ret) + return ERR_PTR(ret); vbox_crtc = kzalloc(sizeof(*vbox_crtc), GFP_KERNEL); if (!vbox_crtc) - return NULL; + return ERR_PTR(-ENOMEM); + + primary = vbox_create_plane(vbox, 1 << i, DRM_PLANE_TYPE_PRIMARY); + if (IS_ERR(primary)) { + ret = PTR_ERR(primary); + goto free_mem; + } + + if ((caps & VBOX_VBVA_CURSOR_CAPABILITY_HARDWARE)) { + cursor = vbox_create_plane(vbox, 1 << i, DRM_PLANE_TYPE_CURSOR); + if (IS_ERR(cursor)) { + ret = PTR_ERR(cursor); + goto clean_primary; + } + } else { + DRM_WARN("VirtualBox host is too old, no cursor support\n"); + } vbox_crtc->crtc_id = i; - drm_crtc_init(dev, &vbox_crtc->base, &vbox_crtc_funcs); + ret = drm_crtc_init_with_planes(dev, &vbox_crtc->base, primary, cursor, + &vbox_crtc_funcs, NULL); + if (ret) + goto clean_cursor; + drm_mode_crtc_set_gamma_size(&vbox_crtc->base, 256); drm_crtc_helper_add(&vbox_crtc->base, &vbox_crtc_helper_funcs); return vbox_crtc; + +clean_cursor: + if (cursor) { + drm_plane_cleanup(cursor); + kfree(cursor); + } +clean_primary: + drm_plane_cleanup(primary); + kfree(primary); +free_mem: + kfree(vbox_crtc); + return ERR_PTR(ret); } static void vbox_encoder_destroy(struct drm_encoder *encoder) @@ -403,55 +652,10 @@ static void vbox_encoder_destroy(struct drm_encoder *encoder) kfree(encoder); } -static struct drm_encoder *vbox_best_single_encoder(struct drm_connector - *connector) -{ - int enc_id = connector->encoder_ids[0]; - - /* pick the encoder ids */ - if (enc_id) - return drm_encoder_find(connector->dev, NULL, enc_id); - - return NULL; -} - static const struct drm_encoder_funcs vbox_enc_funcs = { .destroy = vbox_encoder_destroy, }; -static void vbox_encoder_dpms(struct drm_encoder *encoder, int mode) -{ -} - -static bool vbox_mode_fixup(struct drm_encoder *encoder, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ - return true; -} - -static void vbox_encoder_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ -} - -static void vbox_encoder_prepare(struct drm_encoder *encoder) -{ -} - -static void vbox_encoder_commit(struct drm_encoder *encoder) -{ -} - -static const struct drm_encoder_helper_funcs vbox_enc_helper_funcs = { - .dpms = vbox_encoder_dpms, - .mode_fixup = vbox_mode_fixup, - .prepare = vbox_encoder_prepare, - .commit = vbox_encoder_commit, - .mode_set = vbox_encoder_mode_set, -}; - static struct drm_encoder *vbox_encoder_init(struct drm_device *dev, unsigned int i) { @@ -463,7 +667,6 @@ static struct drm_encoder *vbox_encoder_init(struct drm_device *dev, drm_encoder_init(dev, &vbox_encoder->base, &vbox_enc_funcs, DRM_MODE_ENCODER_DAC, NULL); - drm_encoder_helper_add(&vbox_encoder->base, &vbox_enc_helper_funcs); vbox_encoder->base.possible_crtcs = 1 << i; return &vbox_encoder->base; @@ -589,29 +792,23 @@ static int vbox_get_modes(struct drm_connector *connector) if (vbox_connector->vbox_crtc->x_hint != -1) drm_object_property_set_value(&connector->base, - vbox->dev->mode_config.suggested_x_property, + vbox->ddev.mode_config.suggested_x_property, vbox_connector->vbox_crtc->x_hint); else drm_object_property_set_value(&connector->base, - vbox->dev->mode_config.suggested_x_property, 0); + vbox->ddev.mode_config.suggested_x_property, 0); if (vbox_connector->vbox_crtc->y_hint != -1) drm_object_property_set_value(&connector->base, - vbox->dev->mode_config.suggested_y_property, + vbox->ddev.mode_config.suggested_y_property, vbox_connector->vbox_crtc->y_hint); else drm_object_property_set_value(&connector->base, - vbox->dev->mode_config.suggested_y_property, 0); + vbox->ddev.mode_config.suggested_y_property, 0); return num_modes; } -static enum drm_mode_status vbox_mode_valid(struct drm_connector *connector, - struct drm_display_mode *mode) -{ - return MODE_OK; -} - static void vbox_connector_destroy(struct drm_connector *connector) { drm_connector_unregister(connector); @@ -648,16 +845,16 @@ static int vbox_fill_modes(struct drm_connector *connector, u32 max_x, } static const struct drm_connector_helper_funcs vbox_connector_helper_funcs = { - .mode_valid = vbox_mode_valid, .get_modes = vbox_get_modes, - .best_encoder = vbox_best_single_encoder, }; static const struct drm_connector_funcs vbox_connector_funcs = { - .dpms = drm_helper_connector_dpms, .detect = vbox_connector_detect, .fill_modes = vbox_fill_modes, .destroy = vbox_connector_destroy, + .reset = drm_atomic_helper_connector_reset, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; static int vbox_connector_init(struct drm_device *dev, @@ -686,225 +883,92 @@ static int vbox_connector_init(struct drm_device *dev, dev->mode_config.suggested_x_property, 0); drm_object_attach_property(&connector->base, dev->mode_config.suggested_y_property, 0); - drm_connector_register(connector); drm_connector_attach_encoder(connector, encoder); return 0; } -int vbox_mode_init(struct drm_device *dev) +static struct drm_framebuffer *vbox_user_framebuffer_create( + struct drm_device *dev, + struct drm_file *filp, + const struct drm_mode_fb_cmd2 *mode_cmd) { - struct vbox_private *vbox = dev->dev_private; - struct drm_encoder *encoder; - struct vbox_crtc *vbox_crtc; - unsigned int i; - int ret; + struct vbox_private *vbox = + container_of(dev, struct vbox_private, ddev); + struct drm_gem_object *obj; + struct vbox_framebuffer *vbox_fb; + int ret = -ENOMEM; - /* vbox_cursor_init(dev); */ - for (i = 0; i < vbox->num_crtcs; ++i) { - vbox_crtc = vbox_crtc_init(dev, i); - if (!vbox_crtc) - return -ENOMEM; - encoder = vbox_encoder_init(dev, i); - if (!encoder) - return -ENOMEM; - ret = vbox_connector_init(dev, vbox_crtc, encoder); - if (ret) - return ret; - } + obj = drm_gem_object_lookup(filp, mode_cmd->handles[0]); + if (!obj) + return ERR_PTR(-ENOENT); - return 0; -} + vbox_fb = kzalloc(sizeof(*vbox_fb), GFP_KERNEL); + if (!vbox_fb) + goto err_unref_obj; -void vbox_mode_fini(struct drm_device *dev) -{ - /* vbox_cursor_fini(dev); */ -} + ret = vbox_framebuffer_init(vbox, vbox_fb, mode_cmd, obj); + if (ret) + goto err_free_vbox_fb; -/** - * Copy the ARGB image and generate the mask, which is needed in case the host - * does not support ARGB cursors. The mask is a 1BPP bitmap with the bit set - * if the corresponding alpha value in the ARGB image is greater than 0xF0. - */ -static void copy_cursor_image(u8 *src, u8 *dst, u32 width, u32 height, - size_t mask_size) -{ - size_t line_size = (width + 7) / 8; - u32 i, j; + return &vbox_fb->base; - memcpy(dst + mask_size, src, width * height * 4); - for (i = 0; i < height; ++i) - for (j = 0; j < width; ++j) - if (((u32 *)src)[i * width + j] > 0xf0000000) - dst[i * line_size + j / 8] |= (0x80 >> (j % 8)); +err_free_vbox_fb: + kfree(vbox_fb); +err_unref_obj: + drm_gem_object_put_unlocked(obj); + return ERR_PTR(ret); } -static int vbox_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv, - u32 handle, u32 width, u32 height, - s32 hot_x, s32 hot_y) +static const struct drm_mode_config_funcs vbox_mode_funcs = { + .fb_create = vbox_user_framebuffer_create, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = drm_atomic_helper_commit, +}; + +int vbox_mode_init(struct vbox_private *vbox) { - struct vbox_private *vbox = crtc->dev->dev_private; - struct vbox_crtc *vbox_crtc = to_vbox_crtc(crtc); - struct ttm_bo_kmap_obj uobj_map; - size_t data_size, mask_size; - struct drm_gem_object *obj; - u32 flags, caps = 0; - struct vbox_bo *bo; - bool src_isiomem; - u8 *dst = NULL; - u8 *src; + struct drm_device *dev = &vbox->ddev; + struct drm_encoder *encoder; + struct vbox_crtc *vbox_crtc; + unsigned int i; int ret; - /* - * Re-set this regularly as in 5.0.20 and earlier the information was - * lost on save and restore. - */ - hgsmi_update_input_mapping(vbox->guest_pool, 0, 0, - vbox->input_mapping_width, - vbox->input_mapping_height); - if (!handle) { - bool cursor_enabled = false; - struct drm_crtc *crtci; - - /* Hide cursor. */ - vbox_crtc->cursor_enabled = false; - list_for_each_entry(crtci, &vbox->dev->mode_config.crtc_list, - head) { - if (to_vbox_crtc(crtci)->cursor_enabled) - cursor_enabled = true; - } - - if (!cursor_enabled) - hgsmi_update_pointer_shape(vbox->guest_pool, 0, 0, 0, - 0, 0, NULL, 0); - return 0; - } - - vbox_crtc->cursor_enabled = true; - - if (width > VBOX_MAX_CURSOR_WIDTH || height > VBOX_MAX_CURSOR_HEIGHT || - width == 0 || height == 0) - return -EINVAL; - - ret = hgsmi_query_conf(vbox->guest_pool, - VBOX_VBVA_CONF32_CURSOR_CAPABILITIES, &caps); - if (ret) - return ret; - - if (!(caps & VBOX_VBVA_CURSOR_CAPABILITY_HARDWARE)) { - /* - * -EINVAL means cursor_set2() not supported, -EAGAIN means - * retry at once. - */ - return -EBUSY; - } - - obj = drm_gem_object_lookup(file_priv, handle); - if (!obj) { - DRM_ERROR("Cannot find cursor object %x for crtc\n", handle); - return -ENOENT; - } + drm_mode_config_init(dev); - bo = gem_to_vbox_bo(obj); - ret = vbox_bo_reserve(bo, false); - if (ret) - goto out_unref_obj; + dev->mode_config.funcs = (void *)&vbox_mode_funcs; + dev->mode_config.min_width = 0; + dev->mode_config.min_height = 0; + dev->mode_config.preferred_depth = 24; + dev->mode_config.max_width = VBE_DISPI_MAX_XRES; + dev->mode_config.max_height = VBE_DISPI_MAX_YRES; - /* - * The mask must be calculated based on the alpha - * channel, one bit per ARGB word, and must be 32-bit - * padded. - */ - mask_size = ((width + 7) / 8 * height + 3) & ~3; - data_size = width * height * 4 + mask_size; - vbox->cursor_hot_x = min_t(u32, max(hot_x, 0), width); - vbox->cursor_hot_y = min_t(u32, max(hot_y, 0), height); - vbox->cursor_width = width; - vbox->cursor_height = height; - vbox->cursor_data_size = data_size; - dst = vbox->cursor_data; - - ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &uobj_map); - if (ret) { - vbox->cursor_data_size = 0; - goto out_unreserve_bo; - } - - src = ttm_kmap_obj_virtual(&uobj_map, &src_isiomem); - if (src_isiomem) { - DRM_ERROR("src cursor bo not in main memory\n"); - ret = -EIO; - goto out_unmap_bo; + for (i = 0; i < vbox->num_crtcs; ++i) { + vbox_crtc = vbox_crtc_init(dev, i); + if (IS_ERR(vbox_crtc)) { + ret = PTR_ERR(vbox_crtc); + goto err_drm_mode_cleanup; + } + encoder = vbox_encoder_init(dev, i); + if (!encoder) { + ret = -ENOMEM; + goto err_drm_mode_cleanup; + } + ret = vbox_connector_init(dev, vbox_crtc, encoder); + if (ret) + goto err_drm_mode_cleanup; } - copy_cursor_image(src, dst, width, height, mask_size); - - flags = VBOX_MOUSE_POINTER_VISIBLE | VBOX_MOUSE_POINTER_SHAPE | - VBOX_MOUSE_POINTER_ALPHA; - ret = hgsmi_update_pointer_shape(vbox->guest_pool, flags, - vbox->cursor_hot_x, vbox->cursor_hot_y, - width, height, dst, data_size); -out_unmap_bo: - ttm_bo_kunmap(&uobj_map); -out_unreserve_bo: - vbox_bo_unreserve(bo); -out_unref_obj: - drm_gem_object_put_unlocked(obj); + drm_mode_config_reset(dev); + return 0; +err_drm_mode_cleanup: + drm_mode_config_cleanup(dev); return ret; } -static int vbox_cursor_move(struct drm_crtc *crtc, int x, int y) +void vbox_mode_fini(struct vbox_private *vbox) { - struct vbox_private *vbox = crtc->dev->dev_private; - u32 flags = VBOX_MOUSE_POINTER_VISIBLE | - VBOX_MOUSE_POINTER_SHAPE | VBOX_MOUSE_POINTER_ALPHA; - s32 crtc_x = - vbox->single_framebuffer ? crtc->x : to_vbox_crtc(crtc)->x_hint; - s32 crtc_y = - vbox->single_framebuffer ? crtc->y : to_vbox_crtc(crtc)->y_hint; - u32 host_x, host_y; - u32 hot_x = 0; - u32 hot_y = 0; - int ret; - - /* - * We compare these to unsigned later and don't - * need to handle negative. - */ - if (x + crtc_x < 0 || y + crtc_y < 0 || vbox->cursor_data_size == 0) - return 0; - - ret = hgsmi_cursor_position(vbox->guest_pool, true, x + crtc_x, - y + crtc_y, &host_x, &host_y); - - /* - * The only reason we have vbox_cursor_move() is that some older clients - * might use DRM_IOCTL_MODE_CURSOR instead of DRM_IOCTL_MODE_CURSOR2 and - * use DRM_MODE_CURSOR_MOVE to set the hot-spot. - * - * However VirtualBox 5.0.20 and earlier has a bug causing it to return - * 0,0 as host cursor location after a save and restore. - * - * To work around this we ignore a 0, 0 return, since missing the odd - * time when it legitimately happens is not going to hurt much. - */ - if (ret || (host_x == 0 && host_y == 0)) - return ret; - - if (x + crtc_x < host_x) - hot_x = min(host_x - x - crtc_x, vbox->cursor_width); - if (y + crtc_y < host_y) - hot_y = min(host_y - y - crtc_y, vbox->cursor_height); - - if (hot_x == vbox->cursor_hot_x && hot_y == vbox->cursor_hot_y) - return 0; - - vbox->cursor_hot_x = hot_x; - vbox->cursor_hot_y = hot_y; - - return hgsmi_update_pointer_shape(vbox->guest_pool, flags, - hot_x, hot_y, vbox->cursor_width, vbox->cursor_height, - vbox->cursor_data, vbox->cursor_data_size); + drm_mode_config_cleanup(&vbox->ddev); } diff --git a/drivers/staging/vboxvideo/vbox_ttm.c b/drivers/staging/vboxvideo/vbox_ttm.c index 548edb7c494b..5ecfa7629173 100644 --- a/drivers/staging/vboxvideo/vbox_ttm.c +++ b/drivers/staging/vboxvideo/vbox_ttm.c @@ -169,7 +169,7 @@ static int vbox_ttm_io_mem_reserve(struct ttm_bo_device *bdev, return 0; case TTM_PL_VRAM: mem->bus.offset = mem->start << PAGE_SHIFT; - mem->bus.base = pci_resource_start(vbox->dev->pdev, 0); + mem->bus.base = pci_resource_start(vbox->ddev.pdev, 0); mem->bus.is_iomem = true; break; default: @@ -224,7 +224,7 @@ static struct ttm_bo_driver vbox_bo_driver = { int vbox_mm_init(struct vbox_private *vbox) { int ret; - struct drm_device *dev = vbox->dev; + struct drm_device *dev = &vbox->ddev; struct ttm_bo_device *bdev = &vbox->ttm.bdev; ret = vbox_ttm_global_init(vbox); @@ -269,8 +269,8 @@ void vbox_mm_fini(struct vbox_private *vbox) { #ifdef DRM_MTRR_WC drm_mtrr_del(vbox->fb_mtrr, - pci_resource_start(vbox->dev->pdev, 0), - pci_resource_len(vbox->dev->pdev, 0), DRM_MTRR_WC); + pci_resource_start(vbox->ddev.pdev, 0), + pci_resource_len(vbox->ddev.pdev, 0), DRM_MTRR_WC); #else arch_phys_wc_del(vbox->fb_mtrr); #endif @@ -305,10 +305,9 @@ void vbox_ttm_placement(struct vbox_bo *bo, int domain) } } -int vbox_bo_create(struct drm_device *dev, int size, int align, +int vbox_bo_create(struct vbox_private *vbox, int size, int align, u32 flags, struct vbox_bo **pvboxbo) { - struct vbox_private *vbox = dev->dev_private; struct vbox_bo *vboxbo; size_t acc_size; int ret; @@ -317,7 +316,7 @@ int vbox_bo_create(struct drm_device *dev, int size, int align, if (!vboxbo) return -ENOMEM; - ret = drm_gem_object_init(dev, &vboxbo->gem, size); + ret = drm_gem_object_init(&vbox->ddev, &vboxbo->gem, size); if (ret) goto err_free_vboxbo; @@ -344,39 +343,32 @@ err_free_vboxbo: return ret; } -static inline u64 vbox_bo_gpu_offset(struct vbox_bo *bo) -{ - return bo->bo.offset; -} - -int vbox_bo_pin(struct vbox_bo *bo, u32 pl_flag, u64 *gpu_addr) +int vbox_bo_pin(struct vbox_bo *bo, u32 pl_flag) { struct ttm_operation_ctx ctx = { false, false }; int i, ret; if (bo->pin_count) { bo->pin_count++; - if (gpu_addr) - *gpu_addr = vbox_bo_gpu_offset(bo); - return 0; } + ret = vbox_bo_reserve(bo, false); + if (ret) + return ret; + vbox_ttm_placement(bo, pl_flag); for (i = 0; i < bo->placement.num_placement; i++) bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT; ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx); - if (ret) - return ret; - - bo->pin_count = 1; + if (ret == 0) + bo->pin_count = 1; - if (gpu_addr) - *gpu_addr = vbox_bo_gpu_offset(bo); + vbox_bo_unreserve(bo); - return 0; + return ret; } int vbox_bo_unpin(struct vbox_bo *bo) @@ -392,14 +384,20 @@ int vbox_bo_unpin(struct vbox_bo *bo) if (bo->pin_count) return 0; + ret = vbox_bo_reserve(bo, false); + if (ret) { + DRM_ERROR("Error %d reserving bo, leaving it pinned\n", ret); + return ret; + } + for (i = 0; i < bo->placement.num_placement; i++) bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT; ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx); - if (ret) - return ret; - return 0; + vbox_bo_unreserve(bo); + + return ret; } /* @@ -420,8 +418,10 @@ int vbox_bo_push_sysram(struct vbox_bo *bo) if (bo->pin_count) return 0; - if (bo->kmap.virtual) + if (bo->kmap.virtual) { ttm_bo_kunmap(&bo->kmap); + bo->kmap.virtual = NULL; + } vbox_ttm_placement(bo, TTM_PL_FLAG_SYSTEM); @@ -450,3 +450,27 @@ int vbox_mmap(struct file *filp, struct vm_area_struct *vma) return ttm_bo_mmap(filp, vma, &vbox->ttm.bdev); } + +void *vbox_bo_kmap(struct vbox_bo *bo) +{ + int ret; + + if (bo->kmap.virtual) + return bo->kmap.virtual; + + ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap); + if (ret) { + DRM_ERROR("Error kmapping bo: %d\n", ret); + return NULL; + } + + return bo->kmap.virtual; +} + +void vbox_bo_kunmap(struct vbox_bo *bo) +{ + if (bo->kmap.virtual) { + ttm_bo_kunmap(&bo->kmap); + bo->kmap.virtual = NULL; + } +} diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c index ec468d5719b1..a6ec72a5f0be 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c @@ -1,23 +1,8 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright 2011 Broadcom Corporation. All rights reserved. */ -#include <linux/platform_device.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/jiffies.h> -#include <linux/slab.h> -#include <linux/time.h> -#include <linux/wait.h> -#include <linux/delay.h> -#include <linux/moduleparam.h> -#include <linux/sched.h> - #include <sound/core.h> #include <sound/control.h> -#include <sound/pcm.h> -#include <sound/pcm_params.h> -#include <sound/rawmidi.h> -#include <sound/initval.h> #include <sound/tlv.h> #include <sound/asoundef.h> @@ -27,6 +12,21 @@ #define CTRL_VOL_MAX 400 #define CTRL_VOL_MIN -10239 /* originally -10240 */ +static int bcm2835_audio_set_chip_ctls(struct bcm2835_chip *chip) +{ + int i, err = 0; + + /* change ctls for all substreams */ + for (i = 0; i < MAX_SUBSTREAMS; i++) { + if (chip->alsa_stream[i]) { + err = bcm2835_audio_set_ctls(chip->alsa_stream[i]); + if (err < 0) + break; + } + } + return err; +} + static int snd_bcm2835_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { @@ -49,41 +49,15 @@ static int snd_bcm2835_ctl_info(struct snd_kcontrol *kcontrol, return 0; } -/* toggles mute on or off depending on the value of nmute, and returns - * 1 if the mute value was changed, otherwise 0 - */ -static int toggle_mute(struct bcm2835_chip *chip, int nmute) -{ - /* if settings are ok, just return 0 */ - if (chip->mute == nmute) - return 0; - - /* if the sound is muted then we need to unmute */ - if (chip->mute == CTRL_VOL_MUTE) { - chip->volume = chip->old_volume; /* copy the old volume back */ - audio_info("Unmuting, old_volume = %d, volume = %d ...\n", chip->old_volume, chip->volume); - } else /* otherwise we mute */ { - chip->old_volume = chip->volume; - chip->volume = 26214; /* set volume to minimum level AKA mute */ - audio_info("Muting, old_volume = %d, volume = %d ...\n", chip->old_volume, chip->volume); - } - - chip->mute = nmute; - return 1; -} - static int snd_bcm2835_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); - if (mutex_lock_interruptible(&chip->audio_mutex)) - return -EINTR; - - BUG_ON(!chip && !(chip->avail_substreams & AVAIL_SUBSTREAMS_MASK)); + mutex_lock(&chip->audio_mutex); if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) - ucontrol->value.integer.value[0] = chip2alsa(chip->volume); + ucontrol->value.integer.value[0] = chip->volume; else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) ucontrol->value.integer.value[0] = chip->mute; else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) @@ -97,79 +71,60 @@ static int snd_bcm2835_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); + int val, *valp; int changed = 0; - if (mutex_lock_interruptible(&chip->audio_mutex)) - return -EINTR; - - if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) { - audio_info("Volume change attempted.. volume = %d new_volume = %d\n", chip->volume, (int)ucontrol->value.integer.value[0]); - if (chip->mute == CTRL_VOL_MUTE) { - /* changed = toggle_mute(chip, CTRL_VOL_UNMUTE); */ - changed = 1; /* should return 0 to signify no change but the mixer takes this as the opposite sign (no idea why) */ - goto unlock; - } - if (changed || (ucontrol->value.integer.value[0] != chip2alsa(chip->volume))) { - chip->volume = alsa2chip(ucontrol->value.integer.value[0]); - changed = 1; - } - - } else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) { - /* Now implemented */ - audio_info(" Mute attempted\n"); - changed = toggle_mute(chip, ucontrol->value.integer.value[0]); - - } else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) { - if (ucontrol->value.integer.value[0] != chip->dest) { - chip->dest = ucontrol->value.integer.value[0]; - changed = 1; - } + if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) + valp = &chip->volume; + else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) + valp = &chip->mute; + else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) + valp = &chip->dest; + else + return -EINVAL; + + val = ucontrol->value.integer.value[0]; + mutex_lock(&chip->audio_mutex); + if (val != *valp) { + *valp = val; + changed = 1; + if (bcm2835_audio_set_chip_ctls(chip)) + dev_err(chip->card->dev, "Failed to set ALSA controls..\n"); } - - if (changed && bcm2835_audio_set_ctls(chip)) - dev_err(chip->card->dev, "Failed to set ALSA controls..\n"); - -unlock: mutex_unlock(&chip->audio_mutex); return changed; } static DECLARE_TLV_DB_SCALE(snd_bcm2835_db_scale, CTRL_VOL_MIN, 1, 1); -static struct snd_kcontrol_new snd_bcm2835_ctl[] = { +static const struct snd_kcontrol_new snd_bcm2835_ctl[] = { { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "PCM Playback Volume", - .index = 0, .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, .private_value = PCM_PLAYBACK_VOLUME, .info = snd_bcm2835_ctl_info, .get = snd_bcm2835_ctl_get, .put = snd_bcm2835_ctl_put, - .count = 1, .tlv = {.p = snd_bcm2835_db_scale} }, { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "PCM Playback Switch", - .index = 0, .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, .private_value = PCM_PLAYBACK_MUTE, .info = snd_bcm2835_ctl_info, .get = snd_bcm2835_ctl_get, .put = snd_bcm2835_ctl_put, - .count = 1, }, { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "PCM Playback Route", - .index = 0, .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, .private_value = PCM_PLAYBACK_DEVICE, .info = snd_bcm2835_ctl_info, .get = snd_bcm2835_ctl_get, .put = snd_bcm2835_ctl_put, - .count = 1, }, }; @@ -187,8 +142,7 @@ static int snd_bcm2835_spdif_default_get(struct snd_kcontrol *kcontrol, struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); int i; - if (mutex_lock_interruptible(&chip->audio_mutex)) - return -EINTR; + mutex_lock(&chip->audio_mutex); for (i = 0; i < 4; i++) ucontrol->value.iec958.status[i] = @@ -205,8 +159,7 @@ static int snd_bcm2835_spdif_default_put(struct snd_kcontrol *kcontrol, unsigned int val = 0; int i, change; - if (mutex_lock_interruptible(&chip->audio_mutex)) - return -EINTR; + mutex_lock(&chip->audio_mutex); for (i = 0; i < 4; i++) val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); @@ -237,51 +190,7 @@ static int snd_bcm2835_spdif_mask_get(struct snd_kcontrol *kcontrol, return 0; } -static int snd_bcm2835_spdif_stream_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; - uinfo->count = 1; - return 0; -} - -static int snd_bcm2835_spdif_stream_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); - int i; - - if (mutex_lock_interruptible(&chip->audio_mutex)) - return -EINTR; - - for (i = 0; i < 4; i++) - ucontrol->value.iec958.status[i] = - (chip->spdif_status >> (i * 8)) & 0xff; - - mutex_unlock(&chip->audio_mutex); - return 0; -} - -static int snd_bcm2835_spdif_stream_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); - unsigned int val = 0; - int i, change; - - if (mutex_lock_interruptible(&chip->audio_mutex)) - return -EINTR; - - for (i = 0; i < 4; i++) - val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); - change = val != chip->spdif_status; - chip->spdif_status = val; - - mutex_unlock(&chip->audio_mutex); - return change; -} - -static struct snd_kcontrol_new snd_bcm2835_spdif[] = { +static const struct snd_kcontrol_new snd_bcm2835_spdif[] = { { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), @@ -296,39 +205,34 @@ static struct snd_kcontrol_new snd_bcm2835_spdif[] = { .info = snd_bcm2835_spdif_mask_info, .get = snd_bcm2835_spdif_mask_get, }, - { - .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | - SNDRV_CTL_ELEM_ACCESS_INACTIVE, - .iface = SNDRV_CTL_ELEM_IFACE_PCM, - .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM), - .info = snd_bcm2835_spdif_stream_info, - .get = snd_bcm2835_spdif_stream_get, - .put = snd_bcm2835_spdif_stream_put, - }, }; -int snd_bcm2835_new_ctl(struct bcm2835_chip *chip) +static int create_ctls(struct bcm2835_chip *chip, size_t size, + const struct snd_kcontrol_new *kctls) { - int err; - unsigned int idx; + int i, err; - strcpy(chip->card->mixername, "Broadcom Mixer"); - for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_ctl); idx++) { - err = snd_ctl_add(chip->card, - snd_ctl_new1(&snd_bcm2835_ctl[idx], chip)); - if (err < 0) - return err; - } - for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_spdif); idx++) { - err = snd_ctl_add(chip->card, - snd_ctl_new1(&snd_bcm2835_spdif[idx], chip)); + for (i = 0; i < size; i++) { + err = snd_ctl_add(chip->card, snd_ctl_new1(&kctls[i], chip)); if (err < 0) return err; } return 0; } -static struct snd_kcontrol_new snd_bcm2835_headphones_ctl[] = { +int snd_bcm2835_new_ctl(struct bcm2835_chip *chip) +{ + int err; + + strcpy(chip->card->mixername, "Broadcom Mixer"); + err = create_ctls(chip, ARRAY_SIZE(snd_bcm2835_ctl), snd_bcm2835_ctl); + if (err < 0) + return err; + return create_ctls(chip, ARRAY_SIZE(snd_bcm2835_spdif), + snd_bcm2835_spdif); +} + +static const struct snd_kcontrol_new snd_bcm2835_headphones_ctl[] = { { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Headphone Playback Volume", @@ -357,21 +261,12 @@ static struct snd_kcontrol_new snd_bcm2835_headphones_ctl[] = { int snd_bcm2835_new_headphones_ctl(struct bcm2835_chip *chip) { - int err; - unsigned int idx; - strcpy(chip->card->mixername, "Broadcom Mixer"); - for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_headphones_ctl); idx++) { - err = snd_ctl_add(chip->card, - snd_ctl_new1(&snd_bcm2835_headphones_ctl[idx], - chip)); - if (err) - return err; - } - return 0; + return create_ctls(chip, ARRAY_SIZE(snd_bcm2835_headphones_ctl), + snd_bcm2835_headphones_ctl); } -static struct snd_kcontrol_new snd_bcm2835_hdmi[] = { +static const struct snd_kcontrol_new snd_bcm2835_hdmi[] = { { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "HDMI Playback Volume", @@ -400,16 +295,8 @@ static struct snd_kcontrol_new snd_bcm2835_hdmi[] = { int snd_bcm2835_new_hdmi_ctl(struct bcm2835_chip *chip) { - int err; - unsigned int idx; - strcpy(chip->card->mixername, "Broadcom Mixer"); - for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_hdmi); idx++) { - err = snd_ctl_add(chip->card, - snd_ctl_new1(&snd_bcm2835_hdmi[idx], chip)); - if (err) - return err; - } - return 0; + return create_ctls(chip, ARRAY_SIZE(snd_bcm2835_hdmi), + snd_bcm2835_hdmi); } diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c index 8359cf881bef..e66da11af5cf 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c @@ -11,7 +11,8 @@ /* hardware definition */ static const struct snd_pcm_hardware snd_bcm2835_playback_hw = { .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | - SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), + SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_DRAIN_TRIGGER | SNDRV_PCM_INFO_SYNC_APPLPTR), .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, .rate_min = 8000, @@ -27,7 +28,8 @@ static const struct snd_pcm_hardware snd_bcm2835_playback_hw = { static const struct snd_pcm_hardware snd_bcm2835_playback_spdif_hw = { .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | - SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), + SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_DRAIN_TRIGGER | SNDRV_PCM_INFO_SYNC_APPLPTR), .formats = SNDRV_PCM_FMTBIT_S16_LE, .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, @@ -44,48 +46,37 @@ static const struct snd_pcm_hardware snd_bcm2835_playback_spdif_hw = { static void snd_bcm2835_playback_free(struct snd_pcm_runtime *runtime) { - audio_info("Freeing up alsa stream here ..\n"); kfree(runtime->private_data); - runtime->private_data = NULL; } -void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream) +void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream, + unsigned int bytes) { - unsigned int consumed = 0; - int new_period = 0; - - audio_info("alsa_stream=%p substream=%p\n", alsa_stream, - alsa_stream ? alsa_stream->substream : 0); - - if (alsa_stream->open) - consumed = bcm2835_audio_retrieve_buffers(alsa_stream); - - /* We get called only if playback was triggered, So, the number of buffers we retrieve in - * each iteration are the buffers that have been played out already - */ - - if (alsa_stream->period_size) { - if ((alsa_stream->pos / alsa_stream->period_size) != - ((alsa_stream->pos + consumed) / alsa_stream->period_size)) - new_period = 1; - } - audio_debug("updating pos cur: %d + %d max:%d period_bytes:%d, hw_ptr: %d new_period:%d\n", - alsa_stream->pos, - consumed, - alsa_stream->buffer_size, - (int) (alsa_stream->period_size * alsa_stream->substream->runtime->periods), - frames_to_bytes(alsa_stream->substream->runtime, alsa_stream->substream->runtime->status->hw_ptr), - new_period); - if (alsa_stream->buffer_size) { - alsa_stream->pos += consumed & ~(1 << 30); - alsa_stream->pos %= alsa_stream->buffer_size; + struct snd_pcm_substream *substream = alsa_stream->substream; + unsigned int pos; + + if (!alsa_stream->period_size) + return; + + if (bytes >= alsa_stream->buffer_size) { + snd_pcm_stream_lock(substream); + snd_pcm_stop(substream, + alsa_stream->draining ? + SNDRV_PCM_STATE_SETUP : + SNDRV_PCM_STATE_XRUN); + snd_pcm_stream_unlock(substream); + return; } - if (alsa_stream->substream) { - if (new_period) - snd_pcm_period_elapsed(alsa_stream->substream); - } else { - audio_warning(" unexpected NULL substream\n"); + pos = atomic_read(&alsa_stream->pos); + pos += bytes; + pos %= alsa_stream->buffer_size; + atomic_set(&alsa_stream->pos, pos); + + alsa_stream->period_offset += bytes; + if (alsa_stream->period_offset >= alsa_stream->period_size) { + alsa_stream->period_offset %= alsa_stream->period_size; + snd_pcm_period_elapsed(substream); } } @@ -99,11 +90,7 @@ static int snd_bcm2835_playback_open_generic( int idx; int err; - if (mutex_lock_interruptible(&chip->audio_mutex)) { - audio_error("Interrupted whilst waiting for lock\n"); - return -EINTR; - } - audio_info("Alsa open (%d)\n", substream->number); + mutex_lock(&chip->audio_mutex); idx = substream->number; if (spdif && chip->opened) { @@ -114,21 +101,13 @@ static int snd_bcm2835_playback_open_generic( goto out; } if (idx >= MAX_SUBSTREAMS) { - audio_error - ("substream(%d) device doesn't exist max(%d) substreams allowed\n", + dev_err(chip->dev, + "substream(%d) device doesn't exist max(%d) substreams allowed\n", idx, MAX_SUBSTREAMS); err = -ENODEV; goto out; } - /* Check if we are ready */ - if (!(chip->avail_substreams & (1 << idx))) { - /* We are not ready yet */ - audio_error("substream(%d) device is not ready yet\n", idx); - err = -EAGAIN; - goto out; - } - alsa_stream = kzalloc(sizeof(*alsa_stream), GFP_KERNEL); if (!alsa_stream) { err = -ENOMEM; @@ -140,8 +119,6 @@ static int snd_bcm2835_playback_open_generic( alsa_stream->substream = substream; alsa_stream->idx = idx; - spin_lock_init(&alsa_stream->lock); - err = bcm2835_audio_open(alsa_stream); if (err) { kfree(alsa_stream); @@ -162,11 +139,14 @@ static int snd_bcm2835_playback_open_generic( SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 16); + /* position update is in 10ms order */ + snd_pcm_hw_constraint_minmax(runtime, + SNDRV_PCM_HW_PARAM_PERIOD_TIME, + 10 * 1000, UINT_MAX); + chip->alsa_stream[idx] = alsa_stream; chip->opened |= (1 << idx); - alsa_stream->open = 1; - alsa_stream->draining = 1; out: mutex_unlock(&chip->audio_mutex); @@ -194,37 +174,15 @@ static int snd_bcm2835_playback_close(struct snd_pcm_substream *substream) struct bcm2835_alsa_stream *alsa_stream; chip = snd_pcm_substream_chip(substream); - if (mutex_lock_interruptible(&chip->audio_mutex)) { - audio_error("Interrupted whilst waiting for lock\n"); - return -EINTR; - } + mutex_lock(&chip->audio_mutex); runtime = substream->runtime; alsa_stream = runtime->private_data; - audio_info("Alsa close\n"); - - /* - * Call stop if it's still running. This happens when app - * is force killed and we don't get a stop trigger. - */ - if (alsa_stream->running) { - int err; - - err = bcm2835_audio_stop(alsa_stream); - alsa_stream->running = 0; - if (err) - audio_error(" Failed to STOP alsa device\n"); - } - alsa_stream->period_size = 0; alsa_stream->buffer_size = 0; - if (alsa_stream->open) { - alsa_stream->open = 0; - bcm2835_audio_close(alsa_stream); - } - if (alsa_stream->chip) - alsa_stream->chip->alsa_stream[alsa_stream->idx] = NULL; + bcm2835_audio_close(alsa_stream); + alsa_stream->chip->alsa_stream[alsa_stream->idx] = NULL; /* * Do not free up alsa_stream here, it will be freed up by * runtime->private_free callback we registered in *_open above @@ -241,22 +199,7 @@ static int snd_bcm2835_playback_close(struct snd_pcm_substream *substream) static int snd_bcm2835_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { - struct snd_pcm_runtime *runtime = substream->runtime; - struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; - int err; - - err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); - if (err < 0) { - audio_error - (" pcm_lib_malloc failed to allocated pages for buffers\n"); - return err; - } - - alsa_stream->channels = params_channels(params); - alsa_stream->params_rate = params_rate(params); - alsa_stream->pcm_format_width = snd_pcm_format_width(params_format(params)); - - return err; + return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); } /* hw_free callback */ @@ -274,9 +217,6 @@ static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream) int channels; int err; - if (mutex_lock_interruptible(&chip->audio_mutex)) - return -EINTR; - /* notify the vchiq that it should enter spdif passthrough mode by * setting channels=0 (see * https://github.com/raspberrypi/linux/issues/528) @@ -284,18 +224,13 @@ static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream) if (chip->spdif_status & IEC958_AES0_NONAUDIO) channels = 0; else - channels = alsa_stream->channels; + channels = runtime->channels; err = bcm2835_audio_set_params(alsa_stream, channels, - alsa_stream->params_rate, - alsa_stream->pcm_format_width); + runtime->rate, + snd_pcm_format_width(runtime->format)); if (err < 0) - audio_error(" error setting hw params\n"); - - bcm2835_audio_setup(alsa_stream); - - /* in preparation of the stream, set the controls (volume level) of the stream */ - bcm2835_audio_set_ctls(alsa_stream->chip); + return err; memset(&alsa_stream->pcm_indirect, 0, sizeof(alsa_stream->pcm_indirect)); @@ -305,13 +240,10 @@ static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream) alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream); alsa_stream->period_size = snd_pcm_lib_period_bytes(substream); - alsa_stream->pos = 0; - - audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n", - alsa_stream->buffer_size, alsa_stream->period_size, - alsa_stream->pos, runtime->frame_bits); + atomic_set(&alsa_stream->pos, 0); + alsa_stream->period_offset = 0; + alsa_stream->draining = false; - mutex_unlock(&chip->audio_mutex); return 0; } @@ -321,12 +253,8 @@ static void snd_bcm2835_pcm_transfer(struct snd_pcm_substream *substream, struct snd_pcm_runtime *runtime = substream->runtime; struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; void *src = (void *) (substream->runtime->dma_area + rec->sw_data); - int err; - - err = bcm2835_audio_write(alsa_stream, bytes, src); - if (err) - audio_error(" Failed to transfer to alsa device (%d)\n", err); + bcm2835_audio_write(alsa_stream, bytes, src); } static int snd_bcm2835_pcm_ack(struct snd_pcm_substream *substream) @@ -335,7 +263,6 @@ static int snd_bcm2835_pcm_ack(struct snd_pcm_substream *substream) struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; struct snd_pcm_indirect *pcm_indirect = &alsa_stream->pcm_indirect; - pcm_indirect->hw_queue_size = runtime->hw.buffer_bytes_max; return snd_pcm_indirect_playback_transfer(substream, pcm_indirect, snd_bcm2835_pcm_transfer); } @@ -345,50 +272,18 @@ static int snd_bcm2835_pcm_trigger(struct snd_pcm_substream *substream, int cmd) { struct snd_pcm_runtime *runtime = substream->runtime; struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; - int err = 0; switch (cmd) { case SNDRV_PCM_TRIGGER_START: - audio_debug("bcm2835_AUDIO_TRIGGER_START running=%d\n", - alsa_stream->running); - if (!alsa_stream->running) { - err = bcm2835_audio_start(alsa_stream); - if (!err) { - alsa_stream->pcm_indirect.hw_io = - alsa_stream->pcm_indirect.hw_data = - bytes_to_frames(runtime, - alsa_stream->pos); - substream->ops->ack(substream); - alsa_stream->running = 1; - alsa_stream->draining = 1; - } else { - audio_error(" Failed to START alsa device (%d)\n", err); - } - } - break; + return bcm2835_audio_start(alsa_stream); + case SNDRV_PCM_TRIGGER_DRAIN: + alsa_stream->draining = true; + return bcm2835_audio_drain(alsa_stream); case SNDRV_PCM_TRIGGER_STOP: - audio_debug - ("bcm2835_AUDIO_TRIGGER_STOP running=%d draining=%d\n", - alsa_stream->running, runtime->status->state == SNDRV_PCM_STATE_DRAINING); - if (runtime->status->state == SNDRV_PCM_STATE_DRAINING) { - audio_info("DRAINING\n"); - alsa_stream->draining = 1; - } else { - audio_info("DROPPING\n"); - alsa_stream->draining = 0; - } - if (alsa_stream->running) { - err = bcm2835_audio_stop(alsa_stream); - if (err != 0) - audio_error(" Failed to STOP alsa device (%d)\n", err); - alsa_stream->running = 0; - } - break; + return bcm2835_audio_stop(alsa_stream); default: - err = -EINVAL; + return -EINVAL; } - - return err; } /* pointer callback */ @@ -398,31 +293,16 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_substream *substream) struct snd_pcm_runtime *runtime = substream->runtime; struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; - audio_debug("pcm_pointer... (%d) hwptr=%d appl=%d pos=%d\n", 0, - frames_to_bytes(runtime, runtime->status->hw_ptr), - frames_to_bytes(runtime, runtime->control->appl_ptr), - alsa_stream->pos); - return snd_pcm_indirect_playback_pointer(substream, &alsa_stream->pcm_indirect, - alsa_stream->pos); -} - -static int snd_bcm2835_pcm_lib_ioctl(struct snd_pcm_substream *substream, - unsigned int cmd, void *arg) -{ - int ret = snd_pcm_lib_ioctl(substream, cmd, arg); - - audio_info(" .. substream=%p, cmd=%d, arg=%p (%x) ret=%d\n", substream, - cmd, arg, arg ? *(unsigned int *)arg : 0, ret); - return ret; + atomic_read(&alsa_stream->pos)); } /* operators */ static const struct snd_pcm_ops snd_bcm2835_playback_ops = { .open = snd_bcm2835_playback_open, .close = snd_bcm2835_playback_close, - .ioctl = snd_bcm2835_pcm_lib_ioctl, + .ioctl = snd_pcm_lib_ioctl, .hw_params = snd_bcm2835_pcm_hw_params, .hw_free = snd_bcm2835_pcm_hw_free, .prepare = snd_bcm2835_pcm_prepare, @@ -434,7 +314,7 @@ static const struct snd_pcm_ops snd_bcm2835_playback_ops = { static const struct snd_pcm_ops snd_bcm2835_playback_spdif_ops = { .open = snd_bcm2835_playback_spdif_open, .close = snd_bcm2835_playback_close, - .ioctl = snd_bcm2835_pcm_lib_ioctl, + .ioctl = snd_pcm_lib_ioctl, .hw_params = snd_bcm2835_pcm_hw_params, .hw_free = snd_bcm2835_pcm_hw_free, .prepare = snd_bcm2835_pcm_prepare, @@ -444,104 +324,36 @@ static const struct snd_pcm_ops snd_bcm2835_playback_spdif_ops = { }; /* create a pcm device */ -int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, u32 numchannels) -{ - struct snd_pcm *pcm; - int err; - - mutex_init(&chip->audio_mutex); - if (mutex_lock_interruptible(&chip->audio_mutex)) { - audio_error("Interrupted whilst waiting for lock\n"); - return -EINTR; - } - err = snd_pcm_new(chip->card, "bcm2835 ALSA", 0, numchannels, 0, &pcm); - if (err < 0) - goto out; - pcm->private_data = chip; - strcpy(pcm->name, "bcm2835 ALSA"); - chip->pcm = pcm; - chip->dest = AUDIO_DEST_AUTO; - chip->volume = alsa2chip(0); - chip->mute = CTRL_VOL_UNMUTE; /*disable mute on startup */ - /* set operators */ - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, - &snd_bcm2835_playback_ops); - - /* pre-allocation of buffers */ - /* NOTE: this may fail */ - snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, - snd_dma_continuous_data(GFP_KERNEL), - snd_bcm2835_playback_hw.buffer_bytes_max, - snd_bcm2835_playback_hw.buffer_bytes_max); - -out: - mutex_unlock(&chip->audio_mutex); - - return 0; -} - -int snd_bcm2835_new_spdif_pcm(struct bcm2835_chip *chip) +int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, const char *name, + int idx, enum snd_bcm2835_route route, + u32 numchannels, bool spdif) { struct snd_pcm *pcm; int err; - if (mutex_lock_interruptible(&chip->audio_mutex)) { - audio_error("Interrupted whilst waiting for lock\n"); - return -EINTR; - } - err = snd_pcm_new(chip->card, "bcm2835 ALSA", 1, 1, 0, &pcm); - if (err < 0) - goto out; - - pcm->private_data = chip; - strcpy(pcm->name, "bcm2835 IEC958/HDMI"); - chip->pcm_spdif = pcm; - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, - &snd_bcm2835_playback_spdif_ops); - - /* pre-allocation of buffers */ - /* NOTE: this may fail */ - snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, - snd_dma_continuous_data(GFP_KERNEL), - snd_bcm2835_playback_spdif_hw.buffer_bytes_max, snd_bcm2835_playback_spdif_hw.buffer_bytes_max); -out: - mutex_unlock(&chip->audio_mutex); - - return 0; -} - -int snd_bcm2835_new_simple_pcm(struct bcm2835_chip *chip, - const char *name, - enum snd_bcm2835_route route, - u32 numchannels) -{ - struct snd_pcm *pcm; - int err; - - mutex_init(&chip->audio_mutex); - - err = snd_pcm_new(chip->card, name, 0, numchannels, - 0, &pcm); + err = snd_pcm_new(chip->card, name, idx, numchannels, 0, &pcm); if (err) return err; pcm->private_data = chip; + pcm->nonatomic = true; strcpy(pcm->name, name); - chip->pcm = pcm; - chip->dest = route; - chip->volume = alsa2chip(0); - chip->mute = CTRL_VOL_UNMUTE; + if (!spdif) { + chip->dest = route; + chip->volume = 0; + chip->mute = CTRL_VOL_UNMUTE; + } snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, + spdif ? &snd_bcm2835_playback_spdif_ops : &snd_bcm2835_playback_ops); - snd_pcm_lib_preallocate_pages_for_all( - pcm, - SNDRV_DMA_TYPE_CONTINUOUS, - snd_dma_continuous_data(GFP_KERNEL), - snd_bcm2835_playback_hw.buffer_bytes_max, - snd_bcm2835_playback_hw.buffer_bytes_max); + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, + chip->card->dev, 128 * 1024, 128 * 1024); + if (spdif) + chip->pcm_spdif = pcm; + else + chip->pcm = pcm; return 0; } - diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c index 868e2d6aaf1b..781754f36da7 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c @@ -1,190 +1,99 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright 2011 Broadcom Corporation. All rights reserved. */ -#include <linux/device.h> -#include <sound/core.h> -#include <sound/initval.h> -#include <sound/pcm.h> -#include <linux/io.h> -#include <linux/interrupt.h> -#include <linux/fs.h> -#include <linux/file.h> -#include <linux/mm.h> -#include <linux/syscalls.h> -#include <linux/uaccess.h> #include <linux/slab.h> -#include <linux/delay.h> -#include <linux/atomic.h> #include <linux/module.h> #include <linux/completion.h> - #include "bcm2835.h" - -/* ---- Include Files -------------------------------------------------------- */ - #include "vc_vchi_audioserv_defs.h" -/* ---- Private Constants and Types ------------------------------------------ */ - -#define BCM2835_AUDIO_STOP 0 -#define BCM2835_AUDIO_START 1 -#define BCM2835_AUDIO_WRITE 2 - -/* Logging macros (for remapping to other logging mechanisms, i.e., printf) */ -#ifdef AUDIO_DEBUG_ENABLE -#define LOG_ERR(fmt, arg...) pr_err("%s:%d " fmt, __func__, __LINE__, ##arg) -#define LOG_WARN(fmt, arg...) pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) -#define LOG_INFO(fmt, arg...) pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) -#define LOG_DBG(fmt, arg...) pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) -#else -#define LOG_ERR(fmt, arg...) pr_err("%s:%d " fmt, __func__, __LINE__, ##arg) -#define LOG_WARN(fmt, arg...) no_printk(fmt, ##arg) -#define LOG_INFO(fmt, arg...) no_printk(fmt, ##arg) -#define LOG_DBG(fmt, arg...) no_printk(fmt, ##arg) -#endif - struct bcm2835_audio_instance { - unsigned int num_connections; - VCHI_SERVICE_HANDLE_T vchi_handle[VCHI_MAX_NUM_CONNECTIONS]; + struct device *dev; + VCHI_SERVICE_HANDLE_T vchi_handle; struct completion msg_avail_comp; struct mutex vchi_mutex; struct bcm2835_alsa_stream *alsa_stream; int result; + unsigned int max_packet; short peer_version; }; static bool force_bulk; +module_param(force_bulk, bool, 0444); +MODULE_PARM_DESC(force_bulk, "Force use of vchiq bulk for audio"); -/* ---- Private Variables ---------------------------------------------------- */ - -/* ---- Private Function Prototypes ------------------------------------------ */ - -/* ---- Private Functions ---------------------------------------------------- */ - -static int bcm2835_audio_stop_worker(struct bcm2835_alsa_stream *alsa_stream); -static int bcm2835_audio_start_worker(struct bcm2835_alsa_stream *alsa_stream); -static int bcm2835_audio_write_worker(struct bcm2835_alsa_stream *alsa_stream, - unsigned int count, void *src); - -// Routine to send a message across a service - -static int -bcm2835_vchi_msg_queue(VCHI_SERVICE_HANDLE_T handle, - void *data, - unsigned int size) +static void bcm2835_audio_lock(struct bcm2835_audio_instance *instance) { - return vchi_queue_kernel_message(handle, - data, - size); + mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle); } -static const u32 BCM2835_AUDIO_WRITE_COOKIE1 = ('B' << 24 | 'C' << 16 | - 'M' << 8 | 'A'); -static const u32 BCM2835_AUDIO_WRITE_COOKIE2 = ('D' << 24 | 'A' << 16 | - 'T' << 8 | 'A'); - -struct bcm2835_audio_work { - struct work_struct my_work; - struct bcm2835_alsa_stream *alsa_stream; - int cmd; - void *src; - unsigned int count; -}; - -static void my_wq_function(struct work_struct *work) +static void bcm2835_audio_unlock(struct bcm2835_audio_instance *instance) { - struct bcm2835_audio_work *w = - container_of(work, struct bcm2835_audio_work, my_work); - int ret = -9; - - switch (w->cmd) { - case BCM2835_AUDIO_START: - ret = bcm2835_audio_start_worker(w->alsa_stream); - break; - case BCM2835_AUDIO_STOP: - ret = bcm2835_audio_stop_worker(w->alsa_stream); - break; - case BCM2835_AUDIO_WRITE: - ret = bcm2835_audio_write_worker(w->alsa_stream, w->count, - w->src); - break; - default: - LOG_ERR(" Unexpected work: %p:%d\n", w->alsa_stream, w->cmd); - break; - } - kfree((void *)work); + vchi_service_release(instance->vchi_handle); + mutex_unlock(&instance->vchi_mutex); } -int bcm2835_audio_start(struct bcm2835_alsa_stream *alsa_stream) +static int bcm2835_audio_send_msg_locked(struct bcm2835_audio_instance *instance, + struct vc_audio_msg *m, bool wait) { - struct bcm2835_audio_work *work; + int status; - work = kmalloc(sizeof(*work), GFP_ATOMIC); - /*--- Queue some work (item 1) ---*/ - if (!work) { - LOG_ERR(" .. Error: NULL work kmalloc\n"); - return -ENOMEM; + if (wait) { + instance->result = -1; + init_completion(&instance->msg_avail_comp); } - INIT_WORK(&work->my_work, my_wq_function); - work->alsa_stream = alsa_stream; - work->cmd = BCM2835_AUDIO_START; - if (!queue_work(alsa_stream->my_wq, &work->my_work)) { - kfree(work); - return -EBUSY; - } - return 0; -} - -int bcm2835_audio_stop(struct bcm2835_alsa_stream *alsa_stream) -{ - struct bcm2835_audio_work *work; - work = kmalloc(sizeof(*work), GFP_ATOMIC); - /*--- Queue some work (item 1) ---*/ - if (!work) { - LOG_ERR(" .. Error: NULL work kmalloc\n"); - return -ENOMEM; + status = vchi_queue_kernel_message(instance->vchi_handle, + m, sizeof(*m)); + if (status) { + dev_err(instance->dev, + "vchi message queue failed: %d, msg=%d\n", + status, m->type); + return -EIO; } - INIT_WORK(&work->my_work, my_wq_function); - work->alsa_stream = alsa_stream; - work->cmd = BCM2835_AUDIO_STOP; - if (!queue_work(alsa_stream->my_wq, &work->my_work)) { - kfree(work); - return -EBUSY; + + if (wait) { + if (!wait_for_completion_timeout(&instance->msg_avail_comp, + msecs_to_jiffies(10 * 1000))) { + dev_err(instance->dev, + "vchi message timeout, msg=%d\n", m->type); + return -ETIMEDOUT; + } else if (instance->result) { + dev_err(instance->dev, + "vchi message response error:%d, msg=%d\n", + instance->result, m->type); + return -EIO; + } } + return 0; } -int bcm2835_audio_write(struct bcm2835_alsa_stream *alsa_stream, - unsigned int count, void *src) +static int bcm2835_audio_send_msg(struct bcm2835_audio_instance *instance, + struct vc_audio_msg *m, bool wait) { - struct bcm2835_audio_work *work; + int err; - work = kmalloc(sizeof(*work), GFP_ATOMIC); - /*--- Queue some work (item 1) ---*/ - if (!work) { - LOG_ERR(" .. Error: NULL work kmalloc\n"); - return -ENOMEM; - } - INIT_WORK(&work->my_work, my_wq_function); - work->alsa_stream = alsa_stream; - work->cmd = BCM2835_AUDIO_WRITE; - work->src = src; - work->count = count; - if (!queue_work(alsa_stream->my_wq, &work->my_work)) { - kfree(work); - return -EBUSY; - } - return 0; + bcm2835_audio_lock(instance); + err = bcm2835_audio_send_msg_locked(instance, m, wait); + bcm2835_audio_unlock(instance); + return err; } -static void my_workqueue_quit(struct bcm2835_alsa_stream *alsa_stream) +static int bcm2835_audio_send_simple(struct bcm2835_audio_instance *instance, + int type, bool wait) { - flush_workqueue(alsa_stream->my_wq); - destroy_workqueue(alsa_stream->my_wq); - alsa_stream->my_wq = NULL; + struct vc_audio_msg m = { .type = type }; + + return bcm2835_audio_send_msg(instance, &m, wait); } +static const u32 BCM2835_AUDIO_WRITE_COOKIE1 = ('B' << 24 | 'C' << 16 | + 'M' << 8 | 'A'); +static const u32 BCM2835_AUDIO_WRITE_COOKIE2 = ('D' << 24 | 'A' << 16 | + 'T' << 8 | 'A'); + static void audio_vchi_callback(void *param, const VCHI_CALLBACK_REASON_T reason, void *msg_handle) @@ -197,172 +106,87 @@ static void audio_vchi_callback(void *param, if (reason != VCHI_CALLBACK_MSG_AVAILABLE) return; - if (!instance) { - LOG_ERR(" .. instance is null\n"); - BUG(); - return; - } - if (!instance->vchi_handle[0]) { - LOG_ERR(" .. instance->vchi_handle[0] is null\n"); - BUG(); - return; - } - status = vchi_msg_dequeue(instance->vchi_handle[0], + status = vchi_msg_dequeue(instance->vchi_handle, &m, sizeof(m), &msg_len, VCHI_FLAGS_NONE); if (m.type == VC_AUDIO_MSG_TYPE_RESULT) { - LOG_DBG(" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_RESULT, success=%d\n", - instance, m.u.result.success); instance->result = m.u.result.success; complete(&instance->msg_avail_comp); } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { - struct bcm2835_alsa_stream *alsa_stream = instance->alsa_stream; - - LOG_DBG(" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_COMPLETE, complete=%d\n", - instance, m.u.complete.count); if (m.u.complete.cookie1 != BCM2835_AUDIO_WRITE_COOKIE1 || m.u.complete.cookie2 != BCM2835_AUDIO_WRITE_COOKIE2) - LOG_ERR(" .. response is corrupt\n"); - else if (alsa_stream) { - atomic_add(m.u.complete.count, - &alsa_stream->retrieved); - bcm2835_playback_fifo(alsa_stream); - } else { - LOG_ERR(" .. unexpected alsa_stream=%p\n", - alsa_stream); - } + dev_err(instance->dev, "invalid cookie\n"); + else + bcm2835_playback_fifo(instance->alsa_stream, + m.u.complete.count); } else { - LOG_ERR(" .. unexpected m.type=%d\n", m.type); + dev_err(instance->dev, "unexpected callback type=%d\n", m.type); } } -static struct bcm2835_audio_instance * +static int vc_vchi_audio_init(VCHI_INSTANCE_T vchi_instance, - VCHI_CONNECTION_T **vchi_connections, - unsigned int num_connections) + struct bcm2835_audio_instance *instance) { - unsigned int i; - struct bcm2835_audio_instance *instance; + SERVICE_CREATION_T params = { + .version = VCHI_VERSION_EX(VC_AUDIOSERV_VER, VC_AUDIOSERV_MIN_VER), + .service_id = VC_AUDIO_SERVER_NAME, + .callback = audio_vchi_callback, + .callback_param = instance, + }; int status; - int ret; - - LOG_DBG("%s: start", __func__); - if (num_connections > VCHI_MAX_NUM_CONNECTIONS) { - LOG_ERR("%s: unsupported number of connections %u (max=%u)\n", - __func__, num_connections, VCHI_MAX_NUM_CONNECTIONS); - - return ERR_PTR(-EINVAL); - } - /* Allocate memory for this instance */ - instance = kzalloc(sizeof(*instance), GFP_KERNEL); - if (!instance) - return ERR_PTR(-ENOMEM); - - instance->num_connections = num_connections; - - /* Create a lock for exclusive, serialized VCHI connection access */ - mutex_init(&instance->vchi_mutex); /* Open the VCHI service connections */ - for (i = 0; i < num_connections; i++) { - SERVICE_CREATION_T params = { - .version = VCHI_VERSION_EX(VC_AUDIOSERV_VER, VC_AUDIOSERV_MIN_VER), - .service_id = VC_AUDIO_SERVER_NAME, - .connection = vchi_connections[i], - .rx_fifo_size = 0, - .tx_fifo_size = 0, - .callback = audio_vchi_callback, - .callback_param = instance, - .want_unaligned_bulk_rx = 1, //TODO: remove VCOS_FALSE - .want_unaligned_bulk_tx = 1, //TODO: remove VCOS_FALSE - .want_crc = 0 - }; - - LOG_DBG("%s: about to open %i\n", __func__, i); - status = vchi_service_open(vchi_instance, ¶ms, - &instance->vchi_handle[i]); - - LOG_DBG("%s: opened %i: %p=%d\n", __func__, i, instance->vchi_handle[i], status); - if (status) { - LOG_ERR("%s: failed to open VCHI service connection (status=%d)\n", - __func__, status); - ret = -EPERM; - goto err_close_services; - } - /* Finished with the service for now */ - vchi_service_release(instance->vchi_handle[i]); - } - - LOG_DBG("%s: okay\n", __func__); - return instance; + status = vchi_service_open(vchi_instance, ¶ms, + &instance->vchi_handle); -err_close_services: - for (i = 0; i < instance->num_connections; i++) { - LOG_ERR("%s: closing %i: %p\n", __func__, i, instance->vchi_handle[i]); - if (instance->vchi_handle[i]) - vchi_service_close(instance->vchi_handle[i]); + if (status) { + dev_err(instance->dev, + "failed to open VCHI service connection (status=%d)\n", + status); + kfree(instance); + return -EPERM; } - kfree(instance); - LOG_ERR("%s: error\n", __func__); + /* Finished with the service for now */ + vchi_service_release(instance->vchi_handle); - return ERR_PTR(ret); + return 0; } -static int vc_vchi_audio_deinit(struct bcm2835_audio_instance *instance) +static void vc_vchi_audio_deinit(struct bcm2835_audio_instance *instance) { - unsigned int i; - - if (!instance) { - LOG_ERR("%s: invalid handle %p\n", __func__, instance); - - return -1; - } + int status; - LOG_DBG(" .. about to lock (%d)\n", instance->num_connections); - if (mutex_lock_interruptible(&instance->vchi_mutex)) { - LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", - instance->num_connections); - return -EINTR; - } + mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle); /* Close all VCHI service connections */ - for (i = 0; i < instance->num_connections; i++) { - int status; - - LOG_DBG(" .. %i:closing %p\n", i, instance->vchi_handle[i]); - vchi_service_use(instance->vchi_handle[i]); - - status = vchi_service_close(instance->vchi_handle[i]); - if (status) { - LOG_DBG("%s: failed to close VCHI service connection (status=%d)\n", - __func__, status); - } + status = vchi_service_close(instance->vchi_handle); + if (status) { + dev_err(instance->dev, + "failed to close VCHI service connection (status=%d)\n", + status); } mutex_unlock(&instance->vchi_mutex); - - kfree(instance); - - return 0; } -int bcm2835_new_vchi_ctx(struct bcm2835_vchi_ctx *vchi_ctx) +int bcm2835_new_vchi_ctx(struct device *dev, struct bcm2835_vchi_ctx *vchi_ctx) { int ret; /* Initialize and create a VCHI connection */ ret = vchi_initialise(&vchi_ctx->vchi_instance); if (ret) { - LOG_ERR("%s: failed to initialise VCHI instance (ret=%d)\n", - __func__, ret); - + dev_err(dev, "failed to initialise VCHI instance (ret=%d)\n", + ret); return -EIO; } - ret = vchi_connect(NULL, 0, vchi_ctx->vchi_instance); + ret = vchi_connect(vchi_ctx->vchi_instance); if (ret) { - LOG_ERR("%s: failed to connect VCHI instance (ret=%d)\n", - __func__, ret); + dev_dbg(dev, "failed to connect VCHI instance (ret=%d)\n", + ret); kfree(vchi_ctx->vchi_instance); vchi_ctx->vchi_instance = NULL; @@ -381,473 +205,170 @@ void bcm2835_free_vchi_ctx(struct bcm2835_vchi_ctx *vchi_ctx) vchi_ctx->vchi_instance = NULL; } -static int bcm2835_audio_open_connection(struct bcm2835_alsa_stream *alsa_stream) -{ - struct bcm2835_audio_instance *instance = - (struct bcm2835_audio_instance *)alsa_stream->instance; - struct bcm2835_vchi_ctx *vhci_ctx = alsa_stream->chip->vchi_ctx; - - LOG_INFO("%s: start\n", __func__); - BUG_ON(instance); - if (instance) { - LOG_ERR("%s: VCHI instance already open (%p)\n", - __func__, instance); - instance->alsa_stream = alsa_stream; - alsa_stream->instance = instance; - return 0; - } - - /* Initialize an instance of the audio service */ - instance = vc_vchi_audio_init(vhci_ctx->vchi_instance, - &vhci_ctx->vchi_connection, 1); - - if (IS_ERR(instance)) { - LOG_ERR("%s: failed to initialize audio service\n", __func__); - - /* vchi_instance is retained for use the next time. */ - return PTR_ERR(instance); - } - - instance->alsa_stream = alsa_stream; - alsa_stream->instance = instance; - - LOG_DBG(" success !\n"); - - return 0; -} - int bcm2835_audio_open(struct bcm2835_alsa_stream *alsa_stream) { + struct bcm2835_vchi_ctx *vchi_ctx = alsa_stream->chip->vchi_ctx; struct bcm2835_audio_instance *instance; - struct vc_audio_msg m; - int status; - int ret; + int err; - alsa_stream->my_wq = alloc_workqueue("my_queue", WQ_HIGHPRI, 1); - if (!alsa_stream->my_wq) + /* Allocate memory for this instance */ + instance = kzalloc(sizeof(*instance), GFP_KERNEL); + if (!instance) return -ENOMEM; + mutex_init(&instance->vchi_mutex); + instance->dev = alsa_stream->chip->dev; + instance->alsa_stream = alsa_stream; + alsa_stream->instance = instance; - ret = bcm2835_audio_open_connection(alsa_stream); - if (ret) - goto free_wq; - - instance = alsa_stream->instance; - LOG_DBG(" instance (%p)\n", instance); - - if (mutex_lock_interruptible(&instance->vchi_mutex)) { - LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", instance->num_connections); - ret = -EINTR; - goto free_wq; - } - vchi_service_use(instance->vchi_handle[0]); - - m.type = VC_AUDIO_MSG_TYPE_OPEN; - - /* Send the message to the videocore */ - status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], - &m, sizeof(m)); - - if (status) { - LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", - __func__, status); - - ret = -1; - goto unlock; - } + err = vc_vchi_audio_init(vchi_ctx->vchi_instance, + instance); + if (err < 0) + goto free_instance; - ret = 0; + err = bcm2835_audio_send_simple(instance, VC_AUDIO_MSG_TYPE_OPEN, + false); + if (err < 0) + goto deinit; -unlock: - vchi_service_release(instance->vchi_handle[0]); - mutex_unlock(&instance->vchi_mutex); + bcm2835_audio_lock(instance); + vchi_get_peer_version(instance->vchi_handle, &instance->peer_version); + bcm2835_audio_unlock(instance); + if (instance->peer_version < 2 || force_bulk) + instance->max_packet = 0; /* bulk transfer */ + else + instance->max_packet = 4000; -free_wq: - if (ret) - destroy_workqueue(alsa_stream->my_wq); + return 0; - return ret; + deinit: + vc_vchi_audio_deinit(instance); + free_instance: + alsa_stream->instance = NULL; + kfree(instance); + return err; } -static int bcm2835_audio_set_ctls_chan(struct bcm2835_alsa_stream *alsa_stream, - struct bcm2835_chip *chip) +int bcm2835_audio_set_ctls(struct bcm2835_alsa_stream *alsa_stream) { - struct vc_audio_msg m; - struct bcm2835_audio_instance *instance = alsa_stream->instance; - int status; - int ret; - - LOG_INFO(" Setting ALSA dest(%d), volume(%d)\n", - chip->dest, chip->volume); - - if (mutex_lock_interruptible(&instance->vchi_mutex)) { - LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", - instance->num_connections); - return -EINTR; - } - vchi_service_use(instance->vchi_handle[0]); - - instance->result = -1; + struct bcm2835_chip *chip = alsa_stream->chip; + struct vc_audio_msg m = {}; m.type = VC_AUDIO_MSG_TYPE_CONTROL; m.u.control.dest = chip->dest; - m.u.control.volume = chip->volume; + if (!chip->mute) + m.u.control.volume = CHIP_MIN_VOLUME; + else + m.u.control.volume = alsa2chip(chip->volume); - /* Create the message available completion */ - init_completion(&instance->msg_avail_comp); - - /* Send the message to the videocore */ - status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], - &m, sizeof(m)); - - if (status) { - LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", - __func__, status); - - ret = -1; - goto unlock; - } - - /* We are expecting a reply from the videocore */ - wait_for_completion(&instance->msg_avail_comp); - - if (instance->result) { - LOG_ERR("%s: result=%d\n", __func__, instance->result); - - ret = -1; - goto unlock; - } - - ret = 0; - -unlock: - vchi_service_release(instance->vchi_handle[0]); - mutex_unlock(&instance->vchi_mutex); - - return ret; -} - -int bcm2835_audio_set_ctls(struct bcm2835_chip *chip) -{ - int i; - int ret = 0; - - LOG_DBG(" Setting ALSA dest(%d), volume(%d)\n", chip->dest, chip->volume); - - /* change ctls for all substreams */ - for (i = 0; i < MAX_SUBSTREAMS; i++) { - if (chip->avail_substreams & (1 << i)) { - if (!chip->alsa_stream[i]) { - LOG_DBG(" No ALSA stream available?! %i:%p (%x)\n", i, chip->alsa_stream[i], chip->avail_substreams); - ret = 0; - } else if (bcm2835_audio_set_ctls_chan(chip->alsa_stream[i], chip) != 0) { - LOG_ERR("Couldn't set the controls for stream %d\n", i); - ret = -1; - } else { - LOG_DBG(" Controls set for stream %d\n", i); - } - } - } - return ret; + return bcm2835_audio_send_msg(alsa_stream->instance, &m, true); } int bcm2835_audio_set_params(struct bcm2835_alsa_stream *alsa_stream, unsigned int channels, unsigned int samplerate, unsigned int bps) { - struct vc_audio_msg m; - struct bcm2835_audio_instance *instance = alsa_stream->instance; - int status; - int ret; - - LOG_INFO(" Setting ALSA channels(%d), samplerate(%d), bits-per-sample(%d)\n", - channels, samplerate, bps); + struct vc_audio_msg m = { + .type = VC_AUDIO_MSG_TYPE_CONFIG, + .u.config.channels = channels, + .u.config.samplerate = samplerate, + .u.config.bps = bps, + }; + int err; /* resend ctls - alsa_stream may not have been open when first send */ - ret = bcm2835_audio_set_ctls_chan(alsa_stream, alsa_stream->chip); - if (ret) { - LOG_ERR(" Alsa controls not supported\n"); - return -EINVAL; - } - - if (mutex_lock_interruptible(&instance->vchi_mutex)) { - LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", instance->num_connections); - return -EINTR; - } - vchi_service_use(instance->vchi_handle[0]); - - instance->result = -1; + err = bcm2835_audio_set_ctls(alsa_stream); + if (err) + return err; - m.type = VC_AUDIO_MSG_TYPE_CONFIG; - m.u.config.channels = channels; - m.u.config.samplerate = samplerate; - m.u.config.bps = bps; - - /* Create the message available completion */ - init_completion(&instance->msg_avail_comp); - - /* Send the message to the videocore */ - status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], - &m, sizeof(m)); - - if (status) { - LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", - __func__, status); - - ret = -1; - goto unlock; - } - - /* We are expecting a reply from the videocore */ - wait_for_completion(&instance->msg_avail_comp); - - if (instance->result) { - LOG_ERR("%s: result=%d", __func__, instance->result); - - ret = -1; - goto unlock; - } - - ret = 0; - -unlock: - vchi_service_release(instance->vchi_handle[0]); - mutex_unlock(&instance->vchi_mutex); - - return ret; + return bcm2835_audio_send_msg(alsa_stream->instance, &m, true); } -int bcm2835_audio_setup(struct bcm2835_alsa_stream *alsa_stream) +int bcm2835_audio_start(struct bcm2835_alsa_stream *alsa_stream) { - - return 0; + return bcm2835_audio_send_simple(alsa_stream->instance, + VC_AUDIO_MSG_TYPE_START, false); } -static int bcm2835_audio_start_worker(struct bcm2835_alsa_stream *alsa_stream) +int bcm2835_audio_stop(struct bcm2835_alsa_stream *alsa_stream) { - struct vc_audio_msg m; - struct bcm2835_audio_instance *instance = alsa_stream->instance; - int status; - int ret; - - if (mutex_lock_interruptible(&instance->vchi_mutex)) { - LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", - instance->num_connections); - return -EINTR; - } - vchi_service_use(instance->vchi_handle[0]); - - m.type = VC_AUDIO_MSG_TYPE_START; - - /* Send the message to the videocore */ - status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], - &m, sizeof(m)); - - if (status) { - LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", - __func__, status); - - ret = -1; - goto unlock; - } - - ret = 0; - -unlock: - vchi_service_release(instance->vchi_handle[0]); - mutex_unlock(&instance->vchi_mutex); - return ret; + return bcm2835_audio_send_simple(alsa_stream->instance, + VC_AUDIO_MSG_TYPE_STOP, false); } -static int bcm2835_audio_stop_worker(struct bcm2835_alsa_stream *alsa_stream) +int bcm2835_audio_drain(struct bcm2835_alsa_stream *alsa_stream) { - struct vc_audio_msg m; - struct bcm2835_audio_instance *instance = alsa_stream->instance; - int status; - int ret; - - if (mutex_lock_interruptible(&instance->vchi_mutex)) { - LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", - instance->num_connections); - return -EINTR; - } - vchi_service_use(instance->vchi_handle[0]); - - m.type = VC_AUDIO_MSG_TYPE_STOP; - m.u.stop.draining = alsa_stream->draining; - - /* Send the message to the videocore */ - status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], - &m, sizeof(m)); - - if (status) { - LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", - __func__, status); + struct vc_audio_msg m = { + .type = VC_AUDIO_MSG_TYPE_STOP, + .u.stop.draining = 1, + }; - ret = -1; - goto unlock; - } - - ret = 0; - -unlock: - vchi_service_release(instance->vchi_handle[0]); - mutex_unlock(&instance->vchi_mutex); - return ret; + return bcm2835_audio_send_msg(alsa_stream->instance, &m, false); } int bcm2835_audio_close(struct bcm2835_alsa_stream *alsa_stream) { - struct vc_audio_msg m; struct bcm2835_audio_instance *instance = alsa_stream->instance; - int status; - int ret; + int err; - my_workqueue_quit(alsa_stream); - - if (mutex_lock_interruptible(&instance->vchi_mutex)) { - LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", - instance->num_connections); - return -EINTR; - } - vchi_service_use(instance->vchi_handle[0]); - - m.type = VC_AUDIO_MSG_TYPE_CLOSE; - - /* Create the message available completion */ - init_completion(&instance->msg_avail_comp); - - /* Send the message to the videocore */ - status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], - &m, sizeof(m)); - - if (status) { - LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", - __func__, status); - ret = -1; - goto unlock; - } - - /* We are expecting a reply from the videocore */ - wait_for_completion(&instance->msg_avail_comp); - - if (instance->result) { - LOG_ERR("%s: failed result (result=%d)\n", - __func__, instance->result); - - ret = -1; - goto unlock; - } - - ret = 0; - -unlock: - vchi_service_release(instance->vchi_handle[0]); - mutex_unlock(&instance->vchi_mutex); + err = bcm2835_audio_send_simple(alsa_stream->instance, + VC_AUDIO_MSG_TYPE_CLOSE, true); /* Stop the audio service */ vc_vchi_audio_deinit(instance); alsa_stream->instance = NULL; + kfree(instance); - return ret; + return err; } -static int bcm2835_audio_write_worker(struct bcm2835_alsa_stream *alsa_stream, - unsigned int count, void *src) +int bcm2835_audio_write(struct bcm2835_alsa_stream *alsa_stream, + unsigned int size, void *src) { - struct vc_audio_msg m; struct bcm2835_audio_instance *instance = alsa_stream->instance; - int status; - int ret; - - LOG_INFO(" Writing %d bytes from %p\n", count, src); - - if (mutex_lock_interruptible(&instance->vchi_mutex)) { - LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", - instance->num_connections); - return -EINTR; - } - vchi_service_use(instance->vchi_handle[0]); - - if (instance->peer_version == 0 && - vchi_get_peer_version(instance->vchi_handle[0], &instance->peer_version) == 0) - LOG_DBG("%s: client version %d connected\n", __func__, instance->peer_version); - - m.type = VC_AUDIO_MSG_TYPE_WRITE; - m.u.write.count = count; - // old version uses bulk, new version uses control - m.u.write.max_packet = instance->peer_version < 2 || force_bulk ? 0 : 4000; - m.u.write.cookie1 = BCM2835_AUDIO_WRITE_COOKIE1; - m.u.write.cookie2 = BCM2835_AUDIO_WRITE_COOKIE2; - m.u.write.silence = src == NULL; - - /* Send the message to the videocore */ - status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], - &m, sizeof(m)); + struct vc_audio_msg m = { + .type = VC_AUDIO_MSG_TYPE_WRITE, + .u.write.count = size, + .u.write.max_packet = instance->max_packet, + .u.write.cookie1 = BCM2835_AUDIO_WRITE_COOKIE1, + .u.write.cookie2 = BCM2835_AUDIO_WRITE_COOKIE2, + }; + unsigned int count; + int err, status; - if (status) { - LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", - __func__, status); + if (!size) + return 0; - ret = -1; + bcm2835_audio_lock(instance); + err = bcm2835_audio_send_msg_locked(instance, &m, false); + if (err < 0) goto unlock; - } - if (!m.u.write.silence) { - if (!m.u.write.max_packet) { - /* Send the message to the videocore */ - status = vchi_bulk_queue_transmit(instance->vchi_handle[0], - src, count, - 0 * VCHI_FLAGS_BLOCK_UNTIL_QUEUED - + - 1 * VCHI_FLAGS_BLOCK_UNTIL_DATA_READ, - NULL); - } else { - while (count > 0) { - int bytes = min_t(int, m.u.write.max_packet, count); - - status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], - src, bytes); - src = (char *)src + bytes; - count -= bytes; - } - } - if (status) { - LOG_ERR("%s: failed on vchi_bulk_queue_transmit (status=%d)\n", - __func__, status); - ret = -1; - goto unlock; + count = size; + if (!instance->max_packet) { + /* Send the message to the videocore */ + status = vchi_bulk_queue_transmit(instance->vchi_handle, + src, count, + VCHI_FLAGS_BLOCK_UNTIL_DATA_READ, + NULL); + } else { + while (count > 0) { + int bytes = min(instance->max_packet, count); + + status = vchi_queue_kernel_message(instance->vchi_handle, + src, bytes); + src += bytes; + count -= bytes; } } - ret = 0; - -unlock: - vchi_service_release(instance->vchi_handle[0]); - mutex_unlock(&instance->vchi_mutex); - return ret; -} - -/** - * Returns all buffers from arm->vc - */ -void bcm2835_audio_flush_buffers(struct bcm2835_alsa_stream *alsa_stream) -{ -} - -/** - * Forces VC to flush(drop) its filled playback buffers and - * return them the us. (VC->ARM) - */ -void bcm2835_audio_flush_playback_buffers(struct bcm2835_alsa_stream *alsa_stream) -{ -} -unsigned int bcm2835_audio_retrieve_buffers(struct bcm2835_alsa_stream *alsa_stream) -{ - unsigned int count = atomic_read(&alsa_stream->retrieved); + if (status) { + dev_err(instance->dev, + "failed on %d bytes transfer (status=%d)\n", + size, status); + err = -EIO; + } - atomic_sub(count, &alsa_stream->retrieved); - return count; + unlock: + bcm2835_audio_unlock(instance); + return err; } - -module_param(force_bulk, bool, 0444); -MODULE_PARM_DESC(force_bulk, "Force use of vchiq bulk for audio"); diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c index da0fa34501fa..87d56ab1ffa0 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c @@ -22,38 +22,6 @@ module_param(enable_compat_alsa, bool, 0444); MODULE_PARM_DESC(enable_compat_alsa, "Enables ALSA compatibility virtual audio device"); -static void snd_devm_unregister_child(struct device *dev, void *res) -{ - struct device *childdev = *(struct device **)res; - struct bcm2835_chip *chip = dev_get_drvdata(childdev); - struct snd_card *card = chip->card; - - snd_card_free(card); - - device_unregister(childdev); -} - -static int snd_devm_add_child(struct device *dev, struct device *child) -{ - struct device **dr; - int ret; - - dr = devres_alloc(snd_devm_unregister_child, sizeof(*dr), GFP_KERNEL); - if (!dr) - return -ENOMEM; - - ret = device_add(child); - if (ret) { - devres_free(dr); - return ret; - } - - *dr = child; - devres_add(dev, dr); - - return 0; -} - static void bcm2835_devm_free_vchi_ctx(struct device *dev, void *res) { struct bcm2835_vchi_ctx *vchi_ctx = res; @@ -73,7 +41,7 @@ static int bcm2835_devm_add_vchi_ctx(struct device *dev) memset(vchi_ctx, 0, sizeof(*vchi_ctx)); - ret = bcm2835_new_vchi_ctx(vchi_ctx); + ret = bcm2835_new_vchi_ctx(dev, vchi_ctx); if (ret) { devres_free(vchi_ctx); return ret; @@ -84,101 +52,6 @@ static int bcm2835_devm_add_vchi_ctx(struct device *dev) return 0; } -static void snd_bcm2835_release(struct device *dev) -{ - struct bcm2835_chip *chip = dev_get_drvdata(dev); - - kfree(chip); -} - -static struct device * -snd_create_device(struct device *parent, - struct device_driver *driver, - const char *name) -{ - struct device *device; - int ret; - - device = devm_kzalloc(parent, sizeof(*device), GFP_KERNEL); - if (!device) - return ERR_PTR(-ENOMEM); - - device_initialize(device); - device->parent = parent; - device->driver = driver; - device->release = snd_bcm2835_release; - - dev_set_name(device, "%s", name); - - ret = snd_devm_add_child(parent, device); - if (ret) - return ERR_PTR(ret); - - return device; -} - -/* component-destructor - * (see "Management of Cards and Components") - */ -static int snd_bcm2835_dev_free(struct snd_device *device) -{ - struct bcm2835_chip *chip = device->device_data; - struct snd_card *card = chip->card; - - snd_device_free(card, chip); - - return 0; -} - -/* chip-specific constructor - * (see "Management of Cards and Components") - */ -static int snd_bcm2835_create(struct snd_card *card, - struct bcm2835_chip **rchip) -{ - struct bcm2835_chip *chip; - int err; - static struct snd_device_ops ops = { - .dev_free = snd_bcm2835_dev_free, - }; - - *rchip = NULL; - - chip = kzalloc(sizeof(*chip), GFP_KERNEL); - if (!chip) - return -ENOMEM; - - chip->card = card; - - chip->vchi_ctx = devres_find(card->dev->parent, - bcm2835_devm_free_vchi_ctx, NULL, NULL); - if (!chip->vchi_ctx) { - kfree(chip); - return -ENODEV; - } - - err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); - if (err) { - kfree(chip); - return err; - } - - *rchip = chip; - return 0; -} - -static struct snd_card *snd_bcm2835_card_new(struct device *dev) -{ - struct snd_card *card; - int ret; - - ret = snd_card_new(dev, -1, NULL, THIS_MODULE, 0, &card); - if (ret) - return ERR_PTR(ret); - - return card; -} - typedef int (*bcm2835_audio_newpcm_func)(struct bcm2835_chip *chip, const char *name, enum snd_bcm2835_route route, @@ -203,17 +76,26 @@ static int bcm2835_audio_alsa_newpcm(struct bcm2835_chip *chip, { int err; - err = snd_bcm2835_new_pcm(chip, numchannels - 1); + err = snd_bcm2835_new_pcm(chip, "bcm2835 ALSA", 0, AUDIO_DEST_AUTO, + numchannels - 1, false); if (err) return err; - err = snd_bcm2835_new_spdif_pcm(chip); + err = snd_bcm2835_new_pcm(chip, "bcm2835 IEC958/HDMI", 1, 0, 1, true); if (err) return err; return 0; } +static int bcm2835_audio_simple_newpcm(struct bcm2835_chip *chip, + const char *name, + enum snd_bcm2835_route route, + u32 numchannels) +{ + return snd_bcm2835_new_pcm(chip, name, 0, route, numchannels, false); +} + static struct bcm2835_audio_driver bcm2835_audio_alsa = { .driver = { .name = "bcm2835_alsa", @@ -234,7 +116,7 @@ static struct bcm2835_audio_driver bcm2835_audio_hdmi = { .shortname = "bcm2835 HDMI", .longname = "bcm2835 HDMI", .minchannels = 1, - .newpcm = snd_bcm2835_new_simple_pcm, + .newpcm = bcm2835_audio_simple_newpcm, .newctl = snd_bcm2835_new_hdmi_ctl, .route = AUDIO_DEST_HDMI }; @@ -247,7 +129,7 @@ static struct bcm2835_audio_driver bcm2835_audio_headphones = { .shortname = "bcm2835 Headphones", .longname = "bcm2835 Headphones", .minchannels = 1, - .newpcm = snd_bcm2835_new_simple_pcm, + .newpcm = bcm2835_audio_simple_newpcm, .newctl = snd_bcm2835_new_headphones_ctl, .route = AUDIO_DEST_HEADPHONES }; @@ -272,71 +154,75 @@ static struct bcm2835_audio_drivers children_devices[] = { }, }; -static int snd_add_child_device(struct device *device, +static void bcm2835_card_free(void *data) +{ + snd_card_free(data); +} + +static int snd_add_child_device(struct device *dev, struct bcm2835_audio_driver *audio_driver, u32 numchans) { struct snd_card *card; - struct device *child; struct bcm2835_chip *chip; - int err, i; - - child = snd_create_device(device, &audio_driver->driver, - audio_driver->driver.name); - if (IS_ERR(child)) { - dev_err(device, - "Unable to create child device %p, error %ld", - audio_driver->driver.name, - PTR_ERR(child)); - return PTR_ERR(child); + int err; + + err = snd_card_new(dev, -1, NULL, THIS_MODULE, sizeof(*chip), &card); + if (err < 0) { + dev_err(dev, "Failed to create card"); + return err; } - card = snd_bcm2835_card_new(child); - if (IS_ERR(card)) { - dev_err(child, "Failed to create card"); - return PTR_ERR(card); + chip = card->private_data; + chip->card = card; + chip->dev = dev; + mutex_init(&chip->audio_mutex); + + chip->vchi_ctx = devres_find(dev, + bcm2835_devm_free_vchi_ctx, NULL, NULL); + if (!chip->vchi_ctx) { + err = -ENODEV; + goto error; } - snd_card_set_dev(card, child); strcpy(card->driver, audio_driver->driver.name); strcpy(card->shortname, audio_driver->shortname); strcpy(card->longname, audio_driver->longname); - err = snd_bcm2835_create(card, &chip); - if (err) { - dev_err(child, "Failed to create chip, error %d\n", err); - return err; - } - - chip->dev = child; - err = audio_driver->newpcm(chip, audio_driver->shortname, audio_driver->route, numchans); if (err) { - dev_err(child, "Failed to create pcm, error %d\n", err); - return err; + dev_err(dev, "Failed to create pcm, error %d\n", err); + goto error; } err = audio_driver->newctl(chip); if (err) { - dev_err(child, "Failed to create controls, error %d\n", err); - return err; + dev_err(dev, "Failed to create controls, error %d\n", err); + goto error; } - for (i = 0; i < numchans; i++) - chip->avail_substreams |= (1 << i); - err = snd_card_register(card); if (err) { - dev_err(child, "Failed to register card, error %d\n", err); - return err; + dev_err(dev, "Failed to register card, error %d\n", err); + goto error; } - dev_set_drvdata(child, chip); - dev_info(child, "card created with %d channels\n", numchans); + dev_set_drvdata(dev, chip); + + err = devm_add_action(dev, bcm2835_card_free, card); + if (err < 0) { + dev_err(dev, "Failed to add devm action, err %d\n", err); + goto error; + } + dev_info(dev, "card created with %d channels\n", numchans); return 0; + + error: + snd_card_free(card); + return err; } static int snd_add_child_devices(struct device *device, u32 numchans) diff --git a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h index 5dc427240a1d..34a0125ce646 100644 --- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h @@ -5,59 +5,12 @@ #define __SOUND_ARM_BCM2835_H #include <linux/device.h> -#include <linux/list.h> -#include <linux/interrupt.h> #include <linux/wait.h> #include <sound/core.h> -#include <sound/initval.h> #include <sound/pcm.h> -#include <sound/pcm_params.h> #include <sound/pcm-indirect.h> -#include <linux/workqueue.h> - #include "interface/vchi/vchi.h" -/* - * #define AUDIO_DEBUG_ENABLE - * #define AUDIO_VERBOSE_DEBUG_ENABLE - */ - -/* Debug macros */ - -#ifdef AUDIO_DEBUG_ENABLE -#ifdef AUDIO_VERBOSE_DEBUG_ENABLE - -#define audio_debug(fmt, arg...) \ - pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) - -#define audio_info(fmt, arg...) \ - pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) - -#else - -#define audio_debug(fmt, arg...) - -#define audio_info(fmt, arg...) - -#endif /* AUDIO_VERBOSE_DEBUG_ENABLE */ - -#else - -#define audio_debug(fmt, arg...) - -#define audio_info(fmt, arg...) - -#endif /* AUDIO_DEBUG_ENABLE */ - -#define audio_error(fmt, arg...) \ - pr_err("%s:%d " fmt, __func__, __LINE__, ##arg) - -#define audio_warning(fmt, arg...) \ - pr_warn("%s:%d " fmt, __func__, __LINE__, ##arg) - -#define audio_alert(fmt, arg...) \ - pr_alert("%s:%d " fmt, __func__, __LINE__, ##arg) - #define MAX_SUBSTREAMS (8) #define AVAIL_SUBSTREAMS_MASK (0xff) @@ -74,6 +27,8 @@ enum { // convert chip to alsa volume #define chip2alsa(vol) -(((vol) * 100) >> 8) +#define CHIP_MIN_VOLUME 26214 /* minimum level aka mute */ + /* Some constants for values .. */ enum snd_bcm2835_route { AUDIO_DEST_AUTO = 0, @@ -90,7 +45,6 @@ enum snd_bcm2835_ctrl { struct bcm2835_vchi_ctx { VCHI_INSTANCE_T vchi_instance; - VCHI_CONNECTION_T *vchi_connection; }; /* definition of the chip-specific record */ @@ -98,13 +52,10 @@ struct bcm2835_chip { struct snd_card *card; struct snd_pcm *pcm; struct snd_pcm *pcm_spdif; - /* Bitmat for valid reg_base and irq numbers */ - unsigned int avail_substreams; struct device *dev; struct bcm2835_alsa_stream *alsa_stream[MAX_SUBSTREAMS]; int volume; - int old_volume; /* stores the volume value whist muted */ int dest; int mute; @@ -120,38 +71,26 @@ struct bcm2835_alsa_stream { struct snd_pcm_substream *substream; struct snd_pcm_indirect pcm_indirect; - spinlock_t lock; - - int open; - int running; int draining; - int channels; - int params_rate; - int pcm_format_width; - - unsigned int pos; + atomic_t pos; + unsigned int period_offset; unsigned int buffer_size; unsigned int period_size; - atomic_t retrieved; struct bcm2835_audio_instance *instance; - struct workqueue_struct *my_wq; int idx; }; int snd_bcm2835_new_ctl(struct bcm2835_chip *chip); -int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, u32 numchannels); -int snd_bcm2835_new_spdif_pcm(struct bcm2835_chip *chip); -int snd_bcm2835_new_simple_pcm(struct bcm2835_chip *chip, - const char *name, - enum snd_bcm2835_route route, - u32 numchannels); +int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, const char *name, + int idx, enum snd_bcm2835_route route, + u32 numchannels, bool spdif); int snd_bcm2835_new_hdmi_ctl(struct bcm2835_chip *chip); int snd_bcm2835_new_headphones_ctl(struct bcm2835_chip *chip); -int bcm2835_new_vchi_ctx(struct bcm2835_vchi_ctx *vchi_ctx); +int bcm2835_new_vchi_ctx(struct device *dev, struct bcm2835_vchi_ctx *vchi_ctx); void bcm2835_free_vchi_ctx(struct bcm2835_vchi_ctx *vchi_ctx); int bcm2835_audio_open(struct bcm2835_alsa_stream *alsa_stream); @@ -159,16 +98,15 @@ int bcm2835_audio_close(struct bcm2835_alsa_stream *alsa_stream); int bcm2835_audio_set_params(struct bcm2835_alsa_stream *alsa_stream, unsigned int channels, unsigned int samplerate, unsigned int bps); -int bcm2835_audio_setup(struct bcm2835_alsa_stream *alsa_stream); int bcm2835_audio_start(struct bcm2835_alsa_stream *alsa_stream); int bcm2835_audio_stop(struct bcm2835_alsa_stream *alsa_stream); -int bcm2835_audio_set_ctls(struct bcm2835_chip *chip); +int bcm2835_audio_drain(struct bcm2835_alsa_stream *alsa_stream); +int bcm2835_audio_set_ctls(struct bcm2835_alsa_stream *alsa_stream); int bcm2835_audio_write(struct bcm2835_alsa_stream *alsa_stream, unsigned int count, void *src); -void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream); +void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream, + unsigned int size); unsigned int bcm2835_audio_retrieve_buffers(struct bcm2835_alsa_stream *alsa_stream); -void bcm2835_audio_flush_buffers(struct bcm2835_alsa_stream *alsa_stream); -void bcm2835_audio_flush_playback_buffers(struct bcm2835_alsa_stream *alsa_stream); #endif /* __SOUND_ARM_BCM2835_H */ diff --git a/drivers/staging/vc04_services/bcm2835-camera/TODO b/drivers/staging/vc04_services/bcm2835-camera/TODO index cefce72d814f..6c2b4ffe4996 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/TODO +++ b/drivers/staging/vc04_services/bcm2835-camera/TODO @@ -15,9 +15,3 @@ padding in the V4L2 spec, but that padding doesn't match what the hardware can do. If we exposed the native padding requirements through the V4L2 "multiplanar" formats, the firmware would have one less copy it needed to do. - -3) Port to ARM64 - -The bulk_receive() does some manual cache flushing that are 32-bit ARM -only, which we should convert to proper cross-platform APIs. - diff --git a/drivers/staging/vc04_services/bcm2835-camera/controls.c b/drivers/staging/vc04_services/bcm2835-camera/controls.c index cff7b1e07153..a2c55cb2192a 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/controls.c +++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c @@ -1106,7 +1106,7 @@ static const struct bm2835_mmal_v4l2_ctrl v4l2_ctrls[V4L2_CTRL_COUNT] = { { V4L2_CID_POWER_LINE_FREQUENCY, MMAL_CONTROL_TYPE_STD_MENU, 0, ARRAY_SIZE(mains_freq_qmenu) - 1, - 1, 1, NULL, + 1, 1, mains_freq_qmenu, MMAL_PARAMETER_FLICKER_AVOID, &ctrl_set_flicker_avoidance, false diff --git a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c index 51e5b04ff0f5..cc2d9933b969 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c @@ -21,7 +21,6 @@ #include <linux/slab.h> #include <linux/completion.h> #include <linux/vmalloc.h> -#include <asm/cacheflush.h> #include <media/videobuf2-vmalloc.h> #include "mmal-common.h" @@ -1803,19 +1802,12 @@ int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance) { int status; struct vchiq_mmal_instance *instance; - static VCHI_CONNECTION_T *vchi_connection; static VCHI_INSTANCE_T vchi_instance; SERVICE_CREATION_T params = { .version = VCHI_VERSION_EX(VC_MMAL_VER, VC_MMAL_MIN_VER), .service_id = VC_MMAL_SERVER_NAME, - .connection = vchi_connection, - .rx_fifo_size = 0, - .tx_fifo_size = 0, .callback = service_callback, .callback_param = NULL, - .want_unaligned_bulk_rx = 1, - .want_unaligned_bulk_tx = 1, - .want_crc = 0 }; /* compile time checks to ensure structure size as they are @@ -1839,7 +1831,7 @@ int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance) return -EIO; } - status = vchi_connect(NULL, 0, vchi_instance); + status = vchi_connect(vchi_instance); if (status) { pr_err("Failed to connect VCHI instance (status=%d)\n", status); return -EIO; diff --git a/drivers/staging/vc04_services/interface/vchi/connections/connection.h b/drivers/staging/vc04_services/interface/vchi/connections/connection.h deleted file mode 100644 index 67c84386c65a..000000000000 --- a/drivers/staging/vc04_services/interface/vchi/connections/connection.h +++ /dev/null @@ -1,324 +0,0 @@ -/** - * Copyright (c) 2010-2012 Broadcom. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The names of the above-listed copyright holders may not be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2, as published by the Free - * Software Foundation. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS - * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef CONNECTION_H_ -#define CONNECTION_H_ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/semaphore.h> - -#include "interface/vchi/vchi_cfg_internal.h" -#include "interface/vchi/vchi_common.h" -#include "interface/vchi/message_drivers/message.h" - -/****************************************************************************** - Global defs - *****************************************************************************/ - -// Opaque handle for a connection / service pair -typedef struct opaque_vchi_connection_connected_service_handle_t *VCHI_CONNECTION_SERVICE_HANDLE_T; - -// opaque handle to the connection state information -typedef struct opaque_vchi_connection_info_t VCHI_CONNECTION_STATE_T; - -typedef struct vchi_connection_t VCHI_CONNECTION_T; - -/****************************************************************************** - API - *****************************************************************************/ - -// Routine to init a connection with a particular low level driver -typedef VCHI_CONNECTION_STATE_T * (*VCHI_CONNECTION_INIT_T)( struct vchi_connection_t * connection, - const VCHI_MESSAGE_DRIVER_T * driver ); - -// Routine to control CRC enabling at a connection level -typedef int32_t (*VCHI_CONNECTION_CRC_CONTROL_T)( VCHI_CONNECTION_STATE_T *state_handle, - VCHI_CRC_CONTROL_T control ); - -// Routine to create a service -typedef int32_t (*VCHI_CONNECTION_SERVICE_CONNECT_T)( VCHI_CONNECTION_STATE_T *state_handle, - int32_t service_id, - uint32_t rx_fifo_size, - uint32_t tx_fifo_size, - int server, - VCHI_CALLBACK_T callback, - void *callback_param, - int32_t want_crc, - int32_t want_unaligned_bulk_rx, - int32_t want_unaligned_bulk_tx, - VCHI_CONNECTION_SERVICE_HANDLE_T *service_handle ); - -// Routine to close a service -typedef int32_t (*VCHI_CONNECTION_SERVICE_DISCONNECT_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle ); - -// Routine to queue a message -typedef int32_t (*VCHI_CONNECTION_SERVICE_QUEUE_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - const void *data, - uint32_t data_size, - VCHI_FLAGS_T flags, - void *msg_handle ); - -// scatter-gather (vector) message queueing -typedef int32_t (*VCHI_CONNECTION_SERVICE_QUEUE_MESSAGEV_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - VCHI_MSG_VECTOR_T *vector, - uint32_t count, - VCHI_FLAGS_T flags, - void *msg_handle ); - -// Routine to dequeue a message -typedef int32_t (*VCHI_CONNECTION_SERVICE_DEQUEUE_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - void *data, - uint32_t max_data_size_to_read, - uint32_t *actual_msg_size, - VCHI_FLAGS_T flags ); - -// Routine to peek at a message -typedef int32_t (*VCHI_CONNECTION_SERVICE_PEEK_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - void **data, - uint32_t *msg_size, - VCHI_FLAGS_T flags ); - -// Routine to hold a message -typedef int32_t (*VCHI_CONNECTION_SERVICE_HOLD_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - void **data, - uint32_t *msg_size, - VCHI_FLAGS_T flags, - void **message_handle ); - -// Routine to initialise a received message iterator -typedef int32_t (*VCHI_CONNECTION_SERVICE_LOOKAHEAD_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - VCHI_MSG_ITER_T *iter, - VCHI_FLAGS_T flags ); - -// Routine to release a held message -typedef int32_t (*VCHI_CONNECTION_HELD_MSG_RELEASE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - void *message_handle ); - -// Routine to get info on a held message -typedef int32_t (*VCHI_CONNECTION_HELD_MSG_INFO_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - void *message_handle, - void **data, - int32_t *msg_size, - uint32_t *tx_timestamp, - uint32_t *rx_timestamp ); - -// Routine to check whether the iterator has a next message -typedef int32_t (*VCHI_CONNECTION_MSG_ITER_HAS_NEXT_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service, - const VCHI_MSG_ITER_T *iter ); - -// Routine to advance the iterator -typedef int32_t (*VCHI_CONNECTION_MSG_ITER_NEXT_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service, - VCHI_MSG_ITER_T *iter, - void **data, - uint32_t *msg_size ); - -// Routine to remove the last message returned by the iterator -typedef int32_t (*VCHI_CONNECTION_MSG_ITER_REMOVE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service, - VCHI_MSG_ITER_T *iter ); - -// Routine to hold the last message returned by the iterator -typedef int32_t (*VCHI_CONNECTION_MSG_ITER_HOLD_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service, - VCHI_MSG_ITER_T *iter, - void **msg_handle ); - -// Routine to transmit bulk data -typedef int32_t (*VCHI_CONNECTION_BULK_QUEUE_TRANSMIT_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - const void *data_src, - uint32_t data_size, - VCHI_FLAGS_T flags, - void *bulk_handle ); - -// Routine to receive data -typedef int32_t (*VCHI_CONNECTION_BULK_QUEUE_RECEIVE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, - void *data_dst, - uint32_t data_size, - VCHI_FLAGS_T flags, - void *bulk_handle ); - -// Routine to report if a server is available -typedef int32_t (*VCHI_CONNECTION_SERVER_PRESENT)( VCHI_CONNECTION_STATE_T *state, int32_t service_id, int32_t peer_flags ); - -// Routine to report the number of RX slots available -typedef int (*VCHI_CONNECTION_RX_SLOTS_AVAILABLE)( const VCHI_CONNECTION_STATE_T *state ); - -// Routine to report the RX slot size -typedef uint32_t (*VCHI_CONNECTION_RX_SLOT_SIZE)( const VCHI_CONNECTION_STATE_T *state ); - -// Callback to indicate that the other side has added a buffer to the rx bulk DMA FIFO -typedef void (*VCHI_CONNECTION_RX_BULK_BUFFER_ADDED)(VCHI_CONNECTION_STATE_T *state, - int32_t service, - uint32_t length, - MESSAGE_TX_CHANNEL_T channel, - uint32_t channel_params, - uint32_t data_length, - uint32_t data_offset); - -// Callback to inform a service that a Xon or Xoff message has been received -typedef void (*VCHI_CONNECTION_FLOW_CONTROL)(VCHI_CONNECTION_STATE_T *state, int32_t service_id, int32_t xoff); - -// Callback to inform a service that a server available reply message has been received -typedef void (*VCHI_CONNECTION_SERVER_AVAILABLE_REPLY)(VCHI_CONNECTION_STATE_T *state, int32_t service_id, uint32_t flags); - -// Callback to indicate that bulk auxiliary messages have arrived -typedef void (*VCHI_CONNECTION_BULK_AUX_RECEIVED)(VCHI_CONNECTION_STATE_T *state); - -// Callback to indicate that bulk auxiliary messages have arrived -typedef void (*VCHI_CONNECTION_BULK_AUX_TRANSMITTED)(VCHI_CONNECTION_STATE_T *state, void *handle); - -// Callback with all the connection info you require -typedef void (*VCHI_CONNECTION_INFO)(VCHI_CONNECTION_STATE_T *state, uint32_t protocol_version, uint32_t slot_size, uint32_t num_slots, uint32_t min_bulk_size); - -// Callback to inform of a disconnect -typedef void (*VCHI_CONNECTION_DISCONNECT)(VCHI_CONNECTION_STATE_T *state, uint32_t flags); - -// Callback to inform of a power control request -typedef void (*VCHI_CONNECTION_POWER_CONTROL)(VCHI_CONNECTION_STATE_T *state, MESSAGE_TX_CHANNEL_T channel, int32_t enable); - -// allocate memory suitably aligned for this connection -typedef void * (*VCHI_BUFFER_ALLOCATE)(VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, uint32_t * length); - -// free memory allocated by buffer_allocate -typedef void (*VCHI_BUFFER_FREE)(VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, void * address); - -/****************************************************************************** - System driver struct - *****************************************************************************/ - -struct opaque_vchi_connection_api_t { - // Routine to init the connection - VCHI_CONNECTION_INIT_T init; - - // Connection-level CRC control - VCHI_CONNECTION_CRC_CONTROL_T crc_control; - - // Routine to connect to or create service - VCHI_CONNECTION_SERVICE_CONNECT_T service_connect; - - // Routine to disconnect from a service - VCHI_CONNECTION_SERVICE_DISCONNECT_T service_disconnect; - - // Routine to queue a message - VCHI_CONNECTION_SERVICE_QUEUE_MESSAGE_T service_queue_msg; - - // scatter-gather (vector) message queue - VCHI_CONNECTION_SERVICE_QUEUE_MESSAGEV_T service_queue_msgv; - - // Routine to dequeue a message - VCHI_CONNECTION_SERVICE_DEQUEUE_MESSAGE_T service_dequeue_msg; - - // Routine to peek at a message - VCHI_CONNECTION_SERVICE_PEEK_MESSAGE_T service_peek_msg; - - // Routine to hold a message - VCHI_CONNECTION_SERVICE_HOLD_MESSAGE_T service_hold_msg; - - // Routine to initialise a received message iterator - VCHI_CONNECTION_SERVICE_LOOKAHEAD_MESSAGE_T service_look_ahead_msg; - - // Routine to release a message - VCHI_CONNECTION_HELD_MSG_RELEASE_T held_msg_release; - - // Routine to get information on a held message - VCHI_CONNECTION_HELD_MSG_INFO_T held_msg_info; - - // Routine to check for next message on iterator - VCHI_CONNECTION_MSG_ITER_HAS_NEXT_T msg_iter_has_next; - - // Routine to get next message on iterator - VCHI_CONNECTION_MSG_ITER_NEXT_T msg_iter_next; - - // Routine to remove the last message returned by iterator - VCHI_CONNECTION_MSG_ITER_REMOVE_T msg_iter_remove; - - // Routine to hold the last message returned by iterator - VCHI_CONNECTION_MSG_ITER_HOLD_T msg_iter_hold; - - // Routine to transmit bulk data - VCHI_CONNECTION_BULK_QUEUE_TRANSMIT_T bulk_queue_transmit; - - // Routine to receive data - VCHI_CONNECTION_BULK_QUEUE_RECEIVE_T bulk_queue_receive; - - // Routine to report the available servers - VCHI_CONNECTION_SERVER_PRESENT server_present; - - // Routine to report the number of RX slots available - VCHI_CONNECTION_RX_SLOTS_AVAILABLE connection_rx_slots_available; - - // Routine to report the RX slot size - VCHI_CONNECTION_RX_SLOT_SIZE connection_rx_slot_size; - - // Callback to indicate that the other side has added a buffer to the rx bulk DMA FIFO - VCHI_CONNECTION_RX_BULK_BUFFER_ADDED rx_bulk_buffer_added; - - // Callback to inform a service that a Xon or Xoff message has been received - VCHI_CONNECTION_FLOW_CONTROL flow_control; - - // Callback to inform a service that a server available reply message has been received - VCHI_CONNECTION_SERVER_AVAILABLE_REPLY server_available_reply; - - // Callback to indicate that bulk auxiliary messages have arrived - VCHI_CONNECTION_BULK_AUX_RECEIVED bulk_aux_received; - - // Callback to indicate that a bulk auxiliary message has been transmitted - VCHI_CONNECTION_BULK_AUX_TRANSMITTED bulk_aux_transmitted; - - // Callback to provide information about the connection - VCHI_CONNECTION_INFO connection_info; - - // Callback to notify that peer has requested disconnect - VCHI_CONNECTION_DISCONNECT disconnect; - - // Callback to notify that peer has requested power change - VCHI_CONNECTION_POWER_CONTROL power_control; - - // allocate memory suitably aligned for this connection - VCHI_BUFFER_ALLOCATE buffer_allocate; - - // free memory allocated by buffer_allocate - VCHI_BUFFER_FREE buffer_free; - -}; - -struct vchi_connection_t { - const VCHI_CONNECTION_API_T *api; - VCHI_CONNECTION_STATE_T *state; -#ifdef VCHI_COARSE_LOCKING - struct semaphore sem; -#endif -}; - -#endif /* CONNECTION_H_ */ - -/****************************** End of file **********************************/ diff --git a/drivers/staging/vc04_services/interface/vchi/message_drivers/message.h b/drivers/staging/vc04_services/interface/vchi/message_drivers/message.h deleted file mode 100644 index 834263f278cf..000000000000 --- a/drivers/staging/vc04_services/interface/vchi/message_drivers/message.h +++ /dev/null @@ -1,196 +0,0 @@ -/** - * Copyright (c) 2010-2012 Broadcom. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The names of the above-listed copyright holders may not be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2, as published by the Free - * Software Foundation. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS - * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _VCHI_MESSAGE_H_ -#define _VCHI_MESSAGE_H_ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/semaphore.h> - -#include "interface/vchi/vchi_cfg_internal.h" -#include "interface/vchi/vchi_common.h" - -typedef enum message_event_type { - MESSAGE_EVENT_NONE, - MESSAGE_EVENT_NOP, - MESSAGE_EVENT_MESSAGE, - MESSAGE_EVENT_SLOT_COMPLETE, - MESSAGE_EVENT_RX_BULK_PAUSED, - MESSAGE_EVENT_RX_BULK_COMPLETE, - MESSAGE_EVENT_TX_COMPLETE, - MESSAGE_EVENT_MSG_DISCARDED -} MESSAGE_EVENT_TYPE_T; - -typedef enum vchi_msg_flags { - VCHI_MSG_FLAGS_NONE = 0x0, - VCHI_MSG_FLAGS_TERMINATE_DMA = 0x1 -} VCHI_MSG_FLAGS_T; - -typedef enum message_tx_channel { - MESSAGE_TX_CHANNEL_MESSAGE = 0, - MESSAGE_TX_CHANNEL_BULK = 1 // drivers may provide multiple bulk channels, from 1 upwards -} MESSAGE_TX_CHANNEL_T; - -// Macros used for cycling through bulk channels -#define MESSAGE_TX_CHANNEL_BULK_PREV(c) (MESSAGE_TX_CHANNEL_BULK+((c)-MESSAGE_TX_CHANNEL_BULK+VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION-1)%VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION) -#define MESSAGE_TX_CHANNEL_BULK_NEXT(c) (MESSAGE_TX_CHANNEL_BULK+((c)-MESSAGE_TX_CHANNEL_BULK+1)%VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION) - -typedef enum message_rx_channel { - MESSAGE_RX_CHANNEL_MESSAGE = 0, - MESSAGE_RX_CHANNEL_BULK = 1 // drivers may provide multiple bulk channels, from 1 upwards -} MESSAGE_RX_CHANNEL_T; - -// Message receive slot information -typedef struct rx_msg_slot_info { - - struct rx_msg_slot_info *next; - //struct slot_info *prev; -#if !defined VCHI_COARSE_LOCKING - struct semaphore sem; -#endif - - uint8_t *addr; // base address of slot - uint32_t len; // length of slot in bytes - - uint32_t write_ptr; // hardware causes this to advance - uint32_t read_ptr; // this module does the reading - int active; // is this slot in the hardware dma fifo? - uint32_t msgs_parsed; // count how many messages are in this slot - uint32_t msgs_released; // how many messages have been released - void *state; // connection state information - uint8_t ref_count[VCHI_MAX_SERVICES_PER_CONNECTION]; // reference count for slots held by services -} RX_MSG_SLOTINFO_T; - -// The message driver no longer needs to know about the fields of RX_BULK_SLOTINFO_T - sort this out. -// In particular, it mustn't use addr and len - they're the client buffer, but the message -// driver will be tasked with sending the aligned core section. -typedef struct rx_bulk_slotinfo_t { - struct rx_bulk_slotinfo_t *next; - - struct semaphore *blocking; - - // needed by DMA - void *addr; - uint32_t len; - - // needed for the callback - void *service; - void *handle; - VCHI_FLAGS_T flags; -} RX_BULK_SLOTINFO_T; - -/* ---------------------------------------------------------------------- - * each connection driver will have a pool of the following struct. - * - * the pool will be managed by vchi_qman_* - * this means there will be multiple queues (single linked lists) - * a given struct message_info will be on exactly one of these queues - * at any one time - * -------------------------------------------------------------------- */ -typedef struct rx_message_info { - - struct message_info *next; - //struct message_info *prev; - - uint8_t *addr; - uint32_t len; - RX_MSG_SLOTINFO_T *slot; // points to whichever slot contains this message - uint32_t tx_timestamp; - uint32_t rx_timestamp; - -} RX_MESSAGE_INFO_T; - -typedef struct { - MESSAGE_EVENT_TYPE_T type; - - struct { - // for messages - void *addr; // address of message - uint16_t slot_delta; // whether this message indicated slot delta - uint32_t len; // length of message - RX_MSG_SLOTINFO_T *slot; // slot this message is in - int32_t service; // service id this message is destined for - uint32_t tx_timestamp; // timestamp from the header - uint32_t rx_timestamp; // timestamp when we parsed it - } message; - - // FIXME: cleanup slot reporting... - RX_MSG_SLOTINFO_T *rx_msg; - RX_BULK_SLOTINFO_T *rx_bulk; - void *tx_handle; - MESSAGE_TX_CHANNEL_T tx_channel; - -} MESSAGE_EVENT_T; - -// callbacks -typedef void VCHI_MESSAGE_DRIVER_EVENT_CALLBACK_T( void *state ); - -typedef struct { - VCHI_MESSAGE_DRIVER_EVENT_CALLBACK_T *event_callback; -} VCHI_MESSAGE_DRIVER_OPEN_T; - -// handle to this instance of message driver (as returned by ->open) -typedef struct opaque_mhandle_t *VCHI_MDRIVER_HANDLE_T; - -struct opaque_vchi_message_driver_t { - VCHI_MDRIVER_HANDLE_T *(*open)( VCHI_MESSAGE_DRIVER_OPEN_T *params, void *state ); - int32_t (*suspending)( VCHI_MDRIVER_HANDLE_T *handle ); - int32_t (*resumed)( VCHI_MDRIVER_HANDLE_T *handle ); - int32_t (*power_control)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T, int32_t enable ); - int32_t (*add_msg_rx_slot)( VCHI_MDRIVER_HANDLE_T *handle, RX_MSG_SLOTINFO_T *slot ); // rx message - int32_t (*add_bulk_rx)( VCHI_MDRIVER_HANDLE_T *handle, void *data, uint32_t len, RX_BULK_SLOTINFO_T *slot ); // rx data (bulk) - int32_t (*send)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel, const void *data, uint32_t len, VCHI_MSG_FLAGS_T flags, void *send_handle ); // tx (message & bulk) - void (*next_event)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_EVENT_T *event ); // get the next event from message_driver - int32_t (*enable)( VCHI_MDRIVER_HANDLE_T *handle ); - int32_t (*form_message)( VCHI_MDRIVER_HANDLE_T *handle, int32_t service_id, VCHI_MSG_VECTOR_T *vector, uint32_t count, void - *address, uint32_t length_avail, uint32_t max_total_length, int32_t pad_to_fill, int32_t allow_partial ); - - int32_t (*update_message)( VCHI_MDRIVER_HANDLE_T *handle, void *dest, int16_t *slot_count ); - int32_t (*buffer_aligned)( VCHI_MDRIVER_HANDLE_T *handle, int tx, int uncached, const void *address, const uint32_t length ); - void * (*allocate_buffer)( VCHI_MDRIVER_HANDLE_T *handle, uint32_t *length ); - void (*free_buffer)( VCHI_MDRIVER_HANDLE_T *handle, void *address ); - int (*rx_slot_size)( VCHI_MDRIVER_HANDLE_T *handle, int msg_size ); - int (*tx_slot_size)( VCHI_MDRIVER_HANDLE_T *handle, int msg_size ); - - int32_t (*tx_supports_terminate)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); - uint32_t (*tx_bulk_chunk_size)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); - int (*tx_alignment)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); - int (*rx_alignment)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_RX_CHANNEL_T channel ); - void (*form_bulk_aux)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel, const void *data, uint32_t len, uint32_t chunk_size, const void **aux_data, int32_t *aux_len ); - void (*debug)( VCHI_MDRIVER_HANDLE_T *handle ); -}; - -#endif // _VCHI_MESSAGE_H_ - -/****************************** End of file ***********************************/ diff --git a/drivers/staging/vc04_services/interface/vchi/vchi.h b/drivers/staging/vc04_services/interface/vchi/vchi.h index 66a3a060fad2..01381904775d 100644 --- a/drivers/staging/vc04_services/interface/vchi/vchi.h +++ b/drivers/staging/vc04_services/interface/vchi/vchi.h @@ -36,7 +36,6 @@ #include "interface/vchi/vchi_cfg.h" #include "interface/vchi/vchi_common.h" -#include "interface/vchi/connections/connection.h" #include "vchi_mh.h" /****************************************************************************** @@ -60,46 +59,8 @@ struct vchi_version { #define VCHI_VERSION(v_) { v_, v_ } #define VCHI_VERSION_EX(v_, m_) { v_, m_ } -typedef enum { - VCHI_VEC_POINTER, - VCHI_VEC_HANDLE, - VCHI_VEC_LIST -} VCHI_MSG_VECTOR_TYPE_T; - -typedef struct vchi_msg_vector_ex { - - VCHI_MSG_VECTOR_TYPE_T type; - union { - // a memory handle - struct { - VCHI_MEM_HANDLE_T handle; - uint32_t offset; - int32_t vec_len; - } handle; - - // an ordinary data pointer - struct { - const void *vec_base; - int32_t vec_len; - } ptr; - - // a nested vector list - struct { - struct vchi_msg_vector_ex *vec; - uint32_t vec_len; - } list; - } u; -} VCHI_MSG_VECTOR_EX_T; - -// Construct an entry in a msg vector for a pointer (p) of length (l) -#define VCHI_VEC_POINTER(p,l) VCHI_VEC_POINTER, { { (VCHI_MEM_HANDLE_T)(p), (l) } } - -// Construct an entry in a msg vector for a message handle (h), starting at offset (o) of length (l) -#define VCHI_VEC_HANDLE(h,o,l) VCHI_VEC_HANDLE, { { (h), (o), (l) } } - // Macros to manipulate 'FOURCC' values -#define MAKE_FOURCC(x) ((int32_t)( (x[0] << 24) | (x[1] << 16) | (x[2] << 8) | x[3] )) -#define FOURCC_TO_CHAR(x) (x >> 24) & 0xFF,(x >> 16) & 0xFF,(x >> 8) & 0xFF, x & 0xFF +#define MAKE_FOURCC(x) ((int32_t)((x[0] << 24) | (x[1] << 16) | (x[2] << 8) | x[3])) // Opaque service information struct opaque_vchi_service_t; @@ -115,20 +76,8 @@ typedef struct { typedef struct { struct vchi_version version; int32_t service_id; - VCHI_CONNECTION_T *connection; - uint32_t rx_fifo_size; - uint32_t tx_fifo_size; VCHI_CALLBACK_T callback; void *callback_param; - /* client intends to receive bulk transfers of - odd lengths or into unaligned buffers */ - int32_t want_unaligned_bulk_rx; - /* client intends to transmit bulk transfers of - odd lengths or out of unaligned buffers */ - int32_t want_unaligned_bulk_tx; - /* client wants to check CRCs on (bulk) xfers. - Only needs to be set at 1 end - will do both directions. */ - int32_t want_crc; } SERVICE_CREATION_T; // Opaque handle for a VCHI instance @@ -137,15 +86,6 @@ typedef struct opaque_vchi_instance_handle_t *VCHI_INSTANCE_T; // Opaque handle for a server or client typedef struct opaque_vchi_service_handle_t *VCHI_SERVICE_HANDLE_T; -// Service registration & startup -typedef void (*VCHI_SERVICE_INIT)(VCHI_INSTANCE_T initialise_instance, VCHI_CONNECTION_T **connections, uint32_t num_connections); - -typedef struct service_info_tag { - const char * const vll_filename; /* VLL to load to start this service. This is an empty string if VLL is "static" */ - VCHI_SERVICE_INIT init; /* Service initialisation function */ - void *vll_handle; /* VLL handle; NULL when unloaded or a "static VLL" in build */ -} SERVICE_INFO_T; - /****************************************************************************** Global funcs - implementation is specific to which side you are on (local / remote) *****************************************************************************/ @@ -154,28 +94,19 @@ typedef struct service_info_tag { extern "C" { #endif -extern /*@observer@*/ VCHI_CONNECTION_T * vchi_create_connection( const VCHI_CONNECTION_API_T * function_table, - const VCHI_MESSAGE_DRIVER_T * low_level); - // Routine used to initialise the vchi on both local + remote connections -extern int32_t vchi_initialise( VCHI_INSTANCE_T *instance_handle ); +extern int32_t vchi_initialise(VCHI_INSTANCE_T *instance_handle); -extern int32_t vchi_exit( void ); +extern int32_t vchi_exit(void); -extern int32_t vchi_connect( VCHI_CONNECTION_T **connections, - const uint32_t num_connections, - VCHI_INSTANCE_T instance_handle ); +extern int32_t vchi_connect(VCHI_INSTANCE_T instance_handle); //When this is called, ensure that all services have no data pending. //Bulk transfers can remain 'queued' -extern int32_t vchi_disconnect( VCHI_INSTANCE_T instance_handle ); - -// Global control over bulk CRC checking -extern int32_t vchi_crc_control( VCHI_CONNECTION_T *connection, - VCHI_CRC_CONTROL_T control ); +extern int32_t vchi_disconnect(VCHI_INSTANCE_T instance_handle); // helper functions -extern void * vchi_allocate_buffer(VCHI_SERVICE_HANDLE_T handle, uint32_t *length); +extern void *vchi_allocate_buffer(VCHI_SERVICE_HANDLE_T handle, uint32_t *length); extern void vchi_free_buffer(VCHI_SERVICE_HANDLE_T handle, void *address); extern uint32_t vchi_current_time(VCHI_INSTANCE_T instance_handle); @@ -183,32 +114,32 @@ extern uint32_t vchi_current_time(VCHI_INSTANCE_T instance_handle); Global service API *****************************************************************************/ // Routine to create a named service -extern int32_t vchi_service_create( VCHI_INSTANCE_T instance_handle, - SERVICE_CREATION_T *setup, - VCHI_SERVICE_HANDLE_T *handle ); +extern int32_t vchi_service_create(VCHI_INSTANCE_T instance_handle, + SERVICE_CREATION_T *setup, + VCHI_SERVICE_HANDLE_T *handle); // Routine to destroy a service -extern int32_t vchi_service_destroy( const VCHI_SERVICE_HANDLE_T handle ); +extern int32_t vchi_service_destroy(const VCHI_SERVICE_HANDLE_T handle); // Routine to open a named service -extern int32_t vchi_service_open( VCHI_INSTANCE_T instance_handle, - SERVICE_CREATION_T *setup, - VCHI_SERVICE_HANDLE_T *handle); +extern int32_t vchi_service_open(VCHI_INSTANCE_T instance_handle, + SERVICE_CREATION_T *setup, + VCHI_SERVICE_HANDLE_T *handle); -extern int32_t vchi_get_peer_version( const VCHI_SERVICE_HANDLE_T handle, - short *peer_version ); +extern int32_t vchi_get_peer_version(const VCHI_SERVICE_HANDLE_T handle, + short *peer_version); // Routine to close a named service -extern int32_t vchi_service_close( const VCHI_SERVICE_HANDLE_T handle ); +extern int32_t vchi_service_close(const VCHI_SERVICE_HANDLE_T handle); // Routine to increment ref count on a named service -extern int32_t vchi_service_use( const VCHI_SERVICE_HANDLE_T handle ); +extern int32_t vchi_service_use(const VCHI_SERVICE_HANDLE_T handle); // Routine to decrement ref count on a named service -extern int32_t vchi_service_release( const VCHI_SERVICE_HANDLE_T handle ); +extern int32_t vchi_service_release(const VCHI_SERVICE_HANDLE_T handle); // Routine to set a control option for a named service -extern int32_t vchi_service_set_option( const VCHI_SERVICE_HANDLE_T handle, +extern int32_t vchi_service_set_option(const VCHI_SERVICE_HANDLE_T handle, VCHI_SERVICE_OPTION_T option, int value); @@ -226,128 +157,120 @@ vchi_queue_user_message(VCHI_SERVICE_HANDLE_T handle, // Routine to receive a msg from a service // Dequeue is equivalent to hold, copy into client buffer, release -extern int32_t vchi_msg_dequeue( VCHI_SERVICE_HANDLE_T handle, - void *data, - uint32_t max_data_size_to_read, - uint32_t *actual_msg_size, - VCHI_FLAGS_T flags ); +extern int32_t vchi_msg_dequeue(VCHI_SERVICE_HANDLE_T handle, + void *data, + uint32_t max_data_size_to_read, + uint32_t *actual_msg_size, + VCHI_FLAGS_T flags); // Routine to look at a message in place. // The message is not dequeued, so a subsequent call to peek or dequeue // will return the same message. -extern int32_t vchi_msg_peek( VCHI_SERVICE_HANDLE_T handle, - void **data, - uint32_t *msg_size, - VCHI_FLAGS_T flags ); +extern int32_t vchi_msg_peek(VCHI_SERVICE_HANDLE_T handle, + void **data, + uint32_t *msg_size, + VCHI_FLAGS_T flags); // Routine to remove a message after it has been read in place with peek // The first message on the queue is dequeued. -extern int32_t vchi_msg_remove( VCHI_SERVICE_HANDLE_T handle ); +extern int32_t vchi_msg_remove(VCHI_SERVICE_HANDLE_T handle); // Routine to look at a message in place. // The message is dequeued, so the caller is left holding it; the descriptor is // filled in and must be released when the user has finished with the message. -extern int32_t vchi_msg_hold( VCHI_SERVICE_HANDLE_T handle, - void **data, // } may be NULL, as info can be - uint32_t *msg_size, // } obtained from HELD_MSG_T - VCHI_FLAGS_T flags, - VCHI_HELD_MSG_T *message_descriptor ); +extern int32_t vchi_msg_hold(VCHI_SERVICE_HANDLE_T handle, + void **data, // } may be NULL, as info can be + uint32_t *msg_size, // } obtained from HELD_MSG_T + VCHI_FLAGS_T flags, + VCHI_HELD_MSG_T *message_descriptor); // Initialise an iterator to look through messages in place -extern int32_t vchi_msg_look_ahead( VCHI_SERVICE_HANDLE_T handle, - VCHI_MSG_ITER_T *iter, - VCHI_FLAGS_T flags ); +extern int32_t vchi_msg_look_ahead(VCHI_SERVICE_HANDLE_T handle, + VCHI_MSG_ITER_T *iter, + VCHI_FLAGS_T flags); /****************************************************************************** Global service support API - operations on held messages and message iterators *****************************************************************************/ // Routine to get the address of a held message -extern void *vchi_held_msg_ptr( const VCHI_HELD_MSG_T *message ); +extern void *vchi_held_msg_ptr(const VCHI_HELD_MSG_T *message); // Routine to get the size of a held message -extern int32_t vchi_held_msg_size( const VCHI_HELD_MSG_T *message ); +extern int32_t vchi_held_msg_size(const VCHI_HELD_MSG_T *message); // Routine to get the transmit timestamp as written into the header by the peer -extern uint32_t vchi_held_msg_tx_timestamp( const VCHI_HELD_MSG_T *message ); +extern uint32_t vchi_held_msg_tx_timestamp(const VCHI_HELD_MSG_T *message); // Routine to get the reception timestamp, written as we parsed the header -extern uint32_t vchi_held_msg_rx_timestamp( const VCHI_HELD_MSG_T *message ); +extern uint32_t vchi_held_msg_rx_timestamp(const VCHI_HELD_MSG_T *message); // Routine to release a held message after it has been processed -extern int32_t vchi_held_msg_release( VCHI_HELD_MSG_T *message ); +extern int32_t vchi_held_msg_release(VCHI_HELD_MSG_T *message); // Indicates whether the iterator has a next message. -extern int32_t vchi_msg_iter_has_next( const VCHI_MSG_ITER_T *iter ); +extern int32_t vchi_msg_iter_has_next(const VCHI_MSG_ITER_T *iter); // Return the pointer and length for the next message and advance the iterator. -extern int32_t vchi_msg_iter_next( VCHI_MSG_ITER_T *iter, - void **data, - uint32_t *msg_size ); +extern int32_t vchi_msg_iter_next(VCHI_MSG_ITER_T *iter, + void **data, + uint32_t *msg_size); // Remove the last message returned by vchi_msg_iter_next. // Can only be called once after each call to vchi_msg_iter_next. -extern int32_t vchi_msg_iter_remove( VCHI_MSG_ITER_T *iter ); +extern int32_t vchi_msg_iter_remove(VCHI_MSG_ITER_T *iter); // Hold the last message returned by vchi_msg_iter_next. // Can only be called once after each call to vchi_msg_iter_next. -extern int32_t vchi_msg_iter_hold( VCHI_MSG_ITER_T *iter, - VCHI_HELD_MSG_T *message ); +extern int32_t vchi_msg_iter_hold(VCHI_MSG_ITER_T *iter, + VCHI_HELD_MSG_T *message); // Return information for the next message, and hold it, advancing the iterator. -extern int32_t vchi_msg_iter_hold_next( VCHI_MSG_ITER_T *iter, - void **data, // } may be NULL - uint32_t *msg_size, // } - VCHI_HELD_MSG_T *message ); +extern int32_t vchi_msg_iter_hold_next(VCHI_MSG_ITER_T *iter, + void **data, // } may be NULL + uint32_t *msg_size, // } + VCHI_HELD_MSG_T *message); /****************************************************************************** Global bulk API *****************************************************************************/ // Routine to prepare interface for a transfer from the other side -extern int32_t vchi_bulk_queue_receive( VCHI_SERVICE_HANDLE_T handle, - void *data_dst, - uint32_t data_size, - VCHI_FLAGS_T flags, - void *transfer_handle ); +extern int32_t vchi_bulk_queue_receive(VCHI_SERVICE_HANDLE_T handle, + void *data_dst, + uint32_t data_size, + VCHI_FLAGS_T flags, + void *transfer_handle); // Prepare interface for a transfer from the other side into relocatable memory. -int32_t vchi_bulk_queue_receive_reloc( const VCHI_SERVICE_HANDLE_T handle, - VCHI_MEM_HANDLE_T h_dst, - uint32_t offset, - uint32_t data_size, - const VCHI_FLAGS_T flags, - void * const bulk_handle ); +int32_t vchi_bulk_queue_receive_reloc(const VCHI_SERVICE_HANDLE_T handle, + VCHI_MEM_HANDLE_T h_dst, + uint32_t offset, + uint32_t data_size, + const VCHI_FLAGS_T flags, + void * const bulk_handle); // Routine to queue up data ready for transfer to the other (once they have signalled they are ready) -extern int32_t vchi_bulk_queue_transmit( VCHI_SERVICE_HANDLE_T handle, - const void *data_src, - uint32_t data_size, - VCHI_FLAGS_T flags, - void *transfer_handle ); +extern int32_t vchi_bulk_queue_transmit(VCHI_SERVICE_HANDLE_T handle, + const void *data_src, + uint32_t data_size, + VCHI_FLAGS_T flags, + void *transfer_handle); /****************************************************************************** Configuration plumbing *****************************************************************************/ -// function prototypes for the different mid layers (the state info gives the different physical connections) -extern const VCHI_CONNECTION_API_T *single_get_func_table( void ); -//extern const VCHI_CONNECTION_API_T *local_server_get_func_table( void ); -//extern const VCHI_CONNECTION_API_T *local_client_get_func_table( void ); - -// declare all message drivers here -const VCHI_MESSAGE_DRIVER_T *vchi_mphi_message_driver_func_table( void ); - #ifdef __cplusplus } #endif -extern int32_t vchi_bulk_queue_transmit_reloc( VCHI_SERVICE_HANDLE_T handle, - VCHI_MEM_HANDLE_T h_src, - uint32_t offset, - uint32_t data_size, - VCHI_FLAGS_T flags, - void *transfer_handle ); +extern int32_t vchi_bulk_queue_transmit_reloc(VCHI_SERVICE_HANDLE_T handle, + VCHI_MEM_HANDLE_T h_src, + uint32_t offset, + uint32_t data_size, + VCHI_FLAGS_T flags, + void *transfer_handle); #endif /* VCHI_H_ */ /****************************** End of file **********************************/ diff --git a/drivers/staging/vc04_services/interface/vchi/vchi_cfg.h b/drivers/staging/vc04_services/interface/vchi/vchi_cfg.h index b6f42b86f206..0d3c468c3504 100644 --- a/drivers/staging/vc04_services/interface/vchi/vchi_cfg.h +++ b/drivers/staging/vc04_services/interface/vchi/vchi_cfg.h @@ -138,7 +138,7 @@ * can guarantee this by enabling unaligned transmits). * Not API. */ #ifndef VCHI_MIN_BULK_SIZE -# define VCHI_MIN_BULK_SIZE ( VCHI_MAX_MSG_SIZE / 2 < 4096 ? VCHI_MAX_MSG_SIZE / 2 : 4096 ) +# define VCHI_MIN_BULK_SIZE (VCHI_MAX_MSG_SIZE / 2 < 4096 ? VCHI_MAX_MSG_SIZE / 2 : 4096) #endif /* Maximum size of bulk transmission chunks, for each interface type. A trade-off between diff --git a/drivers/staging/vc04_services/interface/vchi/vchi_cfg_internal.h b/drivers/staging/vc04_services/interface/vchi/vchi_cfg_internal.h deleted file mode 100644 index 35dcba4837d4..000000000000 --- a/drivers/staging/vc04_services/interface/vchi/vchi_cfg_internal.h +++ /dev/null @@ -1,71 +0,0 @@ -/** - * Copyright (c) 2010-2012 Broadcom. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The names of the above-listed copyright holders may not be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2, as published by the Free - * Software Foundation. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS - * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef VCHI_CFG_INTERNAL_H_ -#define VCHI_CFG_INTERNAL_H_ - -/**************************************************************************************** - * Control optimisation attempts. - ***************************************************************************************/ - -// Don't use lots of short-term locks - use great long ones, reducing the overall locks-per-second -#define VCHI_COARSE_LOCKING - -// Avoid lock then unlock on exit from blocking queue operations (msg tx, bulk rx/tx) -// (only relevant if VCHI_COARSE_LOCKING) -#define VCHI_ELIDE_BLOCK_EXIT_LOCK - -// Avoid lock on non-blocking peek -// (only relevant if VCHI_COARSE_LOCKING) -#define VCHI_AVOID_PEEK_LOCK - -// Use one slot-handler thread per connection, rather than 1 thread dealing with all connections in rotation. -#define VCHI_MULTIPLE_HANDLER_THREADS - -// Put free descriptors onto the head of the free queue, rather than the tail, so that we don't thrash -// our way through the pool of descriptors. -#define VCHI_PUSH_FREE_DESCRIPTORS_ONTO_HEAD - -// Don't issue a MSG_AVAILABLE callback for every single message. Possibly only safe if VCHI_COARSE_LOCKING. -#define VCHI_FEWER_MSG_AVAILABLE_CALLBACKS - -// Don't use message descriptors for TX messages that don't need them -#define VCHI_MINIMISE_TX_MSG_DESCRIPTORS - -// Nano-locks for multiqueue -//#define VCHI_MQUEUE_NANOLOCKS - -// Lock-free(er) dequeuing -//#define VCHI_RX_NANOLOCKS - -#endif /*VCHI_CFG_INTERNAL_H_*/ diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c index e76720903064..83d740feab96 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c @@ -109,7 +109,8 @@ free_pagelist(struct vchiq_pagelist_info *pagelistinfo, int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state) { struct device *dev = &pdev->dev; - struct rpi_firmware *fw = platform_get_drvdata(pdev); + struct vchiq_drvdata *drvdata = platform_get_drvdata(pdev); + struct rpi_firmware *fw = drvdata->fw; VCHIQ_SLOT_ZERO_T *vchiq_slot_zero; struct resource *res; void *slot_mem; @@ -127,6 +128,7 @@ int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state) if (err < 0) return err; + g_cache_line_size = drvdata->cache_line_size; g_fragments_size = 2 * g_cache_line_size; /* Allocate space for the channels in coherent memory */ diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c index bc05c69383b8..ea789376de0f 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c @@ -170,6 +170,14 @@ static struct device *vchiq_dev; static DEFINE_SPINLOCK(msg_queue_spinlock); static struct platform_device *bcm2835_camera; +static struct vchiq_drvdata bcm2835_drvdata = { + .cache_line_size = 32, +}; + +static struct vchiq_drvdata bcm2836_drvdata = { + .cache_line_size = 64, +}; + static const char *const ioctl_names[] = { "CONNECT", "SHUTDOWN", @@ -3573,12 +3581,25 @@ void vchiq_platform_conn_state_changed(VCHIQ_STATE_T *state, } } +static const struct of_device_id vchiq_of_match[] = { + { .compatible = "brcm,bcm2835-vchiq", .data = &bcm2835_drvdata }, + { .compatible = "brcm,bcm2836-vchiq", .data = &bcm2836_drvdata }, + {}, +}; +MODULE_DEVICE_TABLE(of, vchiq_of_match); + static int vchiq_probe(struct platform_device *pdev) { struct device_node *fw_node; - struct rpi_firmware *fw; + const struct of_device_id *of_id; + struct vchiq_drvdata *drvdata; int err; + of_id = of_match_node(vchiq_of_match, pdev->dev.of_node); + drvdata = (struct vchiq_drvdata *)of_id->data; + if (!drvdata) + return -EINVAL; + fw_node = of_find_compatible_node(NULL, NULL, "raspberrypi,bcm2835-firmware"); if (!fw_node) { @@ -3586,12 +3607,12 @@ static int vchiq_probe(struct platform_device *pdev) return -ENOENT; } - fw = rpi_firmware_get(fw_node); + drvdata->fw = rpi_firmware_get(fw_node); of_node_put(fw_node); - if (!fw) + if (!drvdata->fw) return -EPROBE_DEFER; - platform_set_drvdata(pdev, fw); + platform_set_drvdata(pdev, drvdata); err = vchiq_platform_init(pdev, &g_state); if (err != 0) @@ -3661,12 +3682,6 @@ static int vchiq_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id vchiq_of_match[] = { - { .compatible = "brcm,bcm2835-vchiq", }, - {}, -}; -MODULE_DEVICE_TABLE(of, vchiq_of_match); - static struct platform_driver vchiq_driver = { .driver = { .name = "bcm2835_vchiq", diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h index 40bb0c63b1a9..2f3ebc99cbcf 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h @@ -123,6 +123,11 @@ typedef struct vchiq_arm_state_struct { } VCHIQ_ARM_STATE_T; +struct vchiq_drvdata { + const unsigned int cache_line_size; + struct rpi_firmware *fw; +}; + extern int vchiq_arm_log_level; extern int vchiq_susp_log_level; diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_genversion b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_genversion deleted file mode 100644 index dd1f324a8654..000000000000 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_genversion +++ /dev/null @@ -1,88 +0,0 @@ -#!/usr/bin/perl -w -# SPDX-License-Identifier: GPL-2.0 - -use strict; - -# -# Generate a version from available information -# - -my $prefix = shift @ARGV; -my $root = shift @ARGV; - - -if ( not defined $root ) { - die "usage: $0 prefix root-dir\n"; -} - -if ( ! -d $root ) { - die "root directory $root not found\n"; -} - -my $version = "unknown"; -my $tainted = ""; - -if ( -d "$root/.git" ) { - # attempt to work out git version. only do so - # on a linux build host, as cygwin builds are - # already slow enough - - if ( -f "/usr/bin/git" || -f "/usr/local/bin/git" ) { - if (not open(F, "git --git-dir $root/.git rev-parse --verify HEAD|")) { - $version = "no git version"; - } - else { - $version = <F>; - $version =~ s/[ \r\n]*$//; # chomp may not be enough (cygwin). - $version =~ s/^[ \r\n]*//; # chomp may not be enough (cygwin). - } - - if (open(G, "git --git-dir $root/.git status --porcelain|")) { - $tainted = <G>; - $tainted =~ s/[ \r\n]*$//; # chomp may not be enough (cygwin). - $tainted =~ s/^[ \r\n]*//; # chomp may not be enough (cygwin). - if (length $tainted) { - $version = join ' ', $version, "(tainted)"; - } - else { - $version = join ' ', $version, "(clean)"; - } - } - } -} - -my $hostname = `hostname`; -$hostname =~ s/[ \r\n]*$//; # chomp may not be enough (cygwin). -$hostname =~ s/^[ \r\n]*//; # chomp may not be enough (cygwin). - - -print STDERR "Version $version\n"; -print <<EOF; -#include "${prefix}_build_info.h" -#include <linux/broadcom/vc_debug_sym.h> - -VC_DEBUG_DECLARE_STRING_VAR( ${prefix}_build_hostname, "$hostname" ); -VC_DEBUG_DECLARE_STRING_VAR( ${prefix}_build_version, "$version" ); -VC_DEBUG_DECLARE_STRING_VAR( ${prefix}_build_time, __TIME__ ); -VC_DEBUG_DECLARE_STRING_VAR( ${prefix}_build_date, __DATE__ ); - -const char *vchiq_get_build_hostname( void ) -{ - return vchiq_build_hostname; -} - -const char *vchiq_get_build_version( void ) -{ - return vchiq_build_version; -} - -const char *vchiq_get_build_date( void ) -{ - return vchiq_build_date; -} - -const char *vchiq_get_build_time( void ) -{ - return vchiq_build_time; -} -EOF diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_shim.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_shim.c index dddc828390d0..c3223fcdaf87 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_shim.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_shim.c @@ -50,33 +50,6 @@ struct shim_service { void *callback_param; }; -/* ---------------------------------------------------------------------- - * return pointer to the mphi message driver function table - * -------------------------------------------------------------------- */ -const VCHI_MESSAGE_DRIVER_T * -vchi_mphi_message_driver_func_table(void) -{ - return NULL; -} - -/* ---------------------------------------------------------------------- - * return a pointer to the 'single' connection driver fops - * -------------------------------------------------------------------- */ -const VCHI_CONNECTION_API_T * -single_get_func_table(void) -{ - return NULL; -} - -VCHI_CONNECTION_T *vchi_create_connection( - const VCHI_CONNECTION_API_T *function_table, - const VCHI_MESSAGE_DRIVER_T *low_level) -{ - (void)function_table; - (void)low_level; - return NULL; -} - /*********************************************************** * Name: vchi_msg_peek * @@ -517,9 +490,7 @@ EXPORT_SYMBOL(vchi_initialise); /*********************************************************** * Name: vchi_connect * - * Arguments: VCHI_CONNECTION_T **connections - * const uint32_t num_connections - * VCHI_INSTANCE_T instance_handle) + * Arguments: VCHI_INSTANCE_T instance_handle * * Description: Starts the command service on each connection, * causing INIT messages to be pinged back and forth @@ -527,15 +498,10 @@ EXPORT_SYMBOL(vchi_initialise); * Returns: 0 if successful, failure otherwise * ***********************************************************/ -int32_t vchi_connect(VCHI_CONNECTION_T **connections, - const uint32_t num_connections, - VCHI_INSTANCE_T instance_handle) +int32_t vchi_connect(VCHI_INSTANCE_T instance_handle) { VCHIQ_INSTANCE_T instance = (VCHIQ_INSTANCE_T)instance_handle; - (void)connections; - (void)num_connections; - return vchiq_connect(instance); } EXPORT_SYMBOL(vchi_connect); diff --git a/drivers/staging/vt6655/rxtx.c b/drivers/staging/vt6655/rxtx.c index 9c4a5325afc7..a7c1e46a953e 100644 --- a/drivers/staging/vt6655/rxtx.c +++ b/drivers/staging/vt6655/rxtx.c @@ -65,6 +65,7 @@ static const unsigned short wFB_Opt0[2][5] = { {RATE_12M, RATE_18M, RATE_24M, RATE_36M, RATE_48M}, /* fallback_rate0 */ {RATE_12M, RATE_12M, RATE_18M, RATE_24M, RATE_36M}, /* fallback_rate1 */ }; + static const unsigned short wFB_Opt1[2][5] = { {RATE_12M, RATE_18M, RATE_24M, RATE_24M, RATE_36M}, /* fallback_rate0 */ {RATE_6M, RATE_6M, RATE_12M, RATE_12M, RATE_18M}, /* fallback_rate1 */ @@ -212,12 +213,12 @@ s_uGetRTSCTSRsvTime( } else if (byRTSRsvType == 3) { /* CTSTxRrvTime_ba, only in 2.4GHZ */ uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate); uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate); - uRrvTime = uCTSTime + uAckTime + uDataTime + 2*pDevice->uSIFS; + uRrvTime = uCTSTime + uAckTime + uDataTime + 2 * pDevice->uSIFS; return cpu_to_le16((u16)uRrvTime); } /* RTSRrvTime */ - uRrvTime = uRTSTime + uCTSTime + uAckTime + uDataTime + 3*pDevice->uSIFS; + uRrvTime = uRTSTime + uCTSTime + uAckTime + uDataTime + 3 * pDevice->uSIFS; return cpu_to_le16((u16)uRrvTime); } @@ -240,7 +241,7 @@ s_uGetDataDuration( bool bLastFrag = false; unsigned int uAckTime = 0, uNextPktTime = 0; - if (uFragIdx == (uMACfragNum-1)) + if (uFragIdx == (uMACfragNum - 1)) bLastFrag = true; switch (byDurType) { @@ -253,7 +254,7 @@ s_uGetDataDuration( return 0; } } else {/* First Frag or Mid Frag */ - if (uFragIdx == (uMACfragNum-2)) + if (uFragIdx == (uMACfragNum - 2)) uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wRate, bNeedAck); else uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck); @@ -276,7 +277,7 @@ s_uGetDataDuration( return 0; } } else {/* First Frag or Mid Frag */ - if (uFragIdx == (uMACfragNum-2)) + if (uFragIdx == (uMACfragNum - 2)) uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wRate, bNeedAck); else uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck); @@ -305,7 +306,7 @@ s_uGetDataDuration( else if (wRate > RATE_54M) wRate = RATE_54M; - if (uFragIdx == (uMACfragNum-2)) + if (uFragIdx == (uMACfragNum - 2)) uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck); else uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck); @@ -316,7 +317,7 @@ s_uGetDataDuration( else if (wRate > RATE_54M) wRate = RATE_54M; - if (uFragIdx == (uMACfragNum-2)) + if (uFragIdx == (uMACfragNum - 2)) uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wFB_Opt1[FB_RATE0][wRate-RATE_18M], bNeedAck); else uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt1[FB_RATE0][wRate-RATE_18M], bNeedAck); @@ -346,7 +347,7 @@ s_uGetDataDuration( else if (wRate > RATE_54M) wRate = RATE_54M; - if (uFragIdx == (uMACfragNum-2)) + if (uFragIdx == (uMACfragNum - 2)) uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck); else uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck); @@ -357,7 +358,7 @@ s_uGetDataDuration( else if (wRate > RATE_54M) wRate = RATE_54M; - if (uFragIdx == (uMACfragNum-2)) + if (uFragIdx == (uMACfragNum - 2)) uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wFB_Opt1[FB_RATE1][wRate-RATE_18M], bNeedAck); else uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt1[FB_RATE1][wRate-RATE_18M], bNeedAck); @@ -1093,7 +1094,7 @@ s_cbFillTxBufHead(struct vnt_private *pDevice, unsigned char byPktType, sizeof(struct vnt_tx_datahead_g); } else { /* RTS_needless */ pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize); - pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts)); + pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts)); pvRTS = NULL; pvCTS = (void *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts) + cbMICHDR); pvTxDataHd = (void *)(pbyTxBufferAddr + wTxBufSize + @@ -1105,7 +1106,7 @@ s_cbFillTxBufHead(struct vnt_private *pDevice, unsigned char byPktType, /* Auto Fall Back */ if (bRTS) {/* RTS_need */ pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize); - pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts)); + pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts)); pvRTS = (void *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts) + cbMICHDR); pvCTS = NULL; pvTxDataHd = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts) + @@ -1114,7 +1115,7 @@ s_cbFillTxBufHead(struct vnt_private *pDevice, unsigned char byPktType, cbMICHDR + sizeof(struct vnt_rts_g_fb) + sizeof(struct vnt_tx_datahead_g_fb); } else { /* RTS_needless */ pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize); - pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts)); + pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts)); pvRTS = NULL; pvCTS = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts) + cbMICHDR); pvTxDataHd = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts) + @@ -1128,7 +1129,7 @@ s_cbFillTxBufHead(struct vnt_private *pDevice, unsigned char byPktType, if (byFBOption == AUTO_FB_NONE) { if (bRTS) { pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize); - pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab)); + pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab)); pvRTS = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab) + cbMICHDR); pvCTS = NULL; pvTxDataHd = (void *)(pbyTxBufferAddr + wTxBufSize + @@ -1137,7 +1138,7 @@ s_cbFillTxBufHead(struct vnt_private *pDevice, unsigned char byPktType, cbMICHDR + sizeof(struct vnt_rts_ab) + sizeof(struct vnt_tx_datahead_ab); } else { /* RTS_needless, need MICHDR */ pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize); - pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab)); + pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab)); pvRTS = NULL; pvCTS = NULL; pvTxDataHd = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab) + cbMICHDR); diff --git a/drivers/staging/wilc1000/Kconfig b/drivers/staging/wilc1000/Kconfig index 73f7fefd3bc3..f9d3ad41c862 100644 --- a/drivers/staging/wilc1000/Kconfig +++ b/drivers/staging/wilc1000/Kconfig @@ -1,13 +1,13 @@ config WILC1000 tristate - ---help--- + help This module only support IEEE 802.11n WiFi. config WILC1000_SDIO tristate "Atmel WILC1000 SDIO (WiFi only)" depends on CFG80211 && INET && MMC select WILC1000 - ---help--- + help This module adds support for the SDIO interface of adapters using WILC1000 chipset. The Atmel WILC1000 SDIO is a full speed interface. It meets SDIO card specification version 2.0. The interface supports @@ -21,7 +21,7 @@ config WILC1000_SPI tristate "Atmel WILC1000 SPI (WiFi only)" depends on CFG80211 && INET && SPI select WILC1000 - ---help--- + help This module adds support for the SPI interface of adapters using WILC1000 chipset. The Atmel WILC1000 has a Serial Peripheral Interface (SPI) that operates as a SPI slave. This SPI interface can @@ -34,7 +34,7 @@ config WILC1000_HW_OOB_INTR bool "WILC1000 out of band interrupt" depends on WILC1000_SDIO default n - ---help--- + help This option enables out-of-band interrupt support for the WILC1000 chipset. This OOB interrupt is intended to provide a faster interrupt mechanism for SDIO host controllers that don't support SDIO interrupt. diff --git a/drivers/staging/wilc1000/Makefile b/drivers/staging/wilc1000/Makefile index ee7e26b886a5..37e8560e501e 100644 --- a/drivers/staging/wilc1000/Makefile +++ b/drivers/staging/wilc1000/Makefile @@ -4,12 +4,9 @@ obj-$(CONFIG_WILC1000) += wilc1000.o ccflags-y += -DFIRMWARE_1002=\"atmel/wilc1002_firmware.bin\" \ -DFIRMWARE_1003=\"atmel/wilc1003_firmware.bin\" -ccflags-y += -I$(src)/ -DWILC_ASIC_A0 -DWILC_DEBUGFS - wilc1000-objs := wilc_wfi_cfgoperations.o linux_wlan.o linux_mon.o \ coreconfigurator.o host_interface.o \ - wilc_wlan_cfg.o wilc_debugfs.o \ - wilc_wlan.o + wilc_wlan_cfg.o wilc_wlan.o obj-$(CONFIG_WILC1000_SDIO) += wilc1000-sdio.o wilc1000-sdio-objs += wilc_sdio.o diff --git a/drivers/staging/wilc1000/coreconfigurator.c b/drivers/staging/wilc1000/coreconfigurator.c index e5420676afb3..d6d3a971be43 100644 --- a/drivers/staging/wilc1000/coreconfigurator.c +++ b/drivers/staging/wilc1000/coreconfigurator.c @@ -116,7 +116,7 @@ static inline void get_address3(u8 *msa, u8 *addr) memcpy(addr, msa + 16, 6); } -static inline void get_BSSID(u8 *data, u8 *bssid) +static inline void get_bssid(u8 *data, u8 *bssid) { if (get_from_ds(data) == 1) get_address2(data, bssid); @@ -233,7 +233,7 @@ s32 wilc_parse_network_info(u8 *msg_buffer, network_info->tsf_hi = tsf_lo | ((u64)tsf_hi << 32); get_ssid(msa, network_info->ssid, &network_info->ssid_len); - get_BSSID(msa, network_info->bssid); + get_bssid(msa, network_info->bssid); network_info->ch = get_current_channel_802_11n(msa, rx_len + FCS_LEN); diff --git a/drivers/staging/wilc1000/host_interface.c b/drivers/staging/wilc1000/host_interface.c index 42d8accb1f60..01db8999335e 100644 --- a/drivers/staging/wilc1000/host_interface.c +++ b/drivers/staging/wilc1000/host_interface.c @@ -90,6 +90,7 @@ struct beacon_attr { struct set_multicast { bool enabled; u32 cnt; + u8 *mc_list; }; struct del_all_sta { @@ -186,23 +187,7 @@ struct join_bss_param { }; static struct host_if_drv *terminated_handle; -bool wilc_optaining_ip; -static u8 p2p_listen_state; -static struct workqueue_struct *hif_workqueue; -static struct completion hif_driver_comp; static struct mutex hif_deinit_lock; -static struct timer_list periodic_rssi; -static struct wilc_vif *periodic_rssi_vif; - -u8 wilc_multicast_mac_addr_list[WILC_MULTICAST_TABLE_SIZE][ETH_ALEN]; - -static u8 rcv_assoc_resp[MAX_ASSOC_RESP_FRAME_SIZE]; - -static u8 set_ip[2][4]; -static u8 get_ip[2][4]; -static u32 clients_count; - -static int host_int_get_ipaddress(struct wilc_vif *vif, u8 *ip_addr, u8 idx); /* 'msg' should be free by the caller for syc */ static struct host_if_msg* @@ -229,7 +214,11 @@ wilc_alloc_work(struct wilc_vif *vif, void (*work_fun)(struct work_struct *), static int wilc_enqueue_work(struct host_if_msg *msg) { INIT_WORK(&msg->work, msg->fn); - if (!hif_workqueue || !queue_work(hif_workqueue, &msg->work)) + + if (!msg->vif || !msg->vif->wilc || !msg->vif->wilc->hif_workqueue) + return -EINVAL; + + if (!queue_work(msg->vif->wilc->hif_workqueue, &msg->work)) return -EINVAL; return 0; @@ -320,10 +309,12 @@ static void handle_set_wfi_drv_handler(struct work_struct *work) if (ret) netdev_err(vif->ndev, "Failed to set driver handler\n"); - complete(&hif_driver_comp); kfree(buffer); free_msg: + if (msg->is_sync) + complete(&msg->work_comp); + kfree(msg); } @@ -343,73 +334,12 @@ static void handle_set_operation_mode(struct work_struct *work) ret = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, wilc_get_vif_idx(vif)); - if (hif_op_mode->mode == IDLE_MODE) - complete(&hif_driver_comp); - if (ret) netdev_err(vif->ndev, "Failed to set operation mode\n"); kfree(msg); } -static void handle_set_ip_address(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - u8 *ip_addr = msg->body.ip_info.ip_addr; - u8 idx = msg->body.ip_info.idx; - int ret; - struct wid wid; - char firmware_ip_addr[4] = {0}; - - if (ip_addr[0] < 192) - ip_addr[0] = 0; - - memcpy(set_ip[idx], ip_addr, IP_ALEN); - - wid.id = WID_IP_ADDRESS; - wid.type = WID_STR; - wid.val = ip_addr; - wid.size = IP_ALEN; - - ret = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - - host_int_get_ipaddress(vif, firmware_ip_addr, idx); - - if (ret) - netdev_err(vif->ndev, "Failed to set IP address\n"); - kfree(msg); -} - -static void handle_get_ip_address(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - struct wilc_vif *vif = msg->vif; - u8 idx = msg->body.ip_info.idx; - int ret; - struct wid wid; - - wid.id = WID_IP_ADDRESS; - wid.type = WID_STR; - wid.val = kmalloc(IP_ALEN, GFP_KERNEL); - wid.size = IP_ALEN; - - ret = wilc_send_config_pkt(vif, GET_CFG, &wid, 1, - wilc_get_vif_idx(vif)); - - memcpy(get_ip[idx], wid.val, IP_ALEN); - - kfree(wid.val); - - if (memcmp(get_ip[idx], set_ip[idx], IP_ALEN) != 0) - wilc_setup_ipaddress(vif, set_ip[idx], idx); - - if (ret) - netdev_err(vif->ndev, "Failed to get IP address\n"); - kfree(msg); -} - static void handle_get_mac_address(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); @@ -791,7 +721,7 @@ static void handle_scan(struct work_struct *work) goto error; } - if (wilc_optaining_ip || wilc_connecting) { + if (vif->obtaining_ip || vif->connecting) { netdev_err(vif->ndev, "Don't do obss scan\n"); result = -EBUSY; goto error; @@ -883,7 +813,6 @@ error: kfree(msg); } -u8 wilc_connected_ssid[6] = {0}; static void handle_connect(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); @@ -905,11 +834,6 @@ static void handle_connect(struct work_struct *work) return; } - if (memcmp(conn_attr->bssid, wilc_connected_ssid, ETH_ALEN) == 0) { - netdev_err(vif->ndev, "Discard connect request\n"); - goto error; - } - bss_param = conn_attr->params; if (!bss_param) { netdev_err(vif->ndev, "Required BSSID not found\n"); @@ -1089,10 +1013,6 @@ static void handle_connect(struct work_struct *work) cur_byte = wid_list[wid_cnt].val; wid_cnt++; - if (conn_attr->bssid) - memcpy(wilc_connected_ssid, - conn_attr->bssid, ETH_ALEN); - result = wilc_send_config_pkt(vif, SET_CFG, wid_list, wid_cnt, wilc_get_vif_idx(vif)); @@ -1215,8 +1135,6 @@ static void handle_connect_timeout(struct work_struct *work) kfree(hif_drv->usr_conn_req.ies); hif_drv->usr_conn_req.ies = NULL; - eth_zero_addr(wilc_connected_ssid); - out: kfree(msg); } @@ -1456,10 +1374,10 @@ done: kfree(msg); } -static s32 host_int_get_assoc_res_info(struct wilc_vif *vif, - u8 *assoc_resp_info, - u32 max_assoc_resp_info_len, - u32 *rcvd_assoc_resp_info_len) +static void host_int_get_assoc_res_info(struct wilc_vif *vif, + u8 *assoc_resp_info, + u32 max_assoc_resp_info_len, + u32 *rcvd_assoc_resp_info_len) { int result; struct wid wid; @@ -1474,11 +1392,10 @@ static s32 host_int_get_assoc_res_info(struct wilc_vif *vif, if (result) { *rcvd_assoc_resp_info_len = 0; netdev_err(vif->ndev, "Failed to send association response\n"); - return -EINVAL; + return; } *rcvd_assoc_resp_info_len = wid.size; - return result; } static inline void host_int_free_user_conn_req(struct host_if_drv *hif_drv) @@ -1504,16 +1421,16 @@ static inline void host_int_parse_assoc_resp_info(struct wilc_vif *vif, if (mac_status == MAC_STATUS_CONNECTED) { u32 assoc_resp_info_len; - memset(rcv_assoc_resp, 0, MAX_ASSOC_RESP_FRAME_SIZE); + memset(hif_drv->assoc_resp, 0, MAX_ASSOC_RESP_FRAME_SIZE); - host_int_get_assoc_res_info(vif, rcv_assoc_resp, + host_int_get_assoc_res_info(vif, hif_drv->assoc_resp, MAX_ASSOC_RESP_FRAME_SIZE, &assoc_resp_info_len); if (assoc_resp_info_len != 0) { s32 err = 0; - err = wilc_parse_assoc_resp_info(rcv_assoc_resp, + err = wilc_parse_assoc_resp_info(hif_drv->assoc_resp, assoc_resp_info_len, &conn_info); if (err) @@ -1523,16 +1440,6 @@ static inline void host_int_parse_assoc_resp_info(struct wilc_vif *vif, } } - if (mac_status == MAC_STATUS_CONNECTED && - conn_info.status != WLAN_STATUS_SUCCESS) { - netdev_err(vif->ndev, - "Received MAC status is MAC_STATUS_CONNECTED, Assoc Resp is not SUCCESS\n"); - eth_zero_addr(wilc_connected_ssid); - } else if (mac_status == MAC_STATUS_DISCONNECTED) { - netdev_err(vif->ndev, "Received MAC status is MAC_STATUS_DISCONNECTED\n"); - eth_zero_addr(wilc_connected_ssid); - } - if (hif_drv->usr_conn_req.bssid) { memcpy(conn_info.bssid, hif_drv->usr_conn_req.bssid, 6); @@ -1562,8 +1469,8 @@ static inline void host_int_parse_assoc_resp_info(struct wilc_vif *vif, hif_drv->hif_state = HOST_IF_CONNECTED; - wilc_optaining_ip = true; - mod_timer(&wilc_during_ip_timer, + vif->obtaining_ip = true; + mod_timer(&vif->during_ip_timer, jiffies + msecs_to_jiffies(10000)); } else { hif_drv->hif_state = HOST_IF_IDLE; @@ -1595,7 +1502,7 @@ static inline void host_int_handle_disconnect(struct wilc_vif *vif) disconn_info.ie_len = 0; if (conn_result) { - wilc_optaining_ip = false; + vif->obtaining_ip = false; wilc_set_power_mgmt(vif, 0, 0); conn_result(CONN_DISCONN_EVENT_DISCONN_NOTIF, NULL, 0, @@ -1942,11 +1849,9 @@ static void handle_disconnect(struct work_struct *work) wid.val = (s8 *)&dummy_reason_code; wid.size = sizeof(char); - wilc_optaining_ip = false; + vif->obtaining_ip = false; wilc_set_power_mgmt(vif, 0, 0); - eth_zero_addr(wilc_connected_ssid); - result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, wilc_get_vif_idx(vif)); @@ -2076,9 +1981,9 @@ static void handle_get_statistics(struct work_struct *work) if (stats->link_speed > TCP_ACK_FILTER_LINK_SPEED_THRESH && stats->link_speed != DEFAULT_LINK_SPEED) - wilc_enable_tcp_ack_filter(true); + wilc_enable_tcp_ack_filter(vif, true); else if (stats->link_speed != DEFAULT_LINK_SPEED) - wilc_enable_tcp_ack_filter(false); + wilc_enable_tcp_ack_filter(vif, false); /* free 'msg' for async command, for sync caller will free it */ if (msg->is_sync) @@ -2397,7 +2302,7 @@ static int handle_remain_on_chan(struct wilc_vif *vif, goto error; } - if (wilc_optaining_ip || wilc_connecting) { + if (vif->obtaining_ip || vif->connecting) { result = -EBUSY; goto error; } @@ -2422,7 +2327,6 @@ static int handle_remain_on_chan(struct wilc_vif *vif, netdev_err(vif->ndev, "Failed to set remain on channel\n"); error: - p2p_listen_state = 1; hif_drv->remain_on_ch_timer_vif = vif; mod_timer(&hif_drv->remain_on_ch_timer, jiffies + msecs_to_jiffies(hif_remain_ch->duration)); @@ -2478,8 +2382,9 @@ static void handle_listen_state_expired(struct work_struct *work) struct wid wid; int result; struct host_if_drv *hif_drv = vif->hif_drv; + struct wilc_priv *priv = wdev_priv(vif->ndev->ieee80211_ptr); - if (p2p_listen_state) { + if (priv->p2p_listen_state) { remain_on_chan_flag = false; wid.id = WID_REMAIN_ON_CHAN; wid.type = WID_STR; @@ -2504,7 +2409,6 @@ static void handle_listen_state_expired(struct work_struct *work) hif_drv->remain_on_ch.expired(hif_drv->remain_on_ch.arg, hif_remain_ch->id); } - p2p_listen_state = 0; } else { netdev_dbg(vif->ndev, "Not in listen state\n"); } @@ -2589,8 +2493,8 @@ static void handle_set_mcast_filter(struct work_struct *work) *cur_byte++ = ((hif_set_mc->cnt >> 16) & 0xFF); *cur_byte++ = ((hif_set_mc->cnt >> 24) & 0xFF); - if (hif_set_mc->cnt > 0) - memcpy(cur_byte, wilc_multicast_mac_addr_list, + if (hif_set_mc->cnt > 0 && hif_set_mc->mc_list) + memcpy(cur_byte, hif_set_mc->mc_list, ((hif_set_mc->cnt) * ETH_ALEN)); result = wilc_send_config_pkt(vif, SET_CFG, &wid, 1, @@ -2599,6 +2503,7 @@ static void handle_set_mcast_filter(struct work_struct *work) netdev_err(vif->ndev, "Failed to send setup multicast\n"); error: + kfree(hif_set_mc->mc_list); kfree(wid.val); kfree(msg); } @@ -2661,14 +2566,6 @@ static void handle_remain_on_chan_work(struct work_struct *work) kfree(msg); } -static void handle_hif_exit_work(struct work_struct *work) -{ - struct host_if_msg *msg = container_of(work, struct host_if_msg, work); - - /* free 'msg' data in caller */ - complete(&msg->work_comp); -} - static void handle_scan_complete(struct work_struct *work) { struct host_if_msg *msg = container_of(work, struct host_if_msg, work); @@ -3195,12 +3092,12 @@ int wilc_set_mac_chnl_num(struct wilc_vif *vif, u8 channel) } int wilc_set_wfi_drv_handler(struct wilc_vif *vif, int index, u8 mode, - u8 ifc_id) + u8 ifc_id, bool is_sync) { int result; struct host_if_msg *msg; - msg = wilc_alloc_work(vif, handle_set_wfi_drv_handler, false); + msg = wilc_alloc_work(vif, handle_set_wfi_drv_handler, is_sync); if (IS_ERR(msg)) return PTR_ERR(msg); @@ -3212,8 +3109,12 @@ int wilc_set_wfi_drv_handler(struct wilc_vif *vif, int index, u8 mode, if (result) { netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); kfree(msg); + return result; } + if (is_sync) + wait_for_completion(&msg->work_comp); + return result; } @@ -3421,9 +3322,9 @@ int wilc_hif_set_cfg(struct wilc_vif *vif, return result; } -static void get_periodic_rssi(struct timer_list *unused) +static void get_periodic_rssi(struct timer_list *t) { - struct wilc_vif *vif = periodic_rssi_vif; + struct wilc_vif *vif = from_timer(vif, t, periodic_rssi); if (!vif->hif_drv) { netdev_err(vif->ndev, "%s: hif driver is NULL", __func__); @@ -3431,9 +3332,9 @@ static void get_periodic_rssi(struct timer_list *unused) } if (vif->hif_drv->hif_state == HOST_IF_CONNECTED) - wilc_get_statistics(vif, &vif->wilc->dummy_statistics, false); + wilc_get_statistics(vif, &vif->periodic_stat, false); - mod_timer(&periodic_rssi, jiffies + msecs_to_jiffies(5000)); + mod_timer(&vif->periodic_rssi, jiffies + msecs_to_jiffies(5000)); } int wilc_init(struct net_device *dev, struct host_if_drv **hif_drv_handler) @@ -3455,25 +3356,13 @@ int wilc_init(struct net_device *dev, struct host_if_drv **hif_drv_handler) break; } - wilc_optaining_ip = false; + vif->obtaining_ip = false; - if (clients_count == 0) { - init_completion(&hif_driver_comp); + if (wilc->clients_count == 0) mutex_init(&hif_deinit_lock); - } - if (clients_count == 0) { - hif_workqueue = create_singlethread_workqueue("WILC_wq"); - if (!hif_workqueue) { - netdev_err(vif->ndev, "Failed to create workqueue\n"); - kfree(hif_drv); - return -ENOMEM; - } - - periodic_rssi_vif = vif; - timer_setup(&periodic_rssi, get_periodic_rssi, 0); - mod_timer(&periodic_rssi, jiffies + msecs_to_jiffies(5000)); - } + timer_setup(&vif->periodic_rssi, get_periodic_rssi, 0); + mod_timer(&vif->periodic_rssi, jiffies + msecs_to_jiffies(5000)); timer_setup(&hif_drv->scan_timer, timer_scan_cb, 0); timer_setup(&hif_drv->connect_timer, timer_connect_cb, 0); @@ -3493,7 +3382,7 @@ int wilc_init(struct net_device *dev, struct host_if_drv **hif_drv_handler) mutex_unlock(&hif_drv->cfg_values_lock); - clients_count++; + wilc->clients_count++; return 0; } @@ -3514,11 +3403,10 @@ int wilc_deinit(struct wilc_vif *vif) del_timer_sync(&hif_drv->scan_timer); del_timer_sync(&hif_drv->connect_timer); - del_timer_sync(&periodic_rssi); + del_timer_sync(&vif->periodic_rssi); del_timer_sync(&hif_drv->remain_on_ch_timer); - wilc_set_wfi_drv_handler(vif, 0, 0, 0); - wait_for_completion(&hif_driver_comp); + wilc_set_wfi_drv_handler(vif, 0, 0, 0, true); if (hif_drv->usr_scan_req.scan_result) { hif_drv->usr_scan_req.scan_result(SCAN_EVENT_ABORTED, NULL, @@ -3529,25 +3417,9 @@ int wilc_deinit(struct wilc_vif *vif) hif_drv->hif_state = HOST_IF_IDLE; - if (clients_count == 1) { - struct host_if_msg *msg; - - msg = wilc_alloc_work(vif, handle_hif_exit_work, true); - if (!IS_ERR(msg)) { - result = wilc_enqueue_work(msg); - if (result) - netdev_err(vif->ndev, "deinit : Error(%d)\n", - result); - else - wait_for_completion(&msg->work_comp); - kfree(msg); - } - destroy_workqueue(hif_workqueue); - } - kfree(hif_drv); - clients_count--; + vif->wilc->clients_count--; terminated_handle = NULL; mutex_unlock(&hif_deinit_lock); return result; @@ -3743,14 +3615,14 @@ int wilc_listen_state_expired(struct wilc_vif *vif, u32 session_id) return result; } -int wilc_frame_register(struct wilc_vif *vif, u16 frame_type, bool reg) +void wilc_frame_register(struct wilc_vif *vif, u16 frame_type, bool reg) { int result; struct host_if_msg *msg; msg = wilc_alloc_work(vif, handle_register_frame, false); if (IS_ERR(msg)) - return PTR_ERR(msg); + return; switch (frame_type) { case ACTION: @@ -3772,8 +3644,6 @@ int wilc_frame_register(struct wilc_vif *vif, u16 frame_type, bool reg) netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); kfree(msg); } - - return result; } int wilc_add_beacon(struct wilc_vif *vif, u32 interval, u32 dtim_period, @@ -3992,8 +3862,8 @@ int wilc_set_power_mgmt(struct wilc_vif *vif, bool enabled, u32 timeout) return result; } -int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, - u32 count) +int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, u32 count, + u8 *mc_list) { int result; struct host_if_msg *msg; @@ -4004,6 +3874,7 @@ int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, msg->body.multicast_info.enabled = enabled; msg->body.multicast_info.cnt = count; + msg->body.multicast_info.mc_list = mc_list; result = wilc_enqueue_work(msg); if (result) { @@ -4013,48 +3884,6 @@ int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, return result; } -int wilc_setup_ipaddress(struct wilc_vif *vif, u8 *ip_addr, u8 idx) -{ - int result; - struct host_if_msg *msg; - - msg = wilc_alloc_work(vif, handle_set_ip_address, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.ip_info.ip_addr = ip_addr; - msg->body.ip_info.idx = idx; - - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } - - return result; -} - -static int host_int_get_ipaddress(struct wilc_vif *vif, u8 *ip_addr, u8 idx) -{ - int result; - struct host_if_msg *msg; - - msg = wilc_alloc_work(vif, handle_get_ip_address, false); - if (IS_ERR(msg)) - return PTR_ERR(msg); - - msg->body.ip_info.ip_addr = ip_addr; - msg->body.ip_info.idx = idx; - - result = wilc_enqueue_work(msg); - if (result) { - netdev_err(vif->ndev, "%s: enqueue work failed\n", __func__); - kfree(msg); - } - - return result; -} - int wilc_set_tx_power(struct wilc_vif *vif, u8 tx_power) { int ret; diff --git a/drivers/staging/wilc1000/host_interface.h b/drivers/staging/wilc1000/host_interface.h index 84866a62a4d4..33fb7318734b 100644 --- a/drivers/staging/wilc1000/host_interface.h +++ b/drivers/staging/wilc1000/host_interface.h @@ -9,8 +9,6 @@ #include <linux/ieee80211.h> #include "coreconfigurator.h" -#define IP_ALEN 4 - #define IDLE_MODE 0x00 #define AP_MODE 0x01 #define STATION_MODE 0x02 @@ -284,6 +282,7 @@ struct host_if_drv { bool ifc_up; int driver_handler_id; + u8 assoc_resp[MAX_ASSOC_RESP_FRAME_SIZE]; }; struct add_sta_param { @@ -341,18 +340,17 @@ int wilc_del_station(struct wilc_vif *vif, const u8 *mac_addr); int wilc_edit_station(struct wilc_vif *vif, struct add_sta_param *sta_param); int wilc_set_power_mgmt(struct wilc_vif *vif, bool enabled, u32 timeout); -int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, - u32 count); -int wilc_setup_ipaddress(struct wilc_vif *vif, u8 *ip_addr, u8 idx); +int wilc_setup_multicast_filter(struct wilc_vif *vif, bool enabled, u32 count, + u8 *mc_list); int wilc_remain_on_channel(struct wilc_vif *vif, u32 session_id, u32 duration, u16 chan, wilc_remain_on_chan_expired expired, wilc_remain_on_chan_ready ready, void *user_arg); int wilc_listen_state_expired(struct wilc_vif *vif, u32 session_id); -int wilc_frame_register(struct wilc_vif *vif, u16 frame_type, bool reg); +void wilc_frame_register(struct wilc_vif *vif, u16 frame_type, bool reg); int wilc_set_wfi_drv_handler(struct wilc_vif *vif, int index, u8 mode, - u8 ifc_id); + u8 ifc_id, bool is_sync); int wilc_set_operation_mode(struct wilc_vif *vif, u32 mode); int wilc_get_statistics(struct wilc_vif *vif, struct rf_info *stats, bool is_sync); @@ -361,11 +359,4 @@ int wilc_get_vif_idx(struct wilc_vif *vif); int wilc_set_tx_power(struct wilc_vif *vif, u8 tx_power); int wilc_get_tx_power(struct wilc_vif *vif, u8 *tx_power); -extern bool wilc_optaining_ip; -extern u8 wilc_connected_ssid[6]; -extern u8 wilc_multicast_mac_addr_list[WILC_MULTICAST_TABLE_SIZE][ETH_ALEN]; - -extern int wilc_connecting; -extern struct timer_list wilc_during_ip_timer; - #endif diff --git a/drivers/staging/wilc1000/linux_mon.c b/drivers/staging/wilc1000/linux_mon.c index 1afdb9e86bc1..a63446818eac 100644 --- a/drivers/staging/wilc1000/linux_mon.c +++ b/drivers/staging/wilc1000/linux_mon.c @@ -253,7 +253,7 @@ struct net_device *wilc_wfi_init_mon_interface(const char *name, return wilc_wfi_mon; } -int wilc_wfi_deinit_mon_interface(void) +void wilc_wfi_deinit_mon_interface(void) { bool rollback_lock = false; @@ -270,5 +270,4 @@ int wilc_wfi_deinit_mon_interface(void) } wilc_wfi_mon = NULL; } - return 0; } diff --git a/drivers/staging/wilc1000/linux_wlan.c b/drivers/staging/wilc1000/linux_wlan.c index 3b8d237decbf..76c901235e93 100644 --- a/drivers/staging/wilc1000/linux_wlan.c +++ b/drivers/staging/wilc1000/linux_wlan.c @@ -12,8 +12,6 @@ #include "wilc_wfi_cfgoperations.h" -bool wilc_enable_ps = true; - static int dev_state_ev_handler(struct notifier_block *this, unsigned long event, void *ptr) { @@ -50,11 +48,11 @@ static int dev_state_ev_handler(struct notifier_block *this, case NETDEV_UP: if (vif->iftype == STATION_MODE || vif->iftype == CLIENT_MODE) { hif_drv->ifc_up = 1; - wilc_optaining_ip = false; - del_timer(&wilc_during_ip_timer); + vif->obtaining_ip = false; + del_timer(&vif->during_ip_timer); } - if (wilc_enable_ps) + if (vif->wilc->enable_ps) wilc_set_power_mgmt(vif, 1, 0); netdev_dbg(dev, "[%s] Up IP\n", dev_iface->ifa_label); @@ -63,14 +61,13 @@ static int dev_state_ev_handler(struct notifier_block *this, netdev_dbg(dev, "IP add=%d:%d:%d:%d\n", ip_addr_buf[0], ip_addr_buf[1], ip_addr_buf[2], ip_addr_buf[3]); - wilc_setup_ipaddress(vif, ip_addr_buf, vif->idx); break; case NETDEV_DOWN: if (vif->iftype == STATION_MODE || vif->iftype == CLIENT_MODE) { hif_drv->ifc_up = 0; - wilc_optaining_ip = false; + vif->obtaining_ip = false; } if (memcmp(dev_iface->ifa_label, wlan_dev_name, 5) == 0) @@ -85,8 +82,6 @@ static int dev_state_ev_handler(struct notifier_block *this, ip_addr_buf[0], ip_addr_buf[1], ip_addr_buf[2], ip_addr_buf[3]); - wilc_setup_ipaddress(vif, ip_addr_buf, vif->idx); - break; default: @@ -164,9 +159,9 @@ static void deinit_irq(struct net_device *dev) void wilc_mac_indicate(struct wilc *wilc) { - int status; + s8 status; - wilc_wlan_cfg_get_val(WID_STATUS, (unsigned char *)&status, 4); + wilc_wlan_cfg_get_val(wilc, WID_STATUS, &status, 1); if (wilc->mac_status == MAC_STATUS_INIT) { wilc->mac_status = status; complete(&wilc->sync_event); @@ -197,14 +192,12 @@ static struct net_device *get_if_handler(struct wilc *wilc, u8 *mac_header) return NULL; } -int wilc_wlan_set_bssid(struct net_device *wilc_netdev, u8 *bssid, u8 mode) +void wilc_wlan_set_bssid(struct net_device *wilc_netdev, u8 *bssid, u8 mode) { struct wilc_vif *vif = netdev_priv(wilc_netdev); memcpy(vif->bssid, bssid, 6); vif->mode = mode; - - return 0; } int wilc_wlan_get_num_conn_ifcs(struct wilc *wilc) @@ -269,9 +262,6 @@ static int wilc_wlan_get_firmware(struct net_device *dev) netdev_info(dev, "loading firmware %s\n", firmware); - if (!(&vif->ndev->dev)) - goto fail; - if (request_firmware(&wilc_firmware, firmware, wilc->dev) != 0) { netdev_err(dev, "%s - firmware not available\n", firmware); ret = -1; @@ -532,7 +522,7 @@ fail: return -1; } -static int wlan_deinit_locks(struct net_device *dev) +static void wlan_deinit_locks(struct net_device *dev) { struct wilc_vif *vif = netdev_priv(dev); struct wilc *wilc = vif->wilc; @@ -540,8 +530,6 @@ static int wlan_deinit_locks(struct net_device *dev) mutex_destroy(&wilc->hif_cs); mutex_destroy(&wilc->rxq_cs); mutex_destroy(&wilc->txq_add_to_head_cs); - - return 0; } static void wlan_deinitialize_threads(struct net_device *dev) @@ -595,7 +583,7 @@ static void wilc_wlan_deinitialize(struct net_device *dev) } } -static int wlan_init_locks(struct net_device *dev) +static void wlan_init_locks(struct net_device *dev) { struct wilc_vif *vif = netdev_priv(dev); struct wilc *wl = vif->wilc; @@ -611,8 +599,6 @@ static int wlan_init_locks(struct net_device *dev) init_completion(&wl->cfg_event); init_completion(&wl->sync_event); init_completion(&wl->txq_thread_started); - - return 0; } static int wlan_initialize_threads(struct net_device *dev) @@ -688,7 +674,7 @@ static int wilc_wlan_initialize(struct net_device *dev, struct wilc_vif *vif) int size; char firmware_ver[20]; - size = wilc_wlan_cfg_get_val(WID_FIRMWARE_VERSION, + size = wilc_wlan_cfg_get_val(wl, WID_FIRMWARE_VERSION, firmware_ver, sizeof(firmware_ver)); firmware_ver[size] = '\0'; @@ -740,6 +726,7 @@ static int wilc_mac_open(struct net_device *ndev) { struct wilc_vif *vif = netdev_priv(ndev); struct wilc *wl = vif->wilc; + struct wilc_priv *priv = wdev_priv(vif->ndev->ieee80211_ptr); unsigned char mac_add[ETH_ALEN] = {0}; int ret = 0; int i = 0; @@ -764,7 +751,8 @@ static int wilc_mac_open(struct net_device *ndev) for (i = 0; i < wl->vif_num; i++) { if (ndev == wl->vif[i]->ndev) { wilc_set_wfi_drv_handler(vif, wilc_get_vif_idx(vif), - vif->iftype, vif->ifc_id); + vif->iftype, vif->ifc_id, + false); wilc_set_operation_mode(vif, vif->iftype); break; } @@ -792,6 +780,7 @@ static int wilc_mac_open(struct net_device *ndev) vif->frame_reg[1].reg); netif_wake_queue(ndev); wl->open_ifcs++; + priv->p2p.local_random = 0x01; vif->mac_opened = 1; return 0; } @@ -807,35 +796,39 @@ static void wilc_set_multicast_list(struct net_device *dev) { struct netdev_hw_addr *ha; struct wilc_vif *vif = netdev_priv(dev); - int i = 0; + int i; + u8 *mc_list; + u8 *cur_mc; if (dev->flags & IFF_PROMISC) return; if (dev->flags & IFF_ALLMULTI || dev->mc.count > WILC_MULTICAST_TABLE_SIZE) { - wilc_setup_multicast_filter(vif, false, 0); + wilc_setup_multicast_filter(vif, false, 0, NULL); return; } if (dev->mc.count == 0) { - wilc_setup_multicast_filter(vif, true, 0); + wilc_setup_multicast_filter(vif, true, 0, NULL); return; } + mc_list = kmalloc_array(dev->mc.count, ETH_ALEN, GFP_KERNEL); + if (!mc_list) + return; + + cur_mc = mc_list; + i = 0; netdev_for_each_mc_addr(ha, dev) { - memcpy(wilc_multicast_mac_addr_list[i], ha->addr, ETH_ALEN); - netdev_dbg(dev, "Entry[%d]: %x:%x:%x:%x:%x:%x\n", i, - wilc_multicast_mac_addr_list[i][0], - wilc_multicast_mac_addr_list[i][1], - wilc_multicast_mac_addr_list[i][2], - wilc_multicast_mac_addr_list[i][3], - wilc_multicast_mac_addr_list[i][4], - wilc_multicast_mac_addr_list[i][5]); + memcpy(cur_mc, ha->addr, ETH_ALEN); + netdev_dbg(dev, "Entry[%d]: %pM\n", i, cur_mc); i++; + cur_mc += ETH_ALEN; } - wilc_setup_multicast_filter(vif, true, (dev->mc.count)); + if (wilc_setup_multicast_filter(vif, true, dev->mc.count, mc_list)) + kfree(mc_list); } static void linux_wlan_tx_complete(void *priv, int status) @@ -1016,15 +1009,18 @@ void wilc_netdev_cleanup(struct wilc *wilc) { int i; - if (wilc && (wilc->vif[0]->ndev || wilc->vif[1]->ndev)) + if (!wilc) + return; + + if (wilc->vif[0]->ndev || wilc->vif[1]->ndev) unregister_inetaddr_notifier(&g_dev_notifier); - if (wilc && wilc->firmware) { + if (wilc->firmware) { release_firmware(wilc->firmware); wilc->firmware = NULL; } - if (wilc && (wilc->vif[0]->ndev || wilc->vif[1]->ndev)) { + if (wilc->vif[0]->ndev || wilc->vif[1]->ndev) { for (i = 0; i < NUM_CONCURRENT_IFC; i++) if (wilc->vif[i]->ndev) if (wilc->vif[i]->mac_opened) @@ -1037,6 +1033,10 @@ void wilc_netdev_cleanup(struct wilc *wilc) } } + flush_workqueue(wilc->hif_workqueue); + destroy_workqueue(wilc->hif_workqueue); + wilc_wlan_cfg_deinit(wilc); + kfree(wilc->bus_data); kfree(wilc); } EXPORT_SYMBOL_GPL(wilc_netdev_cleanup); @@ -1062,20 +1062,34 @@ int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, if (!wl) return -ENOMEM; + ret = wilc_wlan_cfg_init(wl); + if (ret) + goto free_wl; + *wilc = wl; wl->io_type = io_type; wl->hif_func = ops; + wl->enable_ps = true; + wl->chip_ps_state = CHIP_WAKEDUP; INIT_LIST_HEAD(&wl->txq_head.list); INIT_LIST_HEAD(&wl->rxq_head.list); + wl->hif_workqueue = create_singlethread_workqueue("WILC_wq"); + if (!wl->hif_workqueue) { + ret = -ENOMEM; + goto free_cfg; + } + register_inetaddr_notifier(&g_dev_notifier); for (i = 0; i < NUM_CONCURRENT_IFC; i++) { struct wireless_dev *wdev; ndev = alloc_etherdev(sizeof(struct wilc_vif)); - if (!ndev) - return -ENOMEM; + if (!ndev) { + ret = -ENOMEM; + goto free_ndev; + } vif = netdev_priv(ndev); memset(vif, 0, sizeof(struct wilc_vif)); @@ -1096,15 +1110,14 @@ int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, ndev->netdev_ops = &wilc_netdev_ops; wdev = wilc_create_wiphy(ndev, dev); - - if (dev) - SET_NETDEV_DEV(ndev, dev); - if (!wdev) { netdev_err(ndev, "Can't register WILC Wiphy\n"); - return -1; + ret = -ENOMEM; + goto free_ndev; } + SET_NETDEV_DEV(ndev, dev); + vif->ndev->ieee80211_ptr = wdev; vif->ndev->ml_priv = vif; wdev->netdev = vif->ndev; @@ -1115,13 +1128,33 @@ int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, ret = register_netdev(ndev); if (ret) - return ret; + goto free_ndev; vif->iftype = STATION_MODE; vif->mac_opened = 0; } return 0; + +free_ndev: + for (; i >= 0; i--) { + if (wl->vif[i]) { + if (wl->vif[i]->iftype == STATION_MODE) + unregister_netdev(wl->vif[i]->ndev); + + if (wl->vif[i]->ndev) { + wilc_free_wiphy(wl->vif[i]->ndev); + free_netdev(wl->vif[i]->ndev); + } + } + } + unregister_inetaddr_notifier(&g_dev_notifier); + destroy_workqueue(wl->hif_workqueue); +free_cfg: + wilc_wlan_cfg_deinit(wl); +free_wl: + kfree(wl); + return ret; } EXPORT_SYMBOL_GPL(wilc_netdev_init); diff --git a/drivers/staging/wilc1000/wilc_debugfs.c b/drivers/staging/wilc1000/wilc_debugfs.c deleted file mode 100644 index 8001df66b8c2..000000000000 --- a/drivers/staging/wilc1000/wilc_debugfs.c +++ /dev/null @@ -1,115 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries. - * All rights reserved. - */ - -#if defined(WILC_DEBUGFS) -#include <linux/module.h> -#include <linux/debugfs.h> - -#include "wilc_wlan_if.h" - -static struct dentry *wilc_dir; - -#define DEBUG BIT(0) -#define INFO BIT(1) -#define WRN BIT(2) -#define ERR BIT(3) - -#define DBG_LEVEL_ALL (DEBUG | INFO | WRN | ERR) -static atomic_t WILC_DEBUG_LEVEL = ATOMIC_INIT(ERR); -EXPORT_SYMBOL_GPL(WILC_DEBUG_LEVEL); - -static ssize_t wilc_debug_level_read(struct file *file, char __user *userbuf, - size_t count, loff_t *ppos) -{ - char buf[128]; - int res = 0; - - /* only allow read from start */ - if (*ppos > 0) - return 0; - - res = scnprintf(buf, sizeof(buf), "Debug Level: %x\n", - atomic_read(&WILC_DEBUG_LEVEL)); - - return simple_read_from_buffer(userbuf, count, ppos, buf, res); -} - -static ssize_t wilc_debug_level_write(struct file *filp, - const char __user *buf, size_t count, - loff_t *ppos) -{ - int flag = 0; - int ret; - - ret = kstrtouint_from_user(buf, count, 16, &flag); - if (ret) - return ret; - - if (flag > DBG_LEVEL_ALL) { - pr_info("%s, value (0x%08x) is out of range, stay previous flag (0x%08x)\n", - __func__, flag, atomic_read(&WILC_DEBUG_LEVEL)); - return -EINVAL; - } - - atomic_set(&WILC_DEBUG_LEVEL, (int)flag); - - if (flag == 0) - pr_info("Debug-level disabled\n"); - else - pr_info("Debug-level enabled\n"); - - return count; -} - -#define FOPS(_open, _read, _write, _poll) { \ - .owner = THIS_MODULE, \ - .open = (_open), \ - .read = (_read), \ - .write = (_write), \ - .poll = (_poll), \ -} - -struct wilc_debugfs_info_t { - const char *name; - int perm; - unsigned int data; - const struct file_operations fops; -}; - -static struct wilc_debugfs_info_t debugfs_info[] = { - { - "wilc_debug_level", - 0666, - (DEBUG | ERR), - FOPS(NULL, wilc_debug_level_read, wilc_debug_level_write, NULL), - }, -}; - -static int __init wilc_debugfs_init(void) -{ - int i; - struct wilc_debugfs_info_t *info; - - wilc_dir = debugfs_create_dir("wilc_wifi", NULL); - for (i = 0; i < ARRAY_SIZE(debugfs_info); i++) { - info = &debugfs_info[i]; - debugfs_create_file(info->name, - info->perm, - wilc_dir, - &info->data, - &info->fops); - } - return 0; -} -module_init(wilc_debugfs_init); - -static void __exit wilc_debugfs_remove(void) -{ - debugfs_remove_recursive(wilc_dir); -} -module_exit(wilc_debugfs_remove); - -#endif diff --git a/drivers/staging/wilc1000/wilc_sdio.c b/drivers/staging/wilc1000/wilc_sdio.c index b2080d8b801f..ca351c950344 100644 --- a/drivers/staging/wilc1000/wilc_sdio.c +++ b/drivers/staging/wilc1000/wilc_sdio.c @@ -30,7 +30,6 @@ struct wilc_sdio { int has_thrpt_enh3; }; -static struct wilc_sdio g_sdio; static const struct wilc_hif_func wilc_hif_sdio; static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data); @@ -109,6 +108,11 @@ static int linux_sdio_probe(struct sdio_func *func, struct wilc *wilc; int ret; struct gpio_desc *gpio = NULL; + struct wilc_sdio *sdio_priv; + + sdio_priv = kzalloc(sizeof(*sdio_priv), GFP_KERNEL); + if (!sdio_priv) + return -ENOMEM; if (IS_ENABLED(CONFIG_WILC1000_HW_OOB_INTR)) { gpio = gpiod_get(&func->dev, "irq", GPIOD_IN); @@ -124,9 +128,11 @@ static int linux_sdio_probe(struct sdio_func *func, ret = wilc_netdev_init(&wilc, &func->dev, HIF_SDIO, &wilc_hif_sdio); if (ret) { dev_err(&func->dev, "Couldn't initialize netdev\n"); + kfree(sdio_priv); return ret; } sdio_set_drvdata(func, wilc); + wilc->bus_data = sdio_priv; wilc->dev = &func->dev; wilc->gpio_irq = gpio; @@ -381,6 +387,7 @@ fail: static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); + struct wilc_sdio *sdio_priv = wilc->bus_data; int ret; cpu_to_le32s(&data); @@ -415,7 +422,7 @@ static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data) cmd.increment = 1; cmd.count = 4; cmd.buffer = (u8 *)&data; - cmd.block_size = g_sdio.block_size; + cmd.block_size = sdio_priv->block_size; ret = wilc_sdio_cmd53(wilc, &cmd); if (ret) { dev_err(&func->dev, @@ -434,7 +441,8 @@ fail: static int sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); - u32 block_size = g_sdio.block_size; + struct wilc_sdio *sdio_priv = wilc->bus_data; + u32 block_size = sdio_priv->block_size; struct sdio_cmd53 cmd; int nblk, nleft, ret; @@ -523,6 +531,7 @@ fail: static int sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); + struct wilc_sdio *sdio_priv = wilc->bus_data; int ret; if (addr >= 0xf0 && addr <= 0xff) { @@ -553,7 +562,7 @@ static int sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data) cmd.count = 4; cmd.buffer = (u8 *)data; - cmd.block_size = g_sdio.block_size; + cmd.block_size = sdio_priv->block_size; ret = wilc_sdio_cmd53(wilc, &cmd); if (ret) { dev_err(&func->dev, @@ -574,7 +583,8 @@ fail: static int sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); - u32 block_size = g_sdio.block_size; + struct wilc_sdio *sdio_priv = wilc->bus_data; + u32 block_size = sdio_priv->block_size; struct sdio_cmd53 cmd; int nblk, nleft, ret; @@ -674,14 +684,13 @@ static int sdio_deinit(struct wilc *wilc) static int sdio_init(struct wilc *wilc, bool resume) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); + struct wilc_sdio *sdio_priv = wilc->bus_data; struct sdio_cmd52 cmd; int loop, ret; u32 chipid; - if (!resume) { - memset(&g_sdio, 0, sizeof(struct wilc_sdio)); - g_sdio.irq_gpio = wilc->dev_irq_num; - } + if (!resume) + sdio_priv->irq_gpio = wilc->dev_irq_num; /** * function 0 csa enable @@ -704,7 +713,7 @@ static int sdio_init(struct wilc *wilc, bool resume) dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n"); goto fail; } - g_sdio.block_size = WILC_SDIO_BLOCK_SIZE; + sdio_priv->block_size = WILC_SDIO_BLOCK_SIZE; /** * enable func1 IO @@ -778,11 +787,11 @@ static int sdio_init(struct wilc *wilc, bool resume) } dev_err(&func->dev, "chipid (%08x)\n", chipid); if ((chipid & 0xfff) > 0x2a0) - g_sdio.has_thrpt_enh3 = 1; + sdio_priv->has_thrpt_enh3 = 1; else - g_sdio.has_thrpt_enh3 = 0; + sdio_priv->has_thrpt_enh3 = 0; dev_info(&func->dev, "has_thrpt_enh3 = %d...\n", - g_sdio.has_thrpt_enh3); + sdio_priv->has_thrpt_enh3); } return 1; @@ -820,6 +829,7 @@ static int sdio_read_size(struct wilc *wilc, u32 *size) static int sdio_read_int(struct wilc *wilc, u32 *int_status) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); + struct wilc_sdio *sdio_priv = wilc->bus_data; u32 tmp; struct sdio_cmd52 cmd; @@ -828,7 +838,7 @@ static int sdio_read_int(struct wilc *wilc, u32 *int_status) /** * Read IRQ flags **/ - if (!g_sdio.irq_gpio) { + if (!sdio_priv->irq_gpio) { int i; cmd.function = 1; @@ -848,7 +858,7 @@ static int sdio_read_int(struct wilc *wilc, u32 *int_status) tmp |= INT_4; if (cmd.data & BIT(6)) tmp |= INT_5; - for (i = g_sdio.nint; i < MAX_NUM_INT; i++) { + for (i = sdio_priv->nint; i < MAX_NUM_INT; i++) { if ((tmp >> (IRG_FLAGS_OFFSET + i)) & 0x1) { dev_err(&func->dev, "Unexpected interrupt (1) : tmp=%x, data=%x\n", @@ -877,13 +887,14 @@ static int sdio_read_int(struct wilc *wilc, u32 *int_status) static int sdio_clear_int_ext(struct wilc *wilc, u32 val) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); + struct wilc_sdio *sdio_priv = wilc->bus_data; int ret; int vmm_ctl; - if (g_sdio.has_thrpt_enh3) { + if (sdio_priv->has_thrpt_enh3) { u32 reg; - if (g_sdio.irq_gpio) { + if (sdio_priv->irq_gpio) { u32 flags; flags = val & (BIT(MAX_NUN_INT_THRPT_ENH2) - 1); @@ -919,7 +930,7 @@ static int sdio_clear_int_ext(struct wilc *wilc, u32 val) } return 1; } - if (g_sdio.irq_gpio) { + if (sdio_priv->irq_gpio) { /* has_thrpt_enh2 uses register 0xf8 to clear interrupts. */ /* * Cannot clear multiple interrupts. @@ -932,7 +943,7 @@ static int sdio_clear_int_ext(struct wilc *wilc, u32 val) int i; ret = 1; - for (i = 0; i < g_sdio.nint; i++) { + for (i = 0; i < sdio_priv->nint; i++) { if (flags & 1) { struct sdio_cmd52 cmd; @@ -956,7 +967,7 @@ static int sdio_clear_int_ext(struct wilc *wilc, u32 val) } if (!ret) goto fail; - for (i = g_sdio.nint; i < MAX_NUM_INT; i++) { + for (i = sdio_priv->nint; i < MAX_NUM_INT; i++) { if (flags & 1) dev_err(&func->dev, "Unexpected interrupt cleared %d...\n", @@ -1001,6 +1012,7 @@ fail: static int sdio_sync_ext(struct wilc *wilc, int nint) { struct sdio_func *func = dev_to_sdio_func(wilc->dev); + struct wilc_sdio *sdio_priv = wilc->bus_data; u32 reg; if (nint > MAX_NUM_INT) { @@ -1013,7 +1025,7 @@ static int sdio_sync_ext(struct wilc *wilc, int nint) return 0; } - g_sdio.nint = nint; + sdio_priv->nint = nint; /** * Disable power sequencer @@ -1029,7 +1041,7 @@ static int sdio_sync_ext(struct wilc *wilc, int nint) return 0; } - if (g_sdio.irq_gpio) { + if (sdio_priv->irq_gpio) { u32 reg; int ret, i; diff --git a/drivers/staging/wilc1000/wilc_spi.c b/drivers/staging/wilc1000/wilc_spi.c index 5517477d875a..cef127b249fb 100644 --- a/drivers/staging/wilc1000/wilc_spi.c +++ b/drivers/staging/wilc1000/wilc_spi.c @@ -14,7 +14,6 @@ struct wilc_spi { int has_thrpt_enh; }; -static struct wilc_spi g_spi; static const struct wilc_hif_func wilc_hif_spi; /******************************************** @@ -107,6 +106,11 @@ static int wilc_bus_probe(struct spi_device *spi) int ret; struct wilc *wilc; struct gpio_desc *gpio; + struct wilc_spi *spi_priv; + + spi_priv = kzalloc(sizeof(*spi_priv), GFP_KERNEL); + if (!spi_priv) + return -ENOMEM; gpio = gpiod_get(&spi->dev, "irq", GPIOD_IN); if (IS_ERR(gpio)) { @@ -117,11 +121,14 @@ static int wilc_bus_probe(struct spi_device *spi) } ret = wilc_netdev_init(&wilc, NULL, HIF_SPI, &wilc_hif_spi); - if (ret) + if (ret) { + kfree(spi_priv); return ret; + } spi_set_drvdata(spi, wilc); wilc->dev = &spi->dev; + wilc->bus_data = spi_priv; wilc->gpio_irq = gpio; return 0; @@ -275,6 +282,7 @@ static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless) { struct spi_device *spi = to_spi_device(wilc->dev); + struct wilc_spi *spi_priv = wilc->bus_data; u8 wb[32], rb[32]; u8 wix, rix; u32 len2; @@ -375,7 +383,7 @@ static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz, if (result != N_OK) return result; - if (!g_spi.crc_off) + if (!spi_priv->crc_off) wb[len - 1] = (crc7(0x7f, (const u8 *)&wb[0], len - 1)) << 1; else len -= 1; @@ -393,7 +401,7 @@ static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz, } else if (cmd == CMD_INTERNAL_READ || cmd == CMD_SINGLE_READ) { int tmp = NUM_RSP_BYTES + NUM_DATA_HDR_BYTES + NUM_DATA_BYTES + NUM_DUMMY_BYTES; - if (!g_spi.crc_off) + if (!spi_priv->crc_off) len2 = len + tmp + NUM_CRC_BYTES; else len2 = len + tmp; @@ -485,7 +493,7 @@ static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz, return N_FAIL; } - if (!g_spi.crc_off) { + if (!spi_priv->crc_off) { /* * Read Crc */ @@ -527,7 +535,7 @@ static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz, /* * Read Crc */ - if (!g_spi.crc_off && wilc_spi_rx(wilc, crc, 2)) { + if (!spi_priv->crc_off && wilc_spi_rx(wilc, crc, 2)) { dev_err(&spi->dev, "Failed block crc read, bus err\n"); return N_FAIL; @@ -585,7 +593,7 @@ static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz, /* * Read Crc */ - if (!g_spi.crc_off && wilc_spi_rx(wilc, crc, 2)) { + if (!spi_priv->crc_off && wilc_spi_rx(wilc, crc, 2)) { dev_err(&spi->dev, "Failed block crc read, bus err\n"); result = N_FAIL; @@ -602,6 +610,7 @@ static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz, static int spi_data_write(struct wilc *wilc, u8 *b, u32 sz) { struct spi_device *spi = to_spi_device(wilc->dev); + struct wilc_spi *spi_priv = wilc->bus_data; int ix, nbytes; int result = 1; u8 cmd, order, crc[2] = {0}; @@ -648,7 +657,7 @@ static int spi_data_write(struct wilc *wilc, u8 *b, u32 sz) /* * Write Crc */ - if (!g_spi.crc_off) { + if (!spi_priv->crc_off) { if (wilc_spi_tx(wilc, crc, 2)) { dev_err(&spi->dev, "Failed data block crc write, bus error...\n"); result = N_FAIL; @@ -816,6 +825,7 @@ static int _wilc_spi_deinit(struct wilc *wilc) static int wilc_spi_init(struct wilc *wilc, bool resume) { struct spi_device *spi = to_spi_device(wilc->dev); + struct wilc_spi *spi_priv = wilc->bus_data; u32 reg; u32 chipid; static int isinit; @@ -828,12 +838,9 @@ static int wilc_spi_init(struct wilc *wilc, bool resume) return 1; } - memset(&g_spi, 0, sizeof(struct wilc_spi)); - /* * configure protocol */ - g_spi.crc_off = 0; /* * TODO: We can remove the CRC trials if there is a definite @@ -845,7 +852,7 @@ static int wilc_spi_init(struct wilc *wilc, bool resume) * Read failed. Try with CRC off. This might happen when module * is removed but chip isn't reset */ - g_spi.crc_off = 1; + spi_priv->crc_off = 1; dev_err(&spi->dev, "Failed read with CRC on, retrying with CRC off\n"); if (!spi_internal_read(wilc, WILC_SPI_PROTOCOL_OFFSET, ®)) { @@ -857,7 +864,7 @@ static int wilc_spi_init(struct wilc *wilc, bool resume) return 0; } } - if (g_spi.crc_off == 0) { + if (spi_priv->crc_off == 0) { reg &= ~0xc; /* disable crc checking */ reg &= ~0x70; reg |= (0x5 << 4); @@ -867,7 +874,7 @@ static int wilc_spi_init(struct wilc *wilc, bool resume) __LINE__); return 0; } - g_spi.crc_off = 1; + spi_priv->crc_off = 1; } /* @@ -878,7 +885,7 @@ static int wilc_spi_init(struct wilc *wilc, bool resume) return 0; } - g_spi.has_thrpt_enh = 1; + spi_priv->has_thrpt_enh = 1; isinit = 1; @@ -888,9 +895,10 @@ static int wilc_spi_init(struct wilc *wilc, bool resume) static int wilc_spi_read_size(struct wilc *wilc, u32 *size) { struct spi_device *spi = to_spi_device(wilc->dev); + struct wilc_spi *spi_priv = wilc->bus_data; int ret; - if (g_spi.has_thrpt_enh) { + if (spi_priv->has_thrpt_enh) { ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE, size); *size = *size & IRQ_DMA_WD_CNT_MASK; @@ -915,6 +923,7 @@ static int wilc_spi_read_size(struct wilc *wilc, u32 *size) static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status) { struct spi_device *spi = to_spi_device(wilc->dev); + struct wilc_spi *spi_priv = wilc->bus_data; int ret; u32 tmp; u32 byte_cnt; @@ -923,7 +932,7 @@ static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status) u32 irq_flags; int k = IRG_FLAGS_OFFSET + 5; - if (g_spi.has_thrpt_enh) { + if (spi_priv->has_thrpt_enh) { ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE, int_status); return ret; @@ -943,12 +952,12 @@ static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status) wilc_spi_read_reg(wilc, 0x1a90, &irq_flags); tmp |= ((irq_flags >> 27) << IRG_FLAGS_OFFSET); - if (g_spi.nint > 5) { + if (spi_priv->nint > 5) { wilc_spi_read_reg(wilc, 0x1a94, &irq_flags); tmp |= (((irq_flags >> 0) & 0x7) << k); } - unknown_mask = ~((1ul << g_spi.nint) - 1); + unknown_mask = ~((1ul << spi_priv->nint) - 1); if ((tmp >> IRG_FLAGS_OFFSET) & unknown_mask) { dev_err(&spi->dev, @@ -968,11 +977,12 @@ static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status) static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val) { struct spi_device *spi = to_spi_device(wilc->dev); + struct wilc_spi *spi_priv = wilc->bus_data; int ret; u32 flags; u32 tbl_ctl; - if (g_spi.has_thrpt_enh) { + if (spi_priv->has_thrpt_enh) { ret = spi_internal_write(wilc, 0xe844 - WILC_SPI_REG_BASE, val); return ret; @@ -983,7 +993,7 @@ static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val) int i; ret = 1; - for (i = 0; i < g_spi.nint; i++) { + for (i = 0; i < spi_priv->nint; i++) { /* * No matter what you write 1 or 0, * it will clear interrupt. @@ -1001,7 +1011,7 @@ static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val) 0x10c8 + i * 4); return ret; } - for (i = g_spi.nint; i < MAX_NUM_INT; i++) { + for (i = spi_priv->nint; i < MAX_NUM_INT; i++) { if (flags & 1) dev_err(&spi->dev, "Unexpected interrupt cleared %d...\n", @@ -1041,6 +1051,7 @@ static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val) static int wilc_spi_sync_ext(struct wilc *wilc, int nint) { struct spi_device *spi = to_spi_device(wilc->dev); + struct wilc_spi *spi_priv = wilc->bus_data; u32 reg; int ret, i; @@ -1049,7 +1060,7 @@ static int wilc_spi_sync_ext(struct wilc *wilc, int nint) return 0; } - g_spi.nint = nint; + spi_priv->nint = nint; /* * interrupt pin mux select diff --git a/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c b/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c index 7cd033004651..4fbbbbd5a64b 100644 --- a/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c +++ b/drivers/staging/wilc1000/wilc_wfi_cfgoperations.c @@ -82,12 +82,6 @@ static const struct wiphy_wowlan_support wowlan_support = { .flags = WIPHY_WOWLAN_ANY }; -static struct network_info last_scanned_shadow[MAX_NUM_SCANNED_NETWORKS_SHADOW]; -static u32 last_scanned_cnt; -struct timer_list wilc_during_ip_timer; -static struct timer_list aging_timer; -static u8 op_ifcs; - #define CHAN2G(_channel, _freq, _flags) { \ .band = NL80211_BAND_2GHZ, \ .center_freq = (_freq), \ @@ -143,10 +137,7 @@ struct p2p_mgmt_data { static u8 wlan_channel = INVALID_CHANNEL; static u8 curr_channel; static u8 p2p_oui[] = {0x50, 0x6f, 0x9A, 0x09}; -static u8 p2p_local_random = 0x01; -static u8 p2p_recv_random; static u8 p2p_vendor_spec[] = {0xdd, 0x05, 0x00, 0x08, 0x40, 0x03}; -static bool wilc_ie; static struct ieee80211_supported_band wilc_band_2ghz = { .channels = ieee80211_2ghz_channels, @@ -158,25 +149,18 @@ static struct ieee80211_supported_band wilc_band_2ghz = { #define AGING_TIME (9 * 1000) #define DURING_IP_TIME_OUT 15000 -static void clear_shadow_scan(void) +static void clear_shadow_scan(struct wilc_priv *priv) { int i; - if (op_ifcs != 0) - return; - - del_timer_sync(&aging_timer); + for (i = 0; i < priv->scanned_cnt; i++) { + kfree(priv->scanned_shadow[i].ies); + priv->scanned_shadow[i].ies = NULL; - for (i = 0; i < last_scanned_cnt; i++) { - if (last_scanned_shadow[last_scanned_cnt].ies) { - kfree(last_scanned_shadow[i].ies); - last_scanned_shadow[last_scanned_cnt].ies = NULL; - } - - kfree(last_scanned_shadow[i].join_params); - last_scanned_shadow[i].join_params = NULL; + kfree(priv->scanned_shadow[i].join_params); + priv->scanned_shadow[i].join_params = NULL; } - last_scanned_cnt = 0; + priv->scanned_cnt = 0; } static u32 get_rssi_avg(struct network_info *network_info) @@ -198,14 +182,14 @@ static void refresh_scan(struct wilc_priv *priv, bool direct_scan) struct wiphy *wiphy = priv->dev->ieee80211_ptr->wiphy; int i; - for (i = 0; i < last_scanned_cnt; i++) { + for (i = 0; i < priv->scanned_cnt; i++) { struct network_info *network_info; s32 freq; struct ieee80211_channel *channel; int rssi; struct cfg80211_bss *bss; - network_info = &last_scanned_shadow[i]; + network_info = &priv->scanned_shadow[i]; if (!memcmp("DIRECT-", network_info->ssid, 7) && !direct_scan) continue; @@ -229,62 +213,68 @@ static void refresh_scan(struct wilc_priv *priv, bool direct_scan) } } -static void reset_shadow_found(void) +static void reset_shadow_found(struct wilc_priv *priv) { int i; - for (i = 0; i < last_scanned_cnt; i++) - last_scanned_shadow[i].found = 0; + for (i = 0; i < priv->scanned_cnt; i++) + priv->scanned_shadow[i].found = 0; } -static void update_scan_time(void) +static void update_scan_time(struct wilc_priv *priv) { int i; - for (i = 0; i < last_scanned_cnt; i++) - last_scanned_shadow[i].time_scan = jiffies; + for (i = 0; i < priv->scanned_cnt; i++) + priv->scanned_shadow[i].time_scan = jiffies; } -static void remove_network_from_shadow(struct timer_list *unused) +static void remove_network_from_shadow(struct timer_list *t) { + struct wilc_priv *priv = from_timer(priv, t, aging_timer); unsigned long now = jiffies; int i, j; - for (i = 0; i < last_scanned_cnt; i++) { - if (!time_after(now, last_scanned_shadow[i].time_scan + + for (i = 0; i < priv->scanned_cnt; i++) { + if (!time_after(now, priv->scanned_shadow[i].time_scan + (unsigned long)(SCAN_RESULT_EXPIRE))) continue; - kfree(last_scanned_shadow[i].ies); - last_scanned_shadow[i].ies = NULL; + kfree(priv->scanned_shadow[i].ies); + priv->scanned_shadow[i].ies = NULL; - kfree(last_scanned_shadow[i].join_params); + kfree(priv->scanned_shadow[i].join_params); - for (j = i; (j < last_scanned_cnt - 1); j++) - last_scanned_shadow[j] = last_scanned_shadow[j + 1]; + for (j = i; (j < priv->scanned_cnt - 1); j++) + priv->scanned_shadow[j] = priv->scanned_shadow[j + 1]; - last_scanned_cnt--; + priv->scanned_cnt--; } - if (last_scanned_cnt != 0) - mod_timer(&aging_timer, jiffies + msecs_to_jiffies(AGING_TIME)); + if (priv->scanned_cnt != 0) + mod_timer(&priv->aging_timer, + jiffies + msecs_to_jiffies(AGING_TIME)); } -static void clear_during_ip(struct timer_list *unused) +static void clear_during_ip(struct timer_list *t) { - wilc_optaining_ip = false; + struct wilc_vif *vif = from_timer(vif, t, during_ip_timer); + + vif->obtaining_ip = false; } -static int is_network_in_shadow(struct network_info *nw_info, void *user_void) +static int is_network_in_shadow(struct network_info *nw_info, + struct wilc_priv *priv) { int state = -1; int i; - if (last_scanned_cnt == 0) { - mod_timer(&aging_timer, jiffies + msecs_to_jiffies(AGING_TIME)); + if (priv->scanned_cnt == 0) { + mod_timer(&priv->aging_timer, + jiffies + msecs_to_jiffies(AGING_TIME)); state = -1; } else { - for (i = 0; i < last_scanned_cnt; i++) { - if (memcmp(last_scanned_shadow[i].bssid, + for (i = 0; i < priv->scanned_cnt; i++) { + if (memcmp(priv->scanned_shadow[i].bssid, nw_info->bssid, 6) == 0) { state = i; break; @@ -295,23 +285,23 @@ static int is_network_in_shadow(struct network_info *nw_info, void *user_void) } static void add_network_to_shadow(struct network_info *nw_info, - void *user_void, void *join_params) + struct wilc_priv *priv, void *join_params) { - int ap_found = is_network_in_shadow(nw_info, user_void); + int ap_found = is_network_in_shadow(nw_info, priv); u32 ap_index = 0; u8 rssi_index = 0; struct network_info *shadow_nw_info; - if (last_scanned_cnt >= MAX_NUM_SCANNED_NETWORKS_SHADOW) + if (priv->scanned_cnt >= MAX_NUM_SCANNED_NETWORKS_SHADOW) return; if (ap_found == -1) { - ap_index = last_scanned_cnt; - last_scanned_cnt++; + ap_index = priv->scanned_cnt; + priv->scanned_cnt++; } else { ap_index = ap_found; } - shadow_nw_info = &last_scanned_shadow[ap_index]; + shadow_nw_info = &priv->scanned_shadow[ap_index]; rssi_index = shadow_nw_info->rssi_history.index; shadow_nw_info->rssi_history.samples[rssi_index++] = nw_info->rssi; if (rssi_index == NUM_RSSI) { @@ -403,7 +393,7 @@ static void cfg_scan_result(enum scan_event scan_event, u32 i; for (i = 0; i < priv->rcvd_ch_cnt; i++) { - if (memcmp(last_scanned_shadow[i].bssid, + if (memcmp(priv->scanned_shadow[i].bssid, network_info->bssid, 6) == 0) break; } @@ -411,8 +401,8 @@ static void cfg_scan_result(enum scan_event scan_event, if (i >= priv->rcvd_ch_cnt) return; - last_scanned_shadow[i].rssi = network_info->rssi; - last_scanned_shadow[i].time_scan = jiffies; + priv->scanned_shadow[i].rssi = network_info->rssi; + priv->scanned_shadow[i].time_scan = jiffies; } } else if (scan_event == SCAN_EVENT_DONE) { refresh_scan(priv, false); @@ -438,7 +428,7 @@ static void cfg_scan_result(enum scan_event scan_event, .aborted = false, }; - update_scan_time(); + update_scan_time(priv); refresh_scan(priv, false); cfg80211_scan_done(priv->scan_req, &info); @@ -449,19 +439,17 @@ static void cfg_scan_result(enum scan_event scan_event, } } -static inline bool wilc_wfi_cfg_scan_time_expired(int i) +static inline bool wilc_cfg_scan_time_expired(struct wilc_priv *priv, int i) { unsigned long now = jiffies; - if (time_after(now, last_scanned_shadow[i].time_scan_cached + + if (time_after(now, priv->scanned_shadow[i].time_scan_cached + (unsigned long)(nl80211_SCAN_RESULT_EXPIRE - (1 * HZ)))) return true; else return false; } -int wilc_connecting; - static void cfg_connect_result(enum conn_event conn_disconn_evt, struct connect_info *conn_info, u8 mac_status, @@ -475,7 +463,7 @@ static void cfg_connect_result(enum conn_event conn_disconn_evt, struct host_if_drv *wfi_drv = priv->hif_drv; u8 null_bssid[ETH_ALEN] = {0}; - wilc_connecting = 0; + vif->connecting = false; if (conn_disconn_evt == CONN_DISCONN_EVENT_CONN_RESP) { u16 connect_status; @@ -487,7 +475,6 @@ static void cfg_connect_result(enum conn_event conn_disconn_evt, connect_status = WLAN_STATUS_UNSPECIFIED_FAILURE; wilc_wlan_set_bssid(priv->dev, null_bssid, STATION_MODE); - eth_zero_addr(wilc_connected_ssid); if (!wfi_drv->p2p_connect) wlan_channel = INVALID_CHANNEL; @@ -502,11 +489,11 @@ static void cfg_connect_result(enum conn_event conn_disconn_evt, memcpy(priv->associated_bss, conn_info->bssid, ETH_ALEN); - for (i = 0; i < last_scanned_cnt; i++) { - if (memcmp(last_scanned_shadow[i].bssid, + for (i = 0; i < priv->scanned_cnt; i++) { + if (memcmp(priv->scanned_shadow[i].bssid, conn_info->bssid, ETH_ALEN) == 0) { - if (wilc_wfi_cfg_scan_time_expired(i)) + if (wilc_cfg_scan_time_expired(priv, i)) scan_refresh = true; break; @@ -524,13 +511,12 @@ static void cfg_connect_result(enum conn_event conn_disconn_evt, conn_info->resp_ies_len, connect_status, GFP_KERNEL); } else if (conn_disconn_evt == CONN_DISCONN_EVENT_DISCONN_NOTIF) { - wilc_optaining_ip = false; - p2p_local_random = 0x01; - p2p_recv_random = 0x00; - wilc_ie = false; + vif->obtaining_ip = false; + priv->p2p.local_random = 0x01; + priv->p2p.recv_random = 0x00; + priv->p2p.is_wilc_ie = false; eth_zero_addr(priv->associated_bss); wilc_wlan_set_bssid(priv->dev, null_bssid, STATION_MODE); - eth_zero_addr(wilc_connected_ssid); if (!wfi_drv->p2p_connect) wlan_channel = INVALID_CHANNEL; @@ -620,7 +606,7 @@ static int scan(struct wiphy *wiphy, struct cfg80211_scan_request *request) priv->rcvd_ch_cnt = 0; - reset_shadow_found(); + reset_shadow_found(priv); priv->cfg_scanning = true; if (request->n_channels <= MAX_NUM_SCANNED_NETWORKS) { @@ -673,25 +659,25 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, enum authtype auth_type = ANY; u32 cipher_group; - wilc_connecting = 1; + vif->connecting = true; if (!(strncmp(sme->ssid, "DIRECT-", 7))) wfi_drv->p2p_connect = 1; else wfi_drv->p2p_connect = 0; - for (i = 0; i < last_scanned_cnt; i++) { - if (sme->ssid_len == last_scanned_shadow[i].ssid_len && - memcmp(last_scanned_shadow[i].ssid, + for (i = 0; i < priv->scanned_cnt; i++) { + if (sme->ssid_len == priv->scanned_shadow[i].ssid_len && + memcmp(priv->scanned_shadow[i].ssid, sme->ssid, sme->ssid_len) == 0) { if (!sme->bssid) { if (sel_bssi_idx == UINT_MAX || - last_scanned_shadow[i].rssi > - last_scanned_shadow[sel_bssi_idx].rssi) + priv->scanned_shadow[i].rssi > + priv->scanned_shadow[sel_bssi_idx].rssi) sel_bssi_idx = i; } else { - if (memcmp(last_scanned_shadow[i].bssid, + if (memcmp(priv->scanned_shadow[i].bssid, sme->bssid, ETH_ALEN) == 0) { sel_bssi_idx = i; @@ -701,12 +687,16 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, } } - if (sel_bssi_idx < last_scanned_cnt) { - nw_info = &last_scanned_shadow[sel_bssi_idx]; + if (sel_bssi_idx < priv->scanned_cnt) { + nw_info = &priv->scanned_shadow[sel_bssi_idx]; } else { ret = -ENOENT; - wilc_connecting = 0; - return ret; + goto out_error; + } + + if (ether_addr_equal_unaligned(vif->bssid, nw_info->bssid)) { + ret = -EALREADY; + goto out_error; } memset(priv->wep_key, 0, sizeof(priv->wep_key)); @@ -748,8 +738,7 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, ret = -ENOTSUPP; netdev_err(dev, "%s: Unsupported cipher\n", __func__); - wilc_connecting = 0; - return ret; + goto out_error; } } @@ -796,13 +785,18 @@ static int connect(struct wiphy *wiphy, struct net_device *dev, security, auth_type, nw_info->ch, nw_info->join_params); - if (ret != 0) { + if (ret) { + u8 null_bssid[ETH_ALEN] = {0}; + netdev_err(dev, "wilc_set_join_req(): Error\n"); ret = -ENOENT; - wilc_connecting = 0; - return ret; + wilc_wlan_set_bssid(dev, null_bssid, STATION_MODE); + goto out_error; } + return 0; +out_error: + vif->connecting = false; return ret; } @@ -816,7 +810,7 @@ static int disconnect(struct wiphy *wiphy, struct net_device *dev, int ret; u8 null_bssid[ETH_ALEN] = {0}; - wilc_connecting = 0; + vif->connecting = false; if (!wilc) return -EIO; @@ -832,9 +826,9 @@ static int disconnect(struct wiphy *wiphy, struct net_device *dev, wlan_channel = INVALID_CHANNEL; wilc_wlan_set_bssid(priv->dev, null_bssid, STATION_MODE); - p2p_local_random = 0x01; - p2p_recv_random = 0x00; - wilc_ie = false; + priv->p2p.local_random = 0x01; + priv->p2p.recv_random = 0x00; + priv->p2p.is_wilc_ie = false; wfi_drv->p2p_timeout = 0; ret = wilc_disconnect(vif, reason_code); @@ -1132,9 +1126,9 @@ static int get_station(struct wiphy *wiphy, struct net_device *dev, if (stats.link_speed > TCP_ACK_FILTER_LINK_SPEED_THRESH && stats.link_speed != DEFAULT_LINK_SPEED) - wilc_enable_tcp_ack_filter(true); + wilc_enable_tcp_ack_filter(vif, true); else if (stats.link_speed != DEFAULT_LINK_SPEED) - wilc_enable_tcp_ack_filter(false); + wilc_enable_tcp_ack_filter(vif, false); } return 0; } @@ -1333,20 +1327,21 @@ static void wilc_wfi_cfg_parse_rx_vendor_spec(struct wilc_priv *priv, u8 *buff, struct wilc_vif *vif = netdev_priv(priv->dev); subtype = buff[P2P_PUB_ACTION_SUBTYPE]; - if ((subtype == GO_NEG_REQ || subtype == GO_NEG_RSP) && !wilc_ie) { + if ((subtype == GO_NEG_REQ || subtype == GO_NEG_RSP) && + !priv->p2p.is_wilc_ie) { for (i = P2P_PUB_ACTION_SUBTYPE; i < size; i++) { if (!memcmp(p2p_vendor_spec, &buff[i], 6)) { - p2p_recv_random = buff[i + 6]; - wilc_ie = true; + priv->p2p.recv_random = buff[i + 6]; + priv->p2p.is_wilc_ie = true; break; } } } - if (p2p_local_random <= p2p_recv_random) { + if (priv->p2p.local_random <= priv->p2p.recv_random) { netdev_dbg(vif->ndev, "PEER WILL BE GO LocaRand=%02x RecvRand %02x\n", - p2p_local_random, p2p_recv_random); + priv->p2p.local_random, priv->p2p.recv_random); return; } @@ -1414,7 +1409,7 @@ void wilc_wfi_p2p_rx(struct net_device *dev, u8 *buff, u32 size) size); if ((subtype == GO_NEG_REQ || subtype == GO_NEG_RSP) && - wilc_ie) + priv->p2p.is_wilc_ie) size -= 7; break; @@ -1506,7 +1501,8 @@ static int cancel_remain_on_channel(struct wiphy *wiphy, priv->remain_on_ch_params.listen_session_id); } -static void wilc_wfi_cfg_tx_vendor_spec(struct p2p_mgmt_data *mgmt_tx, +static void wilc_wfi_cfg_tx_vendor_spec(struct wilc_priv *priv, + struct p2p_mgmt_data *mgmt_tx, struct cfg80211_mgmt_tx_params *params, u8 iftype, u32 buf_len) { @@ -1516,17 +1512,16 @@ static void wilc_wfi_cfg_tx_vendor_spec(struct p2p_mgmt_data *mgmt_tx, u8 subtype = buf[P2P_PUB_ACTION_SUBTYPE]; if (subtype == GO_NEG_REQ || subtype == GO_NEG_RSP) { - if (p2p_local_random == 1 && - p2p_recv_random < p2p_local_random) { - get_random_bytes(&p2p_local_random, 1); - p2p_local_random++; + if (priv->p2p.local_random == 1 && + priv->p2p.recv_random < priv->p2p.local_random) { + get_random_bytes(&priv->p2p.local_random, 1); + priv->p2p.local_random++; } } - if (p2p_local_random <= p2p_recv_random || !(subtype == GO_NEG_REQ || - subtype == GO_NEG_RSP || - subtype == P2P_INV_REQ || - subtype == P2P_INV_RSP)) + if (priv->p2p.local_random <= priv->p2p.recv_random || + !(subtype == GO_NEG_REQ || subtype == GO_NEG_RSP || + subtype == P2P_INV_REQ || subtype == P2P_INV_RSP)) return; for (i = P2P_PUB_ACTION_SUBTYPE + 2; i < len; i++) { @@ -1550,7 +1545,7 @@ static void wilc_wfi_cfg_tx_vendor_spec(struct p2p_mgmt_data *mgmt_tx, memcpy(&mgmt_tx->buff[len], p2p_vendor_spec, vendor_spec_len); - mgmt_tx->buff[len + vendor_spec_len] = p2p_local_random; + mgmt_tx->buff[len + vendor_spec_len] = priv->p2p.local_random; mgmt_tx->size = buf_len; } } @@ -1569,7 +1564,7 @@ static int mgmt_tx(struct wiphy *wiphy, struct wilc_priv *priv = wiphy_priv(wiphy); struct host_if_drv *wfi_drv = priv->hif_drv; struct wilc_vif *vif = netdev_priv(wdev->netdev); - u32 buf_len = len + sizeof(p2p_vendor_spec) + sizeof(p2p_local_random); + u32 buf_len = len + sizeof(p2p_vendor_spec) + sizeof(priv->p2p.local_random); int ret = 0; *cookie = (unsigned long)buf; @@ -1617,8 +1612,8 @@ static int mgmt_tx(struct wiphy *wiphy, case PUBLIC_ACT_VENDORSPEC: if (!memcmp(p2p_oui, &buf[ACTION_SUBTYPE_ID + 1], 4)) - wilc_wfi_cfg_tx_vendor_spec(mgmt_tx, params, - vif->iftype, + wilc_wfi_cfg_tx_vendor_spec(priv, mgmt_tx, + params, vif->iftype, buf_len); else netdev_dbg(vif->ndev, @@ -1732,7 +1727,7 @@ static int set_power_mgmt(struct wiphy *wiphy, struct net_device *dev, if (!priv->hif_drv) return -EIO; - if (wilc_enable_ps) + if (vif->wilc->enable_ps) wilc_set_power_mgmt(vif, enabled, timeout); return 0; @@ -1746,15 +1741,15 @@ static int change_virtual_intf(struct wiphy *wiphy, struct net_device *dev, struct wilc_vif *vif = netdev_priv(dev); struct wilc *wl = vif->wilc; - p2p_local_random = 0x01; - p2p_recv_random = 0x00; - wilc_ie = false; - wilc_optaining_ip = false; - del_timer(&wilc_during_ip_timer); + priv->p2p.local_random = 0x01; + priv->p2p.recv_random = 0x00; + priv->p2p.is_wilc_ie = false; + vif->obtaining_ip = false; + del_timer(&vif->during_ip_timer); switch (type) { case NL80211_IFTYPE_STATION: - wilc_connecting = 0; + vif->connecting = false; dev->ieee80211_ptr->iftype = type; priv->wdev->iftype = type; vif->monitor_flag = 0; @@ -1764,46 +1759,46 @@ static int change_virtual_intf(struct wiphy *wiphy, struct net_device *dev, memset(priv->assoc_stainfo.sta_associated_bss, 0, MAX_NUM_STA * ETH_ALEN); - wilc_enable_ps = true; + wl->enable_ps = true; wilc_set_power_mgmt(vif, 1, 0); break; case NL80211_IFTYPE_P2P_CLIENT: - wilc_connecting = 0; + vif->connecting = false; dev->ieee80211_ptr->iftype = type; priv->wdev->iftype = type; vif->monitor_flag = 0; vif->iftype = CLIENT_MODE; wilc_set_operation_mode(vif, STATION_MODE); - wilc_enable_ps = false; + wl->enable_ps = false; wilc_set_power_mgmt(vif, 0, 0); break; case NL80211_IFTYPE_AP: - wilc_enable_ps = false; + wl->enable_ps = false; dev->ieee80211_ptr->iftype = type; priv->wdev->iftype = type; vif->iftype = AP_MODE; if (wl->initialized) { wilc_set_wfi_drv_handler(vif, wilc_get_vif_idx(vif), - 0, vif->ifc_id); + 0, vif->ifc_id, false); wilc_set_operation_mode(vif, AP_MODE); wilc_set_power_mgmt(vif, 0, 0); } break; case NL80211_IFTYPE_P2P_GO: - wilc_optaining_ip = true; - mod_timer(&wilc_during_ip_timer, + vif->obtaining_ip = true; + mod_timer(&vif->during_ip_timer, jiffies + msecs_to_jiffies(DURING_IP_TIME_OUT)); wilc_set_operation_mode(vif, AP_MODE); dev->ieee80211_ptr->iftype = type; priv->wdev->iftype = type; vif->iftype = GO_MODE; - wilc_enable_ps = false; + wl->enable_ps = false; wilc_set_power_mgmt(vif, 0, 0); break; @@ -2154,8 +2149,12 @@ struct wireless_dev *wilc_create_wiphy(struct net_device *net, set_wiphy_dev(wdev->wiphy, dev); ret = wiphy_register(wdev->wiphy); - if (ret) + if (ret) { netdev_err(net, "Cannot register wiphy device\n"); + wiphy_free(wdev->wiphy); + kfree(wdev); + return NULL; + } priv->dev = net; return wdev; @@ -2165,12 +2164,10 @@ int wilc_init_host_int(struct net_device *net) { int ret; struct wilc_priv *priv = wdev_priv(net->ieee80211_ptr); + struct wilc_vif *vif = netdev_priv(priv->dev); - if (op_ifcs == 0) { - timer_setup(&aging_timer, remove_network_from_shadow, 0); - timer_setup(&wilc_during_ip_timer, clear_during_ip, 0); - } - op_ifcs++; + timer_setup(&priv->aging_timer, remove_network_from_shadow, 0); + timer_setup(&vif->during_ip_timer, clear_during_ip, 0); priv->p2p_listen_state = false; @@ -2182,7 +2179,7 @@ int wilc_init_host_int(struct net_device *net) return ret; } -int wilc_deinit_host_int(struct net_device *net) +void wilc_deinit_host_int(struct net_device *net) { int ret; struct wilc_priv *priv = wdev_priv(net->ieee80211_ptr); @@ -2190,19 +2187,15 @@ int wilc_deinit_host_int(struct net_device *net) priv->p2p_listen_state = false; - op_ifcs--; - mutex_destroy(&priv->scan_req_lock); ret = wilc_deinit(vif); - clear_shadow_scan(); - if (op_ifcs == 0) - del_timer_sync(&wilc_during_ip_timer); + del_timer_sync(&priv->aging_timer); + clear_shadow_scan(priv); + del_timer_sync(&vif->during_ip_timer); if (ret) netdev_err(net, "Error while deinitializing host interface\n"); - - return ret; } void wilc_free_wiphy(struct net_device *net) diff --git a/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h b/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h index be412b65926c..4812c8e2c79b 100644 --- a/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h +++ b/drivers/staging/wilc1000/wilc_wfi_cfgoperations.h @@ -11,10 +11,10 @@ struct wireless_dev *wilc_create_wiphy(struct net_device *net, struct device *dev); void wilc_free_wiphy(struct net_device *net); -int wilc_deinit_host_int(struct net_device *net); +void wilc_deinit_host_int(struct net_device *net); int wilc_init_host_int(struct net_device *net); void wilc_wfi_monitor_rx(u8 *buff, u32 size); -int wilc_wfi_deinit_mon_interface(void); +void wilc_wfi_deinit_mon_interface(void); struct net_device *wilc_wfi_init_mon_interface(const char *name, struct net_device *real_dev); void wilc_mgmt_frame_register(struct wiphy *wiphy, struct wireless_dev *wdev, diff --git a/drivers/staging/wilc1000/wilc_wfi_netdevice.h b/drivers/staging/wilc1000/wilc_wfi_netdevice.h index b7eee772f3fe..4f05a16c778e 100644 --- a/drivers/staging/wilc1000/wilc_wfi_netdevice.h +++ b/drivers/staging/wilc1000/wilc_wfi_netdevice.h @@ -16,6 +16,7 @@ #include "host_interface.h" #include "wilc_wlan.h" +#include "wilc_wlan_cfg.h" #define FLOW_CONTROL_LOWER_THRESHOLD 128 #define FLOW_CONTROL_UPPER_THRESHOLD 256 @@ -68,6 +69,12 @@ struct wilc_wfi_p2p_listen_params { u32 listen_session_id; }; +struct wilc_p2p_var { + u8 local_random; + u8 recv_random; + bool is_wilc_ie; +}; + struct wilc_priv { struct wireless_dev *wdev; struct cfg80211_scan_request *scan_req; @@ -94,7 +101,10 @@ struct wilc_priv { /* mutexes */ struct mutex scan_req_lock; bool p2p_listen_state; - + struct timer_list aging_timer; + struct network_info scanned_shadow[MAX_NUM_SCANNED_NETWORKS_SHADOW]; + int scanned_cnt; + struct wilc_p2p_var p2p; }; struct frame_reg { @@ -102,6 +112,32 @@ struct frame_reg { bool reg; }; +#define MAX_TCP_SESSION 25 +#define MAX_PENDING_ACKS 256 + +struct ack_session_info { + u32 seq_num; + u32 bigger_ack_num; + u16 src_port; + u16 dst_port; + u16 status; +}; + +struct pending_acks { + u32 ack_num; + u32 session_index; + struct txq_entry_t *txqe; +}; + +struct tcp_ack_filter { + struct ack_session_info ack_session_info[2 * MAX_TCP_SESSION]; + struct pending_acks pending_acks[MAX_PENDING_ACKS]; + u32 pending_base; + u32 tcp_session; + u32 pending_acks_idx; + bool enabled; +}; + struct wilc_vif { u8 idx; u8 iftype; @@ -116,12 +152,18 @@ struct wilc_vif { struct net_device *ndev; u8 mode; u8 ifc_id; + struct timer_list during_ip_timer; + bool obtaining_ip; + struct timer_list periodic_rssi; + struct rf_info periodic_stat; + struct tcp_ack_filter ack_filter; + bool connecting; }; struct wilc { const struct wilc_hif_func *hif_func; int io_type; - int mac_status; + s8 mac_status; struct gpio_desc *gpio_irq; bool initialized; int dev_irq_num; @@ -165,7 +207,12 @@ struct wilc { struct device *dev; bool suspend_event; - struct rf_info dummy_statistics; + bool enable_ps; + int clients_count; + struct workqueue_struct *hif_workqueue; + enum chip_ps_states chip_ps_state; + struct wilc_cfg cfg; + void *bus_data; }; struct wilc_wfi_mon_priv { @@ -178,6 +225,6 @@ void wilc_netdev_cleanup(struct wilc *wilc); int wilc_netdev_init(struct wilc **wilc, struct device *dev, int io_type, const struct wilc_hif_func *ops); void wilc_wfi_mgmt_rx(struct wilc *wilc, u8 *buff, u32 size); -int wilc_wlan_set_bssid(struct net_device *wilc_netdev, u8 *bssid, u8 mode); +void wilc_wlan_set_bssid(struct net_device *wilc_netdev, u8 *bssid, u8 mode); #endif diff --git a/drivers/staging/wilc1000/wilc_wlan.c b/drivers/staging/wilc1000/wilc_wlan.c index 8b184aa30d25..a48c906b2443 100644 --- a/drivers/staging/wilc1000/wilc_wlan.c +++ b/drivers/staging/wilc1000/wilc_wlan.c @@ -9,8 +9,6 @@ #include "wilc_wfi_netdevice.h" #include "wilc_wlan_cfg.h" -static enum chip_ps_states chip_ps_state = CHIP_WAKEDUP; - static inline bool is_wilc1000(u32 id) { return ((id & 0xfffff000) == 0x100000 ? true : false); @@ -73,8 +71,8 @@ static void wilc_wlan_txq_add_to_tail(struct net_device *dev, complete(&wilc->txq_event); } -static int wilc_wlan_txq_add_to_head(struct wilc_vif *vif, - struct txq_entry_t *tqe) +static void wilc_wlan_txq_add_to_head(struct wilc_vif *vif, + struct txq_entry_t *tqe) { unsigned long flags; struct wilc *wilc = vif->wilc; @@ -89,69 +87,47 @@ static int wilc_wlan_txq_add_to_head(struct wilc_vif *vif, spin_unlock_irqrestore(&wilc->txq_spinlock, flags); mutex_unlock(&wilc->txq_add_to_head_cs); complete(&wilc->txq_event); - - return 0; } -struct ack_session_info; -struct ack_session_info { - u32 seq_num; - u32 bigger_ack_num; - u16 src_port; - u16 dst_port; - u16 status; -}; - -struct pending_acks_info { - u32 ack_num; - u32 session_index; - struct txq_entry_t *txqe; -}; - #define NOT_TCP_ACK (-1) -#define MAX_TCP_SESSION 25 -#define MAX_PENDING_ACKS 256 -static struct ack_session_info ack_session_info[2 * MAX_TCP_SESSION]; -static struct pending_acks_info pending_acks_info[MAX_PENDING_ACKS]; - -static u32 pending_base; -static u32 tcp_session; -static u32 pending_acks; - -static inline int add_tcp_session(u32 src_prt, u32 dst_prt, u32 seq) +static inline void add_tcp_session(struct wilc_vif *vif, u32 src_prt, + u32 dst_prt, u32 seq) { - if (tcp_session < 2 * MAX_TCP_SESSION) { - ack_session_info[tcp_session].seq_num = seq; - ack_session_info[tcp_session].bigger_ack_num = 0; - ack_session_info[tcp_session].src_port = src_prt; - ack_session_info[tcp_session].dst_port = dst_prt; - tcp_session++; + struct tcp_ack_filter *f = &vif->ack_filter; + + if (f->tcp_session < 2 * MAX_TCP_SESSION) { + f->ack_session_info[f->tcp_session].seq_num = seq; + f->ack_session_info[f->tcp_session].bigger_ack_num = 0; + f->ack_session_info[f->tcp_session].src_port = src_prt; + f->ack_session_info[f->tcp_session].dst_port = dst_prt; + f->tcp_session++; } - return 0; } -static inline int update_tcp_session(u32 index, u32 ack) +static inline void update_tcp_session(struct wilc_vif *vif, u32 index, u32 ack) { + struct tcp_ack_filter *f = &vif->ack_filter; + if (index < 2 * MAX_TCP_SESSION && - ack > ack_session_info[index].bigger_ack_num) - ack_session_info[index].bigger_ack_num = ack; - return 0; + ack > f->ack_session_info[index].bigger_ack_num) + f->ack_session_info[index].bigger_ack_num = ack; } -static inline int add_tcp_pending_ack(u32 ack, u32 session_index, - struct txq_entry_t *txqe) +static inline void add_tcp_pending_ack(struct wilc_vif *vif, u32 ack, + u32 session_index, + struct txq_entry_t *txqe) { - u32 i = pending_base + pending_acks; + struct tcp_ack_filter *f = &vif->ack_filter; + u32 i = f->pending_base + f->pending_acks_idx; if (i < MAX_PENDING_ACKS) { - pending_acks_info[i].ack_num = ack; - pending_acks_info[i].txqe = txqe; - pending_acks_info[i].session_index = session_index; - txqe->tcp_pending_ack_idx = i; - pending_acks++; + f->pending_acks[i].ack_num = ack; + f->pending_acks[i].txqe = txqe; + f->pending_acks[i].session_index = session_index; + txqe->ack_idx = i; + f->pending_acks_idx++; } - return 0; } static inline void tcp_process(struct net_device *dev, struct txq_entry_t *tqe) @@ -162,72 +138,79 @@ static inline void tcp_process(struct net_device *dev, struct txq_entry_t *tqe) unsigned long flags; struct wilc_vif *vif = netdev_priv(dev); struct wilc *wilc = vif->wilc; + struct tcp_ack_filter *f = &vif->ack_filter; + const struct iphdr *ip_hdr_ptr; + const struct tcphdr *tcp_hdr_ptr; + u32 ihl, total_length, data_offset; spin_lock_irqsave(&wilc->txq_spinlock, flags); - if (eth_hdr_ptr->h_proto == htons(ETH_P_IP)) { - const struct iphdr *ip_hdr_ptr = buffer + ETH_HLEN; + if (eth_hdr_ptr->h_proto != htons(ETH_P_IP)) + goto out; - if (ip_hdr_ptr->protocol == IPPROTO_TCP) { - const struct tcphdr *tcp_hdr_ptr; - u32 IHL, total_length, data_offset; + ip_hdr_ptr = buffer + ETH_HLEN; - IHL = ip_hdr_ptr->ihl << 2; - tcp_hdr_ptr = buffer + ETH_HLEN + IHL; - total_length = ntohs(ip_hdr_ptr->tot_len); + if (ip_hdr_ptr->protocol != IPPROTO_TCP) + goto out; - data_offset = tcp_hdr_ptr->doff << 2; - if (total_length == (IHL + data_offset)) { - u32 seq_no, ack_no; + ihl = ip_hdr_ptr->ihl << 2; + tcp_hdr_ptr = buffer + ETH_HLEN + ihl; + total_length = ntohs(ip_hdr_ptr->tot_len); - seq_no = ntohl(tcp_hdr_ptr->seq); - ack_no = ntohl(tcp_hdr_ptr->ack_seq); - for (i = 0; i < tcp_session; i++) { - u32 j = ack_session_info[i].seq_num; + data_offset = tcp_hdr_ptr->doff << 2; + if (total_length == (ihl + data_offset)) { + u32 seq_no, ack_no; - if (i < 2 * MAX_TCP_SESSION && - j == seq_no) { - update_tcp_session(i, ack_no); - break; - } - } - if (i == tcp_session) - add_tcp_session(0, 0, seq_no); + seq_no = ntohl(tcp_hdr_ptr->seq); + ack_no = ntohl(tcp_hdr_ptr->ack_seq); + for (i = 0; i < f->tcp_session; i++) { + u32 j = f->ack_session_info[i].seq_num; - add_tcp_pending_ack(ack_no, i, tqe); + if (i < 2 * MAX_TCP_SESSION && + j == seq_no) { + update_tcp_session(vif, i, ack_no); + break; } } + if (i == f->tcp_session) + add_tcp_session(vif, 0, 0, seq_no); + + add_tcp_pending_ack(vif, ack_no, i, tqe); } + +out: spin_unlock_irqrestore(&wilc->txq_spinlock, flags); } -static int wilc_wlan_txq_filter_dup_tcp_ack(struct net_device *dev) +static void wilc_wlan_txq_filter_dup_tcp_ack(struct net_device *dev) { struct wilc_vif *vif = netdev_priv(dev); struct wilc *wilc = vif->wilc; + struct tcp_ack_filter *f = &vif->ack_filter; u32 i = 0; u32 dropped = 0; unsigned long flags; spin_lock_irqsave(&wilc->txq_spinlock, flags); - for (i = pending_base; i < (pending_base + pending_acks); i++) { - u32 session_index; + for (i = f->pending_base; + i < (f->pending_base + f->pending_acks_idx); i++) { + u32 index; u32 bigger_ack_num; if (i >= MAX_PENDING_ACKS) break; - session_index = pending_acks_info[i].session_index; + index = f->pending_acks[i].session_index; - if (session_index >= 2 * MAX_TCP_SESSION) + if (index >= 2 * MAX_TCP_SESSION) break; - bigger_ack_num = ack_session_info[session_index].bigger_ack_num; + bigger_ack_num = f->ack_session_info[index].bigger_ack_num; - if (pending_acks_info[i].ack_num < bigger_ack_num) { + if (f->pending_acks[i].ack_num < bigger_ack_num) { struct txq_entry_t *tqe; - tqe = pending_acks_info[i].txqe; + tqe = f->pending_acks[i].txqe; if (tqe) { wilc_wlan_txq_remove(wilc, tqe); tqe->status = 1; @@ -239,13 +222,13 @@ static int wilc_wlan_txq_filter_dup_tcp_ack(struct net_device *dev) } } } - pending_acks = 0; - tcp_session = 0; + f->pending_acks_idx = 0; + f->tcp_session = 0; - if (pending_base == 0) - pending_base = MAX_TCP_SESSION; + if (f->pending_base == 0) + f->pending_base = MAX_TCP_SESSION; else - pending_base = 0; + f->pending_base = 0; spin_unlock_irqrestore(&wilc->txq_spinlock, flags); @@ -254,15 +237,11 @@ static int wilc_wlan_txq_filter_dup_tcp_ack(struct net_device *dev) msecs_to_jiffies(1)); dropped--; } - - return 1; } -static bool enabled; - -void wilc_enable_tcp_ack_filter(bool value) +void wilc_enable_tcp_ack_filter(struct wilc_vif *vif, bool value) { - enabled = value; + vif->ack_filter.enabled = value; } static int wilc_wlan_txq_add_cfg_pkt(struct wilc_vif *vif, u8 *buffer, @@ -287,12 +266,9 @@ static int wilc_wlan_txq_add_cfg_pkt(struct wilc_vif *vif, u8 *buffer, tqe->buffer_size = buffer_size; tqe->tx_complete_func = NULL; tqe->priv = NULL; - tqe->tcp_pending_ack_idx = NOT_TCP_ACK; + tqe->ack_idx = NOT_TCP_ACK; - if (wilc_wlan_txq_add_to_head(vif, tqe)) { - kfree(tqe); - return 0; - } + wilc_wlan_txq_add_to_head(vif, tqe); return 1; } @@ -319,8 +295,8 @@ int wilc_wlan_txq_add_net_pkt(struct net_device *dev, void *priv, u8 *buffer, tqe->tx_complete_func = func; tqe->priv = priv; - tqe->tcp_pending_ack_idx = NOT_TCP_ACK; - if (enabled) + tqe->ack_idx = NOT_TCP_ACK; + if (vif->ack_filter.enabled) tcp_process(dev, tqe); wilc_wlan_txq_add_to_tail(dev, tqe); return wilc->txq_entries; @@ -347,7 +323,7 @@ int wilc_wlan_txq_add_mgmt_pkt(struct net_device *dev, void *priv, u8 *buffer, tqe->buffer_size = buffer_size; tqe->tx_complete_func = func; tqe->priv = priv; - tqe->tcp_pending_ack_idx = NOT_TCP_ACK; + tqe->ack_idx = NOT_TCP_ACK; wilc_wlan_txq_add_to_tail(dev, tqe); return 1; } @@ -436,7 +412,7 @@ void chip_wakeup(struct wilc *wilc) } while (wilc_get_chipid(wilc, true) == 0); } else if ((wilc->io_type & 0x1) == HIF_SDIO) { wilc->hif_func->hif_write_reg(wilc, 0xfa, 1); - udelay(200); + usleep_range(200, 400); wilc->hif_func->hif_read_reg(wilc, 0xf0, ®); do { wilc->hif_func->hif_write_reg(wilc, 0xf0, @@ -457,7 +433,7 @@ void chip_wakeup(struct wilc *wilc) } while ((clk_status_reg & 0x1) == 0); } - if (chip_ps_state == CHIP_SLEEPING_MANUAL) { + if (wilc->chip_ps_state == CHIP_SLEEPING_MANUAL) { if (wilc_get_chipid(wilc, false) < 0x1002b0) { u32 val32; @@ -470,20 +446,20 @@ void chip_wakeup(struct wilc *wilc) wilc->hif_func->hif_write_reg(wilc, 0x1e9c, val32); } } - chip_ps_state = CHIP_WAKEDUP; + wilc->chip_ps_state = CHIP_WAKEDUP; } EXPORT_SYMBOL_GPL(chip_wakeup); void wilc_chip_sleep_manually(struct wilc *wilc) { - if (chip_ps_state != CHIP_WAKEDUP) + if (wilc->chip_ps_state != CHIP_WAKEDUP) return; acquire_bus(wilc, ACQUIRE_ONLY); chip_allow_sleep(wilc); wilc->hif_func->hif_write_reg(wilc, 0x10a8, 1); - chip_ps_state = CHIP_SLEEPING_MANUAL; + wilc->chip_ps_state = CHIP_SLEEPING_MANUAL; release_bus(wilc, RELEASE_ONLY); } EXPORT_SYMBOL_GPL(wilc_chip_sleep_manually); @@ -685,9 +661,9 @@ int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count) tqe->status = 1; if (tqe->tx_complete_func) tqe->tx_complete_func(tqe->priv, tqe->status); - if (tqe->tcp_pending_ack_idx != NOT_TCP_ACK && - tqe->tcp_pending_ack_idx < MAX_PENDING_ACKS) - pending_acks_info[tqe->tcp_pending_ack_idx].txqe = NULL; + if (tqe->ack_idx != NOT_TCP_ACK && + tqe->ack_idx < MAX_PENDING_ACKS) + vif->ack_filter.pending_acks[tqe->ack_idx].txqe = NULL; kfree(tqe); } while (--entries); @@ -1218,9 +1194,9 @@ int wilc_wlan_cfg_get(struct wilc_vif *vif, int start, u16 wid, int commit, return ret_size; } -int wilc_wlan_cfg_get_val(u16 wid, u8 *buffer, u32 buffer_size) +int wilc_wlan_cfg_get_val(struct wilc *wl, u16 wid, u8 *buffer, u32 buffer_size) { - return wilc_wlan_cfg_get_wid_value(wid, buffer, buffer_size); + return wilc_wlan_cfg_get_wid_value(wl, wid, buffer, buffer_size); } int wilc_send_config_pkt(struct wilc_vif *vif, u8 mode, struct wid *wids, @@ -1240,7 +1216,8 @@ int wilc_send_config_pkt(struct wilc_vif *vif, u8 mode, struct wid *wids, } } for (i = 0; i < count; i++) { - wids[i].size = wilc_wlan_cfg_get_val(wids[i].id, + wids[i].size = wilc_wlan_cfg_get_val(vif->wilc, + wids[i].id, wids[i].val, wids[i].size); } @@ -1339,11 +1316,6 @@ int wilc_wlan_init(struct net_device *dev) goto fail; } - if (!wilc_wlan_cfg_init()) { - ret = -ENOBUFS; - goto fail; - } - if (!wilc->tx_buffer) wilc->tx_buffer = kmalloc(LINUX_TX_SIZE, GFP_KERNEL); diff --git a/drivers/staging/wilc1000/wilc_wlan.h b/drivers/staging/wilc1000/wilc_wlan.h index 7467188dbf2f..27667131de1a 100644 --- a/drivers/staging/wilc1000/wilc_wlan.h +++ b/drivers/staging/wilc1000/wilc_wlan.h @@ -212,7 +212,7 @@ struct txq_entry_t { struct list_head list; int type; - int tcp_pending_ack_idx; + int ack_idx; u8 *buffer; int buffer_size; void *priv; @@ -277,19 +277,19 @@ int wilc_wlan_cfg_set(struct wilc_vif *vif, int start, u16 wid, u8 *buffer, u32 buffer_size, int commit, u32 drv_handler); int wilc_wlan_cfg_get(struct wilc_vif *vif, int start, u16 wid, int commit, u32 drv_handler); -int wilc_wlan_cfg_get_val(u16 wid, u8 *buffer, u32 buffer_size); +int wilc_wlan_cfg_get_val(struct wilc *wl, u16 wid, u8 *buffer, + u32 buffer_size); int wilc_wlan_txq_add_mgmt_pkt(struct net_device *dev, void *priv, u8 *buffer, u32 buffer_size, wilc_tx_complete_func_t func); void wilc_chip_sleep_manually(struct wilc *wilc); -void wilc_enable_tcp_ack_filter(bool value); +void wilc_enable_tcp_ack_filter(struct wilc_vif *vif, bool value); int wilc_wlan_get_num_conn_ifcs(struct wilc *wilc); netdev_tx_t wilc_mac_xmit(struct sk_buff *skb, struct net_device *dev); void wilc_wfi_p2p_rx(struct net_device *dev, u8 *buff, u32 size); void host_wakeup_notify(struct wilc *wilc); void host_sleep_notify(struct wilc *wilc); -extern bool wilc_enable_ps; void chip_allow_sleep(struct wilc *wilc); void chip_wakeup(struct wilc *wilc); int wilc_send_config_pkt(struct wilc_vif *vif, u8 mode, struct wid *wids, diff --git a/drivers/staging/wilc1000/wilc_wlan_cfg.c b/drivers/staging/wilc1000/wilc_wlan_cfg.c index 421576386ab4..faa001c75681 100644 --- a/drivers/staging/wilc1000/wilc_wlan_cfg.c +++ b/drivers/staging/wilc1000/wilc_wlan_cfg.c @@ -8,6 +8,7 @@ #include "wilc_wlan.h" #include "wilc_wlan_cfg.h" #include "coreconfigurator.h" +#include "wilc_wfi_netdevice.h" enum cfg_cmd_type { CFG_BYTE_CMD = 0, @@ -17,134 +18,30 @@ enum cfg_cmd_type { CFG_BIN_CMD = 4 }; -struct wilc_mac_cfg { - int mac_status; - u8 mac_address[7]; - u8 ip_address[5]; - u8 bssid[7]; - u8 ssid[34]; - u8 firmware_version[129]; - u8 supp_rate[24]; - u8 wep_key[28]; - u8 i_psk[66]; - u8 hw_product_version[33]; - u8 phyversion[17]; - u8 supp_username[21]; - u8 supp_password[64]; - u8 assoc_req[256]; - u8 assoc_rsp[256]; - u8 firmware_info[8]; - u8 scan_result[256]; - u8 scan_result1[256]; -}; - -static struct wilc_mac_cfg g_mac; - -static struct wilc_cfg_byte g_cfg_byte[] = { - {WID_BSS_TYPE, 0}, - {WID_CURRENT_TX_RATE, 0}, - {WID_CURRENT_CHANNEL, 0}, - {WID_PREAMBLE, 0}, - {WID_11G_OPERATING_MODE, 0}, +static const struct wilc_cfg_byte g_cfg_byte[] = { {WID_STATUS, 0}, - {WID_SCAN_TYPE, 0}, - {WID_KEY_ID, 0}, - {WID_QOS_ENABLE, 0}, - {WID_POWER_MANAGEMENT, 0}, - {WID_11I_MODE, 0}, - {WID_AUTH_TYPE, 0}, - {WID_SITE_SURVEY, 0}, - {WID_LISTEN_INTERVAL, 0}, - {WID_DTIM_PERIOD, 0}, - {WID_ACK_POLICY, 0}, - {WID_BCAST_SSID, 0}, - {WID_REKEY_POLICY, 0}, - {WID_SHORT_SLOT_ALLOWED, 0}, - {WID_START_SCAN_REQ, 0}, {WID_RSSI, 0}, {WID_LINKSPEED, 0}, - {WID_AUTO_RX_SENSITIVITY, 0}, - {WID_DATAFLOW_CONTROL, 0}, - {WID_SCAN_FILTER, 0}, - {WID_11N_PROT_MECH, 0}, - {WID_11N_ERP_PROT_TYPE, 0}, - {WID_11N_ENABLE, 0}, - {WID_11N_OPERATING_MODE, 0}, - {WID_11N_OBSS_NONHT_DETECTION, 0}, - {WID_11N_HT_PROT_TYPE, 0}, - {WID_11N_RIFS_PROT_ENABLE, 0}, - {WID_11N_SMPS_MODE, 0}, - {WID_11N_CURRENT_TX_MCS, 0}, - {WID_11N_SHORT_GI_ENABLE, 0}, - {WID_RIFS_MODE, 0}, - {WID_TX_ABORT_CONFIG, 0}, - {WID_11N_IMMEDIATE_BA_ENABLED, 0}, - {WID_11N_TXOP_PROT_DISABLE, 0}, {WID_NIL, 0} }; -static struct wilc_cfg_hword g_cfg_hword[] = { - {WID_LINK_LOSS_THRESHOLD, 0}, - {WID_RTS_THRESHOLD, 0}, - {WID_FRAG_THRESHOLD, 0}, - {WID_SHORT_RETRY_LIMIT, 0}, - {WID_LONG_RETRY_LIMIT, 0}, - {WID_BEACON_INTERVAL, 0}, - {WID_RX_SENSE, 0}, - {WID_ACTIVE_SCAN_TIME, 0}, - {WID_PASSIVE_SCAN_TIME, 0}, - {WID_SITE_SURVEY_SCAN_TIME, 0}, - {WID_JOIN_START_TIMEOUT, 0}, - {WID_AUTH_TIMEOUT, 0}, - {WID_ASOC_TIMEOUT, 0}, - {WID_11I_PROTOCOL_TIMEOUT, 0}, - {WID_EAPOL_RESPONSE_TIMEOUT, 0}, - {WID_11N_SIG_QUAL_VAL, 0}, - {WID_CCA_THRESHOLD, 0}, +static const struct wilc_cfg_hword g_cfg_hword[] = { {WID_NIL, 0} }; -static struct wilc_cfg_word g_cfg_word[] = { +static const struct wilc_cfg_word g_cfg_word[] = { {WID_FAILED_COUNT, 0}, - {WID_RETRY_COUNT, 0}, - {WID_MULTIPLE_RETRY_COUNT, 0}, - {WID_FRAME_DUPLICATE_COUNT, 0}, - {WID_ACK_FAILURE_COUNT, 0}, {WID_RECEIVED_FRAGMENT_COUNT, 0}, - {WID_MCAST_RECEIVED_FRAME_COUNT, 0}, - {WID_FCS_ERROR_COUNT, 0}, {WID_SUCCESS_FRAME_COUNT, 0}, - {WID_TX_FRAGMENT_COUNT, 0}, - {WID_TX_MULTICAST_FRAME_COUNT, 0}, - {WID_RTS_SUCCESS_COUNT, 0}, - {WID_RTS_FAILURE_COUNT, 0}, - {WID_WEP_UNDECRYPTABLE_COUNT, 0}, - {WID_REKEY_PERIOD, 0}, - {WID_REKEY_PACKET_COUNT, 0}, - {WID_HW_RX_COUNT, 0}, {WID_GET_INACTIVE_TIME, 0}, {WID_NIL, 0} }; -static struct wilc_cfg_str g_cfg_str[] = { - {WID_SSID, g_mac.ssid}, /* 33 + 1 bytes */ - {WID_FIRMWARE_VERSION, g_mac.firmware_version}, - {WID_OPERATIONAL_RATE_SET, g_mac.supp_rate}, - {WID_BSSID, g_mac.bssid}, /* 6 bytes */ - {WID_WEP_KEY_VALUE, g_mac.wep_key}, /* 27 bytes */ - {WID_11I_PSK, g_mac.i_psk}, /* 65 bytes */ - {WID_HARDWARE_VERSION, g_mac.hw_product_version}, - {WID_MAC_ADDR, g_mac.mac_address}, - {WID_PHY_VERSION, g_mac.phyversion}, - {WID_SUPP_USERNAME, g_mac.supp_username}, - {WID_SUPP_PASSWORD, g_mac.supp_password}, - {WID_SITE_SURVEY_RESULTS, g_mac.scan_result}, - {WID_SITE_SURVEY_RESULTS, g_mac.scan_result1}, - {WID_ASSOC_REQ_INFO, g_mac.assoc_req}, - {WID_ASSOC_RES_INFO, g_mac.assoc_rsp}, - {WID_FIRMWARE_INFO, g_mac.firmware_version}, - {WID_IP_ADDRESS, g_mac.ip_address}, +static const struct wilc_cfg_str g_cfg_str[] = { + {WID_FIRMWARE_VERSION, NULL}, + {WID_MAC_ADDR, NULL}, + {WID_ASSOC_RES_INFO, NULL}, {WID_NIL, NULL} }; @@ -265,7 +162,7 @@ static int wilc_wlan_cfg_set_bin(u8 *frame, u32 offset, u16 id, u8 *b, u32 size) ********************************************/ #define GET_WID_TYPE(wid) (((wid) >> 12) & 0x7) -static void wilc_wlan_parse_response_frame(u8 *info, int size) +static void wilc_wlan_parse_response_frame(struct wilc *wl, u8 *info, int size) { u16 wid; u32 len = 0, i = 0; @@ -277,11 +174,11 @@ static void wilc_wlan_parse_response_frame(u8 *info, int size) switch (GET_WID_TYPE(wid)) { case WID_CHAR: do { - if (g_cfg_byte[i].id == WID_NIL) + if (wl->cfg.b[i].id == WID_NIL) break; - if (g_cfg_byte[i].id == wid) { - g_cfg_byte[i].val = info[4]; + if (wl->cfg.b[i].id == wid) { + wl->cfg.b[i].val = info[4]; break; } i++; @@ -291,12 +188,12 @@ static void wilc_wlan_parse_response_frame(u8 *info, int size) case WID_SHORT: do { - if (g_cfg_hword[i].id == WID_NIL) + if (wl->cfg.hw[i].id == WID_NIL) break; - if (g_cfg_hword[i].id == wid) { - g_cfg_hword[i].val = (info[4] | - (info[5] << 8)); + if (wl->cfg.hw[i].id == wid) { + wl->cfg.hw[i].val = (info[4] | + (info[5] << 8)); break; } i++; @@ -306,14 +203,14 @@ static void wilc_wlan_parse_response_frame(u8 *info, int size) case WID_INT: do { - if (g_cfg_word[i].id == WID_NIL) + if (wl->cfg.w[i].id == WID_NIL) break; - if (g_cfg_word[i].id == wid) { - g_cfg_word[i].val = (info[4] | - (info[5] << 8) | - (info[6] << 16) | - (info[7] << 24)); + if (wl->cfg.w[i].id == wid) { + wl->cfg.w[i].val = (info[4] | + (info[5] << 8) | + (info[6] << 16) | + (info[7] << 24)); break; } i++; @@ -323,17 +220,11 @@ static void wilc_wlan_parse_response_frame(u8 *info, int size) case WID_STR: do { - if (g_cfg_str[i].id == WID_NIL) + if (wl->cfg.s[i].id == WID_NIL) break; - if (g_cfg_str[i].id == wid) { - if (wid == WID_SITE_SURVEY_RESULTS) { - static int toggle; - - i += toggle; - toggle ^= 1; - } - memcpy(g_cfg_str[i].str, &info[2], + if (wl->cfg.s[i].id == wid) { + memcpy(wl->cfg.s[i].str, &info[2], (info[2] + 2)); break; } @@ -350,22 +241,28 @@ static void wilc_wlan_parse_response_frame(u8 *info, int size) } } -static int wilc_wlan_parse_info_frame(u8 *info, int size) +static void wilc_wlan_parse_info_frame(struct wilc *wl, u8 *info) { - struct wilc_mac_cfg *pd = &g_mac; u32 wid, len; - int type = WILC_CFG_RSP_STATUS; wid = info[0] | (info[1] << 8); len = info[2]; if (len == 1 && wid == WID_STATUS) { - pd->mac_status = info[3]; - type = WILC_CFG_RSP_STATUS; - } + int i = 0; - return type; + do { + if (wl->cfg.b[i].id == WID_NIL) + break; + + if (wl->cfg.b[i].id == wid) { + wl->cfg.b[i].val = info[3]; + break; + } + i++; + } while (1); + } } /******************************************** @@ -424,24 +321,20 @@ int wilc_wlan_cfg_get_wid(u8 *frame, u32 offset, u16 id) return 2; } -int wilc_wlan_cfg_get_wid_value(u16 wid, u8 *buffer, u32 buffer_size) +int wilc_wlan_cfg_get_wid_value(struct wilc *wl, u16 wid, u8 *buffer, + u32 buffer_size) { u32 type = (wid >> 12) & 0xf; int i, ret = 0; - if (wid == WID_STATUS) { - *((u32 *)buffer) = g_mac.mac_status; - return 4; - } - i = 0; if (type == CFG_BYTE_CMD) { do { - if (g_cfg_byte[i].id == WID_NIL) + if (wl->cfg.b[i].id == WID_NIL) break; - if (g_cfg_byte[i].id == wid) { - memcpy(buffer, &g_cfg_byte[i].val, 1); + if (wl->cfg.b[i].id == wid) { + memcpy(buffer, &wl->cfg.b[i].val, 1); ret = 1; break; } @@ -449,11 +342,11 @@ int wilc_wlan_cfg_get_wid_value(u16 wid, u8 *buffer, u32 buffer_size) } while (1); } else if (type == CFG_HWORD_CMD) { do { - if (g_cfg_hword[i].id == WID_NIL) + if (wl->cfg.hw[i].id == WID_NIL) break; - if (g_cfg_hword[i].id == wid) { - memcpy(buffer, &g_cfg_hword[i].val, 2); + if (wl->cfg.hw[i].id == wid) { + memcpy(buffer, &wl->cfg.hw[i].val, 2); ret = 2; break; } @@ -461,11 +354,11 @@ int wilc_wlan_cfg_get_wid_value(u16 wid, u8 *buffer, u32 buffer_size) } while (1); } else if (type == CFG_WORD_CMD) { do { - if (g_cfg_word[i].id == WID_NIL) + if (wl->cfg.w[i].id == WID_NIL) break; - if (g_cfg_word[i].id == wid) { - memcpy(buffer, &g_cfg_word[i].val, 4); + if (wl->cfg.w[i].id == wid) { + memcpy(buffer, &wl->cfg.w[i].val, 4); ret = 4; break; } @@ -473,23 +366,17 @@ int wilc_wlan_cfg_get_wid_value(u16 wid, u8 *buffer, u32 buffer_size) } while (1); } else if (type == CFG_STR_CMD) { do { - u32 id = g_cfg_str[i].id; + u32 id = wl->cfg.s[i].id; if (id == WID_NIL) break; if (id == wid) { - u32 size = g_cfg_str[i].str[0] | - (g_cfg_str[i].str[1] << 8); + u32 size = (wl->cfg.s[i].str[0] | + (wl->cfg.s[i].str[1] << 8)); if (buffer_size >= size) { - if (id == WID_SITE_SURVEY_RESULTS) { - static int toggle; - - i += toggle; - toggle ^= 1; - } - memcpy(buffer, &g_cfg_str[i].str[2], + memcpy(buffer, &wl->cfg.s[i].str[2], size); ret = size; } @@ -498,14 +385,12 @@ int wilc_wlan_cfg_get_wid_value(u16 wid, u8 *buffer, u32 buffer_size) i++; } while (1); } - return ret; } -int wilc_wlan_cfg_indicate_rx(struct wilc *wilc, u8 *frame, int size, - struct wilc_cfg_rsp *rsp) +void wilc_wlan_cfg_indicate_rx(struct wilc *wilc, u8 *frame, int size, + struct wilc_cfg_rsp *rsp) { - int ret = 1; u8 msg_type; u8 msg_id; @@ -513,6 +398,7 @@ int wilc_wlan_cfg_indicate_rx(struct wilc *wilc, u8 *frame, int size, msg_id = frame[1]; /* seq no */ frame += 4; size -= 4; + rsp->type = 0; /* * The valid types of response messages are @@ -523,13 +409,14 @@ int wilc_wlan_cfg_indicate_rx(struct wilc *wilc, u8 *frame, int size, switch (msg_type) { case 'R': - wilc_wlan_parse_response_frame(frame, size); + wilc_wlan_parse_response_frame(wilc, frame, size); rsp->type = WILC_CFG_RSP; rsp->seq_no = msg_id; break; case 'I': - rsp->type = wilc_wlan_parse_info_frame(frame, size); + wilc_wlan_parse_info_frame(wilc, frame); + rsp->type = WILC_CFG_RSP_STATUS; rsp->seq_no = msg_id; /*call host interface info parse as well*/ wilc_gnrl_async_info_received(wilc, frame - 4, size + 4); @@ -537,7 +424,6 @@ int wilc_wlan_cfg_indicate_rx(struct wilc *wilc, u8 *frame, int size, case 'N': wilc_network_info_received(wilc, frame - 4, size + 4); - rsp->type = 0; break; case 'S': @@ -545,17 +431,67 @@ int wilc_wlan_cfg_indicate_rx(struct wilc *wilc, u8 *frame, int size, break; default: - rsp->type = 0; rsp->seq_no = msg_id; - ret = 0; break; } +} - return ret; +int wilc_wlan_cfg_init(struct wilc *wl) +{ + struct wilc_cfg_str_vals *str_vals; + int i = 0; + + wl->cfg.b = kmemdup(g_cfg_byte, sizeof(g_cfg_byte), GFP_KERNEL); + if (!wl->cfg.b) + return -ENOMEM; + + wl->cfg.hw = kmemdup(g_cfg_hword, sizeof(g_cfg_hword), GFP_KERNEL); + if (!wl->cfg.hw) + goto out_b; + + wl->cfg.w = kmemdup(g_cfg_word, sizeof(g_cfg_word), GFP_KERNEL); + if (!wl->cfg.w) + goto out_hw; + + wl->cfg.s = kmemdup(g_cfg_str, sizeof(g_cfg_str), GFP_KERNEL); + if (!wl->cfg.s) + goto out_w; + + str_vals = kzalloc(sizeof(*str_vals), GFP_KERNEL); + if (!str_vals) + goto out_s; + + wl->cfg.str_vals = str_vals; + /* store the string cfg parameters */ + wl->cfg.s[i].id = WID_FIRMWARE_VERSION; + wl->cfg.s[i].str = str_vals->firmware_version; + i++; + wl->cfg.s[i].id = WID_MAC_ADDR; + wl->cfg.s[i].str = str_vals->mac_address; + i++; + wl->cfg.s[i].id = WID_ASSOC_RES_INFO; + wl->cfg.s[i].str = str_vals->assoc_rsp; + i++; + wl->cfg.s[i].id = WID_NIL; + wl->cfg.s[i].str = NULL; + return 0; + +out_s: + kfree(wl->cfg.s); +out_w: + kfree(wl->cfg.w); +out_hw: + kfree(wl->cfg.hw); +out_b: + kfree(wl->cfg.b); + return -ENOMEM; } -int wilc_wlan_cfg_init(void) +void wilc_wlan_cfg_deinit(struct wilc *wl) { - memset((void *)&g_mac, 0, sizeof(struct wilc_mac_cfg)); - return 1; + kfree(wl->cfg.b); + kfree(wl->cfg.hw); + kfree(wl->cfg.w); + kfree(wl->cfg.s); + kfree(wl->cfg.str_vals); } diff --git a/drivers/staging/wilc1000/wilc_wlan_cfg.h b/drivers/staging/wilc1000/wilc_wlan_cfg.h index 0c649d1f6f11..e5ca6cea0682 100644 --- a/drivers/staging/wilc1000/wilc_wlan_cfg.h +++ b/drivers/staging/wilc1000/wilc_wlan_cfg.h @@ -9,7 +9,7 @@ struct wilc_cfg_byte { u16 id; - u16 val; + u8 val; }; struct wilc_cfg_hword { @@ -27,12 +27,28 @@ struct wilc_cfg_str { u8 *str; }; +struct wilc_cfg_str_vals { + u8 mac_address[7]; + u8 firmware_version[129]; + u8 assoc_rsp[256]; +}; + +struct wilc_cfg { + struct wilc_cfg_byte *b; + struct wilc_cfg_hword *hw; + struct wilc_cfg_word *w; + struct wilc_cfg_str *s; + struct wilc_cfg_str_vals *str_vals; +}; + struct wilc; int wilc_wlan_cfg_set_wid(u8 *frame, u32 offset, u16 id, u8 *buf, int size); int wilc_wlan_cfg_get_wid(u8 *frame, u32 offset, u16 id); -int wilc_wlan_cfg_get_wid_value(u16 wid, u8 *buffer, u32 buffer_size); -int wilc_wlan_cfg_indicate_rx(struct wilc *wilc, u8 *frame, int size, - struct wilc_cfg_rsp *rsp); -int wilc_wlan_cfg_init(void); +int wilc_wlan_cfg_get_wid_value(struct wilc *wl, u16 wid, u8 *buffer, + u32 buffer_size); +void wilc_wlan_cfg_indicate_rx(struct wilc *wilc, u8 *frame, int size, + struct wilc_cfg_rsp *rsp); +int wilc_wlan_cfg_init(struct wilc *wl); +void wilc_wlan_cfg_deinit(struct wilc *wl); #endif diff --git a/drivers/staging/wilc1000/wilc_wlan_if.h b/drivers/staging/wilc1000/wilc_wlan_if.h index b81a73b9bd67..ce2066b74287 100644 --- a/drivers/staging/wilc1000/wilc_wlan_if.h +++ b/drivers/staging/wilc1000/wilc_wlan_if.h @@ -204,10 +204,6 @@ enum wid_type { WID_STR = 3, WID_BIN_DATA = 4, WID_BIN = 5, - WID_IP = 6, - WID_ADR = 7, - WID_UNDEF = 8, - WID_TYPE_FORCE_32BIT = 0xFFFFFFFF }; struct wid { diff --git a/drivers/staging/wlan-ng/cfg80211.c b/drivers/staging/wlan-ng/cfg80211.c index d4cf09b11e33..47f2ee926a77 100644 --- a/drivers/staging/wlan-ng/cfg80211.c +++ b/drivers/staging/wlan-ng/cfg80211.c @@ -76,7 +76,7 @@ static int prism2_domibset_uint32(struct wlandevice *wlandev, u32 did, u32 data) struct p80211item_uint32 *mibitem = (struct p80211item_uint32 *)&msg.mibattribute.data; - msg.msgcode = DIDmsg_dot11req_mibset; + msg.msgcode = DIDMSG_DOT11REQ_MIBSET; mibitem->did = did; mibitem->data = data; @@ -90,7 +90,7 @@ static int prism2_domibset_pstr32(struct wlandevice *wlandev, struct p80211item_pstr32 *mibitem = (struct p80211item_pstr32 *)&msg.mibattribute.data; - msg.msgcode = DIDmsg_dot11req_mibset; + msg.msgcode = DIDMSG_DOT11REQ_MIBSET; mibitem->did = did; mibitem->data.len = len; memcpy(mibitem->data.data, data, len); @@ -129,7 +129,7 @@ static int prism2_change_virtual_intf(struct wiphy *wiphy, /* Set Operation mode to the PORT TYPE RID */ result = prism2_domibset_uint32(wlandev, - DIDmib_p2_p2Static_p2CnfPortType, + DIDMIB_P2_STATIC_CNFPORTTYPE, data); if (result) @@ -158,12 +158,12 @@ static int prism2_add_key(struct wiphy *wiphy, struct net_device *dev, } if (prism2_domibset_uint32(wlandev, - DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID, + DIDMIB_DOT11SMT_PRIVACYTABLE_WEPDEFAULTKEYID, key_index)) return -EFAULT; /* send key to driver */ - did = DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(key_index + 1); + did = didmib_dot11smt_wepdefaultkeystable_key(key_index + 1); if (prism2_domibset_pstr32(wlandev, did, params->key_len, params->key)) return -EFAULT; @@ -216,7 +216,7 @@ static int prism2_del_key(struct wiphy *wiphy, struct net_device *dev, return -EINVAL; /* send key to driver */ - did = DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(key_index + 1); + did = didmib_dot11smt_wepdefaultkeystable_key(key_index + 1); result = prism2_domibset_pstr32(wlandev, did, 13, "0000000000000"); if (result) @@ -234,7 +234,7 @@ static int prism2_set_default_key(struct wiphy *wiphy, struct net_device *dev, int result = 0; result = prism2_domibset_uint32(wlandev, - DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID, + DIDMIB_DOT11SMT_PRIVACYTABLE_WEPDEFAULTKEYID, key_index); if (result) @@ -256,7 +256,7 @@ static int prism2_get_station(struct wiphy *wiphy, struct net_device *dev, return -EOPNOTSUPP; /* build request message */ - quality.msgcode = DIDmsg_lnxreq_commsquality; + quality.msgcode = DIDMSG_LNXREQ_COMMSQUALITY; quality.dbm.data = P80211ENUM_truth_true; quality.dbm.status = P80211ENUM_msgitem_status_data_ok; @@ -311,7 +311,7 @@ static int prism2_scan(struct wiphy *wiphy, priv->scan_request = request; memset(&msg1, 0x00, sizeof(msg1)); - msg1.msgcode = DIDmsg_dot11req_scan; + msg1.msgcode = DIDMSG_DOT11REQ_SCAN; msg1.bsstype.data = P80211ENUM_bsstype_any; memset(&msg1.bssid.data.data, 0xFF, sizeof(msg1.bssid.data.data)); @@ -350,7 +350,7 @@ static int prism2_scan(struct wiphy *wiphy, int freq; memset(&msg2, 0, sizeof(msg2)); - msg2.msgcode = DIDmsg_dot11req_scan_results; + msg2.msgcode = DIDMSG_DOT11REQ_SCAN_RESULTS; msg2.bssindex.data = i; result = p80211req_dorequest(wlandev, (u8 *)&msg2); @@ -410,7 +410,7 @@ static int prism2_set_wiphy_params(struct wiphy *wiphy, u32 changed) data = wiphy->rts_threshold; result = prism2_domibset_uint32(wlandev, - DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold, + DIDMIB_DOT11MAC_OPERATIONTABLE_RTSTHRESHOLD, data); if (result) { err = -EFAULT; @@ -425,7 +425,7 @@ static int prism2_set_wiphy_params(struct wiphy *wiphy, u32 changed) data = wiphy->frag_threshold; result = prism2_domibset_uint32(wlandev, - DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold, + DIDMIB_DOT11MAC_OPERATIONTABLE_FRAGMENTATIONTHRESHOLD, data); if (result) { err = -EFAULT; @@ -455,7 +455,7 @@ static int prism2_connect(struct wiphy *wiphy, struct net_device *dev, if (channel) { chan = ieee80211_frequency_to_channel(channel->center_freq); result = prism2_domibset_uint32(wlandev, - DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel, + DIDMIB_DOT11PHY_DSSSTABLE_CURRENTCHANNEL, chan); if (result) goto exit; @@ -482,13 +482,13 @@ static int prism2_connect(struct wiphy *wiphy, struct net_device *dev, } result = prism2_domibset_uint32(wlandev, - DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID, + DIDMIB_DOT11SMT_PRIVACYTABLE_WEPDEFAULTKEYID, sme->key_idx); if (result) goto exit; /* send key to driver */ - did = DIDmib_dot11smt_dot11WEPDefaultKeysTable_key( + did = didmib_dot11smt_wepdefaultkeystable_key( sme->key_idx + 1); result = prism2_domibset_pstr32(wlandev, did, sme->key_len, @@ -502,13 +502,13 @@ static int prism2_connect(struct wiphy *wiphy, struct net_device *dev, * seems reasonable anyways */ result = prism2_domibset_uint32(wlandev, - DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked, + DIDMIB_DOT11SMT_PRIVACYTABLE_PRIVACYINVOKED, P80211ENUM_truth_true); if (result) goto exit; result = prism2_domibset_uint32(wlandev, - DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted, + DIDMIB_DOT11SMT_PRIVACYTABLE_EXCLUDEUNENCRYPTED, P80211ENUM_truth_true); if (result) goto exit; @@ -518,13 +518,13 @@ static int prism2_connect(struct wiphy *wiphy, struct net_device *dev, * and exclude unencrypted */ result = prism2_domibset_uint32(wlandev, - DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked, + DIDMIB_DOT11SMT_PRIVACYTABLE_PRIVACYINVOKED, P80211ENUM_truth_false); if (result) goto exit; result = prism2_domibset_uint32(wlandev, - DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted, + DIDMIB_DOT11SMT_PRIVACYTABLE_EXCLUDEUNENCRYPTED, P80211ENUM_truth_false); if (result) goto exit; @@ -533,7 +533,7 @@ static int prism2_connect(struct wiphy *wiphy, struct net_device *dev, /* Now do the actual join. Note there is no way that I can * see to request a specific bssid */ - msg_join.msgcode = DIDmsg_lnxreq_autojoin; + msg_join.msgcode = DIDMSG_LNXREQ_AUTOJOIN; memcpy(msg_join.ssid.data.data, sme->ssid, length); msg_join.ssid.data.len = length; @@ -556,7 +556,7 @@ static int prism2_disconnect(struct wiphy *wiphy, struct net_device *dev, int err = 0; /* Do a join, with a bogus ssid. Thats the only way I can think of */ - msg_join.msgcode = DIDmsg_lnxreq_autojoin; + msg_join.msgcode = DIDMSG_LNXREQ_AUTOJOIN; memcpy(msg_join.ssid.data.data, "---", 3); msg_join.ssid.data.len = 3; @@ -595,7 +595,7 @@ static int prism2_set_tx_power(struct wiphy *wiphy, struct wireless_dev *wdev, data = MBM_TO_DBM(mbm); result = prism2_domibset_uint32(wlandev, - DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel, + DIDMIB_DOT11PHY_TXPOWERTABLE_CURRENTTXPOWERLEVEL, data); if (result) { @@ -618,9 +618,8 @@ static int prism2_get_tx_power(struct wiphy *wiphy, struct wireless_dev *wdev, int err = 0; mibitem = (struct p80211item_uint32 *)&msg.mibattribute.data; - msg.msgcode = DIDmsg_dot11req_mibget; - mibitem->did = - DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel; + msg.msgcode = DIDMSG_DOT11REQ_MIBGET; + mibitem->did = DIDMIB_DOT11PHY_TXPOWERTABLE_CURRENTTXPOWERLEVEL; result = p80211req_dorequest(wlandev, (u8 *)&msg); diff --git a/drivers/staging/wlan-ng/hfa384x_usb.c b/drivers/staging/wlan-ng/hfa384x_usb.c index 16f7dd266e3b..6261881e9bcd 100644 --- a/drivers/staging/wlan-ng/hfa384x_usb.c +++ b/drivers/staging/wlan-ng/hfa384x_usb.c @@ -3605,36 +3605,32 @@ static void hfa384x_usbout_callback(struct urb *urb) prism2sta_ev_alloc(wlandev); break; - case -EPIPE: - { - struct hfa384x *hw = wlandev->priv; + case -EPIPE: { + struct hfa384x *hw = wlandev->priv; - netdev_warn(hw->wlandev->netdev, - "%s tx pipe stalled: requesting reset\n", - wlandev->netdev->name); - if (!test_and_set_bit - (WORK_TX_HALT, &hw->usb_flags)) - schedule_work(&hw->usb_work); - wlandev->netdev->stats.tx_errors++; - break; - } + netdev_warn(hw->wlandev->netdev, + "%s tx pipe stalled: requesting reset\n", + wlandev->netdev->name); + if (!test_and_set_bit(WORK_TX_HALT, &hw->usb_flags)) + schedule_work(&hw->usb_work); + wlandev->netdev->stats.tx_errors++; + break; + } case -EPROTO: case -ETIMEDOUT: - case -EILSEQ: - { - struct hfa384x *hw = wlandev->priv; - - if (!test_and_set_bit - (THROTTLE_TX, &hw->usb_flags) && - !timer_pending(&hw->throttle)) { - mod_timer(&hw->throttle, - jiffies + THROTTLE_JIFFIES); - } - wlandev->netdev->stats.tx_errors++; - netif_stop_queue(wlandev->netdev); - break; + case -EILSEQ: { + struct hfa384x *hw = wlandev->priv; + + if (!test_and_set_bit(THROTTLE_TX, &hw->usb_flags) && + !timer_pending(&hw->throttle)) { + mod_timer(&hw->throttle, + jiffies + THROTTLE_JIFFIES); } + wlandev->netdev->stats.tx_errors++; + netif_stop_queue(wlandev->netdev); + break; + } case -ENOENT: case -ESHUTDOWN: diff --git a/drivers/staging/wlan-ng/p80211conv.c b/drivers/staging/wlan-ng/p80211conv.c index 91debcf20646..0ff5fda81b05 100644 --- a/drivers/staging/wlan-ng/p80211conv.c +++ b/drivers/staging/wlan-ng/p80211conv.c @@ -430,7 +430,7 @@ int skb_p80211_to_ether(struct wlandevice *wlandev, u32 ethconv, /* A bogus length ethfrm has been sent. */ /* Is someone trying an oflow attack? */ netdev_err(netdev, "DIXII frame too large (%ld > %d)\n", - (long int)(payload_length - + (long)(payload_length - sizeof(struct wlan_llc) - sizeof(struct wlan_snap)), netdev->mtu); return 1; diff --git a/drivers/staging/wlan-ng/p80211metadef.h b/drivers/staging/wlan-ng/p80211metadef.h index e63b4b557d0a..1b91b64c12ed 100644 --- a/drivers/staging/wlan-ng/p80211metadef.h +++ b/drivers/staging/wlan-ng/p80211metadef.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: (GPL-2.0 OR MPL-1.1) */ -/* This file is GENERATED AUTOMATICALLY. DO NOT EDIT OR MODIFY. - * -------------------------------------------------------------------- +/* -------------------------------------------------------------------- * * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. * -------------------------------------------------------------------- @@ -48,201 +47,201 @@ #ifndef _P80211MKMETADEF_H #define _P80211MKMETADEF_H -#define DIDmsg_dot11req_mibget \ +#define DIDMSG_DOT11REQ_MIBGET \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(1)) -#define DIDmsg_dot11req_mibget_mibattribute \ +#define DIDMSG_DOT11REQ_MIBGET_MIBATTRIBUTE \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(1) | 0x00000000) -#define DIDmsg_dot11req_mibget_resultcode \ +#define DIDMSG_DOT11REQ_MIBGET_RESULTCODE \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(2) | 0x00000000) -#define DIDmsg_dot11req_mibset \ +#define DIDMSG_DOT11REQ_MIBSET \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(2)) -#define DIDmsg_dot11req_mibset_mibattribute \ +#define DIDMSG_DOT11REQ_MIBSET_MIBATTRIBUTE \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(2) | \ P80211DID_MKITEM(1) | 0x00000000) -#define DIDmsg_dot11req_mibset_resultcode \ +#define DIDMSG_DOT11REQ_MIBSET_RESULTCODE \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(2) | \ P80211DID_MKITEM(2) | 0x00000000) -#define DIDmsg_dot11req_scan \ +#define DIDMSG_DOT11REQ_SCAN \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(4)) -#define DIDmsg_dot11req_scan_results \ +#define DIDMSG_DOT11REQ_SCAN_RESULTS \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(5)) -#define DIDmsg_dot11req_start \ +#define DIDMSG_DOT11REQ_START \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(13)) -#define DIDmsg_dot11ind_authenticate \ +#define DIDMSG_DOT11IND_AUTHENTICATE \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(1)) -#define DIDmsg_dot11ind_associate \ +#define DIDMSG_DOT11IND_ASSOCIATE \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(3)) -#define DIDmsg_lnxreq_ifstate \ +#define DIDMSG_LNXREQ_IFSTATE \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(1)) -#define DIDmsg_lnxreq_wlansniff \ +#define DIDMSG_LNXREQ_WLANSNIFF \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(2)) -#define DIDmsg_lnxreq_hostwep \ +#define DIDMSG_LNXREQ_HOSTWEP \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(3)) -#define DIDmsg_lnxreq_commsquality \ +#define DIDMSG_LNXREQ_COMMSQUALITY \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(4)) -#define DIDmsg_lnxreq_autojoin \ +#define DIDMSG_LNXREQ_AUTOJOIN \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(5)) -#define DIDmsg_p2req_readpda \ +#define DIDMSG_P2REQ_READPDA \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(2)) -#define DIDmsg_p2req_readpda_pda \ +#define DIDMSG_P2REQ_READPDA_PDA \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(2) | \ P80211DID_MKITEM(1) | 0x00000000) -#define DIDmsg_p2req_readpda_resultcode \ +#define DIDMSG_P2REQ_READPDA_RESULTCODE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(2) | \ P80211DID_MKITEM(2) | 0x00000000) -#define DIDmsg_p2req_ramdl_state \ +#define DIDMSG_P2REQ_RAMDL_STATE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(11)) -#define DIDmsg_p2req_ramdl_state_enable \ +#define DIDMSG_P2REQ_RAMDL_STATE_ENABLE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(11) | \ P80211DID_MKITEM(1) | 0x00000000) -#define DIDmsg_p2req_ramdl_state_exeaddr \ +#define DIDMSG_P2REQ_RAMDL_STATE_EXEADDR \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(11) | \ P80211DID_MKITEM(2) | 0x00000000) -#define DIDmsg_p2req_ramdl_state_resultcode \ +#define DIDMSG_P2REQ_RAMDL_STATE_RESULTCODE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(11) | \ P80211DID_MKITEM(3) | 0x00000000) -#define DIDmsg_p2req_ramdl_write \ +#define DIDMSG_P2REQ_RAMDL_WRITE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(12)) -#define DIDmsg_p2req_ramdl_write_addr \ +#define DIDMSG_P2REQ_RAMDL_WRITE_ADDR \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(12) | \ P80211DID_MKITEM(1) | 0x00000000) -#define DIDmsg_p2req_ramdl_write_len \ +#define DIDMSG_P2REQ_RAMDL_WRITE_LEN \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(12) | \ P80211DID_MKITEM(2) | 0x00000000) -#define DIDmsg_p2req_ramdl_write_data \ +#define DIDMSG_P2REQ_RAMDL_WRITE_DATA \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(12) | \ P80211DID_MKITEM(3) | 0x00000000) -#define DIDmsg_p2req_ramdl_write_resultcode \ +#define DIDMSG_P2REQ_RAMDL_WRITE_RESULTCODE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(12) | \ P80211DID_MKITEM(4) | 0x00000000) -#define DIDmsg_p2req_flashdl_state \ +#define DIDMSG_P2REQ_FLASHDL_STATE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(13)) -#define DIDmsg_p2req_flashdl_write \ +#define DIDMSG_P2REQ_FLASHDL_WRITE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(14)) -#define DIDmib_cat_dot11smt \ +#define DIDMIB_CAT_DOT11SMT \ P80211DID_MKSECTION(1) -#define DIDmib_dot11smt_dot11WEPDefaultKeysTable \ +#define DIDMIB_DOT11SMT_WEPDEFAULTKEYSTABLE \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(4)) -#define DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(_i) \ - (DIDmib_dot11smt_dot11WEPDefaultKeysTable | \ +#define didmib_dot11smt_wepdefaultkeystable_key(_i) \ + (DIDMIB_DOT11SMT_WEPDEFAULTKEYSTABLE | \ P80211DID_MKITEM(_i) | 0x0c000000) -#define DIDmib_dot11smt_dot11PrivacyTable \ +#define DIDMIB_DOT11SMT_PRIVACYTABLE \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(6)) -#define DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked \ +#define DIDMIB_DOT11SMT_PRIVACYTABLE_PRIVACYINVOKED \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(6) | \ P80211DID_MKITEM(1) | 0x18000000) -#define DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID \ +#define DIDMIB_DOT11SMT_PRIVACYTABLE_WEPDEFAULTKEYID \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(6) | \ P80211DID_MKITEM(2) | 0x18000000) -#define DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted \ +#define DIDMIB_DOT11SMT_PRIVACYTABLE_EXCLUDEUNENCRYPTED \ (P80211DID_MKSECTION(1) | \ P80211DID_MKGROUP(6) | \ P80211DID_MKITEM(4) | 0x18000000) -#define DIDmib_dot11mac_dot11OperationTable \ +#define DIDMIB_DOT11MAC_OPERATIONTABLE \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(1)) -#define DIDmib_dot11mac_dot11OperationTable_dot11MACAddress \ +#define DIDMIB_DOT11MAC_OPERATIONTABLE_MACADDRESS \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(1) | 0x18000000) -#define DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold \ +#define DIDMIB_DOT11MAC_OPERATIONTABLE_RTSTHRESHOLD \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(2) | 0x18000000) -#define DIDmib_dot11mac_dot11OperationTable_dot11ShortRetryLimit \ +#define DIDMIB_DOT11MAC_OPERATIONTABLE_SHORTRETRYLIMIT \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(3) | 0x10000000) -#define DIDmib_dot11mac_dot11OperationTable_dot11LongRetryLimit \ +#define DIDMIB_DOT11MAC_OPERATIONTABLE_LONGRETRYLIMIT \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(4) | 0x10000000) -#define DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold \ +#define DIDMIB_DOT11MAC_OPERATIONTABLE_FRAGMENTATIONTHRESHOLD \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(5) | 0x18000000) -#define DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime \ +#define DIDMIB_DOT11MAC_OPERATIONTABLE_MAXTRANSMITMSDULIFETIME \ (P80211DID_MKSECTION(2) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(6) | 0x10000000) -#define DIDmib_cat_dot11phy \ +#define DIDMIB_CAT_DOT11PHY \ P80211DID_MKSECTION(3) -#define DIDmib_dot11phy_dot11PhyOperationTable \ +#define DIDMIB_DOT11PHY_OPERATIONTABLE \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(1)) -#define DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel \ +#define DIDMIB_DOT11PHY_TXPOWERTABLE_CURRENTTXPOWERLEVEL \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(3) | \ P80211DID_MKITEM(10) | 0x18000000) -#define DIDmib_dot11phy_dot11PhyDSSSTable \ +#define DIDMIB_DOT11PHY_DSSSTABLE \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(5)) -#define DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel \ +#define DIDMIB_DOT11PHY_DSSSTABLE_CURRENTCHANNEL \ (P80211DID_MKSECTION(3) | \ P80211DID_MKGROUP(5) | \ P80211DID_MKITEM(1) | 0x10000000) -#define DIDmib_cat_lnx \ +#define DIDMIB_CAT_LNX \ P80211DID_MKSECTION(4) -#define DIDmib_lnx_lnxConfigTable \ +#define DIDMIB_LNX_CONFIGTABLE \ (P80211DID_MKSECTION(4) | \ P80211DID_MKGROUP(1)) -#define DIDmib_lnx_lnxConfigTable_lnxRSNAIE \ +#define DIDMIB_LNX_CONFIGTABLE_RSNAIE \ (P80211DID_MKSECTION(4) | \ P80211DID_MKGROUP(1) | \ P80211DID_MKITEM(1) | 0x18000000) -#define DIDmib_cat_p2 \ +#define DIDMIB_CAT_P2 \ P80211DID_MKSECTION(5) -#define DIDmib_p2_p2Static \ +#define DIDMIB_P2_STATIC \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(2)) -#define DIDmib_p2_p2Static_p2CnfPortType \ +#define DIDMIB_P2_STATIC_CNFPORTTYPE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(2) | \ P80211DID_MKITEM(1) | 0x18000000) -#define DIDmib_p2_p2NIC_p2PRISupRange \ +#define DIDMIB_P2_NIC_PRISUPRANGE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(5) | \ P80211DID_MKITEM(6) | 0x10000000) -#define DIDmib_p2_p2MAC \ +#define DIDMIB_P2_MAC \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(6)) -#define DIDmib_p2_p2MAC_p2CurrentTxRate \ +#define DIDMIB_P2_MAC_CURRENTTXRATE \ (P80211DID_MKSECTION(5) | \ P80211DID_MKGROUP(6) | \ P80211DID_MKITEM(12) | 0x10000000) diff --git a/drivers/staging/wlan-ng/p80211metastruct.h b/drivers/staging/wlan-ng/p80211metastruct.h index 5602ec606074..4adc64580185 100644 --- a/drivers/staging/wlan-ng/p80211metastruct.h +++ b/drivers/staging/wlan-ng/p80211metastruct.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: (GPL-2.0 OR MPL-1.1) */ -/* This file is GENERATED AUTOMATICALLY. DO NOT EDIT OR MODIFY. - * -------------------------------------------------------------------- +/* -------------------------------------------------------------------- * * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. * -------------------------------------------------------------------- diff --git a/drivers/staging/wlan-ng/p80211netdev.c b/drivers/staging/wlan-ng/p80211netdev.c index 8258cb5a335d..a70fb84f38f1 100644 --- a/drivers/staging/wlan-ng/p80211netdev.c +++ b/drivers/staging/wlan-ng/p80211netdev.c @@ -638,25 +638,25 @@ static int p80211knetdev_set_mac_address(struct net_device *dev, void *addr) /* Set up a dot11req_mibset */ memset(&dot11req, 0, sizeof(dot11req)); - dot11req.msgcode = DIDmsg_dot11req_mibset; + dot11req.msgcode = DIDMSG_DOT11REQ_MIBSET; dot11req.msglen = sizeof(dot11req); memcpy(dot11req.devname, ((struct wlandevice *)dev->ml_priv)->name, WLAN_DEVNAMELEN_MAX - 1); /* Set up the mibattribute argument */ - mibattr->did = DIDmsg_dot11req_mibset_mibattribute; + mibattr->did = DIDMSG_DOT11REQ_MIBSET_MIBATTRIBUTE; mibattr->status = P80211ENUM_msgitem_status_data_ok; mibattr->len = sizeof(mibattr->data); - macaddr->did = DIDmib_dot11mac_dot11OperationTable_dot11MACAddress; + macaddr->did = DIDMIB_DOT11MAC_OPERATIONTABLE_MACADDRESS; macaddr->status = P80211ENUM_msgitem_status_data_ok; macaddr->len = sizeof(macaddr->data); macaddr->data.len = ETH_ALEN; memcpy(&macaddr->data.data, new_addr->sa_data, ETH_ALEN); /* Set up the resultcode argument */ - resultcode->did = DIDmsg_dot11req_mibset_resultcode; + resultcode->did = DIDMSG_DOT11REQ_MIBSET_RESULTCODE; resultcode->status = P80211ENUM_msgitem_status_no_value; resultcode->len = sizeof(resultcode->data); resultcode->data = 0; @@ -927,10 +927,6 @@ static int p80211_rx_typedrop(struct wlandevice *wlandev, u16 fc) /* Classify frame, increment counter */ ftype = WLAN_GET_FC_FTYPE(fc); fstype = WLAN_GET_FC_FSTYPE(fc); -#if 0 - netdev_dbg(wlandev->netdev, "rx_typedrop : ftype=%d fstype=%d.\n", - ftype, fstype); -#endif switch (ftype) { case WLAN_FTYPE_MGMT: if ((wlandev->netdev->flags & IFF_PROMISC) || diff --git a/drivers/staging/wlan-ng/p80211req.c b/drivers/staging/wlan-ng/p80211req.c index c36d01469afc..9f5c1267d829 100644 --- a/drivers/staging/wlan-ng/p80211req.c +++ b/drivers/staging/wlan-ng/p80211req.c @@ -117,7 +117,7 @@ int p80211req_dorequest(struct wlandevice *wlandev, u8 *msgbuf) /* Check to make sure the MSD is running */ if (!((wlandev->msdstate == WLAN_MSD_HWPRESENT && - msg->msgcode == DIDmsg_lnxreq_ifstate) || + msg->msgcode == DIDMSG_LNXREQ_IFSTATE) || wlandev->msdstate == WLAN_MSD_RUNNING || wlandev->msdstate == WLAN_MSD_FWLOAD)) { return -ENODEV; @@ -125,7 +125,7 @@ int p80211req_dorequest(struct wlandevice *wlandev, u8 *msgbuf) /* Check Permissions */ if (!capable(CAP_NET_ADMIN) && - (msg->msgcode != DIDmsg_dot11req_mibget)) { + (msg->msgcode != DIDMSG_DOT11REQ_MIBGET)) { netdev_err(wlandev->netdev, "%s: only dot11req_mibget allowed for non-root.\n", wlandev->name); @@ -172,7 +172,7 @@ static void p80211req_handlemsg(struct wlandevice *wlandev, struct p80211msg *msg) { switch (msg->msgcode) { - case DIDmsg_lnxreq_hostwep:{ + case DIDMSG_LNXREQ_HOSTWEP: { struct p80211msg_lnxreq_hostwep *req = (struct p80211msg_lnxreq_hostwep *)msg; wlandev->hostwep &= @@ -182,15 +182,15 @@ static void p80211req_handlemsg(struct wlandevice *wlandev, if (req->encrypt.data == P80211ENUM_truth_true) wlandev->hostwep |= HOSTWEP_ENCRYPT; - break; + break; } - case DIDmsg_dot11req_mibget: - case DIDmsg_dot11req_mibset:{ - int isget = (msg->msgcode == DIDmsg_dot11req_mibget); + case DIDMSG_DOT11REQ_MIBGET: + case DIDMSG_DOT11REQ_MIBSET: { + int isget = (msg->msgcode == DIDMSG_DOT11REQ_MIBGET); struct p80211msg_dot11req_mibget *mib_msg = (struct p80211msg_dot11req_mibget *)msg; p80211req_mibset_mibget(wlandev, mib_msg, isget); - break; + break; } } /* switch msg->msgcode */ } @@ -205,17 +205,17 @@ static void p80211req_mibset_mibget(struct wlandevice *wlandev, u8 *key = mibitem->data + sizeof(struct p80211pstrd); switch (mibitem->did) { - case DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(1): - case DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(2): - case DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(3): - case DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(4): + case didmib_dot11smt_wepdefaultkeystable_key(1): + case didmib_dot11smt_wepdefaultkeystable_key(2): + case didmib_dot11smt_wepdefaultkeystable_key(3): + case didmib_dot11smt_wepdefaultkeystable_key(4): if (!isget) wep_change_key(wlandev, P80211DID_ITEM(mibitem->did) - 1, key, pstr->len); break; - case DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID:{ + case DIDMIB_DOT11SMT_PRIVACYTABLE_WEPDEFAULTKEYID: { u32 *data = (u32 *)mibitem->data; if (isget) { @@ -224,21 +224,21 @@ static void p80211req_mibset_mibget(struct wlandevice *wlandev, wlandev->hostwep &= ~(HOSTWEP_DEFAULTKEY_MASK); wlandev->hostwep |= (*data & HOSTWEP_DEFAULTKEY_MASK); } - break; + break; } - case DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked:{ + case DIDMIB_DOT11SMT_PRIVACYTABLE_PRIVACYINVOKED: { u32 *data = (u32 *)mibitem->data; p80211req_handle_action(wlandev, data, isget, HOSTWEP_PRIVACYINVOKED); - break; + break; } - case DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted:{ + case DIDMIB_DOT11SMT_PRIVACYTABLE_EXCLUDEUNENCRYPTED: { u32 *data = (u32 *)mibitem->data; p80211req_handle_action(wlandev, data, isget, HOSTWEP_EXCLUDEUNENCRYPTED); - break; + break; } } } diff --git a/drivers/staging/wlan-ng/prism2fw.c b/drivers/staging/wlan-ng/prism2fw.c index 4fb91294570d..f99626ca6bdc 100644 --- a/drivers/staging/wlan-ng/prism2fw.c +++ b/drivers/staging/wlan-ng/prism2fw.c @@ -294,17 +294,17 @@ static int prism2_fwapply(const struct ihex_binrec *rfptr, /* read the card's PRI-SUP */ memset(&getmsg, 0, sizeof(getmsg)); - getmsg.msgcode = DIDmsg_dot11req_mibget; + getmsg.msgcode = DIDMSG_DOT11REQ_MIBGET; getmsg.msglen = sizeof(getmsg); strcpy(getmsg.devname, wlandev->name); - getmsg.mibattribute.did = DIDmsg_dot11req_mibget_mibattribute; + getmsg.mibattribute.did = DIDMSG_DOT11REQ_MIBGET_MIBATTRIBUTE; getmsg.mibattribute.status = P80211ENUM_msgitem_status_data_ok; - getmsg.resultcode.did = DIDmsg_dot11req_mibget_resultcode; + getmsg.resultcode.did = DIDMSG_DOT11REQ_MIBGET_RESULTCODE; getmsg.resultcode.status = P80211ENUM_msgitem_status_no_value; item = (struct p80211itemd *)getmsg.mibattribute.data; - item->did = DIDmib_p2_p2NIC_p2PRISupRange; + item->did = DIDMIB_P2_NIC_PRISUPRANGE; item->status = P80211ENUM_msgitem_status_no_value; data = (u32 *)item->data; @@ -706,7 +706,7 @@ static int plugimage(struct imgchunk *fchunk, unsigned int nfchunks, pr_warn("warning: Failed to find PDR for plugrec 0x%04x.\n", s3plug[i].itemcode); continue; /* and move on to the next PDR */ -#if 0 + /* MSM: They swear that unless it's the MAC address, * the serial number, or the TX calibration records, * then there's reasonable defaults in the f/w @@ -714,9 +714,6 @@ static int plugimage(struct imgchunk *fchunk, unsigned int nfchunks, * should only be a warning, not fatal. * TODO: add fatals for the PDRs mentioned above. */ - result = 1; - continue; -#endif } /* Validate plug len against PDR len */ @@ -790,13 +787,13 @@ static int read_cardpda(struct pda *pda, struct wlandevice *wlandev) return -ENOMEM; /* set up the msg */ - msg->msgcode = DIDmsg_p2req_readpda; + msg->msgcode = DIDMSG_P2REQ_READPDA; msg->msglen = sizeof(msg); strcpy(msg->devname, wlandev->name); - msg->pda.did = DIDmsg_p2req_readpda_pda; + msg->pda.did = DIDMSG_P2REQ_READPDA_PDA; msg->pda.len = HFA384x_PDA_LEN_MAX; msg->pda.status = P80211ENUM_msgitem_status_no_value; - msg->resultcode.did = DIDmsg_p2req_readpda_resultcode; + msg->resultcode.did = DIDMSG_P2REQ_READPDA_RESULTCODE; msg->resultcode.len = sizeof(u32); msg->resultcode.status = P80211ENUM_msgitem_status_no_value; @@ -1024,11 +1021,11 @@ static int writeimage(struct wlandevice *wlandev, struct imgchunk *fchunk, /* Initialize the messages */ strcpy(rstmsg->devname, wlandev->name); - rstmsg->msgcode = DIDmsg_p2req_ramdl_state; + rstmsg->msgcode = DIDMSG_P2REQ_RAMDL_STATE; rstmsg->msglen = sizeof(*rstmsg); - rstmsg->enable.did = DIDmsg_p2req_ramdl_state_enable; - rstmsg->exeaddr.did = DIDmsg_p2req_ramdl_state_exeaddr; - rstmsg->resultcode.did = DIDmsg_p2req_ramdl_state_resultcode; + rstmsg->enable.did = DIDMSG_P2REQ_RAMDL_STATE_ENABLE; + rstmsg->exeaddr.did = DIDMSG_P2REQ_RAMDL_STATE_EXEADDR; + rstmsg->resultcode.did = DIDMSG_P2REQ_RAMDL_STATE_RESULTCODE; rstmsg->enable.status = P80211ENUM_msgitem_status_data_ok; rstmsg->exeaddr.status = P80211ENUM_msgitem_status_data_ok; rstmsg->resultcode.status = P80211ENUM_msgitem_status_no_value; @@ -1037,12 +1034,12 @@ static int writeimage(struct wlandevice *wlandev, struct imgchunk *fchunk, rstmsg->resultcode.len = sizeof(u32); strcpy(rwrmsg->devname, wlandev->name); - rwrmsg->msgcode = DIDmsg_p2req_ramdl_write; + rwrmsg->msgcode = DIDMSG_P2REQ_RAMDL_WRITE; rwrmsg->msglen = sizeof(*rwrmsg); - rwrmsg->addr.did = DIDmsg_p2req_ramdl_write_addr; - rwrmsg->len.did = DIDmsg_p2req_ramdl_write_len; - rwrmsg->data.did = DIDmsg_p2req_ramdl_write_data; - rwrmsg->resultcode.did = DIDmsg_p2req_ramdl_write_resultcode; + rwrmsg->addr.did = DIDMSG_P2REQ_RAMDL_WRITE_ADDR; + rwrmsg->len.did = DIDMSG_P2REQ_RAMDL_WRITE_LEN; + rwrmsg->data.did = DIDMSG_P2REQ_RAMDL_WRITE_DATA; + rwrmsg->resultcode.did = DIDMSG_P2REQ_RAMDL_WRITE_RESULTCODE; rwrmsg->addr.status = P80211ENUM_msgitem_status_data_ok; rwrmsg->len.status = P80211ENUM_msgitem_status_data_ok; rwrmsg->data.status = P80211ENUM_msgitem_status_data_ok; diff --git a/drivers/staging/wlan-ng/prism2mib.c b/drivers/staging/wlan-ng/prism2mib.c index e88baf715cec..5c0dad42f523 100644 --- a/drivers/staging/wlan-ng/prism2mib.c +++ b/drivers/staging/wlan-ng/prism2mib.c @@ -148,89 +148,89 @@ static int prism2mib_priv(struct mibrec *mib, static struct mibrec mibtab[] = { /* dot11smt MIB's */ - {DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(1), + {didmib_dot11smt_wepdefaultkeystable_key(1), F_STA | F_WRITE, HFA384x_RID_CNFWEPDEFAULTKEY0, 0, 0, prism2mib_wepdefaultkey}, - {DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(2), + {didmib_dot11smt_wepdefaultkeystable_key(2), F_STA | F_WRITE, HFA384x_RID_CNFWEPDEFAULTKEY1, 0, 0, prism2mib_wepdefaultkey}, - {DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(3), + {didmib_dot11smt_wepdefaultkeystable_key(3), F_STA | F_WRITE, HFA384x_RID_CNFWEPDEFAULTKEY2, 0, 0, prism2mib_wepdefaultkey}, - {DIDmib_dot11smt_dot11WEPDefaultKeysTable_key(4), + {didmib_dot11smt_wepdefaultkeystable_key(4), F_STA | F_WRITE, HFA384x_RID_CNFWEPDEFAULTKEY3, 0, 0, prism2mib_wepdefaultkey}, - {DIDmib_dot11smt_dot11PrivacyTable_dot11PrivacyInvoked, + {DIDMIB_DOT11SMT_PRIVACYTABLE_PRIVACYINVOKED, F_STA | F_READ | F_WRITE, HFA384x_RID_CNFWEPFLAGS, HFA384x_WEPFLAGS_PRIVINVOKED, 0, prism2mib_privacyinvoked}, - {DIDmib_dot11smt_dot11PrivacyTable_dot11WEPDefaultKeyID, + {DIDMIB_DOT11SMT_PRIVACYTABLE_WEPDEFAULTKEYID, F_STA | F_READ | F_WRITE, HFA384x_RID_CNFWEPDEFAULTKEYID, 0, 0, prism2mib_uint32}, - {DIDmib_dot11smt_dot11PrivacyTable_dot11ExcludeUnencrypted, + {DIDMIB_DOT11SMT_PRIVACYTABLE_EXCLUDEUNENCRYPTED, F_STA | F_READ | F_WRITE, HFA384x_RID_CNFWEPFLAGS, HFA384x_WEPFLAGS_EXCLUDE, 0, prism2mib_excludeunencrypted}, /* dot11mac MIB's */ - {DIDmib_dot11mac_dot11OperationTable_dot11MACAddress, + {DIDMIB_DOT11MAC_OPERATIONTABLE_MACADDRESS, F_STA | F_READ | F_WRITE, HFA384x_RID_CNFOWNMACADDR, HFA384x_RID_CNFOWNMACADDR_LEN, 0, prism2mib_bytearea2pstr}, - {DIDmib_dot11mac_dot11OperationTable_dot11RTSThreshold, + {DIDMIB_DOT11MAC_OPERATIONTABLE_RTSTHRESHOLD, F_STA | F_READ | F_WRITE, HFA384x_RID_RTSTHRESH, 0, 0, prism2mib_uint32}, - {DIDmib_dot11mac_dot11OperationTable_dot11ShortRetryLimit, + {DIDMIB_DOT11MAC_OPERATIONTABLE_SHORTRETRYLIMIT, F_STA | F_READ, HFA384x_RID_SHORTRETRYLIMIT, 0, 0, prism2mib_uint32}, - {DIDmib_dot11mac_dot11OperationTable_dot11LongRetryLimit, + {DIDMIB_DOT11MAC_OPERATIONTABLE_LONGRETRYLIMIT, F_STA | F_READ, HFA384x_RID_LONGRETRYLIMIT, 0, 0, prism2mib_uint32}, - {DIDmib_dot11mac_dot11OperationTable_dot11FragmentationThreshold, + {DIDMIB_DOT11MAC_OPERATIONTABLE_FRAGMENTATIONTHRESHOLD, F_STA | F_READ | F_WRITE, HFA384x_RID_FRAGTHRESH, 0, 0, prism2mib_fragmentationthreshold}, - {DIDmib_dot11mac_dot11OperationTable_dot11MaxTransmitMSDULifetime, + {DIDMIB_DOT11MAC_OPERATIONTABLE_MAXTRANSMITMSDULIFETIME, F_STA | F_READ, HFA384x_RID_MAXTXLIFETIME, 0, 0, prism2mib_uint32}, /* dot11phy MIB's */ - {DIDmib_dot11phy_dot11PhyDSSSTable_dot11CurrentChannel, + {DIDMIB_DOT11PHY_DSSSTABLE_CURRENTCHANNEL, F_STA | F_READ, HFA384x_RID_CURRENTCHANNEL, 0, 0, prism2mib_uint32}, - {DIDmib_dot11phy_dot11PhyTxPowerTable_dot11CurrentTxPowerLevel, + {DIDMIB_DOT11PHY_TXPOWERTABLE_CURRENTTXPOWERLEVEL, F_STA | F_READ | F_WRITE, HFA384x_RID_TXPOWERMAX, 0, 0, prism2mib_uint32}, /* p2Static MIB's */ - {DIDmib_p2_p2Static_p2CnfPortType, + {DIDMIB_P2_STATIC_CNFPORTTYPE, F_STA | F_READ | F_WRITE, HFA384x_RID_CNFPORTTYPE, 0, 0, prism2mib_uint32}, /* p2MAC MIB's */ - {DIDmib_p2_p2MAC_p2CurrentTxRate, + {DIDMIB_P2_MAC_CURRENTTXRATE, F_STA | F_READ, HFA384x_RID_CURRENTTXRATE, 0, 0, prism2mib_uint32}, /* And finally, lnx mibs */ - {DIDmib_lnx_lnxConfigTable_lnxRSNAIE, + {DIDMIB_LNX_CONFIGTABLE_RSNAIE, F_STA | F_READ | F_WRITE, HFA384x_RID_CNFWPADATA, 0, 0, prism2mib_priv}, @@ -301,7 +301,7 @@ int prism2mgmt_mibset_mibget(struct wlandevice *wlandev, void *msgp) ** this is a "mibset" so make make sure that the MIB may be written. */ - isget = (msg->msgcode == DIDmsg_dot11req_mibget); + isget = (msg->msgcode == DIDMSG_DOT11REQ_MIBGET); if (isget) { if (!(mib->flag & F_READ)) { @@ -707,27 +707,27 @@ static int prism2mib_priv(struct mibrec *mib, struct p80211pstrd *pstr = data; switch (mib->did) { - case DIDmib_lnx_lnxConfigTable_lnxRSNAIE:{ - struct hfa384x_wpa_data wpa; + case DIDMIB_LNX_CONFIGTABLE_RSNAIE: { + struct hfa384x_wpa_data wpa; - if (isget) { - hfa384x_drvr_getconfig(hw, - HFA384x_RID_CNFWPADATA, - (u8 *)&wpa, - sizeof(wpa)); - pstr->len = le16_to_cpu(wpa.datalen); - memcpy(pstr->data, wpa.data, pstr->len); - } else { - wpa.datalen = cpu_to_le16(pstr->len); - memcpy(wpa.data, pstr->data, pstr->len); - - hfa384x_drvr_setconfig(hw, - HFA384x_RID_CNFWPADATA, - (u8 *)&wpa, - sizeof(wpa)); - } - break; + if (isget) { + hfa384x_drvr_getconfig(hw, + HFA384x_RID_CNFWPADATA, + (u8 *)&wpa, + sizeof(wpa)); + pstr->len = le16_to_cpu(wpa.datalen); + memcpy(pstr->data, wpa.data, pstr->len); + } else { + wpa.datalen = cpu_to_le16(pstr->len); + memcpy(wpa.data, pstr->data, pstr->len); + + hfa384x_drvr_setconfig(hw, + HFA384x_RID_CNFWPADATA, + (u8 *)&wpa, + sizeof(wpa)); } + break; + } default: netdev_err(wlandev->netdev, "Unhandled DID 0x%08x\n", mib->did); } diff --git a/drivers/staging/wlan-ng/prism2sta.c b/drivers/staging/wlan-ng/prism2sta.c index 914970249680..fb5441399131 100644 --- a/drivers/staging/wlan-ng/prism2sta.c +++ b/drivers/staging/wlan-ng/prism2sta.c @@ -288,99 +288,93 @@ static int prism2sta_mlmerequest(struct wlandevice *wlandev, int result = 0; switch (msg->msgcode) { - case DIDmsg_dot11req_mibget: + case DIDMSG_DOT11REQ_MIBGET: pr_debug("Received mibget request\n"); result = prism2mgmt_mibset_mibget(wlandev, msg); break; - case DIDmsg_dot11req_mibset: + case DIDMSG_DOT11REQ_MIBSET: pr_debug("Received mibset request\n"); result = prism2mgmt_mibset_mibget(wlandev, msg); break; - case DIDmsg_dot11req_scan: + case DIDMSG_DOT11REQ_SCAN: pr_debug("Received scan request\n"); result = prism2mgmt_scan(wlandev, msg); break; - case DIDmsg_dot11req_scan_results: + case DIDMSG_DOT11REQ_SCAN_RESULTS: pr_debug("Received scan_results request\n"); result = prism2mgmt_scan_results(wlandev, msg); break; - case DIDmsg_dot11req_start: + case DIDMSG_DOT11REQ_START: pr_debug("Received mlme start request\n"); result = prism2mgmt_start(wlandev, msg); break; /* * Prism2 specific messages */ - case DIDmsg_p2req_readpda: + case DIDMSG_P2REQ_READPDA: pr_debug("Received mlme readpda request\n"); result = prism2mgmt_readpda(wlandev, msg); break; - case DIDmsg_p2req_ramdl_state: + case DIDMSG_P2REQ_RAMDL_STATE: pr_debug("Received mlme ramdl_state request\n"); result = prism2mgmt_ramdl_state(wlandev, msg); break; - case DIDmsg_p2req_ramdl_write: + case DIDMSG_P2REQ_RAMDL_WRITE: pr_debug("Received mlme ramdl_write request\n"); result = prism2mgmt_ramdl_write(wlandev, msg); break; - case DIDmsg_p2req_flashdl_state: + case DIDMSG_P2REQ_FLASHDL_STATE: pr_debug("Received mlme flashdl_state request\n"); result = prism2mgmt_flashdl_state(wlandev, msg); break; - case DIDmsg_p2req_flashdl_write: + case DIDMSG_P2REQ_FLASHDL_WRITE: pr_debug("Received mlme flashdl_write request\n"); result = prism2mgmt_flashdl_write(wlandev, msg); break; /* * Linux specific messages */ - case DIDmsg_lnxreq_hostwep: + case DIDMSG_LNXREQ_HOSTWEP: break; /* ignore me. */ - case DIDmsg_lnxreq_ifstate: - { - struct p80211msg_lnxreq_ifstate *ifstatemsg; - - pr_debug("Received mlme ifstate request\n"); - ifstatemsg = (struct p80211msg_lnxreq_ifstate *)msg; - result = - prism2sta_ifstate(wlandev, - ifstatemsg->ifstate.data); - ifstatemsg->resultcode.status = - P80211ENUM_msgitem_status_data_ok; - ifstatemsg->resultcode.data = result; - result = 0; - } + case DIDMSG_LNXREQ_IFSTATE: { + struct p80211msg_lnxreq_ifstate *ifstatemsg; + + pr_debug("Received mlme ifstate request\n"); + ifstatemsg = (struct p80211msg_lnxreq_ifstate *)msg; + result = prism2sta_ifstate(wlandev, + ifstatemsg->ifstate.data); + ifstatemsg->resultcode.status = + P80211ENUM_msgitem_status_data_ok; + ifstatemsg->resultcode.data = result; + result = 0; break; - case DIDmsg_lnxreq_wlansniff: + } + case DIDMSG_LNXREQ_WLANSNIFF: pr_debug("Received mlme wlansniff request\n"); result = prism2mgmt_wlansniff(wlandev, msg); break; - case DIDmsg_lnxreq_autojoin: + case DIDMSG_LNXREQ_AUTOJOIN: pr_debug("Received mlme autojoin request\n"); result = prism2mgmt_autojoin(wlandev, msg); break; - case DIDmsg_lnxreq_commsquality:{ - struct p80211msg_lnxreq_commsquality *qualmsg; + case DIDMSG_LNXREQ_COMMSQUALITY: { + struct p80211msg_lnxreq_commsquality *qualmsg; - pr_debug("Received commsquality request\n"); + pr_debug("Received commsquality request\n"); - qualmsg = (struct p80211msg_lnxreq_commsquality *)msg; + qualmsg = (struct p80211msg_lnxreq_commsquality *)msg; - qualmsg->link.status = - P80211ENUM_msgitem_status_data_ok; - qualmsg->level.status = - P80211ENUM_msgitem_status_data_ok; - qualmsg->noise.status = - P80211ENUM_msgitem_status_data_ok; + qualmsg->link.status = P80211ENUM_msgitem_status_data_ok; + qualmsg->level.status = P80211ENUM_msgitem_status_data_ok; + qualmsg->noise.status = P80211ENUM_msgitem_status_data_ok; - qualmsg->link.data = le16_to_cpu(hw->qual.cq_curr_bss); - qualmsg->level.data = - le16_to_cpu(hw->qual.asl_curr_bss); - qualmsg->noise.data = le16_to_cpu(hw->qual.anl_curr_fc); - qualmsg->txrate.data = hw->txrate; + qualmsg->link.data = le16_to_cpu(hw->qual.cq_curr_bss); + qualmsg->level.data = le16_to_cpu(hw->qual.asl_curr_bss); + qualmsg->noise.data = le16_to_cpu(hw->qual.anl_curr_fc); + qualmsg->txrate.data = hw->txrate; - break; - } + break; + } default: netdev_warn(wlandev->netdev, "Unknown mgmt request message 0x%08x", @@ -1949,8 +1943,8 @@ void prism2sta_commsqual_defer(struct work_struct *data) } /* Get the signal rate */ - msg.msgcode = DIDmsg_dot11req_mibget; - mibitem->did = DIDmib_p2_p2MAC_p2CurrentTxRate; + msg.msgcode = DIDMSG_DOT11REQ_MIBGET; + mibitem->did = DIDMIB_P2_MAC_CURRENTTXRATE; result = p80211req_dorequest(wlandev, (u8 *)&msg); if (result) { diff --git a/include/dt-bindings/iio/qcom,spmi-vadc.h b/include/dt-bindings/iio/qcom,spmi-vadc.h index 42121fa238fa..61d556db1542 100644 --- a/include/dt-bindings/iio/qcom,spmi-vadc.h +++ b/include/dt-bindings/iio/qcom,spmi-vadc.h @@ -1,14 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * Copyright (c) 2012-2014,2018 The Linux Foundation. All rights reserved. */ #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H @@ -116,4 +108,117 @@ #define VADC_LR_MUX10_PU1_PU2_AMUX_USB_ID 0xf9 #define VADC_LR_MUX3_BUF_PU1_PU2_XO_THERM 0xfc +/* ADC channels for SPMI PMIC5 */ + +#define ADC5_REF_GND 0x00 +#define ADC5_1P25VREF 0x01 +#define ADC5_VREF_VADC 0x02 +#define ADC5_VREF_VADC5_DIV_3 0x82 +#define ADC5_VPH_PWR 0x83 +#define ADC5_VBAT_SNS 0x84 +#define ADC5_VCOIN 0x85 +#define ADC5_DIE_TEMP 0x06 +#define ADC5_USB_IN_I 0x07 +#define ADC5_USB_IN_V_16 0x08 +#define ADC5_CHG_TEMP 0x09 +#define ADC5_BAT_THERM 0x0a +#define ADC5_BAT_ID 0x0b +#define ADC5_XO_THERM 0x0c +#define ADC5_AMUX_THM1 0x0d +#define ADC5_AMUX_THM2 0x0e +#define ADC5_AMUX_THM3 0x0f +#define ADC5_AMUX_THM4 0x10 +#define ADC5_AMUX_THM5 0x11 +#define ADC5_GPIO1 0x12 +#define ADC5_GPIO2 0x13 +#define ADC5_GPIO3 0x14 +#define ADC5_GPIO4 0x15 +#define ADC5_GPIO5 0x16 +#define ADC5_GPIO6 0x17 +#define ADC5_GPIO7 0x18 +#define ADC5_SBUx 0x99 +#define ADC5_MID_CHG_DIV6 0x1e +#define ADC5_OFF 0xff + +/* 30k pull-up1 */ +#define ADC5_BAT_THERM_30K_PU 0x2a +#define ADC5_BAT_ID_30K_PU 0x2b +#define ADC5_XO_THERM_30K_PU 0x2c +#define ADC5_AMUX_THM1_30K_PU 0x2d +#define ADC5_AMUX_THM2_30K_PU 0x2e +#define ADC5_AMUX_THM3_30K_PU 0x2f +#define ADC5_AMUX_THM4_30K_PU 0x30 +#define ADC5_AMUX_THM5_30K_PU 0x31 +#define ADC5_GPIO1_30K_PU 0x32 +#define ADC5_GPIO2_30K_PU 0x33 +#define ADC5_GPIO3_30K_PU 0x34 +#define ADC5_GPIO4_30K_PU 0x35 +#define ADC5_GPIO5_30K_PU 0x36 +#define ADC5_GPIO6_30K_PU 0x37 +#define ADC5_GPIO7_30K_PU 0x38 +#define ADC5_SBUx_30K_PU 0x39 + +/* 100k pull-up2 */ +#define ADC5_BAT_THERM_100K_PU 0x4a +#define ADC5_BAT_ID_100K_PU 0x4b +#define ADC5_XO_THERM_100K_PU 0x4c +#define ADC5_AMUX_THM1_100K_PU 0x4d +#define ADC5_AMUX_THM2_100K_PU 0x4e +#define ADC5_AMUX_THM3_100K_PU 0x4f +#define ADC5_AMUX_THM4_100K_PU 0x50 +#define ADC5_AMUX_THM5_100K_PU 0x51 +#define ADC5_GPIO1_100K_PU 0x52 +#define ADC5_GPIO2_100K_PU 0x53 +#define ADC5_GPIO3_100K_PU 0x54 +#define ADC5_GPIO4_100K_PU 0x55 +#define ADC5_GPIO5_100K_PU 0x56 +#define ADC5_GPIO6_100K_PU 0x57 +#define ADC5_GPIO7_100K_PU 0x58 +#define ADC5_SBUx_100K_PU 0x59 + +/* 400k pull-up3 */ +#define ADC5_BAT_THERM_400K_PU 0x6a +#define ADC5_BAT_ID_400K_PU 0x6b +#define ADC5_XO_THERM_400K_PU 0x6c +#define ADC5_AMUX_THM1_400K_PU 0x6d +#define ADC5_AMUX_THM2_400K_PU 0x6e +#define ADC5_AMUX_THM3_400K_PU 0x6f +#define ADC5_AMUX_THM4_400K_PU 0x70 +#define ADC5_AMUX_THM5_400K_PU 0x71 +#define ADC5_GPIO1_400K_PU 0x72 +#define ADC5_GPIO2_400K_PU 0x73 +#define ADC5_GPIO3_400K_PU 0x74 +#define ADC5_GPIO4_400K_PU 0x75 +#define ADC5_GPIO5_400K_PU 0x76 +#define ADC5_GPIO6_400K_PU 0x77 +#define ADC5_GPIO7_400K_PU 0x78 +#define ADC5_SBUx_400K_PU 0x79 + +/* 1/3 Divider */ +#define ADC5_GPIO1_DIV3 0x92 +#define ADC5_GPIO2_DIV3 0x93 +#define ADC5_GPIO3_DIV3 0x94 +#define ADC5_GPIO4_DIV3 0x95 +#define ADC5_GPIO5_DIV3 0x96 +#define ADC5_GPIO6_DIV3 0x97 +#define ADC5_GPIO7_DIV3 0x98 +#define ADC5_SBUx_DIV3 0x99 + +/* Current and combined current/voltage channels */ +#define ADC5_INT_EXT_ISENSE 0xa1 +#define ADC5_PARALLEL_ISENSE 0xa5 +#define ADC5_CUR_REPLICA_VDS 0xa7 +#define ADC5_CUR_SENS_BATFET_VDS_OFFSET 0xa9 +#define ADC5_CUR_SENS_REPLICA_VDS_OFFSET 0xab +#define ADC5_EXT_SENS_OFFSET 0xad + +#define ADC5_INT_EXT_ISENSE_VBAT_VDATA 0xb0 +#define ADC5_INT_EXT_ISENSE_VBAT_IDATA 0xb1 +#define ADC5_EXT_ISENSE_VBAT_VDATA 0xb2 +#define ADC5_EXT_ISENSE_VBAT_IDATA 0xb3 +#define ADC5_PARALLEL_ISENSE_VBAT_VDATA 0xb4 +#define ADC5_PARALLEL_ISENSE_VBAT_IDATA 0xb5 + +#define ADC5_MAX_CHANNEL 0xc0 + #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */ |
