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authorTero Kristo <t-kristo@ti.com>2019-10-02 15:06:11 +0300
committerTero Kristo <t-kristo@ti.com>2019-10-31 15:33:26 +0200
commitf5869190667951720f8c1ec4638bff4c682a3a4e (patch)
treed9e823e109aefad2c220ce96caa666213efe9c6d /ipc
parent8ffea6eef4ace7e207fc2fe852d2019d93f51d1a (diff)
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ARM: dts: omap3: fix DPLL4 M4 divider max value
The maximum divider value for DPLL4 M4 divider appears wrong. For most OMAP3 family SoCs this is 16, but it is defined as 32, which is maybe only valid for omap36xx. To avoid any overflows in trying to write this register, set the max to 16 for all omap3 family, except omap36xx. For omap36xx the maximum is set to 31, as it appears value 32 is not working properly. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com>
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