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author | Arnd Bergmann <arnd@arndb.de> | 2018-03-27 15:53:04 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2018-03-27 15:53:04 +0200 |
commit | 03836dd07f43a17b3681d3fc75ea40833fda49b6 (patch) | |
tree | 3f0550b9e2201c02a9863ffb936c9541947b6366 /include/linux/soc | |
parent | 498b5651542d391dc5fa2e5c63ad2a2bbd144cc2 (diff) | |
parent | 9f9971266110add19b512f7b10a6d922e741368e (diff) | |
download | blackbird-op-linux-03836dd07f43a17b3681d3fc75ea40833fda49b6.tar.gz blackbird-op-linux-03836dd07f43a17b3681d3fc75ea40833fda49b6.zip |
Merge tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers
Pull "ARM: mediatek: updates for soc drivers for v4.16-next" from Matthias Brugger:
scpsy:
- mt2712: update power domains to reflect design changes in the SoC
- fix initialisation of power subdomains
- add support for mt7623a SoC
- use defines for mt2701 bus protection mask
* tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: update power domain data of MT2712
dt-bindings: soc: update MT2712 power dt-bindings
soc: mediatek: fix the mistaken pointer accessed when subdomains are added
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
soc: mediatek: avoid hardcoded value with bus_prot_mask
dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC
Diffstat (limited to 'include/linux/soc')
-rw-r--r-- | include/linux/soc/mediatek/infracfg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h index b0a507d356ef..fd25f0148566 100644 --- a/include/linux/soc/mediatek/infracfg.h +++ b/include/linux/soc/mediatek/infracfg.h @@ -21,6 +21,10 @@ #define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22) #define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23) +#define MT2701_TOP_AXI_PROT_EN_MM_M0 BIT(1) +#define MT2701_TOP_AXI_PROT_EN_CONN_M BIT(2) +#define MT2701_TOP_AXI_PROT_EN_CONN_S BIT(8) + #define MT7622_TOP_AXI_PROT_EN_ETHSYS (BIT(3) | BIT(17)) #define MT7622_TOP_AXI_PROT_EN_HIF0 (BIT(24) | BIT(25)) #define MT7622_TOP_AXI_PROT_EN_HIF1 (BIT(26) | BIT(27) | \ |