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authorNoam Camus <noamc@ezchip.com>2015-04-10 21:28:50 +0300
committerVineet Gupta <vgupta@synopsys.com>2016-05-09 09:32:33 +0530
commitb1f2f6f3cf5e37f0418f6cebf365cff7c3abf6d7 (patch)
treed9a8d9d4d37ed7cbe7f098993c3856c756666d18 /fs/cifs/file.c
parenta5a10d99a946602cf4ae50eadc65c2480dbd2e56 (diff)
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ARC: [plat-eznps] Use dedicated SMP barriers
NPS device got 256 cores and each got 16 HW threads (SMT). We use EZchip dedicated ISA to trigger HW scheduler of the core that current HW thread belongs to. This scheduling makes sure that data beyond barrier is available to all HW threads in core and by that to all in device (4K). Signed-off-by: Noam Camus <noamc@ezchip.com> Cc: Peter Zijlstra <peterz@infradead.org>
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