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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-01-02 14:07:22 +0200
committerLinus Walleij <linus.walleij@linaro.org>2017-01-11 13:49:05 +0100
commit17fab473693e8357a9aa6fee4fbed6c13a34bd81 (patch)
tree20731f4618431c5fc27c0f0bfac7c08b34127186 /fs/binfmt_em86.c
parentecc8995363ee6231b32dad61c955b371b79cc4cf (diff)
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pinctrl: intel: Set pin direction properly
There are two bits in the PADCFG0 register to configure direction, one per TX/RX buffers. For now we wrongly assume that the GPIO is always requested before it is being used, which is not true when the GPIO is used through irqchip. In this case the GPIO is never requested and we never enable RX buffer for it. Fix this by setting both bits accordingly. Reported-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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