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| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2016-07-13 00:40:03 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-08-08 12:33:47 +0200 |
| commit | 1373eeeb3ed8651f44affea143dfc523bbcdc7e4 (patch) | |
| tree | 2dbffcfe79082fa62eb96ba5c1f995da9043011c /drivers | |
| parent | 2e67216c8ca63b7e5c06f0e6cf9af570f7e56b6b (diff) | |
| download | blackbird-op-linux-1373eeeb3ed8651f44affea143dfc523bbcdc7e4.tar.gz blackbird-op-linux-1373eeeb3ed8651f44affea143dfc523bbcdc7e4.zip | |
pinctrl: sh-pfc: r8a7792: Add SDHI pin groups
Add SDHI0 pin groups to the R8A7792 PFC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7792.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c b/drivers/pinctrl/sh-pfc/pfc-r8a7792.c index d51695d0d05f..4e52323ac783 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7792.c @@ -935,6 +935,43 @@ static const unsigned int scif3_clk_pins[] = { static const unsigned int scif3_clk_mux[] = { SCK3_MARK, }; +/* - SDHI0 ------------------------------------------------------------------ */ +static const unsigned int sdhi0_data1_pins[] = { + /* DAT0 */ + RCAR_GP_PIN(11, 7), +}; +static const unsigned int sdhi0_data1_mux[] = { + SD0_DAT0_MARK, +}; +static const unsigned int sdhi0_data4_pins[] = { + /* DAT[0-3] */ + RCAR_GP_PIN(11, 7), RCAR_GP_PIN(11, 8), + RCAR_GP_PIN(11, 9), RCAR_GP_PIN(11, 10), +}; +static const unsigned int sdhi0_data4_mux[] = { + SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK, +}; +static const unsigned int sdhi0_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(11, 5), RCAR_GP_PIN(11, 6), +}; +static const unsigned int sdhi0_ctrl_mux[] = { + SD0_CLK_MARK, SD0_CMD_MARK, +}; +static const unsigned int sdhi0_cd_pins[] = { + /* CD */ + RCAR_GP_PIN(11, 11), +}; +static const unsigned int sdhi0_cd_mux[] = { + SD0_CD_MARK, +}; +static const unsigned int sdhi0_wp_pins[] = { + /* WP */ + RCAR_GP_PIN(11, 12), +}; +static const unsigned int sdhi0_wp_mux[] = { + SD0_WP_MARK, +}; static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb_link), @@ -961,6 +998,11 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(scif0_ctrl), SH_PFC_PIN_GROUP(scif3_data), SH_PFC_PIN_GROUP(scif3_clk), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), }; static const char * const avb_groups[] = { @@ -1002,12 +1044,21 @@ static const char * const scif3_groups[] = { "scif3_clk", }; +static const char * const sdhi0_groups[] = { + "sdhi0_data1", + "sdhi0_data4", + "sdhi0_ctrl", + "sdhi0_cd", + "sdhi0_wp", +}; + static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(intc), SH_PFC_FUNCTION(lbsc), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif3), + SH_PFC_FUNCTION(sdhi0), }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
