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| author | Felipe Balbi <balbi@ti.com> | 2011-10-14 13:00:30 +0300 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2011-12-12 11:48:34 +0200 |
| commit | fae2b904aa85beecd0950026de28921ae65fb3da (patch) | |
| tree | b8f5a84150854fedb435b4c90948b2ae10ef1178 /drivers/usb/dwc3/core.h | |
| parent | d39ee7be2aaf0a53d7b5f43c13571bac95f7cc0c (diff) | |
| download | blackbird-op-linux-fae2b904aa85beecd0950026de28921ae65fb3da.tar.gz blackbird-op-linux-fae2b904aa85beecd0950026de28921ae65fb3da.zip | |
usb: dwc3: workaround: U1/U2 -> U0 transiton
RTL revisions <1.83a have an issue where, depending
on the link partner, the USB link might do multiple
entry/exit of low power states before a transfer
takes place causing degraded throughput.
The suggested workaround is to clear bits
12:9 of DCTL register if we see a transition
from U1|U2 to U0 and only re-enable that on
a transfer complete IRQ and we have no pending
transfers on any of the enabled endpoints.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc3/core.h')
| -rw-r--r-- | drivers/usb/dwc3/core.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index dc2db165412b..b901a4d3b068 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -569,6 +569,7 @@ struct dwc3_hwparams { * @regs_size: address space size * @irq: IRQ number * @num_event_buffers: calculated number of event buffers + * @u1u2: only used on revisions <1.83a for workaround * @maximum_speed: maximum speed requested (mainly for testing purposes) * @revision: revision register contents * @mode: mode of operation @@ -614,6 +615,7 @@ struct dwc3 { int irq; u32 num_event_buffers; + u32 u1u2; u32 maximum_speed; u32 revision; u32 mode; |
