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| author | Neil Armstrong <narmstrong@baylibre.com> | 2019-04-01 09:48:01 +0200 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2019-04-16 11:09:17 -0700 |
| commit | 2fe3b4bbc93ec30a173ebae7d2b8c530416df3af (patch) | |
| tree | 7bcc1f2b1f0c822f4a596a233de02550f681e623 /drivers/soc/amlogic | |
| parent | fdda0a6adc33536ad468f07db27325423703c5bc (diff) | |
| download | blackbird-op-linux-2fe3b4bbc93ec30a173ebae7d2b8c530416df3af.tar.gz blackbird-op-linux-2fe3b4bbc93ec30a173ebae7d2b8c530416df3af.zip | |
soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
The register bitmask to power on/off the VPU memories was incorectly set
to 0x2 instead of 0x3. While still working, let's use the recommended
vendor value instead.
Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'drivers/soc/amlogic')
| -rw-r--r-- | drivers/soc/amlogic/meson-gx-pwrc-vpu.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c index 6289965c42e9..05421d029dff 100644 --- a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c +++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c @@ -54,12 +54,12 @@ static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd) /* Power Down Memories */ for (i = 0; i < 32; i += 2) { regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, - 0x2 << i, 0x3 << i); + 0x3 << i, 0x3 << i); udelay(5); } for (i = 0; i < 32; i += 2) { regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, - 0x2 << i, 0x3 << i); + 0x3 << i, 0x3 << i); udelay(5); } for (i = 8; i < 16; i++) { @@ -108,13 +108,13 @@ static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd) /* Power Up Memories */ for (i = 0; i < 32; i += 2) { regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, - 0x2 << i, 0); + 0x3 << i, 0); udelay(5); } for (i = 0; i < 32; i += 2) { regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, - 0x2 << i, 0); + 0x3 << i, 0); udelay(5); } |
