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authorSudeep Holla <sudeep.holla@arm.com>2016-02-01 18:28:17 +0000
committerLinus Walleij <linus.walleij@linaro.org>2016-03-11 23:03:06 +0700
commit3c177a166253653bf9c377eb28a5155ea2d9b631 (patch)
tree4a7d7828952bc05b11aa89cf532bbaff231e766c /drivers/pinctrl
parent96851d391d02142f358fe7030f8795f84921329b (diff)
downloadblackbird-op-linux-3c177a166253653bf9c377eb28a5155ea2d9b631.tar.gz
blackbird-op-linux-3c177a166253653bf9c377eb28a5155ea2d9b631.zip
pinctrl: single: Use a separate lockdep class
The single pinmux controller can be cascaded to the other interrupt controllers. Hence when propagating wake-up settings to its parent interrupt controller, there's possiblity of detecting possible recursive locking and getting lockdep warning. This patch avoids this false positive by using a separate lockdep class for this single pinctrl interrupts. Cc: linux-gpio@vger.kernel.org Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/pinctrl-single.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index d24e5f1d1525..fb126d56ad40 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -255,6 +255,13 @@ static enum pin_config_param pcs_bias[] = {
};
/*
+ * This lock class tells lockdep that irqchip core that this single
+ * pinctrl can be in a different category than its parents, so it won't
+ * report false recursion.
+ */
+static struct lock_class_key pcs_lock_class;
+
+/*
* REVISIT: Reads and writes could eventually use regmap or something
* generic. But at least on omaps, some mux registers are performance
* critical as they may need to be remuxed every time before and after
@@ -1713,6 +1720,7 @@ static int pcs_irqdomain_map(struct irq_domain *d, unsigned int irq,
irq_set_chip_data(irq, pcs_soc);
irq_set_chip_and_handler(irq, &pcs->chip,
handle_level_irq);
+ irq_set_lockdep_class(irq, &pcs_lock_class);
irq_set_noprobe(irq);
return 0;
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