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authorBin Shi <Bin.Shi@csr.com>2014-01-03 10:59:24 +0800
committerLinus Walleij <linus.walleij@linaro.org>2014-01-08 10:50:21 +0100
commitcbc3b873c8a152fb76a0d4d5697319d9beda3d85 (patch)
tree313c876e83cd04e2fa6f20f1431f13264b6096eb /drivers/pinctrl/sirf
parent6225633d7154f6ce005e389ef0a80ee2cc644608 (diff)
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pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
sdmmc5 has only 3 pins CMD, CLK, DATA which are connected with CSR TriG RF multi-GNSS. The hardware connection is like: DATA -- GPS_SGN CLK -- GPS_RF_CLK CMD -- GPS_MAG here we drop redundant pins in sdmmc5 group. Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sirf')
-rw-r--r--drivers/pinctrl/sirf/pinctrl-prima2.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/pinctrl/sirf/pinctrl-prima2.c b/drivers/pinctrl/sirf/pinctrl-prima2.c
index 050777be0f1e..97046410e0cf 100644
--- a/drivers/pinctrl/sirf/pinctrl-prima2.c
+++ b/drivers/pinctrl/sirf/pinctrl-prima2.c
@@ -467,12 +467,6 @@ static const struct sirfsoc_muxmask sdmmc5_muxmask[] = {
{
.group = 0,
.mask = BIT(24) | BIT(25) | BIT(26),
- }, {
- .group = 1,
- .mask = BIT(29),
- }, {
- .group = 2,
- .mask = BIT(0) | BIT(1),
},
};
@@ -484,7 +478,7 @@ static const struct sirfsoc_padmux sdmmc5_padmux = {
.funcval = BIT(13) | BIT(14),
};
-static const unsigned sdmmc5_pins[] = { 24, 25, 26, 61, 64, 65 };
+static const unsigned sdmmc5_pins[] = { 24, 25, 26 };
static const struct sirfsoc_muxmask usp0_muxmask[] = {
{
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