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authorCarolyn Wyborny <carolyn.wyborny@intel.com>2011-03-11 20:43:54 -0800
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-03-12 04:09:55 -0800
commit831ec0b4226cec7ea34f5c4c9810e78aeb2069bf (patch)
tree3576b08f16304217c5353b5a6aa2fa5ba5350187 /drivers/net/igb/e1000_regs.h
parent4322e561a93ec7ee034b603a6c610e7be90d4e8a (diff)
downloadblackbird-op-linux-831ec0b4226cec7ea34f5c4c9810e78aeb2069bf.tar.gz
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igb: Add DMA Coalescing feature to driver
This patch add DMA Coalescing which is a power-saving feature that coalesces DMA writes in order to stay in a low-power state as much as possible. Feature is disabled by default. Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/igb/e1000_regs.h')
-rw-r--r--drivers/net/igb/e1000_regs.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_regs.h b/drivers/net/igb/e1000_regs.h
index b2f8e593da87..ad77ed510d7c 100644
--- a/drivers/net/igb/e1000_regs.h
+++ b/drivers/net/igb/e1000_regs.h
@@ -106,6 +106,15 @@
#define E1000_RQDPC(_n) (0x0C030 + ((_n) * 0x40))
+/* DMA Coalescing registers */
+#define E1000_DMACR 0x02508 /* Control Register */
+#define E1000_DMCTXTH 0x03550 /* Transmit Threshold */
+#define E1000_DMCTLX 0x02514 /* Time to Lx Request */
+#define E1000_DMCRTRH 0x05DD0 /* Receive Packet Rate Threshold */
+#define E1000_DMCCNT 0x05DD4 /* Current Rx Count */
+#define E1000_FCRTC 0x02170 /* Flow Control Rx high watermark */
+#define E1000_PCIEMISC 0x05BB8 /* PCIE misc config register */
+
/* TX Rate Limit Registers */
#define E1000_RTTDQSEL 0x3604 /* Tx Desc Plane Queue Select - WO */
#define E1000_RTTBCNRC 0x36B0 /* Tx BCN Rate-Scheduler Config - WO */
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