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authorAlex Dubov <oakad@yahoo.com>2008-03-19 17:01:08 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-03-19 18:53:37 -0700
commitcf821e8f53e3d147ebae03c8c710d2b8842d88a1 (patch)
treecfe5330049c6f86bc67950fbea1e8b11fac9eaae /drivers/memstick
parent962ee1b10bff5e99e9ecb2a5f4e6399a0214c9cf (diff)
downloadblackbird-op-linux-cf821e8f53e3d147ebae03c8c710d2b8842d88a1.tar.gz
blackbird-op-linux-cf821e8f53e3d147ebae03c8c710d2b8842d88a1.zip
memstick: optimize setup of JMicron host parameters
Set correct clock management values to improve over-all performance. Signed-off-by: Alex Dubov <oakad@yahoo.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/memstick')
-rw-r--r--drivers/memstick/host/jmb38x_ms.c60
1 files changed, 30 insertions, 30 deletions
diff --git a/drivers/memstick/host/jmb38x_ms.c b/drivers/memstick/host/jmb38x_ms.c
index f91037d50422..8770a5fac3b6 100644
--- a/drivers/memstick/host/jmb38x_ms.c
+++ b/drivers/memstick/host/jmb38x_ms.c
@@ -131,6 +131,12 @@ struct jmb38x_ms {
#define PAD_PU_PD_ON_MS_SOCK0 0x5f8f0000
#define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000
+#define CLOCK_CONTROL_40MHZ 0x00000001
+#define CLOCK_CONTROL_50MHZ 0x00000002
+#define CLOCK_CONTROL_60MHZ 0x00000008
+#define CLOCK_CONTROL_62_5MHZ 0x0000000c
+#define CLOCK_CONTROL_OFF 0x00000000
+
enum {
CMD_READY = 0x01,
FIFO_READY = 0x02,
@@ -607,19 +613,18 @@ static void jmb38x_ms_reset(struct jmb38x_ms_host *host)
{
unsigned int host_ctl = readl(host->addr + HOST_CONTROL);
- writel(host_ctl | HOST_CONTROL_RESET_REQ | HOST_CONTROL_RESET,
- host->addr + HOST_CONTROL);
+ writel(HOST_CONTROL_RESET_REQ, host->addr + HOST_CONTROL);
while (HOST_CONTROL_RESET_REQ
& (host_ctl = readl(host->addr + HOST_CONTROL))) {
- ndelay(100);
- dev_dbg(&host->chip->pdev->dev, "reset\n");
+ ndelay(20);
+ dev_dbg(&host->chip->pdev->dev, "reset %08x\n", host_ctl);
}
- writel(INT_STATUS_ALL, host->addr + INT_STATUS_ENABLE);
+ writel(HOST_CONTROL_RESET, host->addr + HOST_CONTROL);
+ mmiowb();
writel(INT_STATUS_ALL, host->addr + INT_SIGNAL_ENABLE);
-
- dev_dbg(&host->chip->pdev->dev, "reset\n");
+ writel(INT_STATUS_ALL, host->addr + INT_STATUS_ENABLE);
}
static void jmb38x_ms_set_param(struct memstick_host *msh,
@@ -627,10 +632,8 @@ static void jmb38x_ms_set_param(struct memstick_host *msh,
int value)
{
struct jmb38x_ms_host *host = memstick_priv(msh);
- unsigned int host_ctl;
- unsigned long flags;
-
- spin_lock_irqsave(&host->lock, flags);
+ unsigned int host_ctl = readl(host->addr + HOST_CONTROL);
+ unsigned int clock_ctl = CLOCK_CONTROL_40MHZ, clock_delay = 0;
switch (param) {
case MEMSTICK_POWER:
@@ -638,60 +641,57 @@ static void jmb38x_ms_set_param(struct memstick_host *msh,
jmb38x_ms_reset(host);
writel(host->id ? PAD_PU_PD_ON_MS_SOCK1
- : PAD_PU_PD_ON_MS_SOCK0,
+ : PAD_PU_PD_ON_MS_SOCK0,
host->addr + PAD_PU_PD);
writel(PAD_OUTPUT_ENABLE_MS,
host->addr + PAD_OUTPUT_ENABLE);
- host_ctl = readl(host->addr + HOST_CONTROL);
- host_ctl |= 7;
- writel(host_ctl | (HOST_CONTROL_POWER_EN
- | HOST_CONTROL_CLOCK_EN),
- host->addr + HOST_CONTROL);
+ host_ctl = 7;
+ host_ctl |= HOST_CONTROL_POWER_EN
+ | HOST_CONTROL_CLOCK_EN;
+ writel(host_ctl, host->addr + HOST_CONTROL);
dev_dbg(&host->chip->pdev->dev, "power on\n");
} else if (value == MEMSTICK_POWER_OFF) {
- writel(readl(host->addr + HOST_CONTROL)
- & ~(HOST_CONTROL_POWER_EN
- | HOST_CONTROL_CLOCK_EN),
- host->addr + HOST_CONTROL);
+ host_ctl &= ~(HOST_CONTROL_POWER_EN
+ | HOST_CONTROL_CLOCK_EN);
+ writel(host_ctl, host->addr + HOST_CONTROL);
writel(0, host->addr + PAD_OUTPUT_ENABLE);
writel(PAD_PU_PD_OFF, host->addr + PAD_PU_PD);
dev_dbg(&host->chip->pdev->dev, "power off\n");
}
break;
case MEMSTICK_INTERFACE:
- /* jmb38x_ms_reset(host); */
-
- host_ctl = readl(host->addr + HOST_CONTROL);
host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT);
- /* host_ctl |= 7; */
if (value == MEMSTICK_SERIAL) {
host_ctl &= ~HOST_CONTROL_FAST_CLK;
host_ctl |= HOST_CONTROL_IF_SERIAL
<< HOST_CONTROL_IF_SHIFT;
host_ctl |= HOST_CONTROL_REI;
- writel(0, host->addr + CLOCK_DELAY);
+ clock_ctl = CLOCK_CONTROL_40MHZ;
+ clock_delay = 0;
} else if (value == MEMSTICK_PAR4) {
host_ctl |= HOST_CONTROL_FAST_CLK;
host_ctl |= HOST_CONTROL_IF_PAR4
<< HOST_CONTROL_IF_SHIFT;
host_ctl &= ~HOST_CONTROL_REI;
- writel(4, host->addr + CLOCK_DELAY);
+ clock_ctl = CLOCK_CONTROL_40MHZ;
+ clock_delay = 4;
} else if (value == MEMSTICK_PAR8) {
host_ctl |= HOST_CONTROL_FAST_CLK;
host_ctl |= HOST_CONTROL_IF_PAR8
<< HOST_CONTROL_IF_SHIFT;
host_ctl &= ~HOST_CONTROL_REI;
- writel(4, host->addr + CLOCK_DELAY);
+ clock_ctl = CLOCK_CONTROL_60MHZ;
+ clock_delay = 0;
}
writel(host_ctl, host->addr + HOST_CONTROL);
+ writel(clock_ctl, host->addr + CLOCK_CONTROL);
+ writel(clock_delay, host->addr + CLOCK_DELAY);
break;
};
-
- spin_unlock_irqrestore(&host->lock, flags);
}
#ifdef CONFIG_PM
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