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authorJosue Albarran <j-albarran@ti.com>2017-07-28 15:49:14 -0500
committerJoerg Roedel <jroedel@suse.de>2017-08-04 11:59:29 +0200
commitbfee0cf0ee1da0010b97ba88ed241d6f7bed3e7a (patch)
tree0eed00b75a37beb44c45082c9622db2de318271f /drivers/iommu/omap-iommu.h
parent159d3e35da3b6ff36b9077a8719bcac215155771 (diff)
downloadblackbird-op-linux-bfee0cf0ee1da0010b97ba88ed241d6f7bed3e7a.tar.gz
blackbird-op-linux-bfee0cf0ee1da0010b97ba88ed241d6f7bed3e7a.zip
iommu/omap: Use DMA-API for performing cache flushes
The OMAP IOMMU driver was using ARM assembly code directly for flushing the MMU page table entries from the caches. This caused MMU faults on OMAP4 (Cortex-A9 based SoCs) as L2 caches were not handled due to the presence of a PL310 L2 Cache Controller. These faults were however not seen on OMAP5/DRA7 SoCs (Cortex-A15 based SoCs). The OMAP IOMMU driver is adapted to use the DMA Streaming API instead now to flush the page table/directory table entries from the CPU caches. This ensures that the devices always see the updated page table entries. The outer caches are now addressed automatically with the usage of the DMA API. Signed-off-by: Josue Albarran <j-albarran@ti.com> Acked-by: Suman Anna <s-anna@ti.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/omap-iommu.h')
-rw-r--r--drivers/iommu/omap-iommu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/omap-iommu.h b/drivers/iommu/omap-iommu.h
index 6e70515e6038..a675af29a6ec 100644
--- a/drivers/iommu/omap-iommu.h
+++ b/drivers/iommu/omap-iommu.h
@@ -61,6 +61,7 @@ struct omap_iommu {
*/
u32 *iopgd;
spinlock_t page_table_lock; /* protect iopgd */
+ dma_addr_t pd_dma;
int nr_tlb_entries;
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