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authorAlex Dai <yu.dai@intel.com>2015-09-22 13:48:40 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-09-30 10:20:00 +0200
commit0d44d3fa2b9089b0039118351773d465204ad581 (patch)
tree2e0b3c9603ede9f864b008e6cfd6d2e575242a80 /drivers/gpu/drm
parent124abe076fd8b360dd7c651046cb8b204268efeb (diff)
downloadblackbird-op-linux-0d44d3fa2b9089b0039118351773d465204ad581.tar.gz
blackbird-op-linux-0d44d3fa2b9089b0039118351773d465204ad581.zip
drm/i915/guc: Fix a bug in GuC status check
Bit 16 of GuC status indicates resuming from RC6. The LAPIC_DONE status is a reliable readiness flag only when resuming from RC6. This fix a racing issue that allocation of doorbell fails whilst GuC init is not finished. Signed-off-by: Alex Dai <yu.dai@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/i915_guc_reg.h1
-rw-r--r--drivers/gpu/drm/i915/intel_guc_loader.c5
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
index 9d79a6b7cc2f..b35566164c4d 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -37,6 +37,7 @@
#define GS_UKERNEL_READY (0xF0 << GS_UKERNEL_SHIFT)
#define GS_MIA_SHIFT 16
#define GS_MIA_MASK (0x07 << GS_MIA_SHIFT)
+#define GS_MIA_CORE_STATE (1 << GS_MIA_SHIFT)
#define SOFT_SCRATCH(n) (0xc180 + ((n) * 4))
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index e0601cc5a795..40241f37e24b 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -209,9 +209,10 @@ static inline bool guc_ucode_response(struct drm_i915_private *dev_priv,
u32 *status)
{
u32 val = I915_READ(GUC_STATUS);
+ u32 uk_val = val & GS_UKERNEL_MASK;
*status = val;
- return ((val & GS_UKERNEL_MASK) == GS_UKERNEL_READY ||
- (val & GS_UKERNEL_MASK) == GS_UKERNEL_LAPIC_DONE);
+ return (uk_val == GS_UKERNEL_READY ||
+ ((val & GS_MIA_CORE_STATE) && uk_val == GS_UKERNEL_LAPIC_DONE));
}
/*
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