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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-02-02 10:55:38 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-03-30 19:42:37 +0100 |
| commit | 622494a3560b13e05c9f2049bfab8e7fb12c67a2 (patch) | |
| tree | 179bdf7557f4defb5b078778da9da7ad59ccdc9d /drivers/gpu/drm/tegra/drm.c | |
| parent | 6bcf495317857e4e4cfb2e6f57fa8230cedc1362 (diff) | |
| download | blackbird-op-linux-622494a3560b13e05c9f2049bfab8e7fb12c67a2.tar.gz blackbird-op-linux-622494a3560b13e05c9f2049bfab8e7fb12c67a2.zip | |
drm: bridge/dw_hdmi: adjust n/cts setting order
Patch derived from one from Yakir Yang. Yakir Yang says:
For Designerware HDMI, the following write sequence is recommended:
1. aud_n3 (set bit ncts_atomic_write if desired)
2. aud_cts3 (set CTS_manual and CTS value if desired/enabled)
3. aud_cts2 (required in CTS_manual)
4. aud_cts1 (required in CTS_manual)
5. aud_n3 (bit ncts_atomic_write with same value as in step 1.)
6. aud_n2
7. aud_n1
However, avoid the ncts_atomic_write_bit and CTS_manual settings in this
patch, both of which are marked reserved in the iMX6 documentation. All
iMX6 code in the wild seems to want CTS_manual cleared.
Having requested clarification from FSL, it appears that neither of
these bits are implemented in their version of the IP.
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/gpu/drm/tegra/drm.c')
0 files changed, 0 insertions, 0 deletions
