Merge tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

SoC related changes for omaps for v3.18 merge window:

- PM changes to make the code easier to use on newer SoCs
- PM changes for newer SoCs suspend and resume and wake-up events
- Minor clean-up to remove dead Kconfig options

Note that these have a dependency to the fixes-v3.18-not-urgent
tag and is based on a commit in that series.

* tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (514 commits)
  ARM: OMAP5+: Reuse OMAP4 PM code for OMAP5 and DRA7
  ARM: dts: OMAP3+: Add PRM interrupt
  ARM: omap: Remove stray ARCH_HAS_OPP references
  ARM: DRA7: Add hook in SoC initcalls to enable pm initialization
  ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization
  ARM: OMAP5 / DRA7: Enable CPU RET on suspend
  ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug
  ARM: OMAP5 / DRA7: PM: Avoid all SAR saves
  ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains
  ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default
  ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency
  ARM: OMAP5 / DRA7: PM: Update CPU context register offset
  ARM: AM437x: use pdata quirks for pinctrl information
  ARM: DRA7: use pdata quirks for pinctrl information
  ARM: OMAP5: use pdata quirks for pinctrl information
  ARM: OMAP4+: PM: Use only valid low power state for CPU hotplug
  ARM: OMAP4+: PM: use only valid low power state for suspend
  ARM: OMAP4+: PM: Make logic state programmable
  ARM: OMAP2+: powerdomain: introduce logic for finding valid power domain
  ARM: OMAP2+: powerdomain: pwrdm_for_each_clkdm iterate only valid clkdms
  ...

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 4fedd14e670a..dbca60c7d097 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2869,7 +2869,7 @@ static int evergreen_cp_start(struct radeon_device *rdev)
 	radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1));
 	radeon_ring_write(ring, 0);
 	radeon_ring_write(ring, 0);
-	radeon_ring_unlock_commit(rdev, ring);
+	radeon_ring_unlock_commit(rdev, ring, false);
 
 	cp_me = 0xff;
 	WREG32(CP_ME_CNTL, cp_me);
@@ -2912,7 +2912,7 @@ static int evergreen_cp_start(struct radeon_device *rdev)
 	radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */
 	radeon_ring_write(ring, 0x00000010); /*  */
 
-	radeon_ring_unlock_commit(rdev, ring);
+	radeon_ring_unlock_commit(rdev, ring, false);
 
 	return 0;
 }