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| author | Francisco Jerez <currojerez@riseup.net> | 2011-05-24 15:57:14 +0200 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2011-06-07 09:22:29 +1000 |
| commit | c1003d9c90f410777ab57f675b2a575c9c7ab5d7 (patch) | |
| tree | 214655e8c4bfa806dcf8ce08efbbad6d3e5d3431 /drivers/gpu/drm/nouveau/nv04_crtc.c | |
| parent | 18b54c4d5893f32641d4961563c0f196cc04dc83 (diff) | |
| download | blackbird-op-linux-c1003d9c90f410777ab57f675b2a575c9c7ab5d7.tar.gz blackbird-op-linux-c1003d9c90f410777ab57f675b2a575c9c7ab5d7.zip | |
drm/nv17-nv40: Fix modesetting failure when pitch == 4096px (fdo bug 35901).
Reported-by: Mario Bachmann <grafgrimm77@gmx.de>
Tested-by: Greg Turner <gmturner007@ameritech.net>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_crtc.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv04_crtc.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c index 3c78bc81357e..f1a3ae491995 100644 --- a/drivers/gpu/drm/nouveau/nv04_crtc.c +++ b/drivers/gpu/drm/nouveau/nv04_crtc.c @@ -376,7 +376,10 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode) */ /* framebuffer can be larger than crtc scanout area. */ - regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); + regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = + XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); + regp->CRTC[NV_CIO_CRE_42] = + XLATE(fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11); regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ? MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00; regp->CRTC[NV_CIO_CRE_LSR_INDEX] = XLATE(horizBlankEnd, 6, NV_CIO_CRE_LSR_HBE_6) | @@ -824,8 +827,11 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitch >> 3; regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = XLATE(drm_fb->pitch >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); + regp->CRTC[NV_CIO_CRE_42] = + XLATE(drm_fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11); crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX); crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX); + crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_42); /* Update the framebuffer location. */ regp->fb_start = nv_crtc->fb.offset & ~3; |
