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authorDave Airlie <airlied@redhat.com>2010-10-06 12:38:04 +1000
committerDave Airlie <airlied@redhat.com>2010-10-06 12:57:11 +1000
commit0c8eb0dc65f5a78b252eeff6c729ba4741390e23 (patch)
treeb3a64b52e9357ca8ea99966d411842659e2a27cf /drivers/gpu/drm/nouveau/nouveau_channel.c
parente6b46ee712b92db1cc2449cf4f65bc635366cad4 (diff)
parentd961db75ce86a84f1f04e91ad1014653ed7d9f46 (diff)
downloadblackbird-op-linux-0c8eb0dc65f5a78b252eeff6c729ba4741390e23.tar.gz
blackbird-op-linux-0c8eb0dc65f5a78b252eeff6c729ba4741390e23.zip
Merge remote branch 'nouveau/for-airlied' of ../drm-nouveau-next into drm-core-next
[airlied - add fix for vmwgfx build] * 'nouveau/for-airlied' of ../drm-nouveau-next: (93 commits) drm/ttm: restructure to allow driver to plug in alternate memory manager drm/ttm: introduce utility function to free an allocated memory node drm/nouveau: fix thinkos in mem timing table recordlen check drm/nouveau: parse voltage from perf 0x40 entires drm/nouveau: don't use the default pll limits in table v2.1 on nv50+ cards drm/nv50: Fix large 3D performance regression caused by the interchannel sync patches. drm/nouveau: Synchronize buffer object moves in hardware. drm/nouveau: Use semaphores to handle inter-channel sync in hardware. drm/nouveau: Provide a means to have arbitrary work run on fence completion. drm/nouveau: Minor refactoring/cleanup of the fence code. drm/nouveau: Add a module option to force card POST. drm/nv50: prevent (IB_PUT == IB_GET) for occurring unless idle drm/nv0x-nv4x: Leave the 0x40 bit untouched when changing CRE_LCD. drm/nv30-nv40: Fix postdivider mask when writing engine/memory PLLs. drm/nouveau: Fix perf table parsing on BMP v5.25. drm/nouveau: fix required mode bandwidth calculation for DP drm/nouveau: fix typo in c2aa91afea5f7e7ae4530fabd37414a79c03328c drm/nva3: split pm backend out from nv50 drm/nouveau: run perflvl and M table scripts on mem clock change drm/nouveau: pass perflvl struct to clock_pre() ...
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_channel.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_channel.c23
1 files changed, 9 insertions, 14 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index 0480f064f2c1..373950e34814 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -48,14 +48,14 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)
dev_priv->gart_info.aper_size,
NV_DMA_ACCESS_RO, &pushbuf,
NULL);
- chan->pushbuf_base = pb->bo.mem.mm_node->start << PAGE_SHIFT;
+ chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT;
} else
if (dev_priv->card_type != NV_04) {
ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0,
dev_priv->fb_available_size,
NV_DMA_ACCESS_RO,
NV_DMA_TARGET_VIDMEM, &pushbuf);
- chan->pushbuf_base = pb->bo.mem.mm_node->start << PAGE_SHIFT;
+ chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT;
} else {
/* NV04 cmdbuf hack, from original ddx.. not sure of it's
* exact reason for existing :) PCI access to cmdbuf in
@@ -67,17 +67,11 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)
dev_priv->fb_available_size,
NV_DMA_ACCESS_RO,
NV_DMA_TARGET_PCI, &pushbuf);
- chan->pushbuf_base = pb->bo.mem.mm_node->start << PAGE_SHIFT;
- }
-
- ret = nouveau_gpuobj_ref_add(dev, chan, 0, pushbuf, &chan->pushbuf);
- if (ret) {
- NV_ERROR(dev, "Error referencing pushbuf ctxdma: %d\n", ret);
- if (pushbuf != dev_priv->gart_info.sg_ctxdma)
- nouveau_gpuobj_del(dev, &pushbuf);
- return ret;
+ chan->pushbuf_base = pb->bo.mem.start << PAGE_SHIFT;
}
+ nouveau_gpuobj_ref(pushbuf, &chan->pushbuf);
+ nouveau_gpuobj_ref(NULL, &pushbuf);
return 0;
}
@@ -229,7 +223,7 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
ret = nouveau_dma_init(chan);
if (!ret)
- ret = nouveau_fence_init(chan);
+ ret = nouveau_fence_channel_init(chan);
if (ret) {
nouveau_channel_free(chan);
return ret;
@@ -276,7 +270,7 @@ nouveau_channel_free(struct nouveau_channel *chan)
* above attempts at idling were OK, but if we failed this'll tell TTM
* we're done with the buffers.
*/
- nouveau_fence_fini(chan);
+ nouveau_fence_channel_fini(chan);
/* This will prevent pfifo from switching channels. */
pfifo->reassign(dev, false);
@@ -308,8 +302,9 @@ nouveau_channel_free(struct nouveau_channel *chan)
spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
/* Release the channel's resources */
- nouveau_gpuobj_ref_del(dev, &chan->pushbuf);
+ nouveau_gpuobj_ref(NULL, &chan->pushbuf);
if (chan->pushbuf_bo) {
+ nouveau_bo_unmap(chan->pushbuf_bo);
nouveau_bo_unpin(chan->pushbuf_bo);
nouveau_bo_ref(NULL, &chan->pushbuf_bo);
}
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