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authorIlia Mirkin <imirkin@alum.mit.edu>2017-01-19 22:56:30 -0500
committerBen Skeggs <bskeggs@redhat.com>2017-01-31 20:05:26 +1000
commit24bf7ae359b8cca165bb30742d2b1c03a1eb23af (patch)
tree6aeadac4a9dee3adc155b2bf65a72cdc8e1e2ed4 /drivers/gpu/drm/nouveau/dispnv04
parentd347583a39e2df609a9e40c835f72d3614665b53 (diff)
downloadblackbird-op-linux-24bf7ae359b8cca165bb30742d2b1c03a1eb23af.tar.gz
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drm/nouveau/nv1a,nv1f/disp: fix memory clock rate retrieval
Based on the xf86-video-nv code, NFORCE (NV1A) and NFORCE2 (NV1F) have a different way of retrieving clocks. See the nv_hw.c:nForceUpdateArbitrationSettings function in the original code for how these clocks were accessed. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54587 Cc: stable@vger.kernel.org Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/dispnv04')
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/hw.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv04/hw.c b/drivers/gpu/drm/nouveau/dispnv04/hw.c
index 74856a8b8f35..e64f52464ecf 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/hw.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c
@@ -222,6 +222,7 @@ nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
uint32_t mpllP;
pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP);
+ mpllP = (mpllP >> 8) & 0xf;
if (!mpllP)
mpllP = 4;
@@ -232,7 +233,7 @@ nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
uint32_t clock;
pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock);
- return clock;
+ return clock / 1000;
}
ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals);
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