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authorDamien Lespiau <damien.lespiau@intel.com>2013-06-24 18:29:34 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-07-01 11:14:44 +0200
commitf5adf94e5fed2468eef4f0c094b66bf834770d7b (patch)
tree434e98438c4e00286db68cba5179c4eb0f7db12d /drivers/gpu/drm/i915/intel_display.c
parent3765f3048651586e2617793e9efe184ff8c79a97 (diff)
downloadblackbird-op-linux-f5adf94e5fed2468eef4f0c094b66bf834770d7b.tar.gz
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drm/i915: Introduce an HAS_IPS() macro
Follow the trend and don't code conditions with platforms but with features. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b08d1f9ce0de..17d5c7a3468b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3250,7 +3250,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
/* IPS only exists on ULT machines and is tied to pipe A. */
static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
{
- return IS_ULT(crtc->base.dev) && crtc->pipe == PIPE_A;
+ return HAS_IPS(crtc->base.dev) && crtc->pipe == PIPE_A;
}
static void hsw_enable_ips(struct intel_crtc *crtc)
@@ -4069,7 +4069,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
pipe_config->pipe_bpp = 8*3;
}
- if (IS_HASWELL(dev))
+ if (HAS_IPS(dev))
hsw_compute_ips_config(crtc, pipe_config);
/* XXX: PCH clock sharing is done in ->mode_set, so make sure the old
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